rusticl: Enable copy for images created from buffers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>

rusticl: Enabling image fill for images created from buffers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>

rusticl: Enabling reading/writing for images created from buffers

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20378>

radv/rt: move radv_pipeline_key from rt_variables to traversal_data

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>

radv: remove unused parameters from radv_compute_pipeline_compile()

Also make this function static.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>

radv/rt: introduce and use radv_rt_pipeline_compile()

This is essentially a code-duplication of radv_compute_pipeline_compile()
but will later be more specialized for the needs of RT pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>

radv: expose radv_pipeline_capture_shaders()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>

radv: expose radv_postprocess_nir()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21764>

radv: fix defining RADV_USE_WSI_PLATFORM

RADV_USE_WSI_PLATFORM was unused in radv_CreateImage().

Fixes: 2a5d7f4926c ("radv: fix missing implementation of creating images from swapchains")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21763>

iris: Move iris_bo_wait_gem() to i915/iris_bufmgr.c

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>

iris: Move iris_bo_busy_gem() to i915/iris_bufmgr.c

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>

iris: Move bo_set_caching to kmd backend

For the platforms that call it, it a function in the hot path so
moving it to kmd backend.

After this patch i915/iris_bufmgr.c is empty but not removing it
as next patch will add functions to it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>

iris: Move bo_madvise to kmd backend

bo_madvise() is on hot path, so moving it to kmd backend.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21494>

intel/common: Implement the Xe functions for intel_gem

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21699>

intel/common: Implement the Xe functions for intel_engine

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21699>

radv: fix border color swizzle for stencil-only format on GFX9+

Swizzle of 8-bit stencil format is defined as _x__ but the hw expects
BC_SWIZZLE_XYZW.

Fixes dEQP-VK.pipeline.monolithic.sampler.border_swizzle.*s8_uint*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21482>

anv: fix sends_count_expectation assert on simd32

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21758>

ac/surface: only adjust pitch if surf_pitch was modified

Modifying pitch for all LINEAR surface isn't correct;
the original change that modified surf_pitch was only
intended for YUV textures.

This fixes vkGetImageSubresourceLayout rowPitch return value
for VK_FORMAT_BC3_UNORM_BLOCK + VK_IMAGE_TILING_LINEAR.

Fixes: fcc499d5 (ac/surface: adjust gfx9.pitch[*] based on surf->blk_w)

v2: add check for UYVY format (Pierre-Eric)
v3: move blk_w division to above if check (Pierre-Eric)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21595>

ci/lavapipe: fixes typo

Fixes: 5ee724e180bd ("ci/lavapipe: add recent occasional flake")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21759>

aco: use bitfield array helpers for valu modifiers

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>

aco: add bitfield array helper classes

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>

aco: remove VOP[123C]P? structs

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>

aco/optimizer: simplify using VALU instruction

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>

aco/print_ir: simplify using VALU instruction

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>

aco: validate VALU modifiers

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>

aco/ra: set opsel_hi to zero when converting to VOP2

Otherwise the new modifier validation will fail.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>

aco/ir: rework IR to have one common valu instruction struct

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>

aco: treat VINTERP_INREG as VALU

It's just v_fma with fixed DPP8 and builtin s_waitcnt_expcnt, so it can mostly
be handled as a pure VALU instruction.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21023>

radv: fix incorrect stride for primitives generated query with GDS

When the query pool uses GDS (for NGG), the stride is 40.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8412
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21650>

nir: fix nir_ishl_imm

Both GLSL & SPIRV have undefined values for shift > bitsize. But SM5
says :

   "This instruction performs a component-wise shift of each 32-bit
    value in src0 left by an unsigned integer bit count provided by
    the LSB 5 bits (0-31 range) in src1, inserting 0."

Better to not hard code the wrong behavior in NIR.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e227bb9fd5 ("nir/builder: add ishl_imm helper")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@colllabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21720>

radv: do not add descriptor BOs on update when the global BO list is used

It's unnecessary and already checked elsewhere like in
vkCmdBindDescriptorSets(). This improves performance of vkoverhead
test #76 (descriptor_1image) by +18%. It's the same performance as
PRO on my Threadripper 1950X now. This should also slightly improve
texel and buffer descriptors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20699>

gallivm: fix lp_vec_add_offset_ptr for 32 bit builds

The function assumed ptrs are always 64 bit sized.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8267
Fixes: 442d1fe5ad6 ("gallivm: use masked intrinsics for global and scratch access.")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21604>

rusticl/kernel: Images arg sizes also have to match the host pointer size

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8267
Fixes: b0d698c5328 ("rusticl: correctly check global argument size")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21604>

agx: Assert that memory index is 32-bit reg

Semantics will be wrong otherwise (reading garbage).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>

agx/lower_address: Handle 16-bit offsets

These need to be upconverted for correctness.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>

agx/lower_address: Fix handling of 64-bit immediates

We can't add a 64-bit immediate with the hardware iadd, that won't work. What we
can do is add a 32-bit immediate, derived as the low 32-bits of a 64-bit
nir_ssa_def.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>

agx/lower_address: Handle 8-bit load/store

Should work ok with the implicit up-conversion that the backend does.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>

agx/lower_address: Handle large shifts

If we manage to fold in a left shift that's bigger than the hardware can do, we
should at least avoid generating a useless right shift to feed the hardware
rather bailing completely.

For motivation, this form of address arithmetic is encountered when indexing
into arrays with large power-of-two element sizes (array-of-structs).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>

agx/lower_address: Optimize "shift + constant"

Optimize address arithmetic of the form

   base + u2u64((index << shift) + const)

into hardware operands

   base, index << (shift - format_shift) + const'

which (if format_shift = shift) can be simply

   base, index + const'

rather than the current naive translation

   base, ((index << shift) + const) >> format_shift

This saves at least one pointless shift. We can't do this optimization with
nir_opt_algebraic, because explicitly optimizing "(a << #b) >> #b" to "a" isn't
sound due to overflow. But there's no overflow issue here, which is what this
whole pass is designed around.

For motivation, this address arithmetic implements "dynamically indexing into an
array inside of a C structure", where the const is the offset of the array
relative to the structure.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>

agx/lower_address: Break on match

Once we've matched a summand, commit to it. This avoids needlessly checking the
second source if the first matched, and removes some indentation/funny control
flow.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21643>

Revert "ci: disable Collabora's LAVA lab for maintance"

This reverts commit https://gitlab.freedesktop.org/mesa/mesa/-/commit/6be7469df1e12bd57c697ff7e34bbda8286d67a2

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21356>

zink: always set batch usage for descriptors after barrier

this otherwise breaks unordered promotion calc

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

zink: set dynamic pcp for unordered cmdbuf

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

zink: bind descriptor buffers to unordered cmdbuf

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

zink: always set color writes on the unordered cmdbuf

this state has to be set, so ensure it is

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

zink: explicitly flush src clears when u_blittering

this otherwise relies on set_framebuffer_state flushing them,
which may or may not be accurate/desired

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

zink: don't unset existing access when adding resource binds

this breaks barrier calcs, but it was fine since there was a pre-barrier

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

zink: eliminate pre barrier for adding resource binds

this will automatically be handled by the copies below

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

zink: check for layout updates when unbinding samplerviews

not sure if it's a bug, but it should be consistent with shader image
unbinding, so here it is

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

zink: propagate valid_buffer_range when replacing buffer storage

this is otherwise unreliable

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

zink: fix descriptor update flagging on null ssbo set

this could unset the update flag if the last ssbo was null, which would
be a bug if it could ever be triggered

found by inspection

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

zink: only add deferred barrier on fb unbind when layout needs to change

this otherwise may have been a surface that was never drawn to or
already had its layout corrected, in which case a deferred barrier
is not only unnecessary, it might be broken

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21739>

intel/fs: use generated helpers for Wa_1209978020 / Wa_18012201914

Wa_1209978020 is a clone of Wa_18012201914.  Update references to
refer to the originating bug, and use generated helpers to ensure it
is applied to future platforms as needed.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21741>

intel/compiler: Drop non-scoped barrier handling

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>

gallivm: Drop non-scoped barrier handling

Now unreachable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>

ir3: Drop non-scoped barrier handling

Now unreachable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>

pan/mdg: Drop control_barrier handling

Now unreachable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>

pan/bi: Drop control_barrier handling

Now unreachable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>

glsl/nir: Use scoped_barrier for control barrier

Rather than control_barrier. This avoids the need to handle control_barrier at
all for backends that set use_scoped_barrier. This effectively matches what
spirv_to_nir emits, so Vulkan-capable compilers should be ok.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>

intel/compiler: Drop brw_nir_lower_scoped_barriers

Now that we handle scoped barriers with execution scope during
NIR -> Backend IR translation, this lowering is not needed anymore.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>

intel/vec4: Handle scoped barriers with execution scope

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>

intel/fs: Handle scoped barriers with execution scope

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21634>

venus: revert back the warn order

This reverts
- commit 4ae4e4362cfdab91be81c48195674d354ef45602
- commit f54aa49c1439440c88a1c6a1046be11dba3ab44e

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21542>

venus: vn_relax to abort on ring fatal status upon warn order

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21542>

venus: propagate vn_ring to vn_relax

This is to prepare for vn_relax to check ring status as well as pinging
renderer.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21542>

venus: abort ring submit when ring is in fatal status

This change also migrates to use the protocol defined status enums.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21542>

venus: sync to latest protocol for ring status enum

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21542>

intel/fs: use generated workaround helpers for Wa_14010017096

This workaround does not apply beyond gen 12.0.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21746>

meson: forcefully disable libdrm when host doesn't have it

Signed-off-by: Mark Collins <mark@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21724>

nir/opt_barrier: Generalize to control barriers

For GLSL, we want to optimize code like

   memoryBarrierBuffer();
   controlBarrier();

into a single scoped_barrier intrinsic for the backend to consume. Now that
backends can get scoped_barriers everywhere, what's left is enabling backends to
combine these barriers together. We already have an Intel-specific pass for
combining memory barriers; it just needs a teensy bit of generalization to allow
combining all sorts of barriers together.

This avoids code quality regression on Asahi when switching to purely scoped
barriers. It's probably useful for other backends too.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21661>

intel: Use nir_lower_tex_options::lower_index_to_offset

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21546>

ir3: Use lower_index_to_offset

Instead of doing the add ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21546>

pan/bi: Use lower_index_to_offset

Instead of doing the add ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21546>

nir/lower_tex: Add lower_index_to_offset

Some backends can handle a constant texture index or a dynamic texture index but
not a constant texture index plus a dynamic texture offset. Add a nir_lower_tex
option to lower to one of these options.

v2: Use more straightforward code proposed by Faith.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21546>

nouveau: Fix null dereference in nouveau_pushbuf_destroy

This may happen if the Nouveau device fails to initialize before
the pushbuf is set up; the abort logic will call this either way.

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21611>

ci/fdno: Only run full tests on a limited subset of machines

Though not many people run full test runs, it occupies 2/7 a630 slots
for nearly 2 hours. If more than one person does this at a time, it can
be an effective DoS and make merges time out.

Limit full runs to a subset of the runners, such that at least some of
them will always be available for us.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21737>

freedreno/common: Replace or_mask() with BitsetEnum<T>

Use template and operator overloading to make dealing with bitmask enums
shared between C and C++ easier.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21535>

v3d/ci: add dEQP-GLES3.functional.texture.specification.teximage2d_pbo.*_cube flakes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21735>

zink: unbind fb on context destroy

this ensures that batch refs are added for fb surfaces on unbind, which
prevents stale batch tracking from persisting on resources
after the context is destroyed

fixes:
*EGL.functional.render.multi_context*

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21727>

ci: Handle carriage return characters in LAVA logs

This commit updates LogFollower class to handle carriage return
characters in LAVA logs. LAVA treats carriage return characters as a
line break, so each carriage return in an output console is mapped to a
console line in LAVA.

The updated LogFollower class now merges lines that end with a carriage
return character into a single line, making the Gitlab sections work
correctly. In addition, the `remove_trailing_whitespace` method has been
updated to remove trailing `\r\n` characters from log lines.

The `test_lava_log_merge_carriage_return_lines` test function has also
been updated to test for carriage returns at the end of the previous
line.

Closes: #8242

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21614>

hud: add GALLIUM_HUD_OPACITY envvar

GALLIUM_HUD_OPACITY can be used with a % value from 0 to 100, to specify
the opacity of the gallium hud background.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Chris Healy <healych@amazon.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20339>

hud: use defines for default scale/rotation/visibility values

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20339>

raseonsi/vcn: fix a h264 decoding issue

reason:
   some h264 streams have some strange pictures, from
   vaapi input these pictures don't have a reference frame,
   however, they are not intra only pictures, in MB layer
   these pictures are looking for some references, if they
   cannot find it. It could cause PF.

   when reference pictures exist, it will need to set used_for
   reference_flags, therefore if that is set, however the
   number of reference frames is zero, which is odd, it
   should be avoided.

solution:
   In the above case,  to scan the ref list so that it will
   make at least one reference available to avoid crash, since
   this is not accurate enough, it could cause some artifacts.
   And in that case, it will need to be checked individually
   for another solution.

closes: https://gitlab.freedesktop.org/drm/amd/-/issues/1462
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8401
Cc: mesa-stable
Tested-by: llyyr <llyyr.public@gmail.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21732>

zink: add frame trace markers on the queue

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21655>

radeonsi: Add NV12 support for AV1

8bit av1 decoding cannot use NV12 output, which is caused by missing NV12 RT format.
It's a regression caused by commit [0504a3b0].
Fixes: 0504a3b0  ("radeonsi: correctly declare YUV420_10 RT Format support for AV1")
Cc: mesa-stable
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: David Wu <David.Wu3@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21697>

wsi: move an assertion in wsi_xxx_surface_get_capabilities2()

Hit this with vulkaninfo on X11, probably a vulkaninfo bug. Though
moving the assertion doesn't hurt.

Fixes: be0dcbdfa22 ("wsi/x11: Implement EXT_swapchain_maintenance1.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21722>

zink: when skipping a TRANSFER_DST image barrier, set access tracking

this otherwise breaks subsequent barriers if the first barrier of the batch
is a TRANSFER_DST on an image that can skip such a barrier

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: remove debug markers for u_blitter ops

these don't actually work; it creates the marker for the op, but
then the "end" of the marker is effectively determined to be the end
of the cmdbuf

instead, detect whether a draw is from u_blitter and add a marker there

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: pass cmdbuf to debug marker begin

this is otherwise broken with cmdbuf reordering

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: reorder some blit debug markers

avoid capturing barrier and other ops in these

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: be more descriptive with perfetto buffer barriers

this should print some nice info in the graphs now

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: determine whether debug markers are used on screen create

make this easier to reuse

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: skip buffer barriers if the buffer can be easily proved idle

this should have no pending write hazards, which means this barrier
can just be used for tracking

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: use split image barriers if the image can be easily proved idle

this should have no pending write hazards, which means this transition
has no dependencies and can occur immediately

also delete some old comments

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: fix zink_resource_access_is_write()

this was accurately returning whether the access had only write flags,
but it was incorrectly returning false for READ|WRITE

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: add functions for faster batch-usage completion checks

in cases where only a simple, non-definitive check is needed, these
can be used to eliminate some ioctl overhead

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: skip attachment barrier for redundant layout-setting if !valid

an invalidated image doesn't need synchronization, so this can be skipped

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: avoid unnecessary read-only layout changes for zs attachments

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

zink: add perfetto tracing for barriers

at least shows where they are

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21583>

radv/rt: only reserve stack_sizes after rt_case insertion

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21667>