drm/amdgpu/display: remove VEGAM config option

Leftover from bringup.  No need to keep it around for
upstream.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/scheduler: Remove obsolete spinlock.

This spinlock is superfluous, any call to drm_sched_entity_push_job
should already be under a lock together with matching drm_sched_job_init
to match the order of insertion into queue with job's fence seqence
number.

v2:
Improve patch description.
Add functions documentation describing the locking considerations

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: remove unused member

This lock isn't used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amd/pp: Workaround flickering issue on RV

Screen flickering observed while running 1080p video using
MPV_VAAPI/VDPAU with 4x4K@60 monitors

Need to set higher mclk in this configuration.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: Skip drm_sched_entity related ops for KIQ ring.

Following change 75fbed2 we never initialize or use the GPU
scheduler for KIQ and hence we need to skip KIQ ring when iterating
amdgpu_ctx's scheduler entites.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: flag Vega20 as experimental

Must set amdgpu.exp_hw_support=1 on the kernel command line in
grub to enable support.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: Add vega20 pci ids

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: Switch to use df_v3_6_funcs for vega20 (v2)

v2: fix whitespace (Alex)

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/df: implement df v3_6 callback functions (v2)

New df helpers for 3.6.

v2: switch to using df 3.6 headers (Alex)

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: add df 3.6 headers

Needed for vega20.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/vg20:Enable UVD/VCE for Vega20

Vega20 ucode load type is set to AMDGPU_FW_LOAD_DIRECT for default.
So UVD/VCE needn't PSP IP block up. UVD/VCE for Vega20 can be enabled
at this moment.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/vg20:Enable 2nd instance queue maping for uvd 7.2

Enable 2nd instance uvd queue maping for uvd 7.2. For user, only one UVD
instance presents. there is two rings for uvd decode, and
4 rings for uvd encode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/vg20:Enable the 2nd instance IRQ for uvd 7.2

For Vega20, the 2nd instance uvd IRQ using different client id.
Enable the 2nd instance IRQ for uvd 7.2

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/vg20:Add IH client ID for the 2nd UVD

For Vega20, there are two UVD hardware. Need add
the 2nd IH client ID for the 2nd UVD Hardware.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/vg20:Enable the 2nd instance for uvd

For Vega20, set num of uvd instance to 2, to enble 2nd instance.
The IB test build-in registers need update for vega20 2nd instance.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/vg20:increase 3 rings for AMDGPU_MAX_RINGS

For Vega20, there are two UVD Hardware. One more UVD hardware
adds one decode ring and two encode rings. So AMDGPU_MAX_RINGS
need increase by 3.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/vg20:Restruct uvd.inst to support multiple instances

Vega20 has dual-UVD. Need add multiple instances support for uvd.
Restruct uvd.inst, using uvd.inst[0] to replace uvd.inst->.
Repurpose amdgpu_ring::me for instance index, and initialize to 0.
There are no any logical changes here.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu/vg20:Restruct uvd to support multiple uvds

Vega20 has dual-UVD. Need Restruct amdgpu_device::uvd to support
multiple uvds. There are no any logical changes here.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amdgpu: Disable ip modules that are not ready yet

Please enable above ips on soc15.c when they're available.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/amd/powerplay: update vega20 cg flags (v2)

v2: remove duplicate flag.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

drm/tegra: vic: Track interface version

Set the interface version implemented by the VIC module. This allows
userspace to pass the correct command stream when programming the VIC
module.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

drm/tegra: gr3d: Track interface version

Set the interface version implemented by the gr3d module. This allows
userspace to pass the correct command stream when programming the gr3d
module.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

drm/tegra: gr2d: Track interface version

Set the interface version implemented by the gr2d module. This allows
userspace to pass the correct command stream when programming the gr2d
module.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

drm/tegra: Track client version

Userspace needs to know the version of the interface implemented by a
client so it can create the proper command streams. Allow individual
drivers to store this version along with the client so that it can be
returned to userspace upon opening a channel.

Acked-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

drm/tegra: dc: Support rotation property

Currently only the DRM_MODE_REFLECT_Y rotation is supported. The driver
already supports reflection on the Y axis via a custom flag which is not
very useful because it requires custom userspace. Add the standard
rotation property that supports 0 degree rotation and Y axis reflection
for primary and overlay planes to provide a better interface than the
custom flag.

v2: keep custom flag for ABI compatibility (Dmitry)

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

drm/tegra: gem: Fill in missing export info

Set the owner and name of the exported DMA-BUF in addition to the
already filled-in fields.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

drm/tegra: Use proper arguments for DRM_TEGRA_CLOSE_CHANNEL IOCTL

A separate data structure exists for the DRM_TEGRA_CLOSE_CHANNEL IOCTL,
but it is currently unused. The IOCTL was using the data structure for
the DRM_TEGRA_OPEN_CHANNEL IOCTL.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

gpu: host1x: Use not explicitly sized types

The number of words and the offset in a gather don't need to be
explicitly sized, so make them unsigned int instead.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

gpu: host1x: Rename relocarray -> relocs for consistency

All other array variables use a plural, and this is the only one using
the *array suffix. This is confusing, so rename it for consistency.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

gpu: host1x: Drop unnecessary host1x argument

Functions taking a pointer to a host1x syncpoint as an argument don't
need to specify a pointer to a host1x instance because it can be
obtained from the syncpoint.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

gpu: host1x: Cleanup loop variable usage

Use unsigned int where possible and don't unnecessarily initialize the
loop variable.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

gpu: host1x: Store pointer to client in jobs

Rather than storing some identifier derived from the application
context that can't be used concretely anywhere, store a pointer to the
client directly so that accesses can be made directly through that
client object.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

gpu: host1x: Remove wait check support

The job submission userspace ABI doesn't support this and there are no
plans to implement it, so all of this code is dead and can be removed.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Tested-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

drm/etnaviv: replace license text with SPDX tags

This replaces the repetitive GPL-2.0 license text in code and header files
with the SPDX tags. Generated hardware headers aren't changed, as any changes
there need to be done in the upstream rnndb repository.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

drm/etnaviv: mmuv2: support 40 bit phys address

MMUv2 supports up to 40 bits of physical address by folding the upper
8 bits into bits [4:11] of the PTE.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

drm/etnaviv: mmuv2: allocate 2nd level page tables on demand

With etnaviv not being tied into the IOMMU framework anymore, the MMU
functions will only be called under sleeping locks. Thus we are able
to allocate the memory for the 2nd level page tables on demand without
having to deal with memory allocation in atomic context.

This speeds up driver intitialization on MMUv2 GPU cores, as we don't
need to preallocate all the page table memory and also reduces memory
consumption for most workloads, as most of them won't use the full
GPU virtual address space.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

drm/etnaviv: switch MMU page tables to writecombine memory

We are likely to write multiple page entries at once and already ensure
proper write buffer flushing before GPU submit, so this improves CPU
time usage in the submit path without any downsides.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

drm/etnaviv: remove register logging

I'm not aware of any case where tracing GPU register manipulation at the
kernel level would have been useful. It only adds more indirections and
adds to the code size.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

drm/etnaviv: remove cycling through MMU address space

This was useful on MMUv1 GPUs, which don't generate proper faults,
when the GPU write caches weren't fully understood and not properly
handled by the kernel driver. As this has been fixed for quite some
time, the cycling though the MMU address space needlessly spreads
out the MMU mappings.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

drm/etnaviv: correct timeout calculation

The old way did clamp the jiffy conversion and thus caused the timeouts
to become negative after some time. Also it didn't work with userspace
which actually fills the upper 32bits of the 64bit timestamp value.

clock_gettime() is 32-bit on 32-bit architectures. Using 64-bit timespec
math, like we do in this commit, means that when a wrap occurs, the
specified timeout goes into the past and we can't request a timeout in
the future. As the Linux implementation of CLOCK_MONOTONIC is reasonable
and starts at 0, the first such timer wrap will occur after approx. 68
years of system uptime.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

gpu: host1x: Fix compiler errors by converting to dma_addr_t

The compiler is complaining with the following errors:

drivers/gpu/host1x/cdma.c:94:48: error:
passing argument 3 of ‘dma_alloc_wc’ from incompatible pointer type
[-Werror=incompatible-pointer-types]

drivers/gpu/host1x/cdma.c:113:48: error:
passing argument 3 of ‘dma_alloc_wc’ from incompatible pointer type
[-Werror=incompatible-pointer-types]

The expected pointer type of the third argument to dma_alloc_wc() is
dma_addr_t but phys_addr_t is passed.

Change the phys member of struct push_buffer to be dma_addr_t so that we
pass the correct type to dma_alloc_wc().
Also check pb->mapped for non-NULL in the destroy function as that is the
right way of checking if dma_alloc_wc() was successful.

Signed-off-by: Emil Goode <emil.fsw@goode.io>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Merge branch 'linux-4.18' of git://github.com/skeggsb/linux into drm-next

The main thing here is the addition of support for Volta GV100 GPUs,
everything else basically restructuring display / graphics init code
to make it possible to fit Volta support in more nicely.

There's a bunch of improvements/fixes scattered in there for earlier
GPUs too, particularly graphics engine init on all GPUs from Fermi
onwards.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv7sjDKyR43n+6=iLC+ExGhBTLRLdKqwrhcfJWjEAndK0g@mail.gmail.com

drm/nouveau/gr/gf100-: insert some WFIs during gr init

Inserted wait-for-gr-idle in the places it seems that RM does it, seems
to prevent some random mmio timeouts on Quadro GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/clk: Use list_for_each_entry_from_reverse

It's better to use "list_for_each_entry_from_reverse" for iterating list
than "for loop" as it makes the code more clear to read.
This patch replace "for loop" with "list_for_each_entry_from_reverse"
and "start" variable with "cstate" which helps in refactoring
the code and also "cstate" variable is more commonly used in the other
functions.

changes in v2:
"start" variable is removed, before "cstate" variable was removed
but "cstate" is more common so preferred "cstate" over "start".

Signed-off-by: Arushi Singhal <arushisinghal19971997@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: fix temp/pwm visibility, skip hwmon when no sensors exist

A NV34 GPU was seeing temp and pwm entries in hwmon, which would error
out when read. These should not have been visible, but also the whole
hwmon object should just not have been registered in the first place.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: fix nouveau_dsm_get_client_id()'s return type

The method struct vga_switcheroo_handler::get_client_id() is defined
as returning an 'enum vga_switcheroo_client_id' but the implementation
in this driver, nouveau_dsm_get_client_id(), returns an 'int'.

Fix this by returning 'enum vga_switcheroo_client_id' in this driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau: fix mode_valid's return type

The method struct drm_connector_helper_funcs::mode_valid is defined
as returning an 'enum drm_mode_status' but the driver implementation
for this method uses an 'int' for it.

Fix this by using 'enum drm_mode_status' in the driver too.

Signed-off-by: Luc Van Oostenryck <luc.vanoostenryck@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gr/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ce/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fifo/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/disp/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/dma/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/therm/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pmu/gv100: initial support

Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fault/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bar/gv100: initial support

Appears to be compatible with GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mmu/gv100: initial support

VEID support hacked in here, as it's the most convenient place for now.

Will be refined once it's better understood.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ltc/gv100: initial support

Appears to be compatible with GP102.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fb/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/imem/gv100: initial support

Can't imagine this will be any different.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/tmr/gv100: initial support

Appears to be compatible with GK20A.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bus/gv100: initial support

Appears to be compatible with GF100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/mc/gv100: initial support

Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/fuse/gv100: initial support

Appears to be compatible with GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/i2c/gv100: initial support

Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/gpio/gv100: initial support

Appears to be compatible with GK104.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/ibus/gv100: initial support

Appears to be compatible with GM200.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/top/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/devinit/gv100: initial support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/pll: limits table 5.0

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/bios/gv100: initial support

No real surprises here so far.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/pci/gv100: initial support

Appears to be compatible with GP100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: recognise gv100

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/core: increase maximum number of copy engines to 9

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: initial overlay support

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/gk104-: add support for [XA]2R10G10B10 formats

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/gk104-: support additional cursor sizes

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: separate blocklinear vs linear pitch

Will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: handle degamma LUT from window channels

Required to eventually support DRM colour management APIs, and to
support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: plane updates don't always require image_set()

When only the position of a window changes, there's no need to submit
an image update as well.

Will be required to support the overlays, and Volta windows.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: store window visibility in state

Window visibility is going to become a little more complicated with the
upcoming LUT changes, so store the calculated value to avoid needing to
recalculate the armed state again.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: simplify swap interval handling

This is just cleaning up some left-overs from when we needed a custom
legacy page flip implementation.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: decouple window state changes, and update method submisssion

This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: simplify tracking of channel interlocks

Instead of windows returning their core channel interlock mask if they
know core has been modified, it's recorded unconditionally and used if
required when update methods are emitted.

This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: determine MST support from DP Info Table

GV100 doesn't support MST, use the information provided in VBIOS tables to
detect its presence instead.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: extend window image data for stereo/planar formats

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: move drm format->hw conversion into common code

This will be required to support additional HW features.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: unify set/clr masks

This is a simplification that'll be used to improve interlock handling.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: allow specification of valid heads for a window

This will be required to support Volta, where window ID != head.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: split base implementation by hardware class

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: split core implementation by hardware class

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: split each resource type into their own source files

There should be no code changes here, just shuffling stuff around.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50: abstract OR interfaces so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50: handle SetControlOutputResource from head

Removes duplicated code from OR-specific functions.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: abstract head interfaces so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50: modify core allocation so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: modify base allocation so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: modify cursor allocation so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drm/nouveau/kms/nv50-: modify overlay allocation so the code can be split

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>