asahi: Print info about shadowed resources

If resource and perf debugging are both enabled, this prints resource
info for shadowed resources.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

asahi: Always use resource size, not BO size

BOs can be oversized, as they can come from the BO cache. Make sure to
always use the resource layout size, not the BO size, when we need this
for some reason.

This fixes BO shadowing creating overlarge BOs, and also the attachment
size for submissions (probably doesn't matter, but it's more correct now).

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

asahi: Fix race in BO stats accounting

These counters are accessed without locking, so they need to be atomic.
Should be cosmetic only.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

asahi: Do not overallocate BOs by more than 2x

This is not likely to be useful, and might take over a correctly-sized
BO that is going to be reused later.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

asahi: Add a noshadow debug flag

This lets us trivially test whether resource shadowing helps or hurts
any given workload.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

agx: Handle 8-bit vecs

These should "just" work, promoting the 8-bit channels to 16-bit registers
internally, allowing us to use our 8-bit stores with 8-bit data vectors packed
in 16-bit registers. All other non-conversion ALU gets lowered by the previous
patch, this is just needed for simple things like nir_op_vec of lowered math
passed to a vectorized store.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

agx: Lower 8-bit ALU

No hardware support for it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

asahi: Move a bunch of helpers to common

These have no real Vulkan or Gallium dependence and are (as such) useful for
both VK and GL without any real change in level of abstraction. Do the code
motion.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

asahi: Stub num_dies

We'll use it in the upstreamable driver portion soon.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24635>

nvk: Support dynamic state for enabling sample locations

When switching dynamically we should also push the corresponding sample
locations, the default when disabled or the custom ones when enabled.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24592>

nvk: Fix support for VK_EXT_sample_locations

Fixes some crashes on sample locations pipeline tests.
The implementation was already there but the device properties were
missing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24592>

gallium/st: lower NV21 to R8_B8G8 instead of G8_B8R8

When NV21 lowering with hardware sampling and shader CSC was added, the
incorrect PIPE_FORMAT_G8_B8R8_UNORM was used. That format is supposed to
represent vulkan NV12 instead.

This commit introduces PIPE_FORMAT_R8_B8G8_UNORM, which correctly describes the
gallium mapping for YUV CSC, with R as Y, instead of G as Y.

Fixes: 26e3be513dc ("gallium/st: add support for PIPE_FORMAT_NV21 and PIPE_FORMAT_G8_B8R8_420")
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24266>

pan/bi: add support for I420 and YV12 sampling

These formats can be directly sampled, and they have a lower stride
alignment requirement.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24266>

gallium/st: add non-CSC lowering of YV12 as PIPE_FORMAT_R8_B8_G8_420

YV12 is the same as DRM_FORMAT_YVU420.
We lower it to PIPE_FORMAT_R8_B8_G8_420, which is equivalent to
PIPE_FORMAT_R8_G8_B8_420 with U/V planes swapped.

This is used for hardware that can sample from YUV but need CSC in shader.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24266>

gallium/st: add non-CSC lowering of I420 as PIPE_FORMAT_R8_G8_B8_420

This new format is similar to PIPE_FORMAT_G8_B8_R8_420, but with R as Y, G as U
and B as V. The need for two diferent formats here is because gallium maps the
YUV channels differently from vulkan.

Some hardware, e.g. Mali GPUs, can sample from I420 but need CSC in shader,
this patch implements that.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24266>

radeonsi/vcn: Update rate control when framerate changes with HEVC

Similar to H264/AV1, check for framerate changes and update
rate control also with HEVC.

Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24475>

aco: always use rtne for fquantize2f16

The SPIR-V spec says:

If Value is positive with a magnitude too large to represent as a
16-bit floating-point value, the result is positive infinity.
If Value is negative with a magnitude too large to represent as a
16-bit floating-point value, the result is negative infinity.

This is only the case for rtne v_cvt_f16_f32

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24617>

agx: Lower flat shading in NIR

We get this as part of the lowering we added for interpolateAtOffset.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24498>

agx: Add interpolateAtOffset lowering pass

Add a lowering pass that lowers interpolation to math on the coefficient
registers. This handles interpolateAtOffset, as well as flat shading as an easy
special case.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24498>

agx: Forcibly vectorize pointcoord coeffs

This avoids regressions from scalarizing pointcoord loads.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24498>

agx: Set lower_fisnormal

We're going to generate this in our interpolation lower.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24498>

agx: Allow more varying slots

Don't overflow.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24498>

agx: Implement nir_intrinsic_load_coefficients_agx

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24498>

nir: Add load_coefficients_agx intrinsic

For lowering interpolation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24498>

nir: add a filter cb to lower_io_to_scalar

this is useful for drivers that want to do selective scalarization
of io

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24565>

nir/lower_io: add a new doubles-only 64bit lowering option

this allows lowering only 64bit float operations for drivers that
support 64bit integers

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24565>

r600/asm: Make sure MOVA and SET_CF_IDX are in the same clause

Acked-by: Gert Wollny <gert.wollny@collabora.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24545>

r600/asm: Fix AR force_add_cf setting if a clause is not open

Acked-by: Gert Wollny <gert.wollny@collabora.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24545>

radv: use the number of VS outputs for computing the tessellation info

When TCS isn't linked with VS, the vertex stride should be computed
from vertex outputs. This is only for shader object and shouldn't
change anything right now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24540>

radv: add support for loading the LSHS vertex stride from a SGPR

With shader object, if VS and TCS aren't linked together, the LSHS
vertex stride should be computed from the vertex outputs. Otherwise,
if an output is unused, the stride is wrong in TCS.

This is currently for GFX8 only because for merged shaders this won't
be needed but shader object on GFX9+ isn't yet a thing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24540>

iris: implement required PSS sync for Wa_18019816803

According to WA description, we need to track DS write state
and emit a PSS_STALL_SYNC whenever that state changes.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18411>

anv: implement required PSS sync for Wa_18019816803

According to WA description, we need to track DS write state
and emit a PSS_STALL_SYNC whenever that state changes.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18411>

intel/blorp: add a new flag to communicate PSS sync need

This is required for Wa_18019816803 when blorp emit DS state.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18411>

gallium: remove start_slot parameter from pipe_context::set_vertex_buffers

This patch removes start_slot from set_vertex_buffers() as suggested in
https://gitlab.freedesktop.org/mesa/mesa/-/issues/8142

compilation testing:
all gallium drivers, nine frontend compilation has been tested.
d3d10umd compilation has not been tested

driver, frontend testing:
only llvmpipe and radeonsi driver was tested running game

only the nine frontend changes are complex. All other changes are easy.
nine front end was using start slot and also using multi context.

nine frontend code changes:
In update_vertex_elements() and update_vertex_buffers(), the vertex
buffers or streams are ordered removing the holes. In update_vertex_elements()
the vertex_buffer_index is updated for pipe driver to match the ordered list.

v2: remove start_slot usage code from Marek (Marek Olšák)
v3: nine stream number holes mask code from Axel (Axel Davy)

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> (except nine, which is Ab)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22436>

nvk: NOUVEAU_WS_BO_LOCAL is a trap.

This flag isn't a flag, don't be & at it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24625>

nv50/ir: Rework conversions for texture array indices

Currently, negative array texture indices get saturated to 0 which,
while technically in-bounds, isn't what we want for Vulkan with image
robustness or robustness2.  Vulkan requires that a negative index on a
texelFetch() count as out-of-bounds but a negative index on any other
texture operation gets clamped to 0.  (See the spec section entitled
"(u,v,w,a) to (i,j,k,l,n) Transformation And Array Layer Selection").

Instead of using CVT for TXF, we now take U32 MAX with 0xffff. Because
it's unsigned, this ensures that negative array indices clamp to 0xffff
and will be considered out-of-bounds by the hardware (there are a
maximum of 2048 array indices in an image descriptor).  For everything
other than TXF, we keep using an F32->U16 conversion but add a saturate.
This ensures that negative array indices clamp to 0 as per the Vulkan
spec.  Very large indices will clamp to 0xffff which the hardware will
clamp to the maximum array index.

This fixes 324 tests in the dEQP-VK.robustness.* group, all those for 1D
and 2D array textures

Acked-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24593>

nir: minor fixes for io_to_scalar

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24613>

zink: add a special separate shader i/o mode for legacy variables

ARB shaders have no rules restricting i/o interfaces since it's assumed
that they'll match by name. given that mesa marks these all as separate
shaders, a separate path is needed to ensure these variables correctly
match up their i/o even when it's mismatched

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24608>

zink: pre-convert mode in fixup_io_locations

no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24608>

nvk: Use common physical device properties

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24575>

radv: Use common physical device properties

Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24575>

vulkan: Add a generated vk_properties struct

Generates a physical device properties table to avoid dealing with pNext
chains in the driver. Based on vk_features.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24575>

ci/a530: document piglit flake

https://gitlab.freedesktop.org/mesa/mesa/-/jobs/47086976

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24622>

vulkan/wsi: Allow binding presentation_timing when software rendering

The presentation timing extension is used for doing WaitForPresent
properly, but we accidentally bind it after an early return intended to
stop us from binding dmabuf when software rendering.

Remove the early return.

cc: mesa-stable

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24588>

panfrost: upcast uint8/uint16 before shifting them beyond their range

    ../src/panfrost/compiler/compiler.h:89:14: runtime error: left shift of 51966 by 16 places cannot be represented in type 'int'
        #0 0x55c72fd7dda4 in bi_apply_swizzle ../src/panfrost/compiler/compiler.h:89
        #1 0x55c72fd808d6 in bi_source_value ../src/panfrost/compiler/bi_opt_constant_fold.c:35
        #2 0x55c72fd80a83 in bi_fold_constant ../src/panfrost/compiler/bi_opt_constant_fold.c:52
        #3 0x55c72fb2080c in constant_fold_pred ../src/panfrost/compiler/test/test-constant-fold.cpp:48
        #4 0x55c72fb21a65 in ConstantFold_Swizzles_Test::TestBody() ../src/panfrost/compiler/test/test-constant-fold.cpp:103
        #5 0x55c73070cc97 in void testing::internal::HandleSehExceptionsInMethodIfSupported<testing::Test, void>(testing::Test*, void (testing::Test::*)(), char const*) ../src/gtest/src/gtest.cc:2621
        #6 0x55c7306f0df7 in void testing::internal::HandleExceptionsInMethodIfSupported<testing::Test, void>(testing::Test*, void (testing::Test::*)(), char const*) ../src/gtest/src/gtest.cc:2657
        #7 0x55c730694add in testing::Test::Run() ../src/gtest/src/gtest.cc:2696
        #8 0x55c73069798d in testing::TestInfo::Run() ../src/gtest/src/gtest.cc:2845
        #9 0x55c73069b684 in testing::TestSuite::Run() ../src/gtest/src/gtest.cc:3004
        #10 0x55c7306ccfcb in testing::internal::UnitTestImpl::RunAllTests() ../src/gtest/src/gtest.cc:5890
        #11 0x55c73071053c in bool testing::internal::HandleSehExceptionsInMethodIfSupported<testing::internal::UnitTestImpl, bool>(testing::internal::UnitTestImpl*, bool (testing::internal::UnitTestImpl::*)(), char const*) ../src/gtest/src/gtest.cc:2621
        #12 0x55c7306f4ed3 in bool testing::internal::HandleExceptionsInMethodIfSupported<testing::internal::UnitTestImpl, bool>(testing::internal::UnitTestImpl*, bool (testing::internal::UnitTestImpl::*)(), char const*) ../src/gtest/src/gtest.cc:2657
        #13 0x55c7306c23fa in testing::UnitTest::Run() ../src/gtest/src/gtest.cc:5455
        #14 0x55c730748faf in RUN_ALL_TESTS() ../src/gtest/include/gtest/gtest.h:2314
        #15 0x55c730748ffa in main ../src/gtest/src/gtest_main.cc:63
        #16 0x7f8554bcc1c9 in __libc_start_call_main ../sysdeps/nptl/libc_start_call_main.h:58
        #17 0x7f8554bcc284 in __libc_start_main_impl ../csu/libc-start.c:360
        #18 0x55c72fb18be0 in _start (/builds/mesa/mesa/_build/src/panfrost/compiler/bifrost_tests+0xbd0be0)

Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24610>

amd/ci: drop duplicate test expectations

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24612>

winsys/amdgpu: fix a race between import and destroy

amdgpu_bo_destroy is called when the bo ref count reaches 0.  But if the
bo is on bo_export_table, amdgpu_bo_from_handle can race with
amdgpu_bo_destroy and increments the bo ref count.  When that happens,
amdgpu_bo_destroy should bail.

v2:
 - reorder amdgpu_bo_free and amdgpu_bo_unmap
 - fix an assert

Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24526>

r600/sfn: work around injecting extra CF's to handle hardware bugs

The clause local registers can't be used if a new CF is started, but
the assembler still may introduce a CFs to work around some hardware bug,
so make sure RA doesn't assume that the predicate ALU op is in the same ALU
CF like the ALU ops before.

This is a hotfix, the scheduler should handle this better.

Fixes:  cfbd1fd41300740154f89b4382e4790e61c1bf0b
    r600/sfn: Use clause local registers in RA

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24611>

radv: Handle VK_SUBOPTIMAL_KHR in trace layers

vkQueuePresentKHR might return VK_SUBOPTIMAL_KHR which is not VK_SUCCESS
but presentation succeeded anyway. We should capture a trace even if
VK_SUBOPTIMAL_KHR is returned.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24052>

ci/zink+radv: set a timeout of 2x the normal runtime

Normal runtime for both zink-radv-vangogh-valve and zink-radv-navi10-valve
is ~10min, so let's double that as our timeout.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24602>

iris: Inline iris_can_sample_mcs_with_clear

Now that there's only one user, inline the function.

While we're here, update the stale comment about unknown sampling
formats causing us to implement a simplified workaround.  We've had
visibility into the formats that blorp_copy will use for some time now.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24446>

iris: Drop get_copy_region_aux_settings

With the previous commit, it is no longer used.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24446>

iris: Fix iris_copy_region calls involving FCV_CCS_E

iris_copy_region improperly handles destinations that have
ISL_AUX_USAGE_FCV_CCS_E in use. To avoid corruption when copying to a
resource which has this aux usage, this function needs to:

   1. Remove existing fast-clear blocks that would be incompatible with
      the surface format that will be used by blorp_copy.

      This is actually a general rendering requirement that affects more
      aux usages than just FCV_CCS_E.

   2. Either avoid generating new fast-clear blocks that would be
      incompatible with the original surface format, or remove the newly
      generated incompatible fast-clear blocks.

      This is particular to FCV_CCS_E, which sometimes generates
      fast-clear blocks during a rendering operation. The generation is
      dependent on the surface format, the clear color, and the pixels
      being written.

iris_copy_region does step 1, only allowing fast-clear blocks that
represent the value of zero. These are compatible with every surface
format. This function does not do step 2 however, leading to rendering
corruption in certain cases.

Fix this by generally relying more on the standard resource preparation
functions, which account for this issue. Specifically, by using
iris_resource_prepare_render, steps 1 and 2 are both handled for us.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3732
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24446>

iris: Fix aux usage tracking in prepare_render

When a resource goes from being accessed with one aux usage to another,
iris_resource_prepare_access will flush the appropriate caches to
prevent rendering/sampling corruption. So, we must be careful to call
the prepare access function with the aux usage that will match the next
memory access of the resource.

iris_resource_prepare_render fails to do this because it sometimes calls
the prepare access function with the resource's aux usage after calling
that same function with the aux usage that will be used in the next
memory access.

Fix this by reversing the order of the prepare access function calls.

Fixes: 046bba0be05 ("iris: Handle clear color compatibility in prepare_render")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24446>

pvr: Add VK_KHR_copy_commands2

We already expose the *2() functions and allow the common vulkan code
to provide the vulkan 1.0 equivalents, so we might as well expose this
extension.

Coverage in dEQP is dEQP-VK.api.copy_and_blit.copy_commands2.*, which
are mostly identical to dEQP-VK.api.copy_and_blit.core.* without
additional extensions.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24489>

pvr: Print VkStructureType name on pvr_debug_ignored_stype()

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24489>

pvr: Add VK_KHR_get_surface_capabilities2

Common vulkan wsi code already exposes the *2() functions (as well as
the vulkan 1.0 equivalents), so we might as well expose this extension.

Coverage in dEQP is dEQP-VK.wsi.*.surface.query_capabilities2, which
are all currently unsupported as we do not expose any platform surface
extensions.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24489>

pvr: Add VK_KHR_get_memory_requirements2

We already expose the *2() functions and allow the common vulkan code
to provide the vulkan 1.0 equivalents, so we might as well expose this
extension.

The runtime also provides common implementations for the *2() functions
based on VK_KHR_maintenance4, but those functions require the
requirements to be evaluated without creating a resource; that would
need significantly more refactoring work to achieve.

Coverage in dEQP is dEQP-VK.memory.requirements.extended.*, which all
pass or are unsupported.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24489>

pvr: Add VK_KHR_get_display_properties2

Common vulkan wsi code already exposes the *2() functions (as well as
the vulkan 1.0 equivalents), so we might as well expose this extension.

Coverage in dEQP is dEQP-VK.wsi.display.get_display_*2, which all pass
or are unsupported.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24489>

docs: Fixup imagination/pvr extension support

VK_KHR_timeline_semaphore support was missed by mistake.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24489>

pvr: Refactor pvr_GetPhysicalDeviceProperties2()

This makes use of the vk_get_physical_device_core_1_*_property_ext()
helpers.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24489>

pvr: Clean up extension tables

Switches PVR_USE_WSI_PLATFORM to be an always defined boolean to allow
for cleaner use in the extension tables (borrowed from tu) and extends
the pattern to create PVR_USE_WSI_PLATFORM_* equivalents for each
supported platform.

Also fixes the ordering to match the struct definitions.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24489>

ci: build hasvk in debian-vulkan job

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24586>

ci: reorder vk drivers alphabetically in debian-vulkan job

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24586>

ci/amd: Skip all VAAPI tests that creates too many huge surfaces

These tests creates up to thousand surfaces of 8192x8192 or
10240x10240 sizes which often times out.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9472
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24590>

pvr: Pad rogue_regarray_cache_key union members to avoid UB

GCC zeroes out the unreferenced parts of the union when assigning by
the smaller member, but clang doesn't. Neither is wrong, because the C
standard calls this UB; insert padding to ensure any compiler behaves
predictably.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24477>

zink: don't try to replace separate shader prog in noopt mode

this crashes

Fixes: ca2e2f4bd0c ("zink: apply ZINK_DEBUG=noopt to linked separate shaders")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24606>

docs/v3dv: mark direct display extensions as implemented

Fixes: bf5cfb64868a50b84df8 ("v3dv: Enable (leased) direct display extensions.")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24584>

r600: retire SB optimizer

The NIR backend is good enough and here is already a long list of
reasons why SB should not be called because it doesn't handle certain
instructions correctly.

v2: - remove more references to SB (Vitaly Kuzmin)
    - remove unused sb context (Sam Ravnborg)
v3: - drop used variable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7166
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24509>

zink: fix big tcs output io

as in the producer case, big io needs to reserve the appropriate number
of slots

fixes:
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-float-index-rd-after-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-float-index-wr-before-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec2-index-rd-after-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec2-index-wr-before-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec3-index-rd-after-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec3-index-wr-before-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec4-index-rd-after-barrier,Fail
spec@arb_tessellation_shader@execution@variable-indexing@tcs-output-array-vec4-index-wr-before-barrier,Fail

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24568>

zink: explicitly set non-optimal last_vertex_stage shader key on ctx create

this otherwise results in generated gs not having the flag set, which breaks
various things

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24568>

lavapipe: zero-init pipe_sampler_state

makes trace more reliable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24568>

zink: reindex ssa defs before dumping debug shaders

this makes things more consistent across patches

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24568>

draw: fix so debug offset printing

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24568>

zink: move ZINK_DEBUG=nir printing to just before compile

it's not useful to know what the nir is when zink receives it, as
this has minimal relation to the spirv that is output

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24568>

zink: fix xfb buffer array sizing to use buffer limit, not output

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24568>

ir3: Implement helper invocation optimization

This kills helper invocations to ensure that subsequent memory accesses
don't fetch unused memory and unnecessary branch divergence from helper
invocations is eliminated.

shader-db results:

total instructions in shared programs: 3840580 -> 3841531 (0.02%)
instructions in affected programs: 278416 -> 279367 (0.34%)
helped: 0
HURT: 744
HURT stats (abs)   min: 1 max: 16 x̄: 1.28 x̃: 1
HURT stats (rel)   min: 0.05% max: 8.51% x̄: 0.75% x̃: 0.39%
95% mean confidence interval for instructions value: 1.22 1.34
95% mean confidence interval for instructions %-change: 0.67% 0.83%
Instructions are HURT.

total nops in shared programs: 866716 -> 867667 (0.11%)
nops in affected programs: 72851 -> 73802 (1.31%)
helped: 0
HURT: 744
HURT stats (abs)   min: 1 max: 16 x̄: 1.28 x̃: 1
HURT stats (rel)   min: 0.17% max: 33.33% x̄: 2.84% x̃: 1.82%
95% mean confidence interval for nops value: 1.22 1.34
95% mean confidence interval for nops %-change: 2.59% 3.08%
Nops are HURT.

total last-baryf in shared programs: 139806 -> 139864 (0.04%)
last-baryf in affected programs: 11772 -> 11830 (0.49%)
helped: 0
HURT: 58
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.40% max: 5.26% x̄: 0.60% x̃: 0.47%
95% mean confidence interval for last-baryf value: 1.00 1.00
95% mean confidence interval for last-baryf %-change: 0.42% 0.78%
Last-baryf are HURT.

total last-helper in shared programs: 1508295 -> 935561 (-37.97%)
last-helper in affected programs: 1192594 -> 619860 (-48.02%)
helped: 7816
HURT: 3
helped stats (abs) min: 1 max: 1095 x̄: 73.28 x̃: 34
helped stats (rel) min: 0.42% max: 100.00% x̄: 71.91% x̃: 100.00%
HURT stats (abs)   min: 1 max: 11 x̄: 4.67 x̃: 2
HURT stats (rel)   min: 0.80% max: 1.44% x̄: 1.03% x̃: 0.86%
95% mean confidence interval for last-helper value: -75.64 -70.86
95% mean confidence interval for last-helper %-change: -72.67% -71.10%
Last-helper are helped.

fossil-db results:

Totals:
Instrs: 55172795 -> 55189122 (+0.03%)
CodeSize: 108952746 -> 108984452 (+0.03%)
NOPs: 11536680 -> 11553007 (+0.14%)
(ss)-stall: 4166810 -> 4166581 (-0.01%)
(sy)-stall: 15890324 -> 15884974 (-0.03%)
last-baryf: 659588 -> 659633 (+0.01%)
last-helper: 25742996 -> 12601636 (-51.05%); split: -51.05%, +0.00%
Cat0: 12294891 -> 12311218 (+0.13%)

Totals from 39576 (25.22% of 156916) affected shaders:
Instrs: 24200008 -> 24216335 (+0.07%)
CodeSize: 44968736 -> 45000442 (+0.07%)
NOPs: 5854965 -> 5871292 (+0.28%)
(ss)-stall: 2357830 -> 2357601 (-0.01%)
(sy)-stall: 6166670 -> 6161320 (-0.09%)
last-baryf: 590330 -> 590375 (+0.01%)
last-helper: 24160432 -> 11019072 (-54.39%); split: -54.39%, +0.00%

Cat0: 6205561 -> 6221888 (+0.26%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>

ir3: Gather pixlod status earlier

We'll need this to skip optimizing helper invocations if it's
unnecessary.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>

freedreno, tu, ir3: Add last_helper statistic

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>

tu: Add missing last_baryf statistic

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>

ir3, freedreno, tu: Plumb through SP_FS_PREFETCH_CNTL::ENDOFQUAD

Add a flag but don't use it yet.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>

freedreno/regs: Define unknown SP_FS_PREFETCH_CNTL fields

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>

ir3: Parse (eq) flag

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>

meson: fix indentation

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24603>

radv: re-introduce radv_pipeline_stage_init()

This helper is used to initialize a radv_shader_stage struct for
pipelines, while radv_shader_stage_init() would be for shader object
only (ie. using VkCreateShaderInfoEXT).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24562>

radv: stop passing redundant stage to radv_shader_stage_init()

It's sinfo->stage.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24562>

radv: introduce radv_shader_layout for per-stage descriptor layout

With pipelines, the shader layout is inherited from the pipeline layout
but with shader objects, the layout is passed through
VkCreateShaderInfoEXT.

This basically replaces uses of radv_pipeline_layout by
radv_shader_layout during shaders compilation. This will avoid
creating a pipeline layout with ESO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24562>

radv: remove useless NULL for pipeline layout during shader info pass

It should be non-NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24562>

v3d: fix texture packing lowering

For texture instructions that don't have sampler state we have
been incorrectly using sampler index to retrive texture packing
information. This is incorrect for two reasons:

1. These instructions don't have a defined sampler index by
   definition.
2. The driver was not setting it either, so effectively, we
   have always been using whatever we had set for the first
   texture, which is obviously bogus.

Fix this by running a lowering pass that sets the index to use
in backend_flags, which is what the compiler expects, based on
the texture index, which is what we want in GL since we make
this decision based on the texture format.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>

v3dv: assert that only tex instructions with sampler state have a sampler src

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>

squash! v3dv,broadcom/compiler: don't abuse sampler index

For tex instructions that don't have sampler state use backend_flags
instead of sampler index to bind default sampler state.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>

nir/lower_tex: use a callback to check sampler return size packing

The lower_tex_packing pass relies on the sampler index to access packing
information, but this is only valid for tex instructions that have sampler
state (so not txf, etc). Instead, let backends provide a callback to inform
the lowering about the packing used with a given texture instruction which
is more flexible.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>

nir/lower_tex: copy backend_flags field when copying a tex instruction

Fixes: 29c4417fb8 ('nir: Add a backend_flags field to nir_tex_instr')
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>

v3dv: remove unused code

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24537>

intel/fs: add variable for output of debug backend optimizer

It can be useful to compare 2 runs with different compiler changes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24552>

intel/fs: track more steps with INTEL_DEBUG=optimizer

One particular nice thing to have is the first generated backend IR
before validation. Especially if you made a mistake in the NIR
translation, you can at least look at it before validation tells you
off.

Then the last 2 steps of the optimize() function can be interesting to
look at.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24552>

lavapipe: Fix struct initialization

Fix defect reported by Coverity Scan.

Evaluation order violation (EVALUATION_ORDER)
write_write_typo: In box.x = box.x = copy->imageOffset.x, box.x is written twice with the same value.

Fixes: 9e9d90c6c38 ("lavapipe: VK_EXT_host_image_copy")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24531>

nvk: enable KHR_shader_clock.

This should all be wired up.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24595>

radv: advertise VK_KHR_maintenance5

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>

radv: implement radv_Get{Device}ImageSubresourceLayout2KHR()

Not really possible without creating an image internally.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24392>