Haojian Wu [Mon, 1 Jul 2019 09:26:48 +0000 (09:26 +0000)]
[clangd] Show better message when we rename macros.
Summary:
Previously, when we rename a macro, we get an error message of "there is
no symbol found".
This patch improves the message of this case (as we don't support macros).
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, mgrang, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63922
llvm-svn: 364735
Yevgeny Rouban [Mon, 1 Jul 2019 08:43:53 +0000 (08:43 +0000)]
[SimpleLoopUnswitch] Implement handling of prof branch_weights metadata for SwitchInst
Differential Revision: https://reviews.llvm.org/D60606
llvm-svn: 364734
Sam Parker [Mon, 1 Jul 2019 08:21:28 +0000 (08:21 +0000)]
[ARM] WLS/LE Code Generation
Backend changes to enable WLS/LE low-overhead loops for armv8.1-m:
1) Use TTI to communicate to the HardwareLoop pass that we should try
to generate intrinsics that guard the loop entry, as well as setting
the loop trip count.
2) Lower the BRCOND that uses said intrinsic to an Arm specific node:
ARMWLS.
3) ISelDAGToDAG the node to a new pseudo instruction:
t2WhileLoopStart.
4) Add support in ArmLowOverheadLoops to handle the new pseudo
instruction.
Differential Revision: https://reviews.llvm.org/D63816
llvm-svn: 364733
Billy Robert O'Neal III [Mon, 1 Jul 2019 08:09:02 +0000 (08:09 +0000)]
[libcxx] [test] Add void cast to result of compare_exchange_weak to suppress [[nodiscard]].
llvm-svn: 364732
Haojian Wu [Mon, 1 Jul 2019 08:05:53 +0000 (08:05 +0000)]
[clangd] Make FixIt message be consistent with the clang-tidy diagnostic message.
Summary:
We strip the "[clang-tidy-check]" suffix from the clang-tidy diagnostics, we
should be consistent with the message in FixIt (strip the suffix as well).
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63926
llvm-svn: 364731
Craig Topper [Mon, 1 Jul 2019 07:59:42 +0000 (07:59 +0000)]
[X86] Add more load folding tests for vcvt(t)ps2(u)qq showing missed foldings. NFC
llvm-svn: 364730
Craig Topper [Mon, 1 Jul 2019 07:09:34 +0000 (07:09 +0000)]
[X86] Improve the type checking fast-isel handling of vector bitcasts.
We had a bunch of vector size legality checks for the source type
based on feature flags, but we didn't check the destination type at
all beyond ensuring that it was a "simple" type. But this allowed
the destination to be i128 which isn't legal.
This commit changes the code to use TLI's isTypeLegal logic in
place of the all the subtarget checks. Then additionally checks
that the source and dest are vectors.
Fixes 42452
llvm-svn: 364729
Craig Topper [Mon, 1 Jul 2019 07:09:31 +0000 (07:09 +0000)]
[X86] Add a DAG combine to replace vector loads feeding a v4i32->v2f64 CVTSI2FP/CVTUI2FP node with a vzload.
But only when the load isn't volatile.
This improves load folding during isel where we only have vzload
and scalar_to_vector+load patterns. We can't have full vector load
isel patterns for the same volatile load issue.
Also add some missing masked cvtsi2fp/cvtui2fp with vzload patterns.
llvm-svn: 364728
Craig Topper [Mon, 1 Jul 2019 07:09:26 +0000 (07:09 +0000)]
[X86] Add some additional load folding tests to vec_int_to_fp.ll/vec_int_to_fp-widen.ll and disable the peephole pass.
Also copy some missing test cases from vec_int_to_fp.ll to vec_int_to_fp-widen.ll
llvm-svn: 364727
Craig Topper [Mon, 1 Jul 2019 07:09:23 +0000 (07:09 +0000)]
[X86] Add MOVHPDrm/MOVLPDrm patterns that use VZEXT_LOAD.
We already had patterns that used scalar_to_vector+load. But we can
also have a vzload.
Found while investigating combining scalar_to_vector+load to vzload.
llvm-svn: 364726
Mike Spertus [Sun, 30 Jun 2019 22:04:25 +0000 (22:04 +0000)]
Various tweaks to MSVC natvis visualizers
Make more consistent use of na format.
Improve visualization of deduction guides.
Add visualizer for explicit specifier (including conditionally explicit)
Fix some typos
llvm-svn: 364724
Mike Spertus [Sun, 30 Jun 2019 21:54:34 +0000 (21:54 +0000)]
Clean up MSVC visualization of LLVM pointer types
Create separate natvis ptr and int views for PointerIntPair.
These are convenient in watch Windows and will be used by
Clang visualizers to be checked in shortly
Also, removed deref views as the MSVC na format has
done the same thing natively since MSVC2013.
llvm-svn: 364723
Jonas Devlieghere [Sun, 30 Jun 2019 19:00:09 +0000 (19:00 +0000)]
Revert "[GDBRemote] Remove code that flushes GDB remote packets"
Reverting this again as it doesn't appear to solve the flakiness on the
LLDB standalone bot.
llvm-svn: 364722
Sanjay Patel [Sun, 30 Jun 2019 13:40:31 +0000 (13:40 +0000)]
[InstCombine] canonicalize fcmp+select to minnum/maxnum intrinsics
This is the opposite direction of D62158 (we have to choose 1 form or the other).
Now that we have FMF on the select, this becomes more palatable. And the benefits
of having a single IR instruction for this operation (less chances of missing folds
based on extra uses, etc) overcome my previous comments about the potential advantage
of larger pattern matching/analysis.
Differential Revision: https://reviews.llvm.org/D62414
llvm-svn: 364721
Fangrui Song [Sun, 30 Jun 2019 11:19:56 +0000 (11:19 +0000)]
Cleanup: llvm::bsearch -> llvm::partition_point after r364719
llvm-svn: 364720
Fangrui Song [Sun, 30 Jun 2019 09:17:59 +0000 (09:17 +0000)]
[ADT] Implement llvm::bsearch() with std::partition_point()
Summary:
Delete the begin-end form because the standard std::partition_point
can be easily used as a replacement.
The ranges-style llvm::bsearch will be renamed to llvm::partition_point
in the next clean-up patch.
The name "bsearch" doesn't meet people's expectation because in C:
> If two or more members compare equal, which member is returned is unspecified.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D63718
llvm-svn: 364719
Craig Topper [Sun, 30 Jun 2019 06:46:37 +0000 (06:46 +0000)]
[X86] Custom lower AVX masked loads to masked load and vselect instead of selecting a maskmov+vblend during isel.
AVX masked loads only support 0 as the value for masked off elements.
So we need an extra blend to support other values. Previously we
expanded the masked load to two instructions with isel patterns.
With this patch we now insert the vselect during lowering and it
will be separately selected as a blend.
llvm-svn: 364718
Craig Topper [Sun, 30 Jun 2019 06:46:33 +0000 (06:46 +0000)]
[SelectionDAG] Use the memory VT instead of result VT for FoldingSet profiling in getMaskedLoad/getMaskedStore.
This matches what is done by the Profile function. Otherwise CSE
won't work properly.
llvm-svn: 364717
Adrian Prantl [Sat, 29 Jun 2019 18:32:16 +0000 (18:32 +0000)]
Replace tabs with spaces.
llvm-svn: 364716
Nikita Popov [Sat, 29 Jun 2019 15:12:59 +0000 (15:12 +0000)]
[LFTR] Rephrase getLoopTest into "based-on" check; NFCI
What we want to know here is whether we're already using this value
for the loop condition, so make the query about that. We can extend
this to a more general "based-on" relationship, rather than a direct
icmp use later.
llvm-svn: 364715
Sanjay Patel [Sat, 29 Jun 2019 14:28:54 +0000 (14:28 +0000)]
[InstCombine] canonicalize fmin/fmax to LLVM intrinsics minnum/maxnum
This transform came up in D62414, but we should deal with it first.
We have LLVM intrinsics that correspond exactly to libm calls (unlike
most libm calls, these libm calls never set errno).
This holds without any fast-math-flags, so we should always canonicalize
to those intrinsics directly for better optimization.
Currently, we convert to fcmp+select only when we have FMF (nnan) because
fcmp+select does not preserve the semantics of the call in the general case.
Differential Revision: https://reviews.llvm.org/D63214
llvm-svn: 364714
Nikita Popov [Sat, 29 Jun 2019 12:41:02 +0000 (12:41 +0000)]
[LFTR] Remove unnecessary latch check; NFCI
The whole indvars pass works on loops in simplified form, so there
is always a unique latch. Convert the condition into an assertion
in needsLFTR (though we also assert this in later LFTR functions).
Additionally update the comment on getLoopTest() now that we are
dealing with multiple exits.
llvm-svn: 364713
Roman Lebedev [Sat, 29 Jun 2019 11:51:50 +0000 (11:51 +0000)]
[InstCombine] Shift amount reassociation (PR42391)
Summary:
Given pattern:
`(x shiftopcode Q) shiftopcode K`
we should rewrite it as
`x shiftopcode (Q+K)` iff `(Q+K) u< bitwidth(x)`
This is valid for any shift, but they must be identical.
* https://rise4fun.com/Alive/9E2
* exact on both lshr => exact https://rise4fun.com/Alive/plHk
* exact on both ashr => exact https://rise4fun.com/Alive/QDAA
* nuw on both shl => nuw https://rise4fun.com/Alive/5Uk
* nsw on both shl => nsw https://rise4fun.com/Alive/0plg
Should fix [[ https://bugs.llvm.org/show_bug.cgi?id=42391 | PR42391]].
Reviewers: spatel, nikic, RKSimon
Reviewed By: nikic
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63812
llvm-svn: 364712
Roman Lebedev [Sat, 29 Jun 2019 11:51:37 +0000 (11:51 +0000)]
[IR][Patternmatch] Add m_SpecificInt_ULT() predicate
Summary:
Match an integer or vector with every element unsigned less than the
Threshold. For vectors, this includes constants with undefined elements.
FIXME: is it worth generalizing this to simply take ICmpInst::Predicate?
Reviewers: craig.topper, spatel, nikic
Reviewed By: spatel
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63811
llvm-svn: 364711
Dmitry Venikov [Sat, 29 Jun 2019 11:38:12 +0000 (11:38 +0000)]
[APInt] Fix getBitsNeeded for INT_MIN values
Summary: This patch fixes behaviour of APInt::getBitsNeeded for INT_MIN 10 bits values.
Reviewers: regehr, RKSimon
Reviewed By: RKSimon
Subscribers: grandinj, dexonsmith, kristina, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63691
llvm-svn: 364710
Nikita Popov [Sat, 29 Jun 2019 09:24:12 +0000 (09:24 +0000)]
[LFTR] Fix post-inc pointer IV with truncated exit count (PR41998)
Fixes https://bugs.llvm.org/show_bug.cgi?id=41998. Usually when we
have a truncated exit count we'll truncate the IV when comparing
against the limit, in which case exit count overflow in post-inc
form doesn't matter. However, for pointer IVs we don't do that, so
we have to be careful about incrementing the IV in the wide type.
I'm fixing this by removing the IVCount variable (which was
ExitCount or ExitCount+1) and replacing it with a UsePostInc flag,
and then moving the actual limit adjustment to the individual cases
(which are: pointer IV where we add to the wide type, integer IV
where we add to the narrow type, and constant integer IV where we
add to the wide type).
Differential Revision: https://reviews.llvm.org/D63686
llvm-svn: 364709
Sam Clegg [Sat, 29 Jun 2019 01:53:26 +0000 (01:53 +0000)]
Partial revert of "[llvm-ar] Document response file support in --help"
This is partial revert of
70a8027c60fe1f95e8a8a1ff6575ebf8778d3544.
The test apparently failed on win32 bots due to the way slashes in
pathnames are handled.
llvm-svn: 364705
Fangrui Song [Sat, 29 Jun 2019 01:24:36 +0000 (01:24 +0000)]
[Driver] Fix style issues of --print-supported-cpus after D63105
Reviewed By: ziangwan
Differential Revision: https://reviews.llvm.org/D63822
llvm-svn: 364704
Matt Arsenault [Sat, 29 Jun 2019 00:55:16 +0000 (00:55 +0000)]
AMDGPU/GlobalISel: Add some more tests for icmp select
llvm-svn: 364703
Fangrui Song [Sat, 29 Jun 2019 00:55:13 +0000 (00:55 +0000)]
Use const auto *
llvm-svn: 364702
Matt Arsenault [Sat, 29 Jun 2019 00:44:36 +0000 (00:44 +0000)]
AMDGPU/GlobalISel: RegBankSelect for update.dpp
llvm-svn: 364701
Julian Lettner [Sat, 29 Jun 2019 00:40:45 +0000 (00:40 +0000)]
[TSan] Attempt to fix linker error for Linux on AArch64
Introduced in
5be69ebe121d5b6ea284c3dc6d1cd5098c94f353.
llvm-svn: 364700
Matt Arsenault [Sat, 29 Jun 2019 00:39:20 +0000 (00:39 +0000)]
AMDGPU/GlobalISel: RegBankSelect for atomic.inc/atomic.dec
llvm-svn: 364699
Matt Arsenault [Sat, 29 Jun 2019 00:33:13 +0000 (00:33 +0000)]
AMDGPU/GlobalISel: RegBankSelect for some DS intrinsics
llvm-svn: 364698
Matt Arsenault [Sat, 29 Jun 2019 00:29:56 +0000 (00:29 +0000)]
AMDGPU/GlobalISel: RegBankSelect for some easy intrinsics
llvm-svn: 364697
Matt Arsenault [Sat, 29 Jun 2019 00:28:52 +0000 (00:28 +0000)]
AMDGPU/GlobalISel: RegBankSelect for icmp/fcmp intrinsics
llvm-svn: 364696
Matt Arsenault [Sat, 29 Jun 2019 00:25:53 +0000 (00:25 +0000)]
AMDGPU/GlobalISel: RegBankSelect for amdgcn.div.fmas
llvm-svn: 364695
Matt Arsenault [Sat, 29 Jun 2019 00:22:28 +0000 (00:22 +0000)]
AMDGPU/GlobalISel: RegBankSelect for some simple leaf intrinsics
llvm-svn: 364694
Philip Reames [Sat, 29 Jun 2019 00:19:31 +0000 (00:19 +0000)]
[IndVars] Remove a bit of manual constant folding [NFC]
SCEV is more than capable of folding (add x, trunc(0)) to x.
llvm-svn: 364693
Leonard Chan [Sat, 29 Jun 2019 00:10:22 +0000 (00:10 +0000)]
Revert "[clang][NewPM] Fix broken profile test"
This reverts commit
ab2c0ed01edfec9a9402d03bdf8633b34b73f3a7.
See https://reviews.llvm.org/D63155
llvm-svn: 364692
Matt Arsenault [Fri, 28 Jun 2019 23:43:40 +0000 (23:43 +0000)]
AMDGPU: Add baseline test for packed shufflevector
llvm-svn: 364691
Jan Korous [Fri, 28 Jun 2019 22:37:31 +0000 (22:37 +0000)]
[clang][test][NFC] Explicitly specify clang ABI in AST Dumper test
Clang <= 4 used the pre-C++11 rule about which structures can be passed in registers.
llvm-svn: 364690
Wouter van Oortmerssen [Fri, 28 Jun 2019 22:20:33 +0000 (22:20 +0000)]
[WebAssembly] Assembler: support .int16/32/64 directives.
Reviewers: sbc100
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63959
llvm-svn: 364689
Wouter van Oortmerssen [Fri, 28 Jun 2019 21:53:11 +0000 (21:53 +0000)]
[WebAssembly] Allow @object in .type directives.
Reviewers: sbc100
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63955
llvm-svn: 364688
Sanjay Patel [Fri, 28 Jun 2019 21:45:55 +0000 (21:45 +0000)]
[x86] remove stale comment about cmov; NFC
The cmov node used to sometimes return a glue result (and that's what
'flag' meant in this context), but that was removed with D38664.
llvm-svn: 364687
Jim Ingham [Fri, 28 Jun 2019 21:40:05 +0000 (21:40 +0000)]
Get the expression parser to handle missing weak symbols.
MachO only for this patch.
Differential Revision: https://reviews.llvm.org/D63914
<rdar://problem/
51463642>
llvm-svn: 364686
Cameron McInally [Fri, 28 Jun 2019 21:39:08 +0000 (21:39 +0000)]
[NFC][NewGVN] Explicitly check fpmath metadata in fpmath.ll
Suggested in D63933.
llvm-svn: 364685
Sanjay Patel [Fri, 28 Jun 2019 20:45:32 +0000 (20:45 +0000)]
[Lanai] auto-generate complete test checks; NFC
This file will fail with a common codegen transform that
I'm looking at, and I can't tell if that's an improvement
or regression based on the sparse checking.
llvm-svn: 364684
Alexey Bataev [Fri, 28 Jun 2019 20:45:14 +0000 (20:45 +0000)]
[OPENMP]Improve analysis of implicit captures.
If the variable is used in the OpenMP region implicitly, we need to
check the data-sharing attributes for such variables and generate
implicit clauses for them. Patch improves analysis of such variables for
better handling of data-sharing rules.
llvm-svn: 364683
Wouter van Oortmerssen [Fri, 28 Jun 2019 20:31:13 +0000 (20:31 +0000)]
[WebAssembly] Assembler: Allow offsets and p2align in symbol load.
Reviewers: sbc100
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63951
llvm-svn: 364682
Wouter van Oortmerssen [Fri, 28 Jun 2019 20:29:16 +0000 (20:29 +0000)]
[WebAssembly] Assembler: Improve section parsing.
Reviewers: sbc100
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63947
llvm-svn: 364681
Cameron McInally [Fri, 28 Jun 2019 20:09:32 +0000 (20:09 +0000)]
[NewGVN] Add unary FNeg support to NewGVN pass
Differential Revision: https://reviews.llvm.org/D63933
llvm-svn: 364680
Brad Smith [Fri, 28 Jun 2019 19:57:51 +0000 (19:57 +0000)]
Revert enabling frame pointer elimination on OpenBSD for now.
llvm-svn: 364679
Cameron McInally [Fri, 28 Jun 2019 19:57:31 +0000 (19:57 +0000)]
[GVNSink] Add unary FNeg support to GVNSink pass
Differential Revision: https://reviews.llvm.org/D63900
llvm-svn: 364678
Erik Pilkington [Fri, 28 Jun 2019 19:54:19 +0000 (19:54 +0000)]
[demangle] Support for C++2a char8_t
llvm-svn: 364677
Julian Lettner [Fri, 28 Jun 2019 19:49:14 +0000 (19:49 +0000)]
[TSan] Fix build build breakage on Android
Introduced in
5be69ebe121d5b6ea284c3dc6d1cd5098c94f353.
llvm-svn: 364676
Brad Smith [Fri, 28 Jun 2019 19:48:31 +0000 (19:48 +0000)]
Default to Secure PLT on PPC for musl libc.
This matches the default settings of clang.
llvm-svn: 364675
Julie Hockett [Fri, 28 Jun 2019 19:07:56 +0000 (19:07 +0000)]
[clang-doc] Handle anonymous namespaces
Improves output for anonymous decls, and updates the '--public' flag to exclude everything under an anonymous namespace.
Differential Revision: https://reviews.llvm.org/D52847
llvm-svn: 364674
Sam Clegg [Fri, 28 Jun 2019 18:48:05 +0000 (18:48 +0000)]
[llvm-ar] Document response file support in --help
Also a test for this.
Differential Revision: https://reviews.llvm.org/D63836
llvm-svn: 364673
Lang Hames [Fri, 28 Jun 2019 18:36:59 +0000 (18:36 +0000)]
Re-apply r364600 with fixes.
Fix: MachO/X86_64_RELOC_GOT is a 32-bit reloc, so only compare 32 bits.
llvm-svn: 364672
Rainer Orth [Fri, 28 Jun 2019 18:29:18 +0000 (18:29 +0000)]
[unittests][Support] Fix LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions on Solaris
LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions currently
FAILs on Solaris:
FAIL: LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions (2940 of 51555)
******************** TEST 'LLVM-Unit :: Support/./SupportTests/FileSystemTest.permissions' FAILED ********************
Note: Google Test filter = FileSystemTest.permissions
[==========] Running 1 test from 1 test case.
[----------] Global test environment set-up.
[----------] 1 test from FileSystemTest
[ RUN ] FileSystemTest.permissions
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1705: Failure
Value of: CheckPermissions(fs::sticky_bit)
Actual: false
Expected: true
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1712: Failure
Value of: CheckPermissions(fs::set_uid_on_exe | fs::set_gid_on_exe | fs::sticky_bit)
Actual: false
Expected: true
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1719: Failure
Value of: CheckPermissions(fs::all_read | fs::set_uid_on_exe | fs::set_gid_on_exe | fs::sticky_bit)
Actual: false
Expected: true
/opt/llvm-buildbot/obj/llvm/llvm.src/unittests/Support/Path.cpp:1722: Failure
Value of: CheckPermissions(fs::all_perms)
Actual: false
Expected: true
[ FAILED ] FileSystemTest.permissions (0 ms)
[----------] 1 test from FileSystemTest (0 ms total)
[----------] Global test environment tear-down
[==========] 1 test from 1 test case ran. (1 ms total)
[ PASSED ] 0 tests.
[ FAILED ] 1 test, listed below:
[ FAILED ] FileSystemTest.permissions
1 FAILED TEST
Checking with truss reveals that this is the same issue as on AIX and
documented in chmod(2):
If the process is not a privileged process and the file is not a direc-
tory, mode bit 01000 (S_ISVTX, the sticky bit) is cleared.
The following patch fixes this in the same way. Tested on amd64-pc-solaris2.11.
Differential Revision: https://reviews.llvm.org/D63598
llvm-svn: 364671
Julie Hockett [Fri, 28 Jun 2019 18:17:58 +0000 (18:17 +0000)]
[clang-doc] De-duplicate comments and locations
De-duplicate comments and declaration locations in reduce function.
When two files include the same header file, this file's content is mapped
twice causing comments and locations to be duplicated after the reduce stage.
Committed on behalf of Diego Astiazarán (diegoaat97@gmail.com).
Differential Revision: https://reviews.llvm.org/D62970
llvm-svn: 364670
Jonas Devlieghere [Fri, 28 Jun 2019 18:14:27 +0000 (18:14 +0000)]
[GDBRemote] Remove code that flushes GDB remote packets
The arbitrary timeout when flushing GDB remote packets caused
non-determinism and flakiness between test runs. I suspect it is what's
causing the flakiness of the reproducer tests on GreenDragon, and want
to see if removing it causes that to go away.
This change was originally introduced in r197579 to discard a
`$T02thread:01;#4` that QEMU was sending. If anybody knows how to test
that this continues working after removing this code, I'd love to hear
it.
llvm-svn: 364669
Jinsong Ji [Fri, 28 Jun 2019 18:07:19 +0000 (18:07 +0000)]
[UpdateChecks] Add support for armv7-apple-darwin
armv7-apple-darwin was not supported well, the script can't generate
checks.
https://reviews.llvm.org/D60601/new/#inline-568671
Differential Revision: https://reviews.llvm.org/D63939
llvm-svn: 364668
Simon Pilgrim [Fri, 28 Jun 2019 17:57:32 +0000 (17:57 +0000)]
[X86] CombineShuffleWithExtract - recurse through EXTRACT_SUBVECTOR chain
llvm-svn: 364667
Jim Ingham [Fri, 28 Jun 2019 17:57:19 +0000 (17:57 +0000)]
Make sure the thread list is updated before you set the stop reason
on a thread. When talking to some older gdb-remote stubs, We were getting
a stop reason from the stop reply packet and setting it on the relevant
thread before we updated the full stop list. That would get discarded when
the full list was updated.
Also, if you already have a thread list when you go to see if there is an
Operating System plugin, and you do indeed load a new OS plugin, you have to
re-fetch the thread list or it will only show the raw threads.
Differential Revision: https://reviews.llvm.org/D62887
llvm-svn: 364666
Peter Collingbourne [Fri, 28 Jun 2019 17:53:26 +0000 (17:53 +0000)]
hwasan: Remove the old frame descriptor mechanism.
Differential Revision: https://reviews.llvm.org/D63470
llvm-svn: 364665
Volodymyr Sapsai [Fri, 28 Jun 2019 17:42:17 +0000 (17:42 +0000)]
[ODRHash] Fix null pointer dereference for ObjC selectors with empty slots.
`Selector::getIdentifierInfoForSlot` returns NULL if a slot has no
corresponding identifier. Add a boolean to the hash and a NULL check.
rdar://problem/
51615164
Reviewers: rtrieu
Reviewed By: rtrieu
Subscribers: dexonsmith, cfe-commits, jkorous
Differential Revision: https://reviews.llvm.org/D63789
llvm-svn: 364664
Julie Hockett [Fri, 28 Jun 2019 17:32:26 +0000 (17:32 +0000)]
Update CODE_OWNERS.txt for clang-doc
Differential Revision: https://reviews.llvm.org/D63734
llvm-svn: 364663
Julian Lettner [Fri, 28 Jun 2019 17:27:30 +0000 (17:27 +0000)]
[TSan] Improve handling of stack pointer mangling in {set,long}jmp, pt.1
TSan needs to infer which calls to setjmp/longjmp are corresponding
pairs. My understanding is, that we can't simply use the jmp_buf
address, since this buffer is just a plain data structure storing the
environment (registers) with no additional semantics, i.e., it can be
copied around and is still expected to work. So we use the stack pointer
(SP) instead.
The setjmp interceptor stores some metadata, which is then consumed in
the corresponding call to longjmp. We use the SP as an "index" (stable
identifier) into the metadata table. So far so good.
However, when mangling is used, the setjmp interceptor observes the
UNmangled SP, but the longjmp interceptor only knows the mangled value
for SP. To still correlate corresponding pairs of calls, TSan currently
derives the mangled representation in setjmp and uses it as the stable
identifer, so that longjmp can do it's lookup.
Currently, this works since "mangling" simply means XOR with a secret
value. However, in the future we want to use operations that do not
allow us to easily go from unmangled -> mangled (pointer
authentication). Going from mangled -> unmangled should still be
possible (for pointer authentication it means zeroing a few bits).
This patch is part 1 of changing set/longjmp interceptors to use the
unmangled SP for metadata lookup. Instead of deriving the mangled SP in
setjmp, we will derive the unmangled SP in longjmp. Since this change
involves difficult-to-test code, it will be done in (at least) 2 parts:
This patch only replicates the existing behavior and checks that the
newly computed value for SP matches with what we have been doing so far.
This should help me to fix issues on architectures I cannot test
directly. I tested this patch on x86-64 (Linux/Darwin) and arm64
(Darwin).
This patch will also address an orthogonal issue: there is a lot of code
duplication in the assembly files, because the
`void __tsan_setjmp(uptr sp, uptr mangled_sp)` already demands the
mangled SP. This means that the code for computing the mangled SP is
duplicated at every call site (in assembly).
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D60981
llvm-svn: 364662
Roman Lebedev [Fri, 28 Jun 2019 17:26:28 +0000 (17:26 +0000)]
[NFC][Codegen] Revisit test coverage for X % C == 0 fold once more (add tests with '1' divisor)
llvm-svn: 364661
Martin Storsjo [Fri, 28 Jun 2019 17:13:52 +0000 (17:13 +0000)]
[COFF] Fix .rsrc sections with differing permissions
GNU windres, and MS cvtres (unless the /readonly option is passed)
produce read-write .rsrc sections, when creating resource object files.
This caused the sections to not be added to the precreated RsrcSec,
and therefore not be added to the data directory.
Differential Revision: https://reviews.llvm.org/D63837
llvm-svn: 364660
Wouter van Oortmerssen [Fri, 28 Jun 2019 16:51:06 +0000 (16:51 +0000)]
[WebAssembly] Added visibility and ident directives to WasmAsmParser.
Summary:
These are output by clang -S, so can now be roundtripped thru clang.
(partially) fixes: https://bugs.llvm.org/show_bug.cgi?id=34544
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, aheejin, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63901
llvm-svn: 364658
Roman Lebedev [Fri, 28 Jun 2019 16:36:53 +0000 (16:36 +0000)]
[NFC][InstCombine] Shift amount reassociation: revisit flag preservation tests
llvm-svn: 364657
Dmitry Preobrazhensky [Fri, 28 Jun 2019 16:28:46 +0000 (16:28 +0000)]
[AMDGPU][MC] Fix 2 for sanitizer failure in 364645
llvm-svn: 364656
Alexey Bataev [Fri, 28 Jun 2019 16:16:00 +0000 (16:16 +0000)]
[OPENMP]Fix top DSA for static members.
Fixed handling of the data-sharing attributes for static members when
requesting top most attribute. Previously, it might return the incorrect
attributes for static members if they were overriden in the outer
constructs.
llvm-svn: 364655
Sam Tebbs [Fri, 28 Jun 2019 15:43:31 +0000 (15:43 +0000)]
[ARM] Add support for the MVE long shift instructions
MVE adds the lsll, lsrl and asrl instructions, which perform a shift on a 64 bit value separated into two 32 bit registers.
The Expand64BitShift function is modified to accept ISD::SHL, ISD::SRL and ISD::SRA and convert it into the appropriate opcode in ARMISD. An SHL is converted into an lsll, an SRL is converted into an lsrl for the immediate form and a negation and lsll for the register form, and SRA is converted into an asrl.
test/CodeGen/ARM/shift_parts.ll is added to test the logic of emitting these instructions.
Differential Revision: https://reviews.llvm.org/D63430
llvm-svn: 364654
Max Moroz [Fri, 28 Jun 2019 15:38:25 +0000 (15:38 +0000)]
[llvm-cov[ Fix lcov coverage report contains functions from other compilation units.
Summary: Patch by Chuan Qiu (@eagleonhill).
Reviewers: Dor1s
Reviewed By: Dor1s
Subscribers: lebedev.ri, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63571
llvm-svn: 364653
Roman Lebedev [Fri, 28 Jun 2019 15:32:52 +0000 (15:32 +0000)]
[NFC][InstCombine] Shift amount reassociation: add flag preservation test
As discussed in https://reviews.llvm.org/D63812#inline-569870
* exact on both lshr => exact https://rise4fun.com/Alive/plHk
* exact on both ashr => exact https://rise4fun.com/Alive/QDAA
* nuw on both shl => nuw https://rise4fun.com/Alive/5Uk
* nsw on both shl => nsw https://rise4fun.com/Alive/0plg
So basically if the same flag is set on both original shifts -> set it on new shift.
Don't think we can do anything with non-matching flags on shl.
llvm-svn: 364652
Dmitry Preobrazhensky [Fri, 28 Jun 2019 15:22:47 +0000 (15:22 +0000)]
[AMDGPU][MC] Fix for sanitizer failure in 364645
llvm-svn: 364651
Alexey Bataev [Fri, 28 Jun 2019 15:16:37 +0000 (15:16 +0000)]
[OPENMP]Fix DSA for loop iteration variables in simd loops.
According to the OpenMP 5.0 standard, the loop iteration variable in the associated
for-loop of a simd construct with just one associated for-loop may be
listed in a private, lastprivate, or linear clause with a linear-step
that is the increment of the associated for-loop. Also, the loop
teration variables in the associated for-loops of a simd construct with
multiple associated for-loops may be listed in a private or lastprivate
clause.
llvm-svn: 364650
Cameron McInally [Fri, 28 Jun 2019 15:12:15 +0000 (15:12 +0000)]
[NFC][Float2Int] Pre-commit unary FNeg test to basic.ll
llvm-svn: 364649
Krzysztof Parzyszek [Fri, 28 Jun 2019 15:08:03 +0000 (15:08 +0000)]
[Hexagon] driver uses out-of-date option name and binary name
Patch by A. Skrobov (t.yomitch).
Differential Revision: https://reviews.llvm.org/D62127
llvm-svn: 364648
Alexey Bataev [Fri, 28 Jun 2019 14:59:25 +0000 (14:59 +0000)]
[OPENMP]Fix checks for DSA in simd constructs.
The errors for incorrectly specified data-sharing attributes for simd
constructs must be emitted only for the explicitly provided clauses, not
the predetermined ones.
llvm-svn: 364647
Cameron McInally [Fri, 28 Jun 2019 14:39:58 +0000 (14:39 +0000)]
[NFC][NewGVN] Pre-commit unary FNeg test to fpmath.ll
llvm-svn: 364646
Dmitry Preobrazhensky [Fri, 28 Jun 2019 14:14:02 +0000 (14:14 +0000)]
[AMDGPU][MC] Enabled constant expressions as operands of sendmsg
See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820
Reviewers: artem.tamazov, arsenm
Differential Revision: https://reviews.llvm.org/D62735
llvm-svn: 364645
Simon Pilgrim [Fri, 28 Jun 2019 12:24:49 +0000 (12:24 +0000)]
[X86] CombineShuffleWithExtract - only require 1 source to be EXTRACT_SUBVECTOR
We were requiring that both shuffle operands were EXTRACT_SUBVECTORs, but we can relax this to only require one of them to be.
Also, we shouldn't bother attempting this if both operands are from the lowest subvector (or not EXTRACT_SUBVECTOR at all).
llvm-svn: 364644
David Green [Fri, 28 Jun 2019 11:44:03 +0000 (11:44 +0000)]
[ARM] Add MVE mul patterns
This simply adds integer and floating point VMUL patterns for MVE, same as we
have add and sub.
Differential Revision: https://reviews.llvm.org/D63866
llvm-svn: 364643
Roman Lebedev [Fri, 28 Jun 2019 11:36:34 +0000 (11:36 +0000)]
[NFC][Codegen] Revisit test coverage for X % C == 0 fold
llvm-svn: 364642
David Green [Fri, 28 Jun 2019 11:17:38 +0000 (11:17 +0000)]
[ARM] Mark math routines as non-legal for MVE
This adds handling and tests for a number of floating point math routines,
which have no MVE instructions.
Differential Revision: https://reviews.llvm.org/D63725
llvm-svn: 364641
David Green [Fri, 28 Jun 2019 10:25:35 +0000 (10:25 +0000)]
[ARM] MVE patterns for VABS and VNEG
This simply adds the required patterns for fp neg and abs.
Differential Revision: https://reviews.llvm.org/D63861
llvm-svn: 364640
Igor Kudrin [Fri, 28 Jun 2019 10:14:14 +0000 (10:14 +0000)]
[ELF] Do not produce DT_JMPREL and DT_PLTGOT if .rela.plt is empty.
If .rela.plt is mentioned in a linker script, it might be preserved
even if it is empty. In that case, LLD created DT_JMPREL and DT_PLTGOT
dynamic tags. When the tags exist, a dynamic loader writes values into
reserved slots in .got.plt to support lazy symbol resolution.
The problem is that, in fact, the linker has not reserved that space,
and the writing may occur into the memory allocated for something else.
Differential Revision: https://reviews.llvm.org/D63869
llvm-svn: 364639
Fangrui Song [Fri, 28 Jun 2019 10:10:10 +0000 (10:10 +0000)]
[DebugInfo] Fix setStartAddress after r364637
llvm-svn: 364638
Fangrui Song [Fri, 28 Jun 2019 10:06:11 +0000 (10:06 +0000)]
[DebugInfo] Simplify GSYM::AddressRange and GSYM::AddressRanges
Delete unnecessary getters of AddressRange.
Simplify AddressRange::size(): Start <= End check should be checked in an upper layer.
Delete isContiguousWith() that doesn't make sense.
Simplify AddressRanges::insert. Delete commented code. Fix it when more than 1 ranges are to be deleted.
Delete trailing newline.
llvm-svn: 364637
David Green [Fri, 28 Jun 2019 09:47:55 +0000 (09:47 +0000)]
[ARM] Widening loads and narrowing stores
MVE has instructions to widen as it loads, and narrow as it stores. This adds
the required patterns and legalisation to make them work including specifying
that they are legal, patterns to select them and test changes.
Patch by David Sherwood.
Differential Revision: https://reviews.llvm.org/D63839
llvm-svn: 364636
Simon Tatham [Fri, 28 Jun 2019 09:28:39 +0000 (09:28 +0000)]
[ARM] Fix integer UB in MVE load/store immediate handling.
llvm-svn: 364635
Fangrui Song [Fri, 28 Jun 2019 08:58:05 +0000 (08:58 +0000)]
[DebugInfo] GSYM cleanups after D63104/r364427
llvm-svn: 364634
David Green [Fri, 28 Jun 2019 08:41:40 +0000 (08:41 +0000)]
[ARM] MVE loads and stores
This fills in the gaps for basic MVE loads and stores, allowing unaligned
access and adding far too many tests. These will become important as
narrowing/expanding and pre/post inc are added. Big endian might still not be
handled very well, because we have not yet added bitcasts (and I'm not sure how
we want it to work yet). I've included the alignment code anyway which maps
with our current patterns. We plan to return to that later.
Code written by Simon Tatham, with additional tests from Me and Mikhail Maltsev.
Differential Revision: https://reviews.llvm.org/D63838
llvm-svn: 364633
Dylan McKay [Fri, 28 Jun 2019 08:35:21 +0000 (08:35 +0000)]
[AVR] Don't look for the TargetFrameLowering in the FrameLowering implementation
c.f. r364349
llvm-svn: 364632
David Green [Fri, 28 Jun 2019 08:18:55 +0000 (08:18 +0000)]
[ARM] Mark div and rem as expand for MVE
We don't have vector operations for these, so they need to be expanded for both
integer and float.
Differential Revision: https://reviews.llvm.org/D63595
llvm-svn: 364631