Rob Clark [Sat, 13 Feb 2016 23:29:28 +0000 (18:29 -0500)]
freedreno/query: align counter snapshot locations
Some hw queries need their sample memory locations to have certain
alignment. At the moment that isn't an issue, since the only hw query
is occlusion, so all samples have the same size. But when others are
added with different sample sizes, this starts to be a problem.
All current and immediately upcoming hw queries simply need their
sample address aligned to their size, so let's use that for now.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 10 Feb 2016 19:31:59 +0000 (14:31 -0500)]
freedreno/query: add optional enable hook
Add enable hook for hw query providers. Some will need to configure
perfctr selector registers, which we want to do at the start of the
submit.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 10 Feb 2016 18:25:32 +0000 (13:25 -0500)]
freedreno: query max gpu freq
This will be needed to support converting from cycle counts to time for
performance related queries (initially time-elapsed, but there are some
additional performance counters that could be wired up).
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Wed, 10 Feb 2016 17:07:02 +0000 (12:07 -0500)]
freedreno: update generated headers
Mostly to pull in perf ctrs.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Tue, 16 Feb 2016 18:11:25 +0000 (13:11 -0500)]
freedreno/ir3: fix new gcc6 errors
src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c: In function ‘emit_tex’:
src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c:1368:26: warning: unused variable ‘const_off’ [-Wunused-variable]
struct ir3_instruction *const_off[4];
^~~~~~~~~
unused since:
commit
8750299a420af76cebd3067f6f603eacde06ae06
Author: Jason Ekstrand <jason.ekstrand@intel.com>
Date: Tue Feb 9 14:51:28 2016 -0800
nir: Remove the const_offset from nir_tex_instr
Signed-off-by: Rob Clark <robdclark@gmail.com>
Karol Herbst [Thu, 28 Jan 2016 15:45:58 +0000 (16:45 +0100)]
nv50/ir: we can't do the add to mad conversion when the mul saturates
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Karol Herbst [Sat, 23 Jan 2016 23:16:05 +0000 (00:16 +0100)]
nv50/ir: optimize neg(and(set, 1)) to set
helps shaders in saints row IV, bioshock infinite and shadow warrior
total instructions in shared programs : 1914931 -> 1903900 (-0.58%)
total gprs used in shared programs : 247920 -> 247785 (-0.05%)
total local used in shared programs : 5673 -> 5673 (0.00%)
total bytes used in shared programs :
17558272 ->
17457320 (-0.57%)
local gpr inst bytes
helped 0 137 719 719
hurt 0 12 0 0
v2: remove this opt for OP_SLCT and check against float for OP_SET
v3: simplified the code
Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Tue, 16 Feb 2016 07:26:54 +0000 (02:26 -0500)]
nv50/ir: fix quadop emission in the presence of predication
When there's a predicate, it just goes onto the sources list. If the
quadop only has a single regular source, we will end up thinking that
the predicate is the second source. Check explicitly for the predSrc so
that we don't accidentally emit the wrong thing.
This fixes a bunch of dEQP-GLES3.functional.shaders.derivate.* tests.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Ilia Mirkin [Sun, 14 Feb 2016 03:14:02 +0000 (22:14 -0500)]
nv50,nvc0: enable/disable seamless cubemap texturing as requested
In a situation where the seamless setting isn't available on a
per-texture basis (G200+ Teslas, and all Fermis), assume that all
samplers will have it identically set, and enable accordingly.
This fixes arb_seamless_cubemap piglit test on Fermi and Tesla.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Rob Clark [Tue, 16 Feb 2016 16:43:38 +0000 (11:43 -0500)]
st/mesa: add missing ETC2 entries to format_map
Noticed by Ilia when I was trying to figure out why some app was failing
to use ETC2.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Sat, 13 Feb 2016 23:32:34 +0000 (00:32 +0100)]
nvc0: enable compute support on GK110:GM200 with an envvar
Without this NVF0_COMPUTE environment variable, compute support is
initialized by default and this is not what we want for now because
it might break 3D. It will be enabled by default once we are sure it
won't break anything.
Please note that compute support on GM200+ is not enabled yet because
it needs to be double-checked.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Sat, 13 Feb 2016 23:19:13 +0000 (00:19 +0100)]
nvc0: add compute support for GM107
Fortunately, compute support on GM107 is very close to GK110, except
the GK110_COMPUTE.UNK02C4 which is invalid and should not be used.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Sat, 13 Feb 2016 23:14:34 +0000 (00:14 +0100)]
nvc0: fix compute state initialization on GK110+
Because our firmware doesn't support the GK110_COMPUTE.FIRMWARE[0x6]
method the GPU hangs when it is used. Removing it fix the issue and
allow to launch compute shaders on GK110+.
Tested on GK208 and GM107.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Timothy Arceri [Sat, 13 Feb 2016 22:51:31 +0000 (09:51 +1100)]
glsl: remove duplicate interpolation_string() function
We already have one in the IR code that can be used everywhere its
needed in the AST code so remove the one from the AST.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Timothy Arceri [Mon, 15 Feb 2016 07:38:29 +0000 (18:38 +1100)]
glsl: remove unused helper
Seems to have become unused when i965 moved to NIR.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Timothy Arceri [Tue, 16 Feb 2016 00:03:56 +0000 (11:03 +1100)]
glsl: set user defined varyings to smooth by default in ES
This is usually handled by the backends in order to handle the
various interactions with the gl_*Color built-ins.
The problem is this means linking will fail if one side on the
interface adds the smooth qualifier to the varying and the other
side just uses the default even though they match.
This fixes various deqp tests. The spec is not clear what to for
desktop GL so leave it as is for now.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92743
Samuel Pitoiset [Tue, 16 Feb 2016 17:53:11 +0000 (18:53 +0100)]
gm107/ir: add ATOM CAS emission
This fixes the following dEQP test and the other compswap variants.
dEQP-GLES31.functional.ssbo.atomic.compswap.highp_int
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Mon, 15 Feb 2016 21:40:46 +0000 (22:40 +0100)]
st/mesa: do not init limits when compute shaders are not supported
When the number of uniform blocks is less than 12,
ARB_uniform_buffer_object can't be enabled and the maximum GL version
is not even 3.1...
This fixes a regression introduced in 7c79c1e (st/mesa: add compute
shader state) if the maximum number of uniform blocks allowed for
compute shaders is less than 12. This happens on Kepler but this might
also affect other Gallium drivers.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reported-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Tested-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Jordan Justen [Tue, 16 Feb 2016 16:21:22 +0000 (08:21 -0800)]
mesa: Don't call driver when there is no compute work
The ARB_compute_shader spec says:
"If the work group count in any dimension is zero, no work groups
are dispatched."
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Jordan Justen [Sat, 13 Feb 2016 22:25:33 +0000 (14:25 -0800)]
i965: Set compute shader shared memory max to 64k
See Ivy Bridge PRM, Volume 2, Part 2, 1.8.4 INTERFACE_DESCRIPTOR_DATA:
DWORD 5, bits 20:16: "This field indicates how much shared local
memory the thread group requires. The amount is specified in 4k
blocks, but only powers of 2 are allowed: 0, 4k, 8k, 16k, 32k and 64k
per half-slice."
For Haswell, see Volume 2d, INTERFACE_DESCRIPTOR_DATA:
DWORD 5, bits 20:16: With text identical to the Ivy Bridge PRM.
For Broadwell, see Volume 2d, INTERFACE_DESCRIPTOR_DATA:
DWORD 6, bits 20:16: With text identical to the Ivy Bridge PRM.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: use new CSO_BITS_ALL_SHADERS
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
cso: add CSO_BITS_ALL_SHADERS
For saving/restoring all shader stages.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: simplify st->ctx, ctx->st usage in a various places
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: use _mesa_geometric_width/height() in glDrawPixels code
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: rename attr variable in st_DrawTex()
Rename to 'tex_attr' to be a bit more clear.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: use 'cso' instead of 'st->cso_context' in st_DrawTex()
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: fix whitespace and add comment in st_DrawTex()
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: used _mesa_num_tex_faces() in st_finalize_texture()
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
cso: make most of the cso_save/restore_x() functions static
Users of the CSO save/restore facility all use the new
cso_save/restore_state() functions instead.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
postprocess: use new cso_save/restore_state() functions
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
gallium/hud: use new cso_save/restore_state() functions
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
gallium/util: use new cso_save/restore_state() functions
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: use cso_save/restore_state() in st_cb_texture.c
This simplifies the error handling code too.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: use new cso_save/restore_state() functions
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
cso: add new cso_save/restore_state() functions
cso_save_state() takes a bitmask of state items to save. Calling
cso_restore_state() restores those states.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
cso: remove comment
There's a similar comment just a few lines before.
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: use new cso_set_viewport_dims() helper
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
cso: add new cso_set_viewport_dims() helper
To simplify some viewport setting code in the state tracker.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: use 'cso' local var instead of st->cso_context
Just a little cleaner.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:32 +0000 (10:22 -0700)]
st/mesa: consolidate quad drawing code
The glClear, glBitmap and glDrawPixels code now use a new st_draw_quad()
helper function.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:31 +0000 (10:22 -0700)]
st/mesa: overhaul vertex setup for clearing, glDrawPixels, glBitmap
Define a new st_util_vertex structure which is a bit smaller (9 floats
versus the previous 12 floats per vertex). Clean up the glClear,
glDrawPixels and glBitmap code that sets up the vertex data and does the
drawing so it's all very similar. This can lead to more consolidation.
v2: add assertion that vertex buffer slot == 0 to catch possible future
change in cso_get_aux_vertex_buffer_slot() behavior.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 16 Feb 2016 17:22:31 +0000 (10:22 -0700)]
st/mesa: include u_draw.h, not u_draw_quad.h in st_draw.c
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Jan Vesely [Fri, 12 Feb 2016 23:58:55 +0000 (18:58 -0500)]
configure: Bail out on llvm-config component error
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Matthew Dawson [Tue, 16 Feb 2016 06:25:20 +0000 (01:25 -0500)]
Handle removal of LLVMAddTargetData in SVN revision 260919
LLVM removed LLVMAddTargetData for the 3.9 release in r260919. For the two
places in mesa where this is called, only enable the lines when compiling
for less then 3.9.
For the radeon driver, I'm not sure how to check if any other LLVM calls need
to be adjusted. I think since the target data used is extracted from the
LLVMModule, it isn't necessary to pass it back to LLVM again.
The code does compile, and at least for radeonsi does run OpenGL games.
[ Michel Dänzer: Move #if closer to LLVMAddTargetData in lp_bld_init.c,
and add HAVE_LLVM < 0x0309 guards around now unused occurrences of TD
and data_layout ]
Signed-off-by: Matthew Dawson <matthew@mjdsystems.ca>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Topi Pohjolainen [Fri, 1 Jan 2016 15:02:00 +0000 (17:02 +0200)]
i965: Expose logic telling if non-msrt mcs is supported
Alos use the opportunity to mark inputs constant. (Context has to be
given as read-write to intel_miptree_supports_non_msrt_fast_clear()
to support debug output).
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Topi Pohjolainen [Thu, 10 Dec 2015 14:03:03 +0000 (16:03 +0200)]
i965/gen9: Refactor msrt mcs initialization
This will be re-used to initialize auxiliary buffers in lossless
compression case.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Topi Pohjolainen [Tue, 2 Feb 2016 08:04:34 +0000 (10:04 +0200)]
i965: Add a few assertions on lossless compression
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression (intel_miptree_is_lossless_compressed()).
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Topi Pohjolainen [Tue, 2 Feb 2016 08:00:41 +0000 (10:00 +0200)]
i965: Add a flag telling color resolve pass to ignore CCS_E
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression (intel_miptree_is_lossless_compressed()).
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Topi Pohjolainen [Wed, 9 Dec 2015 13:48:57 +0000 (15:48 +0200)]
i965: Add resolve option for lossless compression
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression (intel_miptree_is_lossless_compressed()).
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Topi Pohjolainen [Mon, 7 Dec 2015 10:23:04 +0000 (12:23 +0200)]
i965: Allow fast clear to be used with lossless compression
v2 (Ben): Use combination of msaa_layout and number of samples
instead of introducing explicit type for lossless
compression.
v3 (Ben): Squash with "i965: Resolve color buffer also in
lossless compression case" and clarify simple
non-compressed fast clear case.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Topi Pohjolainen [Thu, 11 Feb 2016 08:42:13 +0000 (10:42 +0200)]
i965: Add helper for detecting lossless compression
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
Topi Pohjolainen [Mon, 15 Feb 2016 08:58:41 +0000 (10:58 +0200)]
Revert "i965: Restore vbo after color resolve during brw_try_draw_prims()"
This got pushed accidentally in the first place but wasn't reverted
as it didn't regress piglit but instead fixed one newly introduced
test exercising a corner in case in i965 driver. However, saving and
restoring vertex buffer context is complicated and requires more
thought.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94150
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Tapani Palli <tapani.palli@intel.com>
Ben Skeggs [Mon, 15 Feb 2016 21:56:44 +0000 (07:56 +1000)]
nvc0: initial support for GM20x GPUs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nvc0: implement support for maxwell texture headers
Adds support for the new TIC layout that's present on Maxwell GPUs,
heavily based on the code for the existing layout.
This code is required for GM20x support. While GM10x supports the older
layout still, this commit switches it to use the updated version instead.
Piglit testing shows zero regressions on GM107.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nvc0: import maxwell texture header definitions from rnndb
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50-: split tic format specification
We previously stored texture format information as it would appear in
the TIC.
We're about to support the new TIC layout that appeared with Maxwell,
so it makes more sense to store the data in a split-out format.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50-: remove nv50_texture.xml.h
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nvc0: switch nvc0_tex.c to updated g80_texture.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nvc0: switch nvc0_surface.c to updated g80_texture.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50: switch nv50_tex.c to updated g80_texture.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50: switch nv50_surface.c to updated g80_texture.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50: switch nv50_state.c to updated g80_texture.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50-: switch nv50_formats.c to updated g80_texture.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50: import updated g80_texture.xml.h from rnndb
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50-: remove nv50_defs.xml.h
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50-: switch nv50_formats.c to updated g80_defs.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50-: improved macros to handle format specification
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50-: separate vertex formats from surface format descriptions
We've previously had identical naming between vertex and texture
formats, so it mostly made sense to define these together.
However, upcoming patches are going to transition the driver over to
using updated texture header definitions using NVIDIA's naming, and this
will no longer be the case.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nvc0: remove unnecessary includes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nvc0: switch nvc0_tex.c to updated g80_defs.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nvc0: switch nvc0_surface.c to updated g80_defs.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50: remove unnecessary include
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50: switch nv50_transfer.c to g80_defs.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50: switch nv50_tex.c to updated g80_defs.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50: switch nv50_surface.c to updated g80_defs.xml.h
Verified (binary diff) to produce identical code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Skeggs [Mon, 15 Feb 2016 05:37:29 +0000 (15:37 +1000)]
nv50: import updated g80_defs.xml.h from rnndb
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Nicolai Hähnle [Tue, 16 Feb 2016 03:00:04 +0000 (22:00 -0500)]
st/mesa: count shader images in MaxCombinedShaderOutputResources
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 9 Jan 2016 04:01:01 +0000 (23:01 -0500)]
st/mesa: enable GL image extensions when backend supports them
This enables ARB_shader_image_load_store and ARB_shader_image_size when
the backend claims support for these. It will also implicitly enable the
image component of ARB_shader_texture_image_samples.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Sat, 9 Jan 2016 03:47:26 +0000 (22:47 -0500)]
st/mesa: convert GLSL image intrinsics into TGSI
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Sat, 9 Jan 2016 06:04:34 +0000 (01:04 -0500)]
st/mesa: allow st_format.h to be included from C++ files
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Nicolai Hähnle [Wed, 10 Feb 2016 16:19:55 +0000 (11:19 -0500)]
st/mesa: set pipe_image_view layers correctly for 3D textures
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Nicolai Hähnle [Sun, 7 Feb 2016 23:21:35 +0000 (18:21 -0500)]
st/mesa: call st_finalize_texture from image atoms
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 9 Jan 2016 00:58:33 +0000 (19:58 -0500)]
st/mesa: add an image atom for shader images
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Sat, 9 Jan 2016 06:04:08 +0000 (01:04 -0500)]
tgsi: show textual format representation
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Sat, 9 Jan 2016 03:56:23 +0000 (22:56 -0500)]
gallium: add PIPE_SHADER_CAP_MAX_SHADER_IMAGES
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ilia Mirkin [Sat, 9 Jan 2016 00:06:33 +0000 (19:06 -0500)]
gallium: make image views non-persistent objects
Make them akin to shader buffers, with no refcounting/etc. Just used to
pass data about the bound image in ->set_shader_images.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Sat, 13 Feb 2016 23:37:33 +0000 (18:37 -0500)]
st/mesa: empty buffer binding if the buffer's not really there
This can happen with 0-sized buffers.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Rhys Kidd [Sat, 13 Feb 2016 21:03:02 +0000 (16:03 -0500)]
docs: Document VC4_DEBUG envvar
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Rhys Kidd [Fri, 12 Feb 2016 04:50:21 +0000 (23:50 -0500)]
vc4: Add missing braces in initializer
Silences the following GCC warning:
mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c: In function 'qir_schedule_instructions':
mesa/src/gallium/drivers/vc4/vc4_qir_schedule.c:578:16: warning: missing braces around initializer [-Wmissing-braces]
struct schedule_state state = { 0 };
^
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Rhys Kidd [Sat, 13 Feb 2016 18:21:15 +0000 (13:21 -0500)]
vc4: Correct typo setting 'handled_qinst_cond'
Variable was previously always set to true. Accordingly, the later
assert() served no active purpose.
Found with GCC warning and code inspection:
mesa/src/gallium/drivers/vc4/vc4_qpu_emit.c: In function'vc4_generate_code':
mesa/src/gallium/drivers/vc4/vc4_qpu_emit.c:315:22: warning: variable 'handled_qinst_cond' set but not used [-Wunused-but-set-variable]
bool handled_qinst_cond = true;
^
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Mon, 15 Feb 2016 22:43:38 +0000 (14:43 -0800)]
vc4: Don't treat conditional MOVs as raw MOV.
The two consumers want to know that the destination will be exactly the
source, which is not true if we might not set the destination.
Signed-off-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Mon, 15 Feb 2016 03:06:04 +0000 (14:06 +1100)]
glsl: warn in GL as well as ES when varying not written
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93339
Ilia Mirkin [Mon, 15 Feb 2016 22:42:57 +0000 (17:42 -0500)]
docs: update GLES 3.1 section for recent nvc0 additions
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Fri, 12 Feb 2016 17:17:18 +0000 (12:17 -0500)]
mesa: need to check resource and set length even if bufSize is 0
This fixes a number of dEQP tests, such as:
dEQP-GLES31.functional.program_interface_query.buffer_limited_query.resource_query
It was expecting the length to be set even in the bufSize == 0 case.
Also _mesa_get_program_resourceiv does some error checking on the
resource which should probably happen even in the bufSize == 0 case as
well although there's no dEQP test for that.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ben Widawsky [Sat, 13 Feb 2016 05:53:34 +0000 (21:53 -0800)]
i965/bxt: Production thread counts
v2: Forgot to squash in the comment removal
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Daniel Czarnowski [Thu, 11 Feb 2016 12:03:58 +0000 (14:03 +0200)]
egl_dri2: NULL check for xcb_dri2_get_buffers_reply()
Without the check, unsuccessful xcb_dri2_get_buffers_reply(...) causes
segmentation fault in dri2_get_buffers.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org
Edward O'Callaghan [Sun, 14 Feb 2016 21:54:30 +0000 (08:54 +1100)]
nv50,nvc0: Remove duplicate logic from nvc0_set_framebuffer_state()
We already have this logic in the gallium/util functions so
lets reduce some entropy while here.
V.2:
Apply change to nv50 also as suggested by Samuel Pitoiset.
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Sun, 14 Feb 2016 21:51:34 +0000 (22:51 +0100)]
nv50: add missing PIPE_SHADER_CAP_SUPPORTED_IRS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Kenneth Graunke [Sat, 13 Feb 2016 05:24:58 +0000 (21:24 -0800)]
i965: Fix gl_DrawID in the vec4 backend.
brw_draw_upload.c uploads VertexID/InstanceID first, then DrawID.
So we need to assign the attribute mapping in that order as well.
Fixes the following Pigit tests with the vec4 backend:
- arb_shader_draw_parameters-drawid vertexid
- arb_shader_draw_parameters-drawid-indirect basevertex
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Brian Paul [Sun, 14 Feb 2016 14:16:25 +0000 (07:16 -0700)]
mesa: move assertion in _mesa_cube_face_target()
Fixes piglit arb_texture_view-sampling-2d-array-as-2d-layer regression.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94134
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>