Alyssa Rosenzweig [Wed, 14 Dec 2022 23:37:27 +0000 (18:37 -0500)]
panfrost: Remove experimental v7-only indirect draw path
There are too many problems with indirect draws on v7 that we never got this
code path to the finish line, and none of us have a good plan (or reason) to fix
this. Proper indirect draws are only possible since v10 on Mali.
There was interest in using this path to implement indexed draws in PanVK, that
MR is stalled and it's not clear how much sense it makes to do Vulkan on
anything older than v9 or v10 at this point. This code isn't *gone*, it'll still
be in git history, but I don't see a lot of reason in keeping it in tree if it's
unused and complicating e.g. the sysval upload path of the driver.
Indirect dispatch remains supported on v7, as that path *is* working and flipped
on for end users. Indirect dispatch on v7 is considerably less complicated than
indirect draws.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20420>
Danylo Piliaiev [Tue, 20 Dec 2022 15:27:21 +0000 (16:27 +0100)]
ir3: Do 16b tex dst folding only for floats
Folding signed or unsigned i32 -> i16 conversion into sampling
instruction causes it to behave differently with out-of-bounds
values. The conversion expects higher bits being masked, however
folded variant does clamp the value.
A concrete example is that:
isaml.base0 (u16)(x)hr0.x
is not equal this:
isaml.base0 (u32)(x)r0.w
(sy)cov.u32u16 hr0.x, r0.w
Fixes misrendering in "Injustice 2".
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7869
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20396>
Danylo Piliaiev [Tue, 20 Dec 2022 15:23:15 +0000 (16:23 +0100)]
nir/fold_16bit_tex_image: Add type granularity for dst folding
Some HW may be able to fold only some of dst types, e.g.
for Adreno folding i32 -> i16 could cause a different result since
folded variant clamps the result instead of masking it.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20396>
Lucas Stach [Wed, 21 Dec 2022 13:39:27 +0000 (14:39 +0100)]
etnaviv: disable linear PE by default
Linear PE causes a lot of issues in the ZS stage. While some of those issues
can be worked around on newer GPU cores by doing all ZS operations in the
late stage, GC600 r4653 exhibits spurious Z fails when linear PE is active
even though this GPU does not even have a early Z stage.
Disable linear PE for now, until the issue can be analyzed further. Leave the
debug option in place to allow to enable linear PE for testing.
Fixes: 43eb5e777e4b ("etnaviv: add debug option to disable linear PE feature")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20405>
Väinö Mäkelä [Sun, 11 Dec 2022 10:20:13 +0000 (12:20 +0200)]
intel/blorp: Fix a hang caused by invalid dispatch enables on gfx7
Because commit
b9403b1c477 moved dispatch enable handling away from the
compiler, the drivers must ensure correct dispatch enable values. This
is handled by the intel_set_ps_dispatch_state function.
v2: Fix gfx6 build and use brw_fs_get_dispatch_enables for gfx6 in
crocus
v3: Rebase, use intel_set_ps_dispatch_state, drop gfx6 handling
Fixes: b9403b1c477 ("intel: factor out dispatch PS enabling logic")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20267>
Tapani Pälli [Thu, 22 Dec 2022 09:03:30 +0000 (11:03 +0200)]
intel/dev: setup 1024 GS urb entries for ADL-N
v2: apply only for devices with less than 32 EUs (Lionel)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7942
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20414>
Lionel Landwerlin [Thu, 22 Dec 2022 07:35:19 +0000 (09:35 +0200)]
intel/compiler: mark shader_record_ptr as uniform
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20413>
Lionel Landwerlin [Wed, 21 Dec 2022 23:32:44 +0000 (01:32 +0200)]
nir/divergence: handle shader_record_ptr intrinsic
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes
6b8fd65e84 ("spirv: Implement the new ray-tracing storage classes")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20413>
Lionel Landwerlin [Fri, 23 Dec 2022 09:00:13 +0000 (11:00 +0200)]
nouveau/ci: temporary disable gk20a-gles
Jobs are failing almost immediately with :
Cleaning up project directory and file based variables
ERROR: Failed to cleanup volumes
ERROR: Job failed: exit code 1
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20421>
Chia-I Wu [Thu, 22 Dec 2022 23:17:59 +0000 (15:17 -0800)]
freedreno: bump up FD6_MAX_BORDER_COLORS
Fixes
$ deqp-gles31 -n 'dEQP-GLES31.functional.texture.border_clamp.*'
on a618/a635.
Fixes: c0fc8d5046a ("freedreno/a6xx: Switch to global bcolor buffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20419>
Martin Roukala (né Peres) [Thu, 22 Dec 2022 12:34:50 +0000 (14:34 +0200)]
radv/ci: remove locally-deleted files from the job bucket
This makes the downloaded artifacts reflect the content of the folder
as generated by the job.
In this the case of vkcts, this removes from the downloaded artifacts
the log files that were deemed uninteresting by deqp-runner.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20415>
Martin Roukala (né Peres) [Thu, 22 Dec 2022 12:29:47 +0000 (14:29 +0200)]
radv/ci/vkcts: do not sync back the *.qpa
These files are relatively big (amounting to ~4.5GB for one run) but
are not really useful.
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20415>
David Heidelberg [Wed, 21 Dec 2022 00:57:31 +0000 (01:57 +0100)]
radeon: drmGetVersion can return NULL
Do not crash on scenarios where drmGetVersion returns NULL.
Make Radeon driver initialization more robust.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/476
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20402>
Lionel Landwerlin [Wed, 21 Dec 2022 20:39:29 +0000 (22:39 +0200)]
anv: handle null push descriptors in deferred optimization
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b49b18f0 ("anv: reduce BT emissions & surface state writes with push descriptors")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20410>
David Heidelberg [Wed, 21 Dec 2022 21:34:43 +0000 (22:34 +0100)]
ci: Windows runner is experiencing DNS issues; disable Microsoft farm
Multiple failures in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20097
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20411>
Timur Kristóf [Thu, 1 Dec 2022 12:24:43 +0000 (13:24 +0100)]
radv: Only apply taskmesh indirect 0 bug workaround when necessary.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20097>
Timur Kristóf [Thu, 1 Dec 2022 12:24:09 +0000 (13:24 +0100)]
ac: Add has_taskmesh_indirect0_bug field to ac_gpu_info struct.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20097>
Timur Kristóf [Thu, 1 Dec 2022 12:37:37 +0000 (13:37 +0100)]
radv: Include view index SET_SH_REG in ace_predication_size.
This fixes an issue when conditional rendering and multiple views
were used with a task+mesh draw call.
Fixes: 2479b6286974c1467bec5120df96650d297dcb7f
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20098>
Guilherme Gallo [Mon, 28 Nov 2022 03:35:04 +0000 (00:35 -0300)]
ci/lava: Show LAVA job info during fails
Currently, LAVA jobs only show metadata when successful, let's show this
info in all retries to make it easier to debug or report issues.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20051>
Guilherme Gallo [Mon, 28 Nov 2022 02:44:08 +0000 (23:44 -0300)]
ci/lava: Anticipate overlayfs download
To debug the LAVA jobs locally, we have an option in the
lava_job_submitter script to ignore the JWT token to make it possible to
retry jobs without the need to get an unexpired token.
But this trick needs to modify the overlayed directory so that we would
need to download and extract it earlier in the run.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20051>
Guilherme Gallo [Thu, 24 Nov 2022 06:06:58 +0000 (03:06 -0300)]
ci/lava: Fix Gitlab section rendering
LAVA splits the DUT log lines with `\r` in them. Unfortunately, it
breaks the Gitlab section line syntax when the HWCI script calls it
since it is a oneliner.
This commit changes the` fix_lava_gitlab_section_log` function to a
stateful generator that can merge lines that respects two consecutive
patterns.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7703
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20051>
Guilherme Gallo [Mon, 28 Nov 2022 02:38:33 +0000 (23:38 -0300)]
ci/lava: Feed yaml.load with raw bytes data
LAVA uses XMLRPC to send jobs information and control, more specifically
it sends device logs via YAML dumps encoded in UTF-8 bytes.
In Python, we have xmlrpc.client.Binary class as the serializer
protocol, we get the logs wrapped by this class, which encodes the data
as UTF-8 bytes data.
We were converting the encoded data to a string via the `str` function,
but this led the loaded YAML data to use single quotes instead of double
quotes for string values that made special characters, such as `\x1b` to
be escaped as `\\x1b`.
With this fix, we can now drop one of the hacks that fixed the bash
colors.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20051>
Erico Nunes [Tue, 20 Dec 2022 09:19:01 +0000 (10:19 +0100)]
Revert "ci: Lima farm maintenance"
This reverts commit
e66df0d36209a708477112d5df4ad2760c666542.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20390>
Timur Kristóf [Tue, 20 Dec 2022 23:07:34 +0000 (00:07 +0100)]
radv: Don't assume there is always at least 1 preamble.
This fixes a mistake which assumes there is always at least 1 preamble.
This assumption is currently incorrect on transfer queues.
Fixes: e10b2f273e8a48a2db977469d30f6ed1014484c4
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20401>
Yiwei Zhang [Sun, 18 Dec 2022 22:02:24 +0000 (14:02 -0800)]
venus: fallback to passthrough pci bus info when not natively supported
This avoids an assert with VN_DEBUG=all on virtgpu backend.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20383>
Gert Wollny [Tue, 20 Dec 2022 16:30:21 +0000 (17:30 +0100)]
r600/sfn: Fix possible dest channels for variable size dot
Fixes: 357e5fac9953b26eedc8819ab528b981be6e1b69
r600/sfn: Use variable length DOT on Evergreen and Cayman
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20398>
Marcell Kiss [Fri, 16 Dec 2022 10:46:21 +0000 (10:46 +0000)]
radv: Fix uninitalized struct for trap handler
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20354>
Gert Wollny [Tue, 20 Dec 2022 14:22:40 +0000 (15:22 +0100)]
r600/sfn: Don't try to re-use the iterator when uses is updated
It seems on libc++ the iterator is invalidated when an element is removed
from the set, so make sure that we don't implicitely use the old,
invalidated iterator in the range based - open code the loop using while
instead.
Fixes: f3415c (r600/sfn: copy propagate register load chains)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7931
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20394>
Timur Kristóf [Wed, 21 Sep 2022 17:51:16 +0000 (10:51 -0700)]
radv: Enable EXT_mesh_shader by default on GFX10.3.
Only enable mesh+task shaders when IBs and gang submit are enabled.
We won't support gang submit with noibs.
Also remove the RADV_PERFTEST=ext_ms option.
Side note, GFX11 task/mesh support is still a TODO.
Don't skip the CTS tests which require GFX->ACE synchronization.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Sat, 17 Dec 2022 15:22:20 +0000 (16:22 +0100)]
radv/amdgpu: Remove cs_add_buffers because it's no longer necessary.
This function was added because previously ACE and GFX work was
submitted separately and we needed to make sure they both use the
same BOs. Now they are part of the same submission so this
function is not necessary anymore.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Thu, 22 Sep 2022 19:38:12 +0000 (12:38 -0700)]
radv/amdgpu: Remove command submission with scheduled dependencies.
These are no longer used by any part of RADV, so we
can just safely delete it.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Thu, 15 Dec 2022 15:05:12 +0000 (16:05 +0100)]
radv: Add gang wait preambles and postambles to ensure correct behaviour.
Add new preambles and postambles for synchronizing gang members in a
gang submission using semaphores.
These semaphores are both located in a small BO.
Gang wait preambles:
- gang leader writes 1 to a semaphore
- gang member waits for it to be written
When task shaders are used, make sure ACE waits until GFX starts to execute.
Userspace is required to emit this wait to make sure it behaves correctly
in a multi-process environment, because task shader dispatches are not
meant to be executed on multiple compute engines at the same time.
Gang wait postambles:
- gang member writes 1 to a semaphore
- gang leader waits for it to be written
This ensures that the gang leader waits for the whole gang,
which is necessary because the kernel signals the userspace fence
as soon as the gang leader is done, which may lead to bugs because the
same command buffers could be submitted again while still being executed.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Thu, 15 Dec 2022 15:12:45 +0000 (16:12 +0100)]
radv: Remove ACE->GFX wait at the end of each command buffer.
This is now handled in the queue submission code so is not necessary.
However, keep the semaphore for future use.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Thu, 15 Dec 2022 14:34:49 +0000 (15:34 +0100)]
radv: Rename radv_update_ace_preambles to radv_update_gang_preambles.
The new name reflects more accurately what this is.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Fri, 25 Nov 2022 11:51:18 +0000 (12:51 +0100)]
radv: Implement gang submit in radv_queue_submit_normal.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Fri, 25 Nov 2022 11:59:00 +0000 (12:59 +0100)]
radv: Update ACE preambles in radv_queue_submit_normal.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Fri, 25 Nov 2022 11:09:27 +0000 (12:09 +0100)]
radv: Refactor command buffer handling in radv_queue_submit_normal.
Move processing of the command buffer array inside the loop that
splits a submission.
We now also add the perf counter lock/unlock to each submission
instead of just the first and last.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Fri, 25 Nov 2022 10:45:44 +0000 (11:45 +0100)]
radv: Remove radv_queue_submit_with_ace and disable task/mesh shaders.
It would be too difficult to keep the radv_queue_submit_with_ace
function while also refactoring the radv_queue_submit_with_ace function,
so let's delete it first.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Wed, 9 Nov 2022 12:49:07 +0000 (13:49 +0100)]
radv: Enable gang submit on the null winsys.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Wed, 20 Jul 2022 12:36:10 +0000 (14:36 +0200)]
ac: Add has_gang_submit field to ac_gpu_info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Wed, 20 Jul 2022 12:04:45 +0000 (14:04 +0200)]
radv/amdgpu: Allow using more than 1 preamble with cs_submit.
Add the ability to have multiple preambles,
except for the sysmem (NOIBS/GFX6) code path which still only allows 1.
This is necessary because with gang submit we will need a way to submit
a preamble to different queues at the same time.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Thu, 14 Jul 2022 13:09:21 +0000 (15:09 +0200)]
radv/amdgpu: Add IP type to IB info and use it when submitting.
This is necessary for supporting gang submit.
With gang submit, the kernel now allows us to submit multiple IBs
with different IP types. Therefore, RADV will also need to group
various CSs with different IP types together and remember the IP
type of each CS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Thu, 14 Jul 2022 11:54:31 +0000 (13:54 +0200)]
radv/amdgpu: Introduce a custom struct for submitted BO info.
We are going to need additional data which is not present in
the currently used struct.
This commit just adds the new struct but does not yet add
new fields to it.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Thu, 21 Jul 2022 09:58:22 +0000 (11:58 +0200)]
radv/amdgpu: Set fallback submit request ip_type from the last CS.
When using gang submit, the last IB is considered the "gang leader"
and its IP type will determine which fence to signal when the
submission is done. Therefore, use the last CS to set the IP type.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Wed, 20 Jul 2022 07:06:23 +0000 (09:06 +0200)]
radv/amdgpu: Change extra_cs to array in get_bo_list.
This is necessary because we are going to want to allow using
more than just 1 preamble.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Fri, 25 Nov 2022 10:59:29 +0000 (11:59 +0100)]
radv: Return correct error code when failed to allocate CS array.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Fri, 25 Nov 2022 10:56:23 +0000 (11:56 +0100)]
radv: Determine use_ace in radv_update_preambles.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Fri, 25 Nov 2022 10:54:38 +0000 (11:54 +0100)]
radv: Rename uses_perf_counters to use_perf_counters.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Fri, 25 Nov 2022 10:52:43 +0000 (11:52 +0100)]
radv: Stylistic changes in radv_queue_submit_normal.
Move some variables, add const, and fix a comment.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Sun, 18 Dec 2022 00:15:21 +0000 (01:15 +0100)]
radv: Destroy mesh shader scratch ring in radv_queue_state_finish.
Fixes: 0280b526d58e85d65b53d3f9c8b0f7364d853751
Signed-off--by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Timur Kristóf [Thu, 15 Dec 2022 14:04:00 +0000 (15:04 +0100)]
radv: Remove trailing whitespace again.
Also ran clang-format on the affected line.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>
Danylo Piliaiev [Tue, 29 Nov 2022 11:52:43 +0000 (12:52 +0100)]
lvp: fix load_helper_invocation not being lowered
nir_lower_is_helper_invocation should be after nir_lower_system_values
to handle possible nir_intrinsic_is_helper_invocation which may be
produced by nir_lower_system_values.
Happens with SPIR-V 1.6 for which gl_HelperInvocation is translated into
"BuiltIn HelperInvocation" + "Volatile", which nir_lower_system_values
translates into is_helper_invocation.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19677>
Danylo Piliaiev [Tue, 29 Nov 2022 11:49:24 +0000 (12:49 +0100)]
tu: fix load_helper_invocation not being lowered
nir_lower_is_helper_invocation should be after nir_lower_system_values
to handle possible nir_intrinsic_is_helper_invocation which may be
produced by nir_lower_system_values.
Happens with SPIR-V 1.6 for which gl_HelperInvocation is translated into
"BuiltIn HelperInvocation" + "Volatile", which nir_lower_system_values
translates into is_helper_invocation.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19677>
Danylo Piliaiev [Tue, 29 Nov 2022 11:41:08 +0000 (12:41 +0100)]
nir/nir_lower_is_helper_invocation: Lower helper invocation if required
nir_lower_is_helper_invocation lowers intrinsic_is_helper_invocation
and uses load_helper_invocation (which is lowered by nir_lower_system_values).
While nir_lower_system_values may lower SYSTEM_VALUE_HELPER_INVOCATION
into intrinsic_is_helper_invocation.
So they depend on each other. Break the dependency by making
nir_lower_is_helper_invocation aware of lower_helper_invocation option
and emitting lowered load_helper_invocation when required.
Happens with SPIR-V 1.6 for which gl_HelperInvocation is translated into
"BuiltIn HelperInvocation" + "Volatile", which nir_lower_system_values
translates into is_helper_invocation.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19677>
Rohan Garg [Fri, 1 Apr 2022 12:47:04 +0000 (14:47 +0200)]
anv: Ensure we clear ANV_PIPE_PSS_STALL_SYNC_BIT on flush
Add the PSS stall bit to ANV_PIPE_STALL_BITS so that it get's cleared on
flush.
Fixes: f3c62973 ("anv,iris: PSS Stall Sync around color fast clears")
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20317>
Yonggang Luo [Mon, 19 Dec 2022 16:29:10 +0000 (00:29 +0800)]
util: Fixes os_get_option_cached with bool options_tbl_exited
Fixes: cdad035cfd9 ("util: Add function debug_get_option_cached os_get_option_cached")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7922
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20386>
Giancarlo Devich [Mon, 19 Dec 2022 20:12:50 +0000 (12:12 -0800)]
d3d12: Don't flush indiscriminately for query result accumulation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20217>
Giancarlo Devich [Fri, 16 Dec 2022 21:55:37 +0000 (13:55 -0800)]
d3d12: Fix race condition when getting query results
Before, when an application called into d3d12_query_result, and
the results were not ready to be read, a flush-and-wait would
be attempted via synchronized mapping of the query result resource.
This can end up calling close/execute on the command list while it is
already being executed by the driver thread.
With the current fence value attached to the query, we now wait
for completion if necessary and then map the resource unsynchronized, or
return false if the result is not ready and wait == false.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20217>
Giancarlo Devich [Fri, 16 Dec 2022 21:50:19 +0000 (13:50 -0800)]
d3d12: Move query structs to header
Also adds `fence_value` to `d3d12_query` to track which batch of work
this query exists in and must be waited on.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20217>
Dave Airlie [Mon, 19 Dec 2022 18:02:15 +0000 (04:02 +1000)]
vulkan: update headers/registry to 1.3.238 for video decode
This moves the video decoding to KHR and out of beta.
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20384>
Dave Airlie [Mon, 19 Dec 2022 20:09:24 +0000 (06:09 +1000)]
vulkan/util: handle LUNARG in the list of special prefixes
The latest headers update has a lunarg extension that needs this.
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20384>
Dave Airlie [Mon, 19 Dec 2022 20:00:56 +0000 (06:00 +1000)]
vulkan/cmd_queue: update generator to handle guarded types.
The latest includes/registry have some pNext structs that need
guarding spearately to their initial structs, so we have to track
the define guards better and use them in the generated code
For example:
VkVideoEncodeRateControlInfoKHR extends VkVideoCodingControlInfoKHR
However the first struct is protected by BETA, but the second isn't
the generator was always generating unguarded code for all structs
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20384>
Emma Anholt [Wed, 30 Nov 2022 19:31:22 +0000 (11:31 -0800)]
turnip: Lazily call tu6_emit_descriptor_sets() at draw time.
This lets us batch up the state changes from multiple
vkCmdBindDescriptorSets, which ANGLE and zink will both do in a single
draw.
Improves ANGLE (sysmem) driver_overhead perf by 5.18806% +/- 1.03444% (n=5).
Improves ANGLE aztec_ruins_high perf by ~.3%. (clear result in the graph,
but the screen went to sleep mid way through and so it was high variance)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20084>
Georg Lehmann [Fri, 16 Dec 2022 10:38:55 +0000 (11:38 +0100)]
lavapipe: Enable VK_KHR_shader_non_semantic_info.
Already implemented in common code.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7907
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20353>
David Heidelberg [Sat, 17 Dec 2022 16:34:36 +0000 (17:34 +0100)]
ci: move the CI handling scripts into bin/ci
Any change in .gitlab-ci/ directory triggers an entire CI run,
which is unnecessary for just changing the developers' scripts.
Added symlink to `.gitlab-ci/bin` to keep original invocation compatibility.
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20371>
David Heidelberg [Sat, 17 Dec 2022 16:29:06 +0000 (17:29 +0100)]
ci: ci_run_n_monitor.py: fix args.rev leftover
Fixes: a8b6b2367efc ("ci: allow omitting of --rev for ci_run_n_monitor.py")
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20371>
José Roberto de Souza [Thu, 17 Nov 2022 20:27:08 +0000 (12:27 -0800)]
iris: Add BO_ALLOC_PLAIN flag
We had iris_bo_alloc() call with the wrong flags value, it was
mistaken by aligment, see commit
68652dca0c28.
To avoid such mistakes in future here adding BO_ALLOC_PLAIN so
iris_bo_alloc() calls have a more descriptive flag parameter when
there is no special allocation request.
While at it, also standardizing unsigned as the type for this flag.
No behavior changes here.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19857>
Konstantin Seurer [Wed, 14 Dec 2022 21:03:02 +0000 (22:03 +0100)]
radv/bvh: Handle inactive triangles and AABBs
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20325>
Konstantin Seurer [Mon, 19 Dec 2022 08:35:39 +0000 (17:35 +0900)]
radv/bvh: Move leaf node initialization into separate functions
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20325>
Qiang Yu [Fri, 16 Sep 2022 09:01:11 +0000 (17:01 +0800)]
ac/llvm: remove deref image/texture code
They have been lowered to bindless ones in nir.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Fri, 16 Sep 2022 08:39:41 +0000 (16:39 +0800)]
ac,radv,radeonsi: remove unused param of load_sampler_desc abi
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Fri, 16 Sep 2022 07:58:23 +0000 (15:58 +0800)]
ac/llvm: remove samples_identical nir to llvm code
It has been lowered in nir.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Fri, 16 Sep 2022 06:57:01 +0000 (14:57 +0800)]
ac/llvm: remove implicite ms texture fmask handling
It has been lowered to fragment_mask_load_amd in nir.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Fri, 16 Sep 2022 06:50:34 +0000 (14:50 +0800)]
ac/llvm: remove image/texture descriptor_amd nir to llvm code
They have been lowered in nir.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Thu, 8 Sep 2022 10:06:56 +0000 (18:06 +0800)]
radeonsi: replace llvm resource code with nir lower
Port from ac_nir_to_llvm.c and si_shader_llvm_resource.c.
Due to need waterfall of llvm backend, we can't get bind-texture
descriptor directly in nir. So we keep load_sampler_desc abi only
for bind-texture index to desc.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Mon, 19 Sep 2022 07:33:10 +0000 (15:33 +0800)]
nir/divergence_analysis: add missing intrinsics
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Singed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Fri, 16 Sep 2022 11:41:02 +0000 (19:41 +0800)]
ac/llvm: add disable_aniso_single_level abi
RADV use dri option to enabled this for some apps, but it's
done in nir lower currently. I'm afraid it still needs this
option to handle the non-uniform case as desc is loaded in
llvm.
radeonsi always enable this for bind-textures.
radeonsi will lower all bind-textures to bindless-textures,
and only bind-textures use desc index, so add this abi for
bindless desc index path.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Thu, 8 Sep 2022 06:43:39 +0000 (14:43 +0800)]
nir: lower image add lower_to_fragment_mask_load_amd option
Like lower_to_fragment_fetch_amd option in lower tex,
this is for radeonsi to lower MS image ops.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Wed, 7 Sep 2022 09:53:33 +0000 (17:53 +0800)]
nir: add image fragment mask load intrinsic
Like nir_texop_fragment_mask_fetch_amd, this is used to load multi
sample image fmask data for AMD GPU.
We will lower multi sample image load and samples_identical intrinsics
to use it latter for radeonsi. RADV does not need this because it
always expand fmask images before dispatch compute shader.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Wed, 17 Aug 2022 09:40:59 +0000 (17:40 +0800)]
radeonsi: replace llvm load_ssbo abi with nir lower
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Tue, 16 Aug 2022 10:47:03 +0000 (18:47 +0800)]
ac/llvm: check load_ssbo present before call it
radeonsi will remove it later.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Qiang Yu [Tue, 16 Aug 2022 10:29:03 +0000 (18:29 +0800)]
radeonsi: add si_nir_lower_resource pass
Replace the load_ubo abi.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>
Friedrich Vock [Sun, 18 Dec 2022 19:37:33 +0000 (20:37 +0100)]
radv/rt: Refactor exiting PLOC
The previous approach was susceptible to sync hazards, causing hangs in Doom Eternal.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7897
Fixes: 271865373 ("radv: Add PLOC shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20377>
Friedrich Vock [Sun, 18 Dec 2022 19:34:09 +0000 (20:34 +0100)]
radv/rt: Execute memory barrier before updating the phase end count
We want to be sure that the values were updated before letting other invocations continue.
Fixes: 271865373 ("radv: Add PLOC shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20377>
Friedrich Vock [Thu, 15 Dec 2022 20:04:38 +0000 (21:04 +0100)]
radv/rt: PLOC fixes for active_leaf_count
Fixes: 271865373 ("radv: Add PLOC shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20377>
Marek Olšák [Mon, 12 Dec 2022 20:34:08 +0000 (15:34 -0500)]
util/tools: add the tool that generates perfect hash functions for GLenums
The big comment explains it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Marek Olšák [Mon, 12 Dec 2022 04:47:29 +0000 (23:47 -0500)]
mesa: optimize _mesa_bytes_per_vertex_attrib using a hash-based translation
This reduces time spent in gl*Pointer for viewperf.
Generated by find_hash_func.c.
Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Marek Olšák [Mon, 12 Dec 2022 05:45:11 +0000 (00:45 -0500)]
mesa: compute _PipeFormat and _ElementSize after checking if the format changed
Split _mesa_set_vertex_format into 2 functions and set the derived fields
after we know that the format is different.
This skips _PipeFormat and _ElementSize recomputation every time we get
gl*Pointer with the same format.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Marek Olšák [Mon, 12 Dec 2022 05:35:31 +0000 (00:35 -0500)]
mesa: move user-specified vertex format fields into gl_vertex_format_user
to be used in the next commit
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Marek Olšák [Mon, 12 Dec 2022 05:28:16 +0000 (00:28 -0500)]
mesa: change gl_vertex_format::Format to bool Bgra to free bits
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Marek Olšák [Sun, 11 Dec 2022 23:51:11 +0000 (18:51 -0500)]
st/mesa: simplify prepare_indexed_draw
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Marek Olšák [Sun, 11 Dec 2022 23:08:45 +0000 (18:08 -0500)]
st/mesa: optimize index buffer reference counting in st_indirect_draw_vbo
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Marek Olšák [Sun, 11 Dec 2022 22:53:59 +0000 (17:53 -0500)]
mesa: set pipe_draw_info::index::resource directly and remove gl_bo
The motivation is to remove branching from prepare_indexed_draw
and remove the unsafe hack in vbo_save_playback_vertex_list.
There is some duplication that is not identical in all 3 cases.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Marek Olšák [Sun, 11 Dec 2022 22:16:39 +0000 (17:16 -0500)]
st/mesa: fold GLThread.enabled into pin_thread_counter to skip that checking
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Marek Olšák [Sun, 11 Dec 2022 22:00:28 +0000 (17:00 -0500)]
st/mesa: use u_bit_scan64 only for 64-bit CPUs in st_validate_state
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>
Yiwei Zhang [Fri, 16 Dec 2022 19:51:01 +0000 (11:51 -0800)]
docs: update to latest venus driver support
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20310>
Yiwei Zhang [Tue, 13 Dec 2022 22:24:25 +0000 (14:24 -0800)]
venus: fix VK_EXT_pci_bus_info support
Natively support it for virtgpu while passthrough renderer support for
vtest. This is a must support to avoid prime blit in common wsi.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20310>
Yiwei Zhang [Fri, 16 Dec 2022 08:21:47 +0000 (00:21 -0800)]
venus: sync protocol fixes and support for VK_EXT_pci_bus_info
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20310>
Marek Vasut [Sat, 17 Dec 2022 21:10:22 +0000 (22:10 +0100)]
etnaviv: Do expose 2D texture support on pre-halti GPUs
Commit
d08bd9a8d8b ("etnaviv: don't expose array and 3D texture support on pre-halti GPUs")
started returning 0 from PIPE_CAP_MAX_TEXTURE_2D_SIZE as well due to switch
case fallthrough. Reinstate the behavior of PIPE_CAP_MAX_TEXTURE_2D_SIZE,
while at the same time, retain the new behavior introduced by commit
d08bd9a8d8b , Otherwise not even kmscube displays the spinning cube,
weston does not display desktop and so on.
Triggered on "Vivante GC600 rev 4653" , i.MX8M Mini .
Fixes: d08bd9a8d8b ("etnaviv: don't expose array and 3D texture support on pre-halti GPUs")
Closes: #7898
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20373>
Alyssa Rosenzweig [Wed, 14 Dec 2022 21:22:41 +0000 (21:22 +0000)]
panfrost: Add architecture description XML for v10
Add the GenXML hardware description for Mali architecture v10, as implemented in
Mali-G610. This is not 100% complete but it should be good enough for parity
with v9.
The XML itself is forked off of v9, with all Job Managerisms replaced with
CSFisms. This notably includes a large number of new structures defining the
instructions that run on the Command Execution Unit (CEU).
This is the first step towards supporting Mali-G610 (i.e. RK3588) upstream. Next
up will be pandecode support.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20360>