Vitaly Buka [Fri, 6 Apr 2018 21:41:17 +0000 (21:41 +0000)]
Fix warning by cl::opt<int> -> cl::opt<unsigned>
llvm-svn: 329461
Eric Fiselier [Fri, 6 Apr 2018 21:37:23 +0000 (21:37 +0000)]
Implement P0768r1: Library support for the Spaceship Operator.
this patch adds the <compare> header and implements all of it
except for [comp.alg].
As I understand it, the header is needed by the compiler in
when implementing the semantics of operator<=>. For that reason
I feel it's important to land this header early, despite
all compilers lacking support.
llvm-svn: 329460
Vitaly Buka [Fri, 6 Apr 2018 21:32:36 +0000 (21:32 +0000)]
Runtime flag to control branch funnel threshold
Reviewers: pcc
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D45193
llvm-svn: 329459
Peter Collingbourne [Fri, 6 Apr 2018 21:14:33 +0000 (21:14 +0000)]
Revert r324557, "gold-plugin: Do not set codegen opt level based on LTO opt level."
It was reported that this change measurably regressed -plugin-opt=O3
performance.
There is an ongoing discussion on llvm-dev about the correct way to
set the CG opt level, see thread "[llvm-dev] [RFC] Adding function
attributes to represent codegen optimization level".
llvm-svn: 329458
Manoj Gupta [Fri, 6 Apr 2018 21:11:09 +0000 (21:11 +0000)]
[Release Notes] Add release note for "-fmerge-all-constants"
Summary:
Add note that "-fmerge-all-constants" is not applied as default
anymore.
Reviewers: rjmccall, rsmith, chandlerc
Subscribers: llvm-commits, thakis
Differential Revision: https://reviews.llvm.org/D45388
llvm-svn: 329457
Artem Belevich [Fri, 6 Apr 2018 21:10:24 +0000 (21:10 +0000)]
[NVPTX] Fixed vectorized LDG for f16.
v2f16 is a special case in NVPTX. v4f16 may be loaded as a pair of v2f16
and that was not previously handled correctly by tryLDGLDU()
Differential Revision: https://reviews.llvm.org/D45339
llvm-svn: 329456
Sameer AbuAsal [Fri, 6 Apr 2018 21:07:05 +0000 (21:07 +0000)]
[RISCV] Tablegen-driven Instruction Compression.
Summary:
This patch implements a tablegen-driven Instruction Compression
mechanism for generating RISCV compressed instructions
(C Extension) from the expanded instruction form.
This tablegen backend processes CompressPat declarations in a
td file and generates all the compile-time and runtime checks
required to validate the declarations, validate the input
operands and generate correct instructions.
The checks include validating register operands, immediate
operands, fixed register operands and fixed immediate operands.
Example:
class CompressPat<dag input, dag output> {
dag Input = input;
dag Output = output;
list<Predicate> Predicates = [];
}
let Predicates = [HasStdExtC] in {
def : CompressPat<(ADD GPRNoX0:$rs1, GPRNoX0:$rs1, GPRNoX0:$rs2),
(C_ADD GPRNoX0:$rs1, GPRNoX0:$rs2)>;
}
The result is an auto-generated header file
'RISCVGenCompressEmitter.inc' which exports two functions for
compressing/uncompressing MCInst instructions, plus
some helper functions:
bool compressInst(MCInst& OutInst, const MCInst &MI,
const MCSubtargetInfo &STI,
MCContext &Context);
bool uncompressInst(MCInst& OutInst, const MCInst &MI,
const MCRegisterInfo &MRI,
const MCSubtargetInfo &STI);
The clients that include this auto-generated header file and
invoke these functions can compress an instruction before emitting
it, in the target-specific ASM or ELF streamer, or can uncompress
an instruction before printing it, when the expanded instruction
format aliases is favored.
The following clients were added to implement compression\uncompression
for RISCV:
1) RISCVAsmParser::MatchAndEmitInstruction:
Inserted a call to compressInst() to compresses instructions
parsed by llvm-mc coming from an ASM input.
2) RISCVAsmPrinter::EmitInstruction:
Inserted a call to compressInst() to compress instructions that
were lowered from Machine Instructions (MachineInstr).
3) RVInstPrinter::printInst:
Inserted a call to uncompressInst() to print the expanded
version of the instruction instead of the compressed one (e.g,
add s0, s0, a5 instead of c.add s0, a5) when -riscv-no-aliases
is not passed.
This patch squashes D45119, D42780 and D41932. It was reviewed in smaller patches by
asb, efriedma, apazos and mgrang.
Reviewers: asb, efriedma, apazos, llvm-commits, sabuasal
Reviewed By: sabuasal
Subscribers: mgorny, eraman, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, niosHD, kito-cheng, shiva0217, zzheng
Differential Revision: https://reviews.llvm.org/D45385
llvm-svn: 329455
Zinovy Nis [Fri, 6 Apr 2018 21:00:18 +0000 (21:00 +0000)]
[clang-tidy] One more fix compilation for ParentVirtualCallCheck.cpp: find_if predicate
llvm-svn: 329454
Rafael Espindola [Fri, 6 Apr 2018 20:53:06 +0000 (20:53 +0000)]
Avoid some temporary allocations.
Some system libraries have a lot of versioned symbols. When linking
scylla this brings the number of malloc calls from 49154 to 37944.
llvm-svn: 329453
Zinovy Nis [Fri, 6 Apr 2018 20:39:23 +0000 (20:39 +0000)]
[clang-tidy] Fix compilation for ParentVirtualCallCheck.cpp
llvm-svn: 329452
Mandeep Singh Grang [Fri, 6 Apr 2018 20:18:05 +0000 (20:18 +0000)]
[TableGen] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.
To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.
Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.
Reviewers: stoklund, kparzysz, dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45144
llvm-svn: 329451
Matt Davis [Fri, 6 Apr 2018 20:14:13 +0000 (20:14 +0000)]
[StackProtector] Ignore certain intrinsics when calculating sspstrong heuristic.
Summary:
The 'strong' StackProtector heuristic takes into consideration call instructions.
Certain intrinsics, such as lifetime.start, can cause the
StackProtector to protect functions that do not need to be protected.
Specifically, a volatile variable, (not optimized away), but belonging to a stack
allocation will encourage a llvm.lifetime.start to be inserted during
compilation. Because that intrinsic is a 'call' the strong StackProtector
will see that the alloca'd variable is being passed to a call instruction, and
insert a stack protector. In this case the intrinsic isn't really lowered to a
call. This can cause unnecessary stack checking, at the cost of additional
(wasted) CPU cycles.
In the future we should rely on TargetTransformInfo::isLoweredToCall, but as of
now that routine considers all intrinsics as not being lowerable. That needs
to be corrected, and such a change is on my list of things to get moving on.
As a side note, the updated stack-protector-dbginfo.ll test always seems to
pass. I never see the dbg.declare/dbg.value reaching the
StackProtector::HasAddressTaken, but I don't see any code excluding dbg
intrinsic calls either, so I think it's the safest thing to do.
Reviewers: void, timshen
Reviewed By: timshen
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45331
llvm-svn: 329450
Richard Smith [Fri, 6 Apr 2018 20:06:02 +0000 (20:06 +0000)]
Don't assume constructors return void.
Should fix ARM buildbot.
llvm-svn: 329449
Zinovy Nis [Fri, 6 Apr 2018 20:02:50 +0000 (20:02 +0000)]
[clang-tidy] Check if grand-..parent's virtual method was called instead of overridden parent's.
class A {...int virtual foo() {...}...};
class B: public A {...int foo() override {...}...};
class C: public B {...int foo() override {... A::foo()...}};
^^^^^^^^ warning: qualified name A::foo refers to a member overridden in subclass; did you mean 'B'? [bugprone-parent-virtual-call]
Differential Revision: https://reviews.llvm.org/D44295
llvm-svn: 329448
Alex Lorenz [Fri, 6 Apr 2018 19:45:29 +0000 (19:45 +0000)]
Revert r329442 "Generate Libclang invocation reproducers using a new
-cc1gen-reproducer driver option"
The tests are failing on some bots
llvm-svn: 329447
Michael Kruse [Fri, 6 Apr 2018 19:24:18 +0000 (19:24 +0000)]
[doc] Overhaul doc on preparing IR for processing by Polly.
The previously documented method did not work (anymore).
Suggested-by: Philip Pfaffe <philip.pfaffe@gmail.com>
llvm-svn: 329446
George Karpenkov [Fri, 6 Apr 2018 19:14:05 +0000 (19:14 +0000)]
Revert "[analyzer] Remove an unused variable"
This reverts commit
2fa3e3edc4ed6547cc4ce46a8c79d1891a5b3b36.
Removed the wrong variable.
llvm-svn: 329445
George Karpenkov [Fri, 6 Apr 2018 19:03:43 +0000 (19:03 +0000)]
[analyzer] Remove an unused variable
llvm-svn: 329444
Geoff Berry [Fri, 6 Apr 2018 18:47:33 +0000 (18:47 +0000)]
[EarlyCSE] Add debug counter for debugging mis-optimizations. NFC.
Reviewers: reames, spatel, davide, dberlin
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D45162
llvm-svn: 329443
Alex Lorenz [Fri, 6 Apr 2018 18:30:14 +0000 (18:30 +0000)]
Generate Libclang invocation reproducers using a new -cc1gen-reproducer
driver option
This commit is a follow up to the previous work that recorded Libclang invocations
into temporary files: r319702.
It adds a new -cc1 mode to clang: -cc1gen-reproducer. The goal of this mode is to generate
Clang reproducer files for Libclang tool invocation. The JSON format in the invocation
files is not really intended to be stable, so Libclang and Clang should be of the same version
when generating reproducers.
The new mode emits the information about the temporary files and Libclang-specific information
to stdout using JSON.
rdar://
35322614
Differential Revision: https://reviews.llvm.org/D40983
llvm-svn: 329442
Sameer AbuAsal [Fri, 6 Apr 2018 18:27:45 +0000 (18:27 +0000)]
[RISCV] Update MC compression tests
Summary:
This patch updates MC tests related to compression in RISCV to
insure they work correctly with automatic compression and relaxation
enabled. This is the first part of a series of patches to implement
automatic compression for RISCV.
Reviewers: asb, apazos
Reviewed By: asb
Subscribers: shiva0217, efriedma, llvm-commits, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, niosHD, kito-cheng
Differential Revision: https://reviews.llvm.org/D43328
llvm-svn: 329441
Dmitry Preobrazhensky [Fri, 6 Apr 2018 18:24:49 +0000 (18:24 +0000)]
[AMDGPU][MC][GFX9] Added s_call_b64
See bug 36843: https://bugs.llvm.org/show_bug.cgi?id=36843
Differential Revision: https://reviews.llvm.org/D45268
Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 329440
Krzysztof Parzyszek [Fri, 6 Apr 2018 18:19:22 +0000 (18:19 +0000)]
[Hexagon] Fix assert with packetizing IMPLICIT_DEF instructions
The compiler is generating packet with the following instructions,
which causes an undefined register assert in the verifier.
$r0 = IMPLICIT_DEF
$r1 = IMPLICIT_DEF
S2_storerd_io killed $r29, 0, killed %d0
The problem is that the packetizer is not saving the IMPLICIT_DEF
instructions, which are needed when checking if it is legal to
add the store instruction. The fix is to add the IMPLICIT_DEF
instructions to the CurrentPacketMIs structure.
Patch by Brendon Cahoon.
llvm-svn: 329439
Matt Morehouse [Fri, 6 Apr 2018 18:15:24 +0000 (18:15 +0000)]
[libFuzzer] Print a correct error message when a directory can't be
opened.
Summary:
Currently if the directory cannot be opened for a reason other than
non-existence (e.g. too many open file descriptors) the error message
printed is incredibly confusing.
Patch By: Alex Gaynor
Reviewers: kcc, morehouse
Reviewed By: morehouse
Subscribers: delcypher, llvm-commits, Sanitizers
Differential Revision: https://reviews.llvm.org/D45322
llvm-svn: 329438
Krzysztof Parzyszek [Fri, 6 Apr 2018 18:13:11 +0000 (18:13 +0000)]
[Hexagon] Prevent a stall across zero-latency instructions in a packet
Packetizer keeps two zero-latency bound instrctions in the same packet ignoring
the stalls on the later instruction. This should not be the case if there is no
data dependence.
Patch by Sumanth Gundapaneni.
llvm-svn: 329437
Krzysztof Parzyszek [Fri, 6 Apr 2018 18:10:13 +0000 (18:10 +0000)]
[Hexagon] Remove duplicated code, NFC
llvm-svn: 329436
Mandeep Singh Grang [Fri, 6 Apr 2018 18:08:42 +0000 (18:08 +0000)]
[CodeGen] Change std::sort to llvm::sort in response to r327219
Summary:
r327219 added wrappers to std::sort which randomly shuffle the container before sorting.
This will help in uncovering non-determinism caused due to undefined sorting
order of objects having the same key.
To make use of that infrastructure we need to invoke llvm::sort instead of std::sort.
Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort.
Refer the comments section in D44363 for a list of all the required patches.
Reviewers: bogner, rnk, MatzeB, RKSimon
Reviewed By: rnk
Subscribers: JDevlieghere, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D45133
llvm-svn: 329435
Krzysztof Parzyszek [Fri, 6 Apr 2018 17:51:57 +0000 (17:51 +0000)]
[Hexagon] Handle subregisters when calculating iteration count in HW loops
llvm-svn: 329434
Jan Vesely [Fri, 6 Apr 2018 17:43:08 +0000 (17:43 +0000)]
fmod: Port from amd_builtins
Uses only denormal path for fp32.
Passes CTS on carrizo and turks.
v2: whitespace fix
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewer: Aaron Watry <awatry@gmail.com>
llvm-svn: 329433
Simon Pilgrim [Fri, 6 Apr 2018 17:25:06 +0000 (17:25 +0000)]
Cleanup Reduction helpers by using ArrayRef(NoneType) constructor. NFCI.
Pointed out by @abataev on D45366.
llvm-svn: 329431
Dmitry Preobrazhensky [Fri, 6 Apr 2018 17:25:00 +0000 (17:25 +0000)]
[AMDGPU][MC][GFX9] Added instruction s_endpgm_ordered_ps_done
See bug 36844: https://bugs.llvm.org/show_bug.cgi?id=36844
Differential Revision: https://reviews.llvm.org/D45313
Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 329430
Sanjay Patel [Fri, 6 Apr 2018 17:24:08 +0000 (17:24 +0000)]
[InstCombine] limit nsz: -(X - Y) --> Y - X to hasOneUse()
As noted in the post-commit discussion for r329350, we shouldn't
generally assume that fsub is the same cost as fneg.
llvm-svn: 329429
George Burgess IV [Fri, 6 Apr 2018 17:22:36 +0000 (17:22 +0000)]
[clang-tidy] Sort includes; NFC
llvm-svn: 329428
Simon Pilgrim [Fri, 6 Apr 2018 17:18:44 +0000 (17:18 +0000)]
Add additional tests from D45336
llvm-svn: 329427
Davide Italiano [Fri, 6 Apr 2018 17:17:20 +0000 (17:17 +0000)]
[lldb-server] Set a more generous timeout when testing gdbremote.
One of our downstream bot is struggling under load, but this
value should be enough for everyone.
llvm-svn: 329426
Simon Pilgrim [Fri, 6 Apr 2018 17:15:56 +0000 (17:15 +0000)]
Add additional tests from D45366
llvm-svn: 329425
Craig Topper [Fri, 6 Apr 2018 17:12:18 +0000 (17:12 +0000)]
[X686] Add appropriate ReadAfterLd for the register input to memory forms of ADC/SBB.
llvm-svn: 329424
Jan Kratochvil [Fri, 6 Apr 2018 17:11:13 +0000 (17:11 +0000)]
Revert "Cleanup DWARFCompileUnit and DWARFUnit in preparation for adding DWARFTypeUnit"
The reverted commit changed DWARFUnit from https://reviews.llvm.org/D40466 and
https://reviews.llvm.org/D42892 that was prepared for DWARFPartialUnit and
made from it a superclass for DWARFTypeUnit. DWARFUnit's intention was:
DWARFUnit->DWARFSomeNameUnit->DWARFCompileUnit
DWARFUnit->DWARFSomeNameUnit->DWARFTypeUnit
DWARFUnit->DWARFPartialUnit
Discussed at: https://reviews.llvm.org/D45170
This reverts commit r329305.
llvm-svn: 329423
Simon Dardis [Fri, 6 Apr 2018 17:03:36 +0000 (17:03 +0000)]
[compiler-rt][dfsan][mips] UnXPASS a consistently passing test
llvm-svn: 329422
Simon Pilgrim [Fri, 6 Apr 2018 17:01:54 +0000 (17:01 +0000)]
Strip trailing whitespace. NFCI.
llvm-svn: 329421
Yaxun Liu [Fri, 6 Apr 2018 16:43:42 +0000 (16:43 +0000)]
[HIP] define __CUDA_ARCH_=1 for amdgcn targets
Differential Revision: https://reviews.llvm.org/D45277
llvm-svn: 329420
Dmitry Preobrazhensky [Fri, 6 Apr 2018 16:35:11 +0000 (16:35 +0000)]
[AMDGPU][MC][GFX9] Added instructions *saveexec*, *wrexec* and *bitreplicate*
See bug 36840: https://bugs.llvm.org/show_bug.cgi?id=36840
Differential Revision: https://reviews.llvm.org/D45250
Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 329419
Sanjay Patel [Fri, 6 Apr 2018 16:30:52 +0000 (16:30 +0000)]
[InstCombine] add test for fsub+fneg with extra use; NFC
llvm-svn: 329418
Craig Topper [Fri, 6 Apr 2018 16:29:31 +0000 (16:29 +0000)]
[X86] Remove InstRWs for basic arithmetic instructions from Sandy Bridge scheduler model.
We can get this right through WriteALU and friends now.
llvm-svn: 329417
Craig Topper [Fri, 6 Apr 2018 16:16:48 +0000 (16:16 +0000)]
[X86] Attempt to model basic arithmetic instructions in the Haswell/Broadwell/Skylake scheduler models without InstRWs
Summary:
This patch removes InstRW overrides for basic arithmetic/logic instructions. To do this I've added the store address port to RMW. And used a WriteSequence to make the latency additive. It does not cover ADC/SBB because they have different latency.
Apparently we were inconsistent about whether the store has latency or not thus the test changes.
I've also left out Sandy Bridge because the load latency there is currently 4 cycles and should be 5.
Reviewers: RKSimon, andreadb
Reviewed By: andreadb
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45351
llvm-svn: 329416
Craig Topper [Fri, 6 Apr 2018 16:16:46 +0000 (16:16 +0000)]
[X86] Add an extra store address cycle to WriteRMW in the Sandy Bridge/Broadwell/Haswell/Skylake scheduler model.
Even those the address was calculated for the load, its calculated again for the store.
llvm-svn: 329415
Craig Topper [Fri, 6 Apr 2018 16:16:43 +0000 (16:16 +0000)]
[X86] Merge itineraries for CLC, CMC, and STC.
These are very simple flag setting instructions that appear to only be a single uop. They're unlikely to need this separation.
llvm-svn: 329414
Simon Pilgrim [Fri, 6 Apr 2018 16:14:27 +0000 (16:14 +0000)]
[CostModel][X86] Regenerate bit count cost tests with update_analyze_test_checks.py
llvm-svn: 329413
Sanjay Patel [Fri, 6 Apr 2018 16:06:08 +0000 (16:06 +0000)]
[InstCombine] add potential calloc tests and regenerate checks; NFC
D45344 is proposing to remove the use restriction that made the calloc
transform safe, but it doesn't currently address the problematic example
given inD16337. Add a test to make sure that doesn't break.
llvm-svn: 329412
Alexey Bataev [Fri, 6 Apr 2018 16:03:36 +0000 (16:03 +0000)]
[OPENMP, NVPTX] Fix codegen for the teams reduction.
Added NUW flags for all the add|mul|sub operations + replaced sdiv by udiv
as we operate on unsigned values only (addresses, converted to integers)
llvm-svn: 329411
Simon Pilgrim [Fri, 6 Apr 2018 16:00:28 +0000 (16:00 +0000)]
[CostModel][X86] Regenerate vector shuffle cost tests with update_analyze_test_checks.py
llvm-svn: 329410
Mircea Trofin [Fri, 6 Apr 2018 15:54:47 +0000 (15:54 +0000)]
[GlobalOpt] Fix support for casts in ctors.
Summary:
Fixing an issue where initializations of globals where constructors use
casts were silently translated to 0-initialization.
Reviewers: davidxl, evgeny777
Reviewed By: evgeny777
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45198
llvm-svn: 329409
Dmitry Preobrazhensky [Fri, 6 Apr 2018 15:48:39 +0000 (15:48 +0000)]
[AMDGPU][MC][VI][GFX9] Added s_atc_probe* instructions
See bug 36839: https://bugs.llvm.org/show_bug.cgi?id=36839
Differential Revision: https://reviews.llvm.org/D45249
Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 329408
Simon Pilgrim [Fri, 6 Apr 2018 15:46:26 +0000 (15:46 +0000)]
[CostModel][X86] Regenerate bswap/bitreverse cost tests with update_analyze_test_checks.py
llvm-svn: 329407
Pete Couperus [Fri, 6 Apr 2018 15:43:11 +0000 (15:43 +0000)]
[ARC] Add <.f> suffix for F32_GEN4_{DOP|SOP}.
Add disassembler support for instructions which writeback STATUS32.
https://reviews.llvm.org/D45148
Patch by Yan Luo! (Yan.Luo2@synopsys.com)
llvm-svn: 329404
Andrea Di Biagio [Fri, 6 Apr 2018 15:30:02 +0000 (15:30 +0000)]
[llvm-mca] Do not separate iterations with a newline in the timeline view.
Also, update a few tests to minimize the diff in D45369.
No functional change intended.
llvm-svn: 329403
Simon Pilgrim [Fri, 6 Apr 2018 15:28:26 +0000 (15:28 +0000)]
[CostModel][X86] Regenerate integer extension/truncation cost tests with update_analyze_test_checks.py
llvm-svn: 329402
Simon Pilgrim [Fri, 6 Apr 2018 15:23:26 +0000 (15:23 +0000)]
[CostModel][X86] Regenerate integer division/remainder tests with update_analyze_test_checks.py
llvm-svn: 329401
Simon Pilgrim [Fri, 6 Apr 2018 15:14:34 +0000 (15:14 +0000)]
[CostModel][X86] Regenerate vector shift cost tests with update_analyze_test_checks.py
llvm-svn: 329400
Alexander Kornienko [Fri, 6 Apr 2018 15:14:32 +0000 (15:14 +0000)]
Fix typos in clang
Found via codespell -q 3 -I ../clang-whitelist.txt
Where whitelist consists of:
archtype
cas
classs
checkk
compres
definit
frome
iff
inteval
ith
lod
methode
nd
optin
ot
pres
statics
te
thru
Patch by luzpaz! (This is a subset of D44188 that applies cleanly with a few
files that have dubious fixes reverted.)
Differential revision: https://reviews.llvm.org/D44188
llvm-svn: 329399
Simon Pilgrim [Fri, 6 Apr 2018 15:12:36 +0000 (15:12 +0000)]
[CostModel][X86] Regenerate int<->fp cost tests with update_analyze_test_checks.py
llvm-svn: 329398
Dmitry Preobrazhensky [Fri, 6 Apr 2018 15:08:42 +0000 (15:08 +0000)]
[AMDGPU][MC][GFX9] Added s_dcache_discard* instructions
See bug 36838: https://bugs.llvm.org/show_bug.cgi?id=36838
Differential Revision: https://reviews.llvm.org/D45247
Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 329397
Chad Rosier [Fri, 6 Apr 2018 13:57:21 +0000 (13:57 +0000)]
[LoopUnroll] Make LoopPeeling respect the AllowPeeling preference.
The SimpleLoopUnrollPass isn't suppose to perform loop peeling.
Differential Revision: https://reviews.llvm.org/D45334
llvm-svn: 329395
Krzysztof Parzyszek [Fri, 6 Apr 2018 13:51:48 +0000 (13:51 +0000)]
[Hexagon] Remove default values from lambda parameters
llvm-svn: 329394
Philip Pfaffe [Fri, 6 Apr 2018 13:39:16 +0000 (13:39 +0000)]
Followup for r329293: Temporarily disable the breaking test on windows.
This test is failing on windows bots. Disable it temporarily to unbreak
the windows bots.
llvm-svn: 329393
Pavel Labath [Fri, 6 Apr 2018 13:34:12 +0000 (13:34 +0000)]
DWARFVerifier: validate information in name index entries
Summary:
This patch add checks to verify that the information in the name index
entries is consistent with the debug_info section. Specifically, we
check that entries point to valid DIEs, and their names, tags, and
compile units match the information in the debug_info sections.
These checks are only run if the previous checks did not find any errors
in the name index headers. Attempting to proceed with the checks anyway
would likely produce a lot of spurious errors and the verification code
would need to be very careful to avoid crashing.
I also add a couple of more checks to the abbreviation-validation code
to verify that some attributes are always present (an index without a
DW_IDX_die_offset attribute is fairly useless).
The entry verification works only on indexes without any type units - I
haven't attempted to extend it to type units, as we don't even have a
DWARF v5-compatible type unit generator at the moment.
Reviewers: JDevlieghere, aprantl, dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45323
llvm-svn: 329392
Alexander Kornienko [Fri, 6 Apr 2018 13:01:12 +0000 (13:01 +0000)]
Allow the creation of human-friendly ASTDumper to arbitrary output stream
Summary:
`ASTPrinter` allows setting the ouput to any O-Stream, but that printer creates source-code-like syntax (and is also marked with a `FIXME`). The nice, colourful, mostly human-readable `ASTDumper` only works on the standard output, which is not feasible in case a user wants to see the AST of a file through a code navigation/comprehension tool.
This small addition of an overload solves generating a nice colourful AST block for the users of a tool I'm working on, [[ http://github.com/Ericsson/CodeCompass | CodeCompass ]], as opposed to having to duplicate the behaviour of definitions that only exist in the anonymous namespace of implementation TUs related to this module.
Reviewers: alexfh, klimek, rsmith
Reviewed By: alexfh
Subscribers: rnkovacs, dkrupp, gsd, xazax.hun, cfe-commits, #clang
Tags: #clang
Patch by Whisperity!
Differential Revision: https://reviews.llvm.org/D45096
llvm-svn: 329391
Simon Pilgrim [Fri, 6 Apr 2018 12:36:27 +0000 (12:36 +0000)]
[UpdateTestChecks] Add update_analyze_test_checks.py for cost model analysis generation
The script allows the auto-generation of checks for cost model tests to speed up their creation and help improve coverage, which will help a lot with PR36550.
If the need arises we can add support for other analyze passes as well, but the cost models was the one I needed to get done - at the moment it just warns that any other analysis mode is unsupported.
I've regenerated a couple of x86 test files to show the effect.
Differential Revision: https://reviews.llvm.org/D45272
llvm-svn: 329390
Simon Pilgrim [Fri, 6 Apr 2018 11:25:21 +0000 (11:25 +0000)]
[X86][SandyBridge] Add (V)DPPS memory fold latencies
Noticed this during D44654
llvm-svn: 329389
Simon Pilgrim [Fri, 6 Apr 2018 11:00:51 +0000 (11:00 +0000)]
[X86][SandyBridge] SBWriteResPair +5cy Memory Folds
As mentioned on D44647, this patch increases the default memory latency to +5cy , which more closely matches what most custom cases are doing for reg-mem instructions.
I've bumped LoadLatency, ReadAfterLd and WriteLoad values to 5cy to be consistent.
As Sandy Bridge is currently our default generic model, this affects a lot of scheduling tests...
Differential Revision: https://reviews.llvm.org/D44654
llvm-svn: 329388
Hans Wennborg [Fri, 6 Apr 2018 10:20:19 +0000 (10:20 +0000)]
Tweak an assert message in the verifier
llvm-svn: 329387
Simon Pilgrim [Fri, 6 Apr 2018 10:16:36 +0000 (10:16 +0000)]
[X86][SkylakeServer] Merge 2 InstRW entries to the same sched group. NFCI.
llvm-svn: 329386
Hans Wennborg [Fri, 6 Apr 2018 10:14:09 +0000 (10:14 +0000)]
EntryExitInstrumenter: Handle musttail calls
Inserting instrumentation between a musttail call and ret instruction
would create invalid IR. Instead, treat musttail calls as function
exits.
llvm-svn: 329385
Benjamin Kramer [Fri, 6 Apr 2018 10:05:47 +0000 (10:05 +0000)]
[ELF] Don't write to the source directory in test.
llvm-svn: 329384
Max Kazantsev [Fri, 6 Apr 2018 09:47:06 +0000 (09:47 +0000)]
[NFC] Add missing end of line symbols
llvm-svn: 329383
Francis Visoiu Mistrih [Fri, 6 Apr 2018 08:56:25 +0000 (08:56 +0000)]
[MIR] Add support for MachineFrameInfo::LocalFrameSize
MFI.LocalFrameSize was not serialized.
It is usually set from LocalStackSlotAllocation, so if that pass doesn't
run it is impossible do deduce it from the stack objects. Until now, this
information was lost.
llvm-svn: 329382
Pavel Labath [Fri, 6 Apr 2018 08:49:57 +0000 (08:49 +0000)]
[debug_loc] Fix typo in DWARFExpression constructor
Summary:
The positions of the DwarfVersion and AddressSize arguments were
reversed, which caused parsing for dwarf opcodes which contained
address-size-dependent operands (such as DW_OP_addr). Amusingly enough,
none of the address-size asserts fired, as dwarf version was always 4,
which is a valid address size.
I ran into this when constructing weird inputs for the DWARF verifier. I
I add a test case as hand-written dwarf -- I am not sure how to trigger
this differently, as having a DW_OP_addr inside a location list is a
fairly non-standard thing to do.
Fixing this error exposed a bug in the debug_loc.dwo parser, which was
always being constructed with an address size of 0. I fix that as well
by following the pattern in the non-dwo parser of picking up the address
size from the first compile unit (which is technically not correct, but
probably good enough in practice).
Reviewers: JDevlieghere, aprantl, dblaikie
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45324
llvm-svn: 329381
Sam McCall [Fri, 6 Apr 2018 07:48:21 +0000 (07:48 +0000)]
[clangd] move comment to the right place. NFC
llvm-svn: 329380
Max Kazantsev [Fri, 6 Apr 2018 07:23:45 +0000 (07:23 +0000)]
[NFC] Loosen restriction on preheader to fix buildbot
llvm-svn: 329379
Dean Michael Berris [Fri, 6 Apr 2018 06:09:57 +0000 (06:09 +0000)]
[XRay][clang] Only run driver test for Linux and FreeBSD
This is a follow-up to D45354, which we should have only been running on
Linux and FreeBSD for specific targets.
Differential Revision: https://reviews.llvm.org/D45354
llvm-svn: 329378
Hiroshi Inoue [Fri, 6 Apr 2018 05:41:16 +0000 (05:41 +0000)]
[PowerPC] allow D-form VSX load/store when accessing FrameIndex without offset
VSX D-form load/store instructions of POWER9 require the offset be a multiple of 16 and a helper`isOffsetMultipleOf` is used to check this.
So far, the helper handles FrameIndex + offset case, but not handling FrameIndex without offset case. Due to this, we are missing opportunities to exploit D-form instructions when accessing an object or array allocated on stack.
For example, x-form store (stxvx) is used for int a[4] = {0}; instead of d-form store (stxv). For larger arrays, D-form instruction is not used when accessing the first 16-byte. Using D-form instructions reduces register pressure as well as instructions.
Differential Revision: https://reviews.llvm.org/D45079
llvm-svn: 329377
Dean Michael Berris [Fri, 6 Apr 2018 05:28:54 +0000 (05:28 +0000)]
[XRay][clang] Add a flag to enable/disable linking XRay deps explicitly
Summary:
This change introduces `-fxray-link-deps` and `-fnoxray-link-deps`. The
`-fnoxray-link-deps` allows for directly controlling which specific XRay
runtime to link. The default is for clang to link the XRay runtime that
is shipped with the compiler (if there are any), but users may want to
explicitly add the XRay dependencies from other locations or other
means.
Reviewers: eizan, echristo, chandlerc
Reviewed By: eizan
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D45354
llvm-svn: 329376
Marshall Clow [Fri, 6 Apr 2018 04:43:27 +0000 (04:43 +0000)]
Mark <span> as "In progress"
llvm-svn: 329375
Frederic Riss [Fri, 6 Apr 2018 04:28:12 +0000 (04:28 +0000)]
[debugserver] Fix LC_BUILD_VERSION load command handling.
Summary:
In one of the 2 places the LC_BUILD_VERSION load command is handled, there
is a bug preventing us from actually handling them (the address where to
read the load command was not updated). This patch factors reading the
deployment target load commands into a helper and adds testing for the 2
code paths calling the helper.
The testing is a little bit complicated because the only times those load
commands matter is when debugging a simulator process. I added a new
decorator to check that a specific SDK is available. The actual testing was
fairly easy once I knew how to run a simulated process.
Reviewers: jasonmolenda, labath
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D45298
llvm-svn: 329374
Robert Widmann [Fri, 6 Apr 2018 04:02:39 +0000 (04:02 +0000)]
[LLVM-C] Fill Out LLVMCallConv
Summary: Bring LLVMCallConv up to date with latest [[ http://llvm.org/doxygen/CallingConv_8h_source.html | CallConv ]]
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45347
llvm-svn: 329373
Dean Michael Berris [Fri, 6 Apr 2018 03:53:04 +0000 (03:53 +0000)]
[XRay][clang] Consolidate runtime and link-time flag processing (NFC)
Summary:
This change fixes http://llvm.org/PR36985 to define a single place in
CommonArgs.{h,cpp} where XRay runtime flags and link-time dependencies
are processed for all toolchains that support XRay instrumentation. This
is a refactoring of the same functionality spread across multiple
toolchain definitions.
Reviewers: echristo, devnexen, eizan
Reviewed By: eizan
Subscribers: emaste, cfe-commits
Differential Revision: https://reviews.llvm.org/D45243
llvm-svn: 329372
Rafael Espindola [Fri, 6 Apr 2018 03:36:19 +0000 (03:36 +0000)]
Change which file we print when a symbol cannot be ordered.
Currently there are a few odd things about the warning about symbols
that cannot be ordered. This patch fixes:
* When there is an undefined symbol that resolves to a shared file, we
were printing the location of the undefined reference.
* If there are multiple comdats, we were reporting them all.
llvm-svn: 329371
Peter Collingbourne [Fri, 6 Apr 2018 03:25:49 +0000 (03:25 +0000)]
COFF: Create output sections early. NFCI.
With this, all output sections are created in one place. This will make
it simpler to implement merging of builtin sections.
Differential Revision: https://reviews.llvm.org/D45349
llvm-svn: 329370
Robert Widmann [Fri, 6 Apr 2018 02:31:29 +0000 (02:31 +0000)]
[LLVM-C] Audit Inline Assembly APIs for Consistency
Summary:
- Add a missing getter for module-level inline assembly
- Add a missing append function for module-level inline assembly
- Deprecate LLVMSetModuleInlineAsm and replace it with LLVMSetModuleInlineAsm2 which takes an explicit length parameter
- Deprecate LLVMConstInlineAsm and replace it with LLVMGetInlineAsm, a function that allows passing a dialect and is not mis-classified as a constant operation
Reviewers: whitequark, deadalnix
Reviewed By: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45346
llvm-svn: 329369
Rafael Espindola [Fri, 6 Apr 2018 01:21:48 +0000 (01:21 +0000)]
Update method names in documentation.
They were renamed in r328848.
llvm-svn: 329368
Rafael Espindola [Fri, 6 Apr 2018 01:10:33 +0000 (01:10 +0000)]
Don't ignore addend when a SHF_MERGE section is dead.
This is similar to r329219, but for the entire section. Like r329219 I
don't expect this to have any real impact, it is just more consistent
and simpler.
llvm-svn: 329367
Petr Hosek [Fri, 6 Apr 2018 00:53:00 +0000 (00:53 +0000)]
CMake option to allow enabling experimental new pass manager by default
This CMake flag allows setting the default value for the
-f[no]-experimental-new-pass-manager flag.
Differential Revision: https://reviews.llvm.org/D44330
llvm-svn: 329366
Manoj Gupta [Thu, 5 Apr 2018 23:23:29 +0000 (23:23 +0000)]
Fix lld-x86_64-darwin13 build fails.
Use double braces in std::array initialization
to keep Darwin builders happy.
llvm-svn: 329363
Sanjay Patel [Thu, 5 Apr 2018 23:21:15 +0000 (23:21 +0000)]
[InstCombine] FP: Z - (X - Y) --> Z + (Y - X)
This restores what was lost with rL73243 but without
re-introducing the bug that was present in the old code.
Note that we already have these transforms if the ops are
marked 'fast' (and I assume that's happening somewhere in
the code added with rL170471), but we clearly don't need
all of 'fast' for these transforms.
llvm-svn: 329362
Douglas Yung [Thu, 5 Apr 2018 22:58:14 +0000 (22:58 +0000)]
Fix test added in r329301 to work properly with Windows paths.
llvm-svn: 329361
Sanjay Patel [Thu, 5 Apr 2018 22:56:54 +0000 (22:56 +0000)]
[InstCombine] add FP tests for Z - (X - Y); NFC
A fold for this pattern was removed at rL73243 to fix PR4374:
https://bugs.llvm.org/show_bug.cgi?id=4374
...and apparently there were no tests that went with that fold.
llvm-svn: 329360
Manoj Gupta [Thu, 5 Apr 2018 22:47:25 +0000 (22:47 +0000)]
Attempt to fix Mips breakages.
Summary:
Replace ArrayRefs by actual std::array objects so that there are
no dangling references.
Reviewers: rsmith, gkistanova
Subscribers: sdardis, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D45338
llvm-svn: 329359
Davide Italiano [Thu, 5 Apr 2018 22:46:39 +0000 (22:46 +0000)]
[dotest] --skip-category should append and not override.
<rdar://problem/
38566150>
llvm-svn: 329358
Eugene Zelenko [Thu, 5 Apr 2018 22:15:42 +0000 (22:15 +0000)]
[Sema] Revert r329346 because of memory sanitizer failures.
llvm-svn: 329357
Zvi Rackover [Thu, 5 Apr 2018 21:57:20 +0000 (21:57 +0000)]
X86 Tests: Add a case for combining sdiv by a splatted pow2 negative. NFC.
Noticed test was missing while working on D42479.
llvm-svn: 329356