Mike Blumenkrantz [Fri, 17 Jul 2020 13:52:16 +0000 (09:52 -0400)]
zink: enable VK_KHR_vulkan_memory_model extension
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7099>
Samuel Pitoiset [Mon, 12 Oct 2020 17:14:32 +0000 (19:14 +0200)]
radv: fix adjusting vertex alpha
AC_FETCH_FORMAT_NONE is not zero... Oops.
Fixes:
b0829c6af70 ("radv: replace RADV_ALPHA_ADJUST by AC_FETCH_FORMAT")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7103>
Dylan Baker [Mon, 28 Sep 2020 23:28:46 +0000 (16:28 -0700)]
docs: Add sh256 sums for 20.2.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6904>
Dylan Baker [Mon, 28 Sep 2020 23:27:44 +0000 (16:27 -0700)]
docs: add release notes for 20.2.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6904>
Dylan Baker [Mon, 28 Sep 2020 23:25:43 +0000 (16:25 -0700)]
docs/release-calender: Add 20.2 stable releases
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6904>
Dylan Baker [Mon, 28 Sep 2020 23:23:44 +0000 (16:23 -0700)]
docs: update calendar and link releases notes for 20.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6904>
Samuel Pitoiset [Tue, 6 Oct 2020 15:54:33 +0000 (17:54 +0200)]
radv: move lower_io_arrays_to_elements before lower_io_to_scalar_early
nir_lower_io_arrays_to_elements lowers arrays or matrices to elements,
which ends up to vectors for matrices, but a bunch of IO optimizations
only work for scalars.
Calling it before lower_io_to_scalar_early allows nir_link_opt_varyings
to remove duplicated inputs and replace constant inputs.
fossils-db (Navi10):
Totals from 294 (0.22% of 136546) affected shaders:
CodeSize: 861356 -> 860224 (-0.13%); split: -0.13%, +0.00%
Instrs: 161972 -> 161832 (-0.09%); split: -0.09%, +0.00%
Cycles: 1185680 -> 1185120 (-0.05%); split: -0.05%, +0.00%
SMEM: 31422 -> 31424 (+0.01%)
Copies: 9065 -> 9068 (+0.03%)
Only Talos and Dark Souls 3 are affected.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7041>
Samuel Pitoiset [Thu, 8 Oct 2020 14:52:36 +0000 (16:52 +0200)]
radv: replace RADV_ALPHA_ADJUST by AC_FETCH_FORMAT
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7065>
Samuel Pitoiset [Thu, 8 Oct 2020 14:49:44 +0000 (16:49 +0200)]
ac/llvm: move AC_FETCH_FORMAT to non-LLVM code
While we are it, give it a name.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7065>
Indrajit Kumar Das [Mon, 12 Oct 2020 08:13:38 +0000 (13:43 +0530)]
radeonsi/gfx10: fix stream index for multi-stream overflow query
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7093>
Rhys Perry [Wed, 7 Oct 2020 19:33:50 +0000 (20:33 +0100)]
radv: remove RDR2 discard workaround
The game appears to use HLSL, so this workaround now lives in
SPIR-V -> NIR.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7062>
Rhys Perry [Wed, 7 Oct 2020 19:07:42 +0000 (20:07 +0100)]
spirv: replace discard with demote for incorrect HLSL->SPIR-V translations
Fixes artifacts on decals in Path of Exile.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3610
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7062>
Rhys Perry [Thu, 8 Oct 2020 14:30:44 +0000 (15:30 +0100)]
spirv: add and use a generator id enum
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7062>
Bas Nieuwenhuizen [Thu, 8 Oct 2020 12:36:08 +0000 (14:36 +0200)]
radv/winsys: Expand scope of allbos lock.
With us not creating a bo_list anymore, there is a problem if we
delete a buffer between enumerating all buffers and doing the submission.
Also changes this to a rwlock given the wider scope of the things under
lock. (especialy some of the syncobj stuff is now under the lock)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7091>
Bas Nieuwenhuizen [Thu, 8 Oct 2020 10:34:30 +0000 (12:34 +0200)]
radv: Fix event write cmdbuffer allocation when tracing.
The trace emit is another 7 words.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7091>
Samuel Pitoiset [Tue, 6 Oct 2020 06:46:15 +0000 (08:46 +0200)]
radv: remove one leftover TODO in the shader info pass
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7022>
Samuel Pitoiset [Fri, 2 Oct 2020 11:36:05 +0000 (13:36 +0200)]
radv/llvm: reduce LDS size for tess by using NIR IO assigned locations
To match ACO.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7022>
Samuel Pitoiset [Fri, 2 Oct 2020 11:21:18 +0000 (13:21 +0200)]
radv/llvm: reduce the ESGS itemsize by using NIR IO assigned locations
There is no longer gaps in the ESGS ring.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7022>
Samuel Pitoiset [Tue, 6 Oct 2020 06:38:58 +0000 (08:38 +0200)]
radv/llvm: switch to NIR IO assigned locations
To match ACO.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7022>
Samuel Pitoiset [Mon, 5 Oct 2020 08:22:00 +0000 (10:22 +0200)]
ac/nir: pass the variable location to store_tcs_outputs
It's actually simpler for the backend to know the variable location.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7022>
Samuel Pitoiset [Mon, 5 Oct 2020 13:41:33 +0000 (15:41 +0200)]
ac,radv,radeonsi: stop multiplying driver_location by 4
It's no longer needed to do that.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7010>
Samuel Pitoiset [Mon, 5 Oct 2020 13:36:27 +0000 (15:36 +0200)]
radv/llvm: stop assigning driver_location in NIR->LLVM
It's already assigned just after NIR linking shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7010>
Jason Ekstrand [Thu, 8 Oct 2020 04:05:25 +0000 (23:05 -0500)]
nir: Allow more deref modes in phis
In particular, OpenCL needs to allow shader_temp and function_temp
through because they're 100% real pointers.
Fixes piglit CL calls.cl
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7092>
Mauro Rossi [Sat, 10 Oct 2020 12:48:22 +0000 (14:48 +0200)]
android: util: Move xxd.py to util
Android porting of gen rules as per
22ffc05266c6 ("util: Move xxd.py to util")
Fixes the following building error:
ninja: error: 'external/mesa/src/compiler/glsl/xxd.py', needed by 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libmesa_glsl_intermediates/glsl/float64_glsl.h', missing and no known rule to make it
Fixes:
22ffc05266c6 ("util: Move xxd.py to util")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7087>
Jose Maria Casanova Crespo [Sat, 10 Oct 2020 11:19:39 +0000 (12:19 +0100)]
vc4: enable lower_isign for VC4
Since
1e7d82c8813647 ("nir/algebraic: always lower idiv
to shifts if bitops are allowed") idiv is lowered and
generates a isign operation.
VC4 HW doesn't support isign and lower_isign wasn't enabled.
Enabling it fixes the regressions caused by this new
optimization on piglit tests shaders/glsl-fs-loop-nested.
Fixes:
1e7d82c8813647 ("nir/algebraic: always lower idiv to shifts if bitops are allowed")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7089>
Alyssa Rosenzweig [Sat, 10 Oct 2020 20:46:49 +0000 (16:46 -0400)]
pan/bi: Range check newc/oldc when rewriting
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 9 Oct 2020 14:45:44 +0000 (10:45 -0400)]
pan/bi: Disable mediump output lowering
Without fp16, this is useless for now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 9 Oct 2020 14:44:21 +0000 (10:44 -0400)]
panfrost: Temporarily disable FP16 on Bifrost
There are some missing bits for FP16 to work on more complicated Bifrost
tests. Towards conformance let's disable FP16 on Bifrost and reenable
when these issues are sorted (principally, swizzle lowering).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 8 Oct 2020 23:59:15 +0000 (19:59 -0400)]
panfrost: Set "shader modifies coverage?" flag
Principally when DISCARD is used.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 8 Oct 2020 23:46:21 +0000 (19:46 -0400)]
panfrost: Update XML for Bifrost early-z/FPK
Had bits scrambled during RE.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 8 Oct 2020 23:30:44 +0000 (19:30 -0400)]
pan/bi: Implement FETCH
For texelFetch. A few earlier header fields were wrong.
Fixes dEQP-GLES2.functional.texture.mipmap.2d.generate.rgba8888_fastest
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 8 Oct 2020 23:31:41 +0000 (19:31 -0400)]
pan/bi: Add bi_emit_lod_cube helper
There's a different LOD format used for TXF that will be able to
accomodate cube maps as well.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 8 Oct 2020 23:01:29 +0000 (19:01 -0400)]
pan/bi: Map NIR tex ops to Bifrost ops
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 8 Oct 2020 22:51:43 +0000 (18:51 -0400)]
panfrost: Fix faults on block-based formats on Bifrost
Fixes
dEQP-GLES2.functional.texture.filtering.2d.nearest_nearest_clamp_etc1
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 8 Oct 2020 22:35:17 +0000 (18:35 -0400)]
pan/bi: Use new block dimension helper
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 8 Oct 2020 22:34:48 +0000 (18:34 -0400)]
panfrost: Add panfrost_block_dim helper
So we can calculate strides of block-based formats correctly. Will help
us down the road for Bifrost AFBC.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 8 Oct 2020 18:36:56 +0000 (14:36 -0400)]
pan/bi: Don't terminate helper threads
Fixes our filtering fails. Roughly equivalent to the .kill texture
bit on Midgard. We'll need to port the dataflow analysis over along with
the .skip analysis, but for now this will suffice.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 8 Oct 2020 18:21:49 +0000 (14:21 -0400)]
pan/bi: Fix message type printing
Lazy copy/pasting fail.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Wed, 7 Oct 2020 22:50:34 +0000 (18:50 -0400)]
panfrost: Set helper_invocation_enable for Bifrost
Actually, this is for barriers, field name is wrong. But it's the same
as Midgard.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Wed, 7 Oct 2020 22:32:32 +0000 (18:32 -0400)]
pan/bi: Implement txb
Also uses the 8.8 signed fixed-point format.
dEQP-GLES2.functional.shaders.texture_functions.fragment.texture2d_bias
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Wed, 7 Oct 2020 02:00:49 +0000 (22:00 -0400)]
panfrost: Add some missing Bifrost texture XML
Still incomplete due to many states, but this is a start.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Wed, 7 Oct 2020 01:46:56 +0000 (21:46 -0400)]
panfrost: Fix Bifrost high LOD clamp
Broke mipmapping.
Fixes:
ad0b32cdbd5 ("panfrost: XMLify Bifrost textures")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Wed, 7 Oct 2020 01:31:18 +0000 (21:31 -0400)]
panfrost: Fix Bifrost filter selection
Point sampling is jargon for nearest, apparently. Fixes
dEQP-GLES2.functional.texture.filtering.2d.nearest_nearest_clamp_rgba8888_pot
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Wed, 7 Oct 2020 01:29:05 +0000 (21:29 -0400)]
panfrost: Add missing XML for Bifrost samplers
This is now complete and mostly canonical.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 16:28:47 +0000 (12:28 -0400)]
pan/bi: Prefer 'texture_index' to 'image_index'
They're not images. Making the executive decision to fix the notation.
Not canonical.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 16:14:32 +0000 (12:14 -0400)]
pan/bi: Rewrite to fit dest = src constraint
Needed for TEXC as well as atomics.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 15:50:12 +0000 (11:50 -0400)]
pan/bi: Pack TEXC
1-line change, thanks to the generator magic.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 15:46:50 +0000 (11:46 -0400)]
pan/bi: Handle nir_tex_src_lod
We need to emit some lowering code to convert it to the 8:8 format
expected by the hardware.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 15:32:55 +0000 (11:32 -0400)]
pan/bi: Add data register passing infrastructure
Lower to a COMBINE, which in turn will lower to moves so RA does the
right thing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 15:18:16 +0000 (11:18 -0400)]
pan/bi: Stub out TEXC handling
We still need to handle actual complex texturing instructions, as well
as packing, but this is the start.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Wed, 23 Sep 2020 17:57:52 +0000 (13:57 -0400)]
pan/bi: Add texture operator descriptor
Used to encode all the different texture modes.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 14:45:11 +0000 (10:45 -0400)]
pan/bi: Pack skip bit for texture operations
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 14:42:39 +0000 (10:42 -0400)]
pan/bi: Encode skip bit into IR
Currently unset.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 14:40:16 +0000 (10:40 -0400)]
pan/bi: Streamline TEXC/TEXS naming/selection
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 14:31:04 +0000 (10:31 -0400)]
pan/bi: Use canonical texture op names in IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Tue, 6 Oct 2020 14:24:56 +0000 (10:24 -0400)]
pan/bi: Fix simple txl test
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes:
731dfc6066d ("pan/bi: Allow vertex txl with lod=0 as compact")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 20:41:53 +0000 (16:41 -0400)]
pan/bi: Expose GL 2.1 on Bifrost
Needed for glamor. These features should work fine.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 19:49:55 +0000 (15:49 -0400)]
pan/bi: Handle vector moves
And fix the bad assertion that let this slip.
Like combines, nir_op_vec can be vector, and we need to lower this
ourselves. Thankfully, the lowering is simple.
Fixes
dEQP-GLES2.functional.shaders.loops.for_uniform_iterations.nested_tricky_dataflow_1_*
Fixes:
b2c6cf2b6db ("pan/bi: Eliminate writemasks in the IR")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 19:13:29 +0000 (15:13 -0400)]
pan/bi: Pass flow_control through directly
More than just a single bool!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 19:03:58 +0000 (15:03 -0400)]
pan/bi: Use canonical flow control enum
Merges multiple bits and adds some new combinations. The semantics are
the compiler are evidently wrong, we'll fix that next.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 18:12:45 +0000 (14:12 -0400)]
pan/bi: Use canonical term dependency
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 18:02:25 +0000 (14:02 -0400)]
pan/bi: Use canonical term "message type"
These identify the type of message produced by a message-passing
instruction, rather than information about the clause per se.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 18:01:22 +0000 (14:01 -0400)]
pan/bi: Print message types as strings
Even if we're not in verbose mode to match the canonical syntax.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 17:57:59 +0000 (13:57 -0400)]
pan/bi: Add missing message types
Names are not canonical but that's ok.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 17:54:09 +0000 (13:54 -0400)]
pan/bi: Expand clause type to 5-bit
The upper bit is reserved.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 17:53:03 +0000 (13:53 -0400)]
pan/bi: Use canonical name for staging registers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 17:46:35 +0000 (13:46 -0400)]
pan/bi: Use canonical next_clause_prefetch
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 17:27:15 +0000 (13:27 -0400)]
pan/bi: Canonicalize terminate_discarded_threads
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 17:23:33 +0000 (13:23 -0400)]
pan/bi: Use canonical floating-point modes
First few pre-clause modifiers.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 17:06:54 +0000 (13:06 -0400)]
pan/bi: Cull unnecessary edges on the CF graph
If a block ends in an unconditional jump, we don't need to record a
fallthrough successor as well, since it's unreachable.
Likely harmless but makes the IR harder to parse with messy CF graphs.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 16:49:44 +0000 (12:49 -0400)]
pan/bi: Drop if 0'd combine lowering
This is supposed to be optimized but actually just broken. When we look
at optimizing this later we'll probably want a more straightforward copy
prop pass instead.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Sun, 27 Sep 2020 23:45:50 +0000 (19:45 -0400)]
pan/bi: Fix memory corruption in scheduler
If empty the last will be bogus, I think. Missing Rust hard right around
now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Thu, 24 Sep 2020 23:13:43 +0000 (19:13 -0400)]
pan/decode: Ensure mappings are zeroed
Fixes valgrind error when running with =sync
==30966== Conditional jump or move depends on uninitialised value(s)
==30966== at 0x5B424E8: pandecode_find_mapped_gpu_mem_containing (decode_common.c:56)
==30966== by 0x5B4CFB7: pandecode_jc (decode.c:2075)
==30966== by 0x5ABBFA7: panfrost_batch_submit_ioctl (pan_job.c:1020)
==30966== by 0x5ABD397: panfrost_batch_submit_jobs (pan_job.c:1042)
==30966== by 0x5ABD397: panfrost_batch_submit (pan_job.c:1109)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Alyssa Rosenzweig [Fri, 2 Oct 2020 16:27:25 +0000 (12:27 -0400)]
pan/bi: Add copy for register COMBINEs
Fixes:
dEQP-GLES2.functional.shaders.loops.for_constant_iterations.infinite_with_conditional_break_fragment
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
Christian Gmeiner [Fri, 9 Oct 2020 09:00:23 +0000 (11:00 +0200)]
ci: piglit: conditionally build OpenCL tests
For baremetal piglit this is not yet needed.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7075>
Jose Maria Casanova Crespo [Fri, 9 Oct 2020 16:40:45 +0000 (18:40 +0200)]
vc4: Enable lower_umax and lower_umin
VC4 doesn't have support for UMAX and UMIN integer operations. So
we should avoid algebraic optimizations that generate umax/umin ops.
Fixes:
8e1b75b330954a ("nir/algebraic: optimize iand/ior of (n)eq zero")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7083>
Jose Maria Casanova Crespo [Fri, 9 Oct 2020 16:33:26 +0000 (18:33 +0200)]
nir/algebraic: optimize iand/ior of (n)eq zero when umax/umin not available
Before
8e1b75b330954a ("nir/algebraic: optimize iand/ior of (n)eq zero") this
optimization didn't need the use of umax/umin. VC4 HW supports only signed
integer max/min operations.
lower_umin and lower_umax are added to allow enabling previous optimizations
behaviour for this cases.
Fixes:
8e1b75b330954a ("nir/algebraic: optimize iand/ior of (n)eq zero")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7083>
Icecream95 [Fri, 9 Oct 2020 09:39:40 +0000 (22:39 +1300)]
panfrost: Add a debug flag to disable AFBC
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7076>
Marek Olšák [Tue, 6 Oct 2020 10:51:36 +0000 (06:51 -0400)]
radeonsi: disable SDMA on gfx6-7 and gfx10.3 to decrease CPU overhead
same as gfx8-10
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7055>
Marek Olšák [Mon, 5 Oct 2020 04:55:55 +0000 (00:55 -0400)]
radeonsi: update the DMA perf test
- don't test 2 waves/SA
- create the compute shader only once per subtest
- use only 1 TIME_ELAPSED query per subtest
- don't invalidate sL0 (it's not used)
- don't invalidate L2 for L2_LRU to test L2 throughput
- don't flush the CS after every run
- remove unused min/max computation
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7055>
Marek Olšák [Mon, 5 Oct 2020 05:06:33 +0000 (01:06 -0400)]
winsys/amdgpu: apply the VM alignment optimization to the physical alignment too
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7055>
Marek Olšák [Mon, 5 Oct 2020 05:05:44 +0000 (01:05 -0400)]
winsys/amdgpu: rework the VM alignment optimizations
- don't increase the alignment past 2 MB
- apply the second tweak to older chips too
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7055>
Marek Olšák [Tue, 6 Oct 2020 11:06:30 +0000 (07:06 -0400)]
ac/surface: fix valgrind warnings in DCC retile tile lookups
==12920== Conditional jump or move depends on uninitialised value(s)
==12920== at 0x8F39391: util_fast_urem32 (fast_urem_by_const.h:71)
==12920== by 0x8F39391: hash_table_search (hash_table.c:285)
==12920== by 0x8B06D5D: ac_compute_dcc_retile_tile_indices (ac_surface.c:136)
Fixes:
a37aeb128d5f7c "amd/common: Cache intra-tile addresses for retile map."
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7055>
Dave Airlie [Fri, 9 Oct 2020 02:07:31 +0000 (12:07 +1000)]
CI: build our own spirv tools
This causes a lot of hiccups on the CL tests, but I've got most of
them fixed in another MR in pieces.
This should at least give a much more realistic baseline.
v2: use script in both places
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7073>
Dave Airlie [Fri, 9 Oct 2020 19:53:12 +0000 (05:53 +1000)]
ci: fix deqp clone + fetch
This was taking > 10 minutes and I got bored, don't do a depth 1 fetch
in the first place just to do a proper fetch later.
Acked-by: Eric Anholt <eric@anholt.net>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7073>
John Bates [Thu, 1 Oct 2020 01:35:02 +0000 (18:35 -0700)]
disk_cache: build option for disabled-by-default
On some systems it is problematic to have the shader cache enabled
by default. This adds a build option to support the disk cache but
keep it disabled unless the environment variable
MESA_GLSL_CACHE_DISABLE=false.
For example, on Chrome OS, Chrome already has it's own shader
disk cache implementation so it disables the mesa feature. Tests
do not want the shader disk cache enabled because it can cause
inconsistent performance results and the default 1GB for the
disk cache could lead to problems that require more effort to
work around. The Mesa shader disk cache is useful for VMs though,
where it is easy to configure the feature with environment
variables. With the current version of Mesa, Chrome OS would need
to have a system-wide environment variable to disable the disk
cache everywhere except where needed. More elegant to just build
Mesa with the cache feature disabled by default.
Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6967>
Rhys Perry [Mon, 21 Sep 2020 14:56:40 +0000 (15:56 +0100)]
radv: use radv_optimize_nir() less in radv_link_shaders()
fossil-db (Navi):
Totals from 11 (0.01% of 137413) affected shaders:
CodeSize: 99372 -> 99480 (+0.11%)
Instrs: 19119 -> 19110 (-0.05%)
Cycles: 222144 -> 222000 (-0.06%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6891>
Rhys Perry [Mon, 21 Sep 2020 13:32:36 +0000 (14:32 +0100)]
radv: move optimizations in shader_compile_to_nir() to after io_to_scalar
This results in at least one less radv_optimize_nir() iteration.
No fossil-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6891>
Rhys Perry [Mon, 21 Sep 2020 14:56:25 +0000 (15:56 +0100)]
nir: return progress from nir_lower_io_to_scalar_early
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6891>
Boris Brezillon [Thu, 8 Oct 2020 12:17:23 +0000 (14:17 +0200)]
panfrost: Move the blend shader cache at the context level
Blend shaders can be shared among blend states, so let's move the blend
shader one level up so we don't have to re-create/re-compile shaders
when another blend state already asked for it.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7066>
Boris Brezillon [Thu, 8 Oct 2020 08:58:53 +0000 (10:58 +0200)]
panfrost: Get rid of the constant patching done on blend shader binaries
When constants are used in the blend equation we simply recompile the
shader.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7066>
Boris Brezillon [Thu, 8 Oct 2020 08:52:30 +0000 (10:52 +0200)]
panfrost: Let compile_blend_shader() allocate the blend shader object
This way we avoid an extra copy in panfrost_get_blend_shader().
Note that the allocation is attached to the blend state object
which simplifies the delete_blend_state() path.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7066>
Boris Brezillon [Thu, 8 Oct 2020 08:20:45 +0000 (10:20 +0200)]
panfrost: Don't leak NIR blend shaders
Right now we create shaders that are not attached to any memory
context, leading to memory leaks. Ideally, we should free the NIR
shader as soon as we've turned it into a binary, but there's no
function explicitly destroy a shader. Let's attach those to the blend
state so they get destroyed when this state is freed.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7066>
Boris Brezillon [Thu, 8 Oct 2020 08:49:12 +0000 (10:49 +0200)]
panfrost: Allocate blit_blend with ralloc()
This way we can use blend states as memory context which will help
simplify the blend shader creation/destruction logic.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7066>
Boris Brezillon [Thu, 8 Oct 2020 08:09:56 +0000 (10:09 +0200)]
panfrost: Pass compile arguments through a struct
So we can extend it more easily without having to patch all callers.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7066>
Boris Brezillon [Thu, 8 Oct 2020 08:25:13 +0000 (10:25 +0200)]
panfrost: Move the blend constant mask extraction out of make_fixed_blend_mode()
This way we can get a constant mask for the blend shader case too.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7066>
Boris Brezillon [Thu, 8 Oct 2020 08:04:48 +0000 (10:04 +0200)]
panfrost: Constify the rt_fmts arg passed to pan_lower_framebuffer()
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7066>
Bas Nieuwenhuizen [Mon, 5 Oct 2020 11:45:36 +0000 (13:45 +0200)]
radv: Set fce metadata correctly on DCC initialization.
The fce metadata can always be set to false as we don't care about
the compressed clear color.
Avoiding useless fast clear eliminates improves basemark performance by
1%-1.5%.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7005>
Timur Kristóf [Mon, 5 Oct 2020 13:30:18 +0000 (15:30 +0200)]
aco/ngg: Calculate workgroup size of NGG shaders.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6964>
Timur Kristóf [Fri, 2 Oct 2020 15:10:43 +0000 (17:10 +0200)]
aco/ngg: Allocate NGG GS space early for const vertex/primitive counts.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6964>
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