Jared Roesch [Tue, 28 Jan 2020 11:25:52 +0000 (03:25 -0800)]
[PassManager] Implement pass manager tracing API (#4782)
* Implement pass tracing API
* Set is_before correctly
* Add docs for trace function
* Fix lint
* Remove PDB
* Ensure trace_func is set before calling
* Fix conditional
Cody Yu [Tue, 28 Jan 2020 00:10:35 +0000 (16:10 -0800)]
Safe remove tmpdir (#4781)
Jon Soifer [Mon, 27 Jan 2020 23:40:25 +0000 (17:40 -0600)]
[Relay][Frontend][ONNX] Broadcast condition, x, and y for Where op (#4774)
* ONNX frontend broadcast condition
* fix
* fix style
Co-authored-by: Jon Soifer <jonso@microsoft.com>
Jon Soifer [Mon, 27 Jan 2020 22:58:11 +0000 (16:58 -0600)]
properly extract error type from windows error message (#4780)
Co-authored-by: Jon Soifer <jonso@microsoft.com>
Jon Soifer [Mon, 27 Jan 2020 22:27:55 +0000 (16:27 -0600)]
[Build] Explicitly link to cublasLt if it exists (#4776)
* Explicitly link to cublasLt
* Only link cublasLt if it's found
Co-authored-by: Jon Soifer <jonso@microsoft.com>
Kaiyan Chang [Mon, 27 Jan 2020 00:41:46 +0000 (08:41 +0800)]
Update tune_simple_template.py (#4778)
fixed a spelling mistake.
HUAN-PING SU [Sat, 25 Jan 2020 22:55:55 +0000 (06:55 +0800)]
Bump prebuilt-image version in demo dockerfile (#4770)
Ina Dobreva [Fri, 24 Jan 2020 06:41:56 +0000 (06:41 +0000)]
[Bugfix][Frontend][TF] Fix incorrect calculations in tf SLICE (#4518)
* fix formula for calculating end indices when size[i] == -1
* add a test case for size[i] == -1
* discard expanding dimension of begin_value & end_value since
it is needed only if you pass them as scalars not as tensors.
* discard 'slice_tensor' variable so that implementation matches
the tf parser pattern
masahi [Fri, 24 Jan 2020 05:01:47 +0000 (14:01 +0900)]
add missing nullptr check (#4773)
masahi [Fri, 24 Jan 2020 03:19:48 +0000 (12:19 +0900)]
[TOPI] Remove cpp upsampling and resize op (#4769)
* remove cpp upsampling
* remove cpp resize
Alex Gladkov [Fri, 24 Jan 2020 03:17:45 +0000 (19:17 -0800)]
Fix Tensorflow conv3d pad bug, add non-cubic data and kernel tests (#4772)
hlu1 [Fri, 24 Jan 2020 00:48:25 +0000 (16:48 -0800)]
[Doc] TVM_REGISTER_API -> TVM_REGISTER_GLOBAL (#4768)
Hua Jiang [Thu, 23 Jan 2020 22:05:07 +0000 (14:05 -0800)]
[VTA] Support network which have no unique operator as start/stop name for graph pack. (#4703)
* [VTA] Support network which have no unique operator as start/stop name
for graph pack.
[Issue]
Current vta use 'start' and 'stop' name to define the pack start point
and end point, but this method not work for these network which have
no 2 unique operator as start point and stop point.
[Solution]
In this solution we give 2 addtional parameters start_name_indx and
stop_name_indx to make vta pack logic work with the said network,
for exampl for following networks which have no unique operator,
%0 = nn.add
%1 = nn.conv2d
%2 = nn.batch_norm
%3 = nn.leaky_relu
%4 = nn.add
%5 = nn.conv2d
%6 = nn.batch_norm
%7 = nn.leaky_relu
%8 = nn.add
with this solution we can use following parameter format to make
vta work on it.
relay_prog = graph_pack(
//....
start_name="nn.add",
stop_name="nn.add",
start_name_idx=0,
stop_name_idx=4)
to apply on new network, by printing the network we can get index information like following.
print(mod.astext(show_meta_data=False))
relay_prog = graph_pack(mod
...
start_name="nn.add",
stop_name="nn.add",
start_name_idx=0,
stop_name_idx=4)
* address review comments and fix index count bug
issue:
when do print(mod), the output not only the Call is also have other type
like Var, need add logic to count all except meta.
solution:
add related logic
* address review comments.
* address review comments
* add more detail comments.
Alexander Pivovarov [Thu, 23 Jan 2020 00:47:15 +0000 (16:47 -0800)]
pooling.cc improvements (#4767)
Alex Gladkov [Wed, 22 Jan 2020 13:41:46 +0000 (05:41 -0800)]
Improve CUDA conv2d_transpose_nchw (#4762)
- combine pad and dilate;
- fix for the issue https://discuss.tvm.ai/t/compile-error-for-cuda-target/4164
- fix for the issue https://github.com/apache/incubator-tvm/pull/4472
Alexander Pivovarov [Wed, 22 Jan 2020 06:30:02 +0000 (22:30 -0800)]
Remove run_infer_type duplicates (#4766)
Alexander Pivovarov [Wed, 22 Jan 2020 02:21:10 +0000 (18:21 -0800)]
Fix padding in pooling op (#4738)
Tianqi Chen [Wed, 22 Jan 2020 00:51:07 +0000 (16:51 -0800)]
[REFACTOR] driver.h -> driver_api.h (#4760)
"driver" normally refers to the "main" function.
Rationale: the header exposes set of APIs to drive compilation
and should be named as driver api to best reflect its usage.
Cody Yu [Tue, 21 Jan 2020 21:50:20 +0000 (13:50 -0800)]
[Docs] Bring Your Own Codegen Guide -- Part 2 (#4718)
* BYOC Tutorial -- part 2
* Fix comments
* Address comments
Tianqi Chen [Tue, 21 Jan 2020 21:44:50 +0000 (13:44 -0800)]
[INFO] Add .asf.yaml for github info (#4761)
Tianqi Chen [Tue, 21 Jan 2020 19:58:21 +0000 (11:58 -0800)]
[REFACTOR] top->te (#4759)
Bring up namespace te -- Tensor expression language DSL.
Tianqi Chen [Tue, 21 Jan 2020 04:06:17 +0000 (20:06 -0800)]
[REFACTOR] Establish printer in the source folder (#4752)
* [REFACTOR] Establish printer in the source folder.
As we move towards the unified IR, we will eventually want to build a unified
printers for both relay and TIR.
This PR isolate the printer component into a separate folder in src as a first step.
- Refactored the Doc DSL using Object, clean up APIs.
- Isolate out the meta data into a header.
- move printer into relay_text_printer, add comments about further TODos.
* Rename NodePrinter -> ReprPrinter to distinguish it from other printers
masahi [Mon, 20 Jan 2020 22:32:22 +0000 (07:32 +0900)]
Expose relay BindParamsByName to Python (#4751)
* expose BindParamByName to python
* fixed alpha equal test
Tianqi Chen [Mon, 20 Jan 2020 22:01:31 +0000 (14:01 -0800)]
[REFACTOR][TYPE] Finish move all types to IR. (#4746)
* [REFACTOR][TYPE] Finish move all types to IR.
- Move definition of Ref and TensorType to ir
- Move type_functor.h to public header.
- Rename RefType -> RelayRefType for clarity.
* Add atol
Alex Gladkov [Mon, 20 Jan 2020 01:18:51 +0000 (17:18 -0800)]
Add CUDA conv2d for NHWC layout (#4737)
Tianqi Chen [Sun, 19 Jan 2020 17:53:22 +0000 (09:53 -0800)]
[REFACTOR][CODEGEN] codegen->target, build_module->driver (#4742)
This PR moves the codegen related code into the target folder,
as they are target specific functionalities.
We also adopt the term "compiler driver" in common compiler infra
such as rust, GHC and clang.
As a result, build_module is moved into the driver folder.
HUAN-PING SU [Sun, 19 Jan 2020 06:47:08 +0000 (14:47 +0800)]
Fix demo dockerfile build failed (#4744)
Tianqi Chen [Sun, 19 Jan 2020 06:44:50 +0000 (22:44 -0800)]
[REFACTOR] Establish tir (#4740)
TIR is the new namespace for low-level IR
for tensor-level optimizations and loop transformations.
This PR establishes the namespace and files.
- lowered_func.h,buffer.h,data_layout.h -> tir/buffer.h,tir/data_layout.h,tir/lowered_func.h
- ir.h -> tir/expr.h, tir/stmt.h
- ir_functor_ext.h -> tir/expr_functor.h, tir/stmt_functor.h
Haichen Shen [Sat, 18 Jan 2020 17:05:46 +0000 (09:05 -0800)]
Fix dense (#4728)
Zhi [Sat, 18 Jan 2020 17:04:47 +0000 (09:04 -0800)]
[runtime][refactor] Unify vm and interpreter objects (#4693)
* unify vm and interpreter objects
* move closure back vm
* adt/closure back to vm.adt/vm.closure
* closure base
wpan11nv [Sat, 18 Jan 2020 02:58:11 +0000 (18:58 -0800)]
[CodeGen][CUDA] Improve CUDA vectorizer (#4736)
- Fixes issues to enable fp16 vectorizer. Now correct packing and
unpacking CUDA code will be emitted. Enabled more unit tests.
- Do not emit code to read the first lane from an undef variable
int _3;
_3 = _3 & ~(0x000000ff << 0) | ...
and emit the following code instead:
_3 = (((0x000000ff & (_1 >> 0))+(0x000000ff & (_2 >> 0))) << 0);
Note that nvcc 10.2 is forgiving and emits the same code for both cases.
A warning appears in test_codegen_cuda.py.
Signed-off-by: Wei Pan <weip@nvidia.com>
Liangfu Chen [Fri, 17 Jan 2020 23:23:49 +0000 (07:23 +0800)]
[VTA][TSIM] Enable TSIM CI Testing (#4407)
* Update task_python_vta.sh
* install sbt=1.1.1 with apt-get
* update verilator_opt
* install verilator with major version 4.0
* disable multi-threading for now
* bug fix for correcting uop fetch address in LoadUop module
* bug fix for correcting uop fetch address in LoadUop module
* adjustment to read from dram_offset
* enable USE_THREADS with verilator 4.x
* DEBUG: try avoid core dump with verilator 4.x
* bug fix in LoadUop module
* log mega cycles in tsim
* download cat.png to avoid fetching in each run
* bug fix in LoadUop module
* solve dram_even/sram_even issue
* bug fix
* introduce scalalint in ci
* speedup tsim in ci
* bug fix
* lint scala code before building
* disable multi-threading
* split fsim/tsim script
* update Jenkins settings
* duplicate task_python_vta_fsim.sh as task_python_vta.sh for now
Co-authored-by: Thierry Moreau <tmoreau@octoml.ai>
Tianqi Chen [Fri, 17 Jan 2020 23:11:55 +0000 (15:11 -0800)]
[REFACTOR] Get rid of packed_func_ext. (#4735)
Move the conversion extensions to the specific class definitions
so that we longer need to include packed_func_ext.
Animesh Jain [Fri, 17 Jan 2020 18:21:45 +0000 (10:21 -0800)]
[x86 schedule] Fallback schedule for Int8 depthwise. (#4733)
Tianqi Chen [Fri, 17 Jan 2020 18:07:13 +0000 (10:07 -0800)]
[TOOLS] JSON upgrader to upgrade serialized json. (#4730)
During Unified IR refactor we will change the structure of IRs.
This will cause certain historical modules stored via json no longer
able to be loaded by the current version.
This PR introduces a backward compatible layer to try its best effort
to upgrade json from previous version(this case 0.6) to the current version.
We mainly aim to support update of high-level ir(relay).
Animesh Jain [Fri, 17 Jan 2020 17:49:07 +0000 (09:49 -0800)]
[QNN] Conv2D type checking for kernel per-channel scales. (#4732)
* [QNN] Conv2D type checking for kernel per-channel scales.
* Address commments.
* Address comments.
* - Adding safety checks for downcasts.
Co-authored-by: shoubhik <shoubhikbhatti@gmail.com>
Liangfu Chen [Fri, 17 Jan 2020 17:19:52 +0000 (01:19 +0800)]
[VTA] Update Jenkinsfile for VTA test with TSIM (#4734)
* [VTA] Update Jenkinsfile for VTA test with TSIM
* duplicate task_python_vta.sh multiple copies for now
vexilligera [Fri, 17 Jan 2020 17:18:01 +0000 (17:18 +0000)]
export builtin_fp16 on Windows (#4731)
hlu1 [Fri, 17 Jan 2020 16:58:07 +0000 (08:58 -0800)]
[Relay] Invoke tvm::build from relay compile_engine and interpreter (#4723)
Tianqi Chen [Fri, 17 Jan 2020 04:18:57 +0000 (20:18 -0800)]
[REFACTOR] Polish runtime (#4729)
- Remove operator bool from base object ref macro
- Raitionale: operator bool can be dangerous for sub-classes
that also overloads other operators(e.g. ==).
- If bool is still needed, use explicit operator bool.
- Use absolute include when necessary
- Move type related util to data_type
- Isolate stackvm code from compiler
Animesh Jain [Thu, 16 Jan 2020 23:58:29 +0000 (15:58 -0800)]
[Docs] Convert Layout pass. (#4664)
* [Docs] Convert Layout pass.
* Address comments. Section 3 massaging.
* Address comments.
Tianqi Chen [Thu, 16 Jan 2020 23:23:54 +0000 (15:23 -0800)]
[REFACTOR] top - namespace for Tensor Operation DSL (#4727)
* [REFACTOR] introduce top - Tensor Operation DSL.
Historically we put Tensor, Schedule and compute under the root tvm namespace.
This is no longer a good idea as the project's scope grows larger
than the tensor operation DSL.
This PR introduces top -- a namespace for tensor operational
DSL concepts such as schedule, tensor, compute.
We moved the related files to the new top subfolder.
* Move relevant files into include/tvm/top and src/top
Cody Yu [Thu, 16 Jan 2020 21:58:03 +0000 (13:58 -0800)]
[Docs] Bring Your Own Codegen Guide -- Part 1 (#4602)
* BYOC tutorial: codegen C
* Address comments
* Address comments
* Add build option
* Address comments
* Use TVM_DLL_EXPORT_TYPED_FUNC
Thierry Moreau [Thu, 16 Jan 2020 20:20:42 +0000 (12:20 -0800)]
[Runtime] EdgeTPU runtime for Coral Boards (#4698)
Tianqi Chen [Thu, 16 Jan 2020 18:27:16 +0000 (10:27 -0800)]
[REFACTOR][ARITH] Unified IR, introduce arith subfolder. (#4722)
Spread the arithmetic.h into several components and move
into arith subfolder.
The arith namespace will be used for arithmetic expression
pattern detections and simplifications.
Wei Chen [Thu, 16 Jan 2020 17:01:24 +0000 (09:01 -0800)]
[Relay][Op] Add type check to dense (#4724)
Zhao Wu [Thu, 16 Jan 2020 16:51:53 +0000 (00:51 +0800)]
[CPP RPC] Fix the compile problem of cpp_rpc (#4725)
Wang Yucheng [Thu, 16 Jan 2020 15:33:11 +0000 (23:33 +0800)]
[Relay][Frontend][TFLite] Add parser support for squared difference (#4652)
* [Relay][Frontend][TFLite] Add parser support for squared difference
* fix some error
* fix exp_type
* add comment
Tianqi Chen [Thu, 16 Jan 2020 13:05:04 +0000 (05:05 -0800)]
[COMMUNITY] @FrozenGene -> committer (#4719)
Yizhi Liu [Thu, 16 Jan 2020 06:07:40 +0000 (22:07 -0800)]
[Arith] add SizeVar representing non-neg valued variable in a tensor shape (#4684)
* [arith] add ShapeVar representing non-neg valued variable in a tensor shape
* bounder remover; deal with div in int_set differently
* fix bounder_remover
* migrate unittest to use shape_var
* use tvm.shape_var in integration & relay tests
* add test case; fix Var register
* fix lint
* fix lint again
* add default ShapeVar visitor in Relay
* fix override
* fix ShapeVar visit bug
* revert IntervalSet for shape_var
* remove bound_remover
* remove is_var; use constructor for shapevar/var instead
* ShapeVar -> SizeVar; add constructor comments
* shape_var -> size_var in doc
* tindex -> size
Tianqi Chen [Thu, 16 Jan 2020 04:23:15 +0000 (20:23 -0800)]
[REFACTOR][IR] Introduce include/tvm/target (#4721)
As part of Unified IR infra.
Introduce target folder to store all the compilation target related information.
Tianqi Chen [Thu, 16 Jan 2020 04:23:06 +0000 (20:23 -0800)]
[VERSION] Update mainline version to 0.7.dev0 (#4720)
Tianqi Chen [Thu, 16 Jan 2020 03:44:39 +0000 (19:44 -0800)]
[REFACTOR][FFI] Make more clear naming for C API Type codes. (#4715)
This PR introduces more clear naming prefix for C API type codes
to avoid conflict with other packages.
We also removed TVMArray and TVMType to directly use DLTensor and DLDataType.
Tianqi Chen [Wed, 15 Jan 2020 22:44:14 +0000 (14:44 -0800)]
[REFACTOR] Move support related code to include/tvm/support (#4716)
* [REFACTOR] Move support related code to include/tvm/support
- tvm/logging.h -> tvm/support/logging.h
- remove tvm/base.h, move with into tvm/support/with.h
* src/common -> src/support
Tianqi Chen [Wed, 15 Jan 2020 17:07:22 +0000 (09:07 -0800)]
[REFACTOR][IR] attrs.h -> ir (#4709)
This PR moves attrs.h into the ir folder as it
can serve as a common infra for building ir dats structures.
We also moved common container(FloatImm) into ir/expr.h
Wang Yucheng [Wed, 15 Jan 2020 16:48:08 +0000 (00:48 +0800)]
[Relay][Frontend][TFLite] Add constant input support for elemwise ops (#4666)
* [Relay][Frontend][TFLite] Add constant input support for elemwise ops
* modify in tflite.py
LiangHao [Wed, 15 Jan 2020 14:03:58 +0000 (22:03 +0800)]
[Relay][Frontend][TF] fix _parse_param bug (#4711)
Zhigao [Wed, 15 Jan 2020 06:26:09 +0000 (14:26 +0800)]
link the math library by default (#4713)
Haichen Shen [Wed, 15 Jan 2020 04:03:14 +0000 (20:03 -0800)]
Revert "[Relay][TOPI]Fix meaning of conv2d_transpose output_padding parameter (#4318)" (#4708)
This reverts commit
dcf7fbf1f962569e78c624755b2d612fffa81ada.
Zhi [Wed, 15 Jan 2020 03:35:56 +0000 (19:35 -0800)]
use packed func macro for external codegen (#4710)
Tianqi Chen [Wed, 15 Jan 2020 03:03:26 +0000 (19:03 -0800)]
[REFACTOR][IR] Unify IntImm and UIntImm (#4706)
* [REFACTOR][IR] Unify IntImm and UIntImm
This PR unifies UIntImm and IntImm to simplify the codebase.
Unsigned integer constants will also be stored as IntImm.
For uint constant that does not fit into int64(rare case), we introduced
an intrinsic tvm_big_uint_imm to construct such intgers by its
lower and higher 32bits.
* [REFACTOR][IR] Remove UIntImm to use IntImm
* rename big->large
Tianqi Chen [Tue, 14 Jan 2020 22:36:16 +0000 (14:36 -0800)]
[REFACTOR][IR] Polish ir/type (#4705)
- Use consistent constructor style to construct objects.
- Move env_func to ir as it is mainly used to construct IRs.
- Make docs consistent.
Zhi [Tue, 14 Jan 2020 19:40:00 +0000 (11:40 -0800)]
[relay] Relay annotation and partitioning for external compilers (#4570)
* [relay] Relay annotation and partitioning for codegen
* Add fusion unit test
* fix comments
* Update include/tvm/relay/attrs/annotation.h
Co-Authored-By: 雾雨魔理沙 <lolisa@marisa.moe>
* rebase
* remove annotation helper
* rebase again
Co-authored-by: Cody Yu <comaniac0422@gmail.com>
Co-authored-by: 雾雨魔理沙 <lolisa@marisa.moe>
Tianqi Chen [Tue, 14 Jan 2020 17:09:01 +0000 (09:09 -0800)]
[REFACTOR][IR] Initialize Unified IR Pass Infra. (#4702)
Move the relay's pass Infra to ir.
Keep FunctionPass in relay as it is local to the dialect.
Tianqi Chen [Tue, 14 Jan 2020 04:16:03 +0000 (20:16 -0800)]
[REFACTOR][IR] Move error.h into ir (#4701)
We will use a single ErrorReporter to report errors during
program transformations.
Zhi Chen [Mon, 13 Jan 2020 22:40:26 +0000 (22:40 +0000)]
fix RemoveUnusedFunctions pass
Liangfu Chen [Tue, 14 Jan 2020 02:39:56 +0000 (10:39 +0800)]
[VTA] Fix an issue in updating uop_idx in the TensorGemm module (#4694)
Tianqi Chen [Tue, 14 Jan 2020 00:18:01 +0000 (16:18 -0800)]
[REFACTOR][IR] Unified IR IRModule structure. (#4699)
This PR brings relay::Module as the unified IRModule structure.
IRModule will be used as the basic unit for transformations
through out the stack.
- Rename relay::Module -> IRModule
- Move relay/module.h -> ir/module.h
- ModuleNode::FromExpr -> IRModule::FromExpr
- FromText -> IRModule::FromText
Christian Clauss [Sun, 12 Jan 2020 03:08:20 +0000 (04:08 +0100)]
GitHub Action lint Python code for syntax errors (#4688)
* GitHub Action lint Python code for syntax errors
https://flake8.pycqa.org/en/latest/user/error-codes.html
On the flake8 test selection, this PR does _not_ focus on "_style violations_" (the majority of flake8 error codes that [__psf/black__](https://github.com/psf/black) can autocorrect). Instead these tests are focus on runtime safety and correctness:
* E9 tests are about Python syntax errors usually raised because flake8 can not build an Abstract Syntax Tree (AST). Often these issues are a sign of unused code or code that has not been ported to Python 3. These would be compile-time errors in a compiled language but in a dynamic language like Python they result in the script halting/crashing on the user.
* F63 tests are usually about the confusion between identity and equality in Python. Use ==/!= to compare str, bytes, and int literals is the classic case. These are areas where __a == b__ is True but __a is b__ is False (or vice versa). Python >= 3.8 will raise SyntaxWarnings on these instances.
* F7 tests logic errors and syntax errors in type hints
* F82 tests are almost always _undefined names_ which are usually a sign of a typo, missing imports, or code that has not been ported to Python 3. These also would be compile-time errors in a compiled language but in Python a __NameError__ is raised which will halt/crash the script on the user.
* Force a retest
* Rename start_rpc_server_to_tracker.py to start_rpc_server_to_tracker.sh
This is a bash file, not a Python file.
Josh Fromm [Sat, 11 Jan 2020 22:04:47 +0000 (14:04 -0800)]
[Relay/Topi][Op] Conv1D (#4639)
* added conv1d operators to topi.
* Started to add python testing.
* Added python conv1d implementation for testing.
* Wrote test but need to add cuda schedule :(
* Cuda schedules working for both conv1d layouts.
* All topi tests passing.
* Formatting topi.
* Removed pad_method option as its probably overkill.
* Added relay op definition of conv1d.
* End2end conv1d working with onnx.
* Lint fixes.
* Formatting fixes.
* Rebase fix.
* Switched to array based attributes for consistency across convs.
* Improved onnx parsing and testing for convolutions.
* lint fix
* Tiny tweak.
* Bug fix
* Rebase fix.
* Add group ignore to onnx conv1d frontend.
* Unified MakeConv and fixed documentation.
* improved autopadding
* Addressed feedback and simplified onnx frontend.
* Format fix.
* Basic X86 NCW schedule working.
* Added nwc schedule.
* fixed name
* Added more tests and basic x86 schedules.
* Format fix.
* Added non power of two shape tests.
Tianqi Chen [Sat, 11 Jan 2020 21:02:29 +0000 (13:02 -0800)]
[REFACTOR][IR] Unified IR Primitive Op and Registry (#4687)
This PR migrates relay's Op into the ir folder.
Op and its registry provides an useful mechanism to
store any attribute meta-data of an operator include
function signatures, lowering rules, side effect etc.
These features are not only useful for Relay, but also needed in the low-level IR.
At the current moment, intrinsic functions in the low-level IR are simply
represented by a string. This means we cannot type-check the low-level IR
when the type does not meet the constraint, nor can we obtain further
information such as side-effect and read write relation of these intrinsics
wrt to arguments.
Op will be used as the way to handle primitive ops(in DL terminology)
(builtin intrinsics or in compiler terminology).
We will perform follow-up refactors to make low-level CallNode
take Op as the function argument.
Wuwei Lin [Sat, 11 Jan 2020 20:35:54 +0000 (15:35 -0500)]
[Tutorial] Deploy Quantized Model on CUDA (#4667)
* [Tutorial] Deploy Quantized Model on CUDA
* update
* update
* address comments
Christian Clauss [Sat, 11 Jan 2020 19:30:09 +0000 (20:30 +0100)]
Update and rename start_rpc_server_to_tracker.py to start_rpc_server_to_tracker.sh (#4689)
This is a shell file, not a Python file.
Tianqi Chen [Sat, 11 Jan 2020 06:54:16 +0000 (22:54 -0800)]
[REFACTOR][IR] Allow Module to store BaseFunc. (#4678)
Under the unified IR. We will allow a single IRModule
to store different function variants, such as relay::Function,
ExternFunc, and low-level function.
This PR changes relay::Function -> BaseFunc in the module file
to support multiple function variants.
Christian Clauss [Sat, 11 Jan 2020 05:39:04 +0000 (06:39 +0100)]
Use ==/!= to compare str, bytes, and int literals (#4686)
Identity is not the same thing as equality in Python so use ==/!= to compare str, bytes, and int literals. In Python >= 3.8, these instances will raise __SyntaxWarnings__ so it is best to fix them now. https://docs.python.org/3.8/whatsnew/3.8.html#porting-to-python-3-8
% __python__
```
>>> dtype = "float"
>>> dtype += "16"
>>> dtype == "float16"
True
>>> dtype is "float16"
False
>>> 0 == 0.0
True
>>> 0 is 0.0
False
```
Christian Clauss [Sat, 11 Jan 2020 05:24:51 +0000 (06:24 +0100)]
Fix Python syntax error AGAIN in start_rpc_server_to_tracker.py (#4685)
#4682 Tried to fix a Python syntax error but did not go far enough because there are _three sets_ of embedded quotes.
This PR solves the syntax error by using Python's triple quoted strings on the outside and then double quotes in the middle and then single quotes on the inside.
Yong Wu [Sat, 11 Jan 2020 03:52:52 +0000 (19:52 -0800)]
[TOPI][RELAY][OP] add op crop_and_resize (#4417)
* [TOPI][RELAY][OP] add op crop_and_resize
* fix pylint
* incorporate comments
* fix ci
Tianqi Chen [Sat, 11 Jan 2020 03:27:00 +0000 (19:27 -0800)]
[REFACTOR][IR] Initialize Unified IR Expr Data Structure (#4673)
This PR moves a few base types from relay and low-level Expr into the ir sub-folder.
These classes will serve as a common type system across the stack.
Rationale:
- PrimExpr for low-level expressions
- RelayExpr for advanced features, including Function definition.
- Introduce BaseFunc to host all functions, including future PrimFunc(low-level expr functions, subject to discussion).
This is a minimum change we can do to unify the classes into a common hierarchy.
The main data structure that are variant specific will still be kept in the sub-namespaces.
We only include classes that is needed to allow a common Module class.
- BaseFunc
- GlobalVar
- Type definition part of ADT
We will only need the BaseFunc and their checked_type to decide the calling convention
across the function variants.
Zhi [Sat, 11 Jan 2020 00:44:16 +0000 (16:44 -0800)]
[REFACTOR] Replace TensorObj and TensorValue with NDArray (#4643)
* replace TensorObj and TensorValue with NDArray
* NodeBase to Object in Python
* rebase
abergeron [Sat, 11 Jan 2020 00:24:52 +0000 (19:24 -0500)]
[Relay][TOPI]Fix meaning of conv2d_transpose output_padding parameter (#4318)
* Add output_padding to generic
* Add output_padding to the reference impl
* Add output_padding to arm_cpu
* Add output_padding to the test
* Add output_padding for cuda
* Add output_padding for x86
* Make use of the new output_padding argument in Relay
* Adjust conv2d_transpose Relay test
* Fix lint errors
* Fix the VTA declaration of conv2d_transpose
* support for output padding in conv2d transpose
* some output padding will break IR pass
* Fix new conv2d_transpose test
* Update tophub
* Fix conv1d output_padding too.
* Fix the conv1d_transpose reference function.
* Fix the cuda impl
* fix the topi test for conv1d
* Update the versions in tophub.py
Co-authored-by: Thierry Moreau <tmoreau@octoml.ai>
yuliujq [Sat, 11 Jan 2020 00:21:57 +0000 (08:21 +0800)]
[Bugfix] fskip of EliminateCommonSubexpr cannot always return false (#4620)
* 'fskip' will not always return false
fskip returns false at the end of PackedFunc, discards return true in 'cast' case
* Update build_module.cc
Christian Clauss [Fri, 10 Jan 2020 23:54:45 +0000 (00:54 +0100)]
Fix Python syntax error in start_rpc_server_to_tracker.py (#4682)
[flake8](http://flake8.pycqa.org) testing of https://github.com/apache/incubator-tvm on Python 3.8.0
$ __flake8 . --count --select=E9,F63,F7,F82 --show-source --statistics__
```
./apps/vta_rpc/start_rpc_server_to_tracker.py:18:18: E999 SyntaxError: invalid syntax
PROJROOT="$( cd "$( dirname "${BASH_SOURCE[0]}" )/../../" && pwd )"
^
```
Ina Dobreva [Fri, 10 Jan 2020 22:57:16 +0000 (22:57 +0000)]
[Relay][Frontend][TFlite] Add parses support for SLICE (#4502)
* [Relay][Frontend][TFlite] Add parses support for SLICE
* TFlite 1.13: convertor gives nonsense output when size[i]==-1
* TF parser: SLICE need fixing for size[i]==-1 -> gives wrong output
bcs of indices
* Set end[i] = input_tensor_shape[i] as suggested in PR review
* Add another test to cover size=-1 case
Christian Clauss [Fri, 10 Jan 2020 22:54:27 +0000 (23:54 +0100)]
os.path --> osp to match the import (#4681)
Christian Clauss [Fri, 10 Jan 2020 22:36:05 +0000 (23:36 +0100)]
GitHub actions/checkout@v1 --> v2 (#4680)
https://github.com/actions/checkout/releases
abergeron [Fri, 10 Jan 2020 22:04:15 +0000 (17:04 -0500)]
Also package core.rly (#4679)
Tianqi Chen [Fri, 10 Jan 2020 22:01:27 +0000 (14:01 -0800)]
[CI] Bump to use the new cpu image (#4677)
戚海涛 [Fri, 10 Jan 2020 19:00:10 +0000 (03:00 +0800)]
fix topi.nn.global_pool layout="NHWC" (#4656)
* Update topi.cc
fix topi.nn.global_pool layout="NHWC"
* add topi.nn.global_pool layout=NHWC test
Tianqi Chen [Fri, 10 Jan 2020 18:29:44 +0000 (10:29 -0800)]
[CI] Update deps for chisel (#4675)
Zhao Wu [Fri, 10 Jan 2020 17:01:00 +0000 (01:01 +0800)]
[CodeGen] Generate blob use LLVM directly (#4657)
Liangfu Chen [Fri, 10 Jan 2020 16:42:12 +0000 (00:42 +0800)]
[VTA] Update docker for TSIM based simulation (#4674)
Josh Fromm [Fri, 10 Jan 2020 09:29:01 +0000 (01:29 -0800)]
Added pool autopadding and simplified parsers. (#4672)
Xingyu Zhou [Fri, 10 Jan 2020 04:22:45 +0000 (20:22 -0800)]
download fallback config file for search from tophub if it does not exist (#4671)
Tianqi Chen [Thu, 9 Jan 2020 23:30:23 +0000 (15:30 -0800)]
[REFACTOR][IR] tvm::Expr -> PrimExpr(Primitive Expr) (#4669)
* [REFACTOR][IR] tvm::Expr -> PrimExpr(Primitive Expr)
As part of unified IR, we will need to unify relay::Expr
and the current tvm::Expr under the same base type.
From the techinical point of view. tvm::Expr is a "primitive"
expression that only contains POD types and handles and does
not do life-cycle management.
This PR renames Expr->PrimExpr to clarify that.
We will send a subsequent PR to introduce the base expr class.
* Remove legacy VarExpr and ExprHash/Equal
Trevor Morris [Thu, 9 Jan 2020 19:06:38 +0000 (11:06 -0800)]
Use int for endch to fix portability issues regarding signed/unsigned char (#4668)
Ina Dobreva [Thu, 9 Jan 2020 18:46:26 +0000 (18:46 +0000)]
[Relay][Frontend][TFlite] Add parses support for unary elemwise ops (#4634)
* [Relay][Frontend][Tflite] Add parses support for unary elemwise ops
* Add generic method to convert unary functions: abs, exp, ceil, floor
log, sin, cos, sqrt, rsqrt, neg
* Add relevant tests
* Delete excessive underscores as requested in PR review
* Change parameter name as suggested in PR review
Tianqi Chen [Thu, 9 Jan 2020 17:12:56 +0000 (09:12 -0800)]
[REFACTOR] relay::Module Def -> TypeDef (#4665)
* [REFACTOR] relay::Module Def -> TypeDef
The term Def was not very clear about what is the object of interest(could be function def or type def).
Changes the term to TypeDef to be more explicit.
* Update include/tvm/relay/module.h
Co-Authored-By: Wei Chen <ipondering.weic@gmail.com>
Co-authored-by: Wei Chen <ipondering.weic@gmail.com>
Josh Fromm [Thu, 9 Jan 2020 09:43:25 +0000 (01:43 -0800)]
[Relay/Topi][Op] 1D Pooling (#4663)
* Added 1D pooling to Topi
* Added 1D pooling relay op and tests.
* Added onnx parsing and tests for maxpool1d and averagepool1d
* formatting
* moved partial import.
* Fixed typo.
Haichen Shen [Thu, 9 Jan 2020 01:15:55 +0000 (17:15 -0800)]
[Autotvm] Use VM compile to extract autotvm tasks (#4328)
* [AutoTVM] Use vm compile in extracting task from relay
* update
* restructure vm compiler to reduce task extraction time
* x
* fix
* update doc
* udpate doc
* lint
Tianqi Chen [Thu, 9 Jan 2020 01:02:12 +0000 (17:02 -0800)]
[CI] Recover Windows Mac Build CI via Github Actions (#4662)
* [RUNTIME] Fix windows build after the latest dso module change.
Switch to shared_ptr to get around a problem in latest MSVC.
* [CI] Add github action for win mac build.