Roman Lebedev [Tue, 7 May 2019 12:28:08 +0000 (12:28 +0000)]
[llvm-exegesis] BenchmarkRunner::runConfiguration(): write small snippet to memory
It was previously writing this temporary snippet to file,
then reading it back, but leaving the tmp file in place.
This is both unefficient, and results in huge garbage pileup
in /tmp.
One would have thought it would have been caught during D60317..
llvm-svn: 360138
George Rimar [Tue, 7 May 2019 12:10:51 +0000 (12:10 +0000)]
[yaml2obj] - Allow setting st_value explicitly for Symbol.
In some cases it is useful to explicitly set symbol's st_name value.
For example, I am using it in a patch for LLD to remove the broken
binary from a test case and replace it with a YAML test.
Differential revision: https://reviews.llvm.org/D61180
llvm-svn: 360137
Krasimir Georgiev [Tue, 7 May 2019 11:39:35 +0000 (11:39 +0000)]
Revert "[TableGen] Fix a typo"
Summary:
This reverts commit r360106.
The revisioin causes llvm-tblgen to hang while generating info for
RISCV.td. The root cause might be in the RISCV.td definition but I don't
know enough about this to investigate further.
Command that starts hangning after r360106:
`llvm-build/bin/llvm-tblgen -I llvm/include -I llvm/tools/clang/include -I llvm/lib/Target/RISCV -gen-instr-info llvm/lib/Target/RISCV/RISCV.td`
Reviewers: sammccall, yan_luo, craig.topper, gribozavr
Reviewed By: gribozavr
Subscribers: PkmX, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61632
llvm-svn: 360136
Diana Picus [Tue, 7 May 2019 11:39:30 +0000 (11:39 +0000)]
[ARM GlobalISel] Widen G_SELECT operands
...except for the condition operand.
llvm-svn: 360135
Simon Pilgrim [Tue, 7 May 2019 11:17:39 +0000 (11:17 +0000)]
[X86][AVX] Fold concat(packus(),packus()) -> packus(concat(),concat()) (PR34773)
Basic "revectorization" combine, we can probably do more opcodes here but it can be a tricky cost-benefit depending on where the subvectors came from - but this case helps shuffle combining.
llvm-svn: 360134
Simon Pilgrim [Tue, 7 May 2019 11:09:16 +0000 (11:09 +0000)]
Fixed "Value stored to 'Opc' is never read" warning. NFCI.
llvm-svn: 360133
Balazs Keri [Tue, 7 May 2019 10:55:11 +0000 (10:55 +0000)]
[ASTImporter] Import TemplateParameterLists in function templates.
Summary: Correct missing import of TemplateParameterList in function decl.
Reviewers: martong, a.sidorin, shafik
Reviewed By: martong
Subscribers: rnkovacs, dkrupp, Szelethus, gamesh411, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D60461
llvm-svn: 360132
Simon Pilgrim [Tue, 7 May 2019 10:50:11 +0000 (10:50 +0000)]
[X86] Reduce scope of variables where possible. NFCI.
Fixes cppcheck warnings.
llvm-svn: 360131
Diana Picus [Tue, 7 May 2019 10:48:01 +0000 (10:48 +0000)]
[ARM GlobalISel] Widen G_INTTOPTR/G_PTRTOINT
We actually have a couple of G_PTRTOINT to s8 when building clang, so
we should do something about them.
llvm-svn: 360130
Fangrui Song [Tue, 7 May 2019 10:40:26 +0000 (10:40 +0000)]
[ELF] Reorder BitcodeFiles.empty() to call thinLTOCreateEmptyIndexFiles() in only one place
It makes the --plugin-opt=obj-path= and --plugin-opt=thinlto-index-only=
behavior more consistent - the files will be created in the
BitcodeFiles.empty() case, but I assume whether it behaves this way is
not required by anyone.
LTOObj->run() cannot run with empty BitcodeFiles. There would be an error:
ld.lld: error: No available targets are compatible with triple ""
Differential Revision: https://reviews.llvm.org/D61635
llvm-svn: 360129
Simon Pilgrim [Tue, 7 May 2019 10:30:22 +0000 (10:30 +0000)]
Fix uninitialized variable warning. NFCI.
This also fixes a scan-build "array subscript is undefined" warning.
llvm-svn: 360128
Diana Picus [Tue, 7 May 2019 10:11:57 +0000 (10:11 +0000)]
[ARM GlobalISel] Widen G_GEP index operand
llvm-svn: 360127
Peter Smith [Tue, 7 May 2019 09:31:14 +0000 (09:31 +0000)]
[libFuzzer] Increase timeouts on fork tests and skip one on aarch64
The tests fork.text, fork.sigusr.test and fork-ubsan.test intermittently
fail on the aarch64 buildbots. Input gathered from the fork.sigusr.test
implies that when the builder is under load the timeout value is not
sufficient. The fork-ubsan.test doesn't have a timeout and I think is not
always finding the error after 10000 runs so I've marked it as unsupported
for now.
Differential Revision: https://reviews.llvm.org/D61449
llvm-svn: 360126
Orlando Cazalet-Hyams [Tue, 7 May 2019 09:30:55 +0000 (09:30 +0000)]
Test commit access
llvm-svn: 360125
Roman Lebedev [Tue, 7 May 2019 09:21:13 +0000 (09:21 +0000)]
[llvm-exegesis] InstructionBenchmark::writeYamlTo(): don't forget to flush()
This *APPEARS* to fix a *very* infuriating issue of Yaml's being corrupted,
partially written, truncated. Or at least i'm not seeing the issue
on a new benchmark sweep.
The issue is somewhat rare, happens maybe once in 1000 benchmarks.
Which means there are up to hundreds of broken benchmarks
for a full x86 sweep in a single mode.
llvm-svn: 360124
Nicolai Haehnle [Tue, 7 May 2019 09:19:09 +0000 (09:19 +0000)]
AMDGPU: Verify that SOP2/SOPC instructions have at most one immediate operand
Summary:
No test case because I don't know of a way to trigger this, but I
accidentally caused this to fail while working on a different change.
Change-Id: I8015aa447fe27163cc4e4902205a203bd44bf7e3
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61490
llvm-svn: 360123
Sam McCall [Tue, 7 May 2019 09:05:15 +0000 (09:05 +0000)]
[Tooling] Don't mmap the JSONCompilationDatabase, it's not correct for long-lived processes.
Reviewers: ilya-biryukov
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D61631
llvm-svn: 360122
Sam McCall [Tue, 7 May 2019 08:30:32 +0000 (08:30 +0000)]
[clangd] Oops, switchSourceHeader still needs to return a URI.
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D61630
llvm-svn: 360121
Leonard Chan [Tue, 7 May 2019 08:12:28 +0000 (08:12 +0000)]
[Sema] Add missing VisitMacroQualifiedTypeLoc to TypeSpecLocFiller
To hopefully fix greenbot failures
llvm-svn: 360120
Sam McCall [Tue, 7 May 2019 07:55:35 +0000 (07:55 +0000)]
[clangd] switchSourceHeader uses null not empty string as sentinel.
As far as I can see, only theia actually implements this, and it expects null.
llvm-svn: 360119
Sam McCall [Tue, 7 May 2019 07:45:41 +0000 (07:45 +0000)]
[clangd] Add test that r360116 accidentally fixed a duplicate-edits bug in rename. NFC
llvm-svn: 360118
Richard Smith [Tue, 7 May 2019 07:36:07 +0000 (07:36 +0000)]
Improve function / variable disambiguation.
Keep looking for decl-specifiers after an unknown identifier. Don't
issue diagnostics about an error type specifier conflicting with later
type specifiers.
llvm-svn: 360117
Sam McCall [Tue, 7 May 2019 07:11:56 +0000 (07:11 +0000)]
[clangd] Move Rename into its own file, and add unit test. NFC
Reviewers: kadircet
Subscribers: mgorny, ilya-biryukov, MaskRay, jkorous, arphaman, jfb, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D61596
llvm-svn: 360116
Sam McCall [Tue, 7 May 2019 07:05:47 +0000 (07:05 +0000)]
[clangd] add CLANG_ENABLE_CLANGD option to build clangd. Require threads.
Reviewers: gribozavr
Subscribers: mgorny, ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D61518
llvm-svn: 360115
Adam Balogh [Tue, 7 May 2019 06:16:02 +0000 (06:16 +0000)]
[clang-tidy] Extend bugprone-sizeof-expression to check sizeof(pointers to structures)
Accidentally taking the size of a struct-pointer type or a value of this type
is more common than explicitly using the & operator for the value. This patch
extends the check to include these cases.
Differential Revision: https://reviews.llvm.org/D61260
llvm-svn: 360114
Fangrui Song [Tue, 7 May 2019 04:26:05 +0000 (04:26 +0000)]
[PPC64] toc-indirect to toc-relative relaxation
This is based on D54720 by Sean Fertile.
When accessing a global symbol which is not defined in the translation unit,
compilers will generate instructions that load the address from the toc entry.
If the symbol is defined, non-preemptable, and addressable with a 32-bit
signed offset from the toc pointer, the address can be computed
directly. e.g.
addis 3, 2, .LC0@toc@ha # R_PPC64_TOC16_HA
ld 3, .LC0@toc@l(3) # R_PPC64_TOC16_LO_DS, load the address from a .toc entry
ld/lwa 3, 0(3) # load the value from the address
.section .toc,"aw",@progbits
.LC0: .tc var[TC],var
can be relaxed to
addis 3,2,var@toc@ha # this may be relaxed to a nop,
addi 3,3,var@toc@l # then this becomes addi 3,2,var@toc
ld/lwa 3, 0(3) # load the value from the address
We can delete the test ppc64-got-indirect.s as its purpose is covered by
newly added ppc64-toc-relax.s and ppc64-toc-relax-constants.s
Reviewed By: ruiu, sfertile
Differential Revision: https://reviews.llvm.org/D60958
llvm-svn: 360112
Craig Topper [Tue, 7 May 2019 04:25:24 +0000 (04:25 +0000)]
[FastISel][X86] If selectFNeg fails, fall back to SelectionDAG not treating it as an fsub.
Summary:
If fneg lowering for fsub -0.0, x fails we currently fall back to treating it as an fsub. This has different behavior for nans than the xor with sign bit trick we normally try to do. On X86, the xor trick for double fails fast-isel in 32-bit mode with sse2 due to 64 bit integer types not being available. With -O2 we would always use an xorpd for this case. If we use subsd, this creates an observable behavior difference between -O0 and -O2. So fall back to SelectionDAG if we can't fast-isel it, that way SelectionDAG will use the xorpd.
I believe this patch is restoring the behavior prior to r345295 from last October. This was missed then because our fast isel case in 32-bit mode aborted fast-isel earlier for another reason. But I've added new tests to cover that.
Reviewers: andrew.w.kaylor, cameron.mcinally, spatel, efriedma
Reviewed By: cameron.mcinally
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61622
llvm-svn: 360111
Sam Clegg [Tue, 7 May 2019 03:53:16 +0000 (03:53 +0000)]
[WebAssembly] Add more test coverage for reloctions against section symbols
The only known user of this relocation type and symbol type is
the debug info sections, but we were not testing the `--relocatable`
output path.
This change adds a minimal test case to cover relocations against
section symbols includes `--relocatable` output.
Differential Revision: https://reviews.llvm.org/D61623
llvm-svn: 360110
Leonard Chan [Tue, 7 May 2019 03:20:17 +0000 (03:20 +0000)]
Recommit r359859 "[Attribute/Diagnostics] Print macro if definition is an attribute declaration"
Updated with fix for read of uninitialized memory.
llvm-svn: 360109
Fangrui Song [Tue, 7 May 2019 02:06:37 +0000 (02:06 +0000)]
[DebugInfo] Delete TypedDINodeRef
TypedDINodeRef<T> is a redundant wrapper of Metadata * that is actually a T *.
Accordingly, change DI{Node,Scope,Type}Ref uses to DI{Node,Scope,Type} * or their const variants.
This allows us to delete many resolve() calls that clutter the code.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D61369
llvm-svn: 360108
Fangrui Song [Tue, 7 May 2019 01:39:37 +0000 (01:39 +0000)]
[SanitizerCoverage] Use different module ctor names for trace-pc-guard and inline-8bit-counters
Fixes the main issue in PR41693
When both modes are used, two functions are created:
`sancov.module_ctor`, `sancov.module_ctor.$LastUnique`, where
$LastUnique is the current LastUnique counter that may be different in
another module.
`sancov.module_ctor.$LastUnique` belongs to the comdat group of the same
name (due to the non-null third field of the ctor in llvm.global_ctors).
COMDAT group section [ 9] `.group' [sancov.module_ctor] contains 6 sections:
[Index] Name
[ 10] .text.sancov.module_ctor
[ 11] .rela.text.sancov.module_ctor
[ 12] .text.sancov.module_ctor.6
[ 13] .rela.text.sancov.module_ctor.6
[ 23] .init_array.2
[ 24] .rela.init_array.2
# 2 problems:
# 1) If sancov.module_ctor in this module is discarded, this group
# has a relocation to a discarded section. ld.bfd and gold will
# error. (Another issue: it is silently accepted by lld)
# 2) The comdat group has an unstable name that may be different in
# another translation unit. Even if the linker allows the dangling relocation
# (with --noinhibit-exec), there will be many undesired .init_array entries
COMDAT group section [ 25] `.group' [sancov.module_ctor.6] contains 2 sections:
[Index] Name
[ 26] .init_array.2
[ 27] .rela.init_array.2
By using different module ctor names, the associated comdat group names
will also be different and thus stable across modules.
Reviewed By: morehouse, phosek
Differential Revision: https://reviews.llvm.org/D61510
llvm-svn: 360107
Yan Luo [Tue, 7 May 2019 01:07:46 +0000 (01:07 +0000)]
[TableGen] Fix a typo
Check "Big" instead of "Small" in the second condition.
Differential Revision: https://reviews.llvm.org/D61605
llvm-svn: 360106
Alex Langford [Tue, 7 May 2019 01:03:40 +0000 (01:03 +0000)]
[Breakpoint] Remove unused dependency
The CPlusPlus Language plugin is unused in lldbBreakpoint. We should just remove
it.
A great follow up to this change would be to remove the dependency on the ObjC
language plugin, but that is actually used and requires some refactoring.
llvm-svn: 360105
Eric Christopher [Tue, 7 May 2019 00:45:47 +0000 (00:45 +0000)]
Fix typo in risc-v register aliases.
Patch by John.
Differential Revision: https://reviews.llvm.org/D61464
llvm-svn: 360104
Cameron McInally [Tue, 7 May 2019 00:10:12 +0000 (00:10 +0000)]
Refactor UnaryOperator class
The UnaryOperator class was originally placed in llvm/IR/Instructions.h, with the other UnaryInstructions. However, I'm now thinking that it makes more sense for it to live in llvm/IR/InstrTypes.h, with BinaryOperator. It is more similar to BinaryOperator than any of the other UnaryInstructions.
NFCI
Differential Revision: https://reviews.llvm.org/D61614
llvm-svn: 360103
Craig Topper [Mon, 6 May 2019 23:57:42 +0000 (23:57 +0000)]
[X86] Use extended vector register classes in getRegForInlineAsmConstraint to support x/y/zmm16-31 when the type is mismatched.
The FR32/FR64/VR128/VR256 register classes don't contain the upper 16 registers. For most cases we use the default implementation which will find any register class that contains the register in question if the VT is legal for the register class. But if the VT is i32 or i64, we won't find a matching register class and will instead up in the code modified in this patch.
If the requested register is x/y/zmm16-31 we weren't returning a register class that contains those registers and will hit an assertion in the caller.
To fix this, I've changed to use the extended register class instead. I don't believe we need a subtarget check to see if avx512 is enabled. The default implementation just pick whatever register class it finds first. I checked and we currently pick FR32X for XMM0 with an f32 type using the default implementation regardless of whether avx512 is enabled. So I assume its it is ok to do the same for i32.
Differential Revision: https://reviews.llvm.org/D61457
llvm-svn: 360102
Amy Huang [Mon, 6 May 2019 23:37:03 +0000 (23:37 +0000)]
Fix bug in getCompleteTypeIndex in codeview debug info
Summary:
When there are multiple instances of a forward decl record type, only the first one is emitted with a type index, because
the type is added to a map with a null type index. Avoid this by reordering so that forward decl types aren't added to the map.
Reviewers: rnk
Subscribers: aprantl, hiraditya, arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61460
llvm-svn: 360101
Petr Hosek [Mon, 6 May 2019 23:24:17 +0000 (23:24 +0000)]
[Clang][NewPM] Don't bail out if the target machine is empty
This matches the behavior of the old pass manager. There are some
targets that don't have target machine at all (e.g. le32, spir) which
whose tests would never run with new pass manager. Similarly, we would
need to disable tests for targets that are disabled.
Differential Revision: https://reviews.llvm.org/D58374
llvm-svn: 360100
Eli Friedman [Mon, 6 May 2019 23:21:59 +0000 (23:21 +0000)]
[ARM] Glue register copies to tail calls.
This generally follows what other targets do. I don't completely
understand why the special case for tail calls existed in the first
place; even when the code was committed in r105413, call lowering didn't
work in the way described in the comments.
Stack protector lowering breaks if the register copies are not glued to
a tail call: we have to insert the stack protector check before the tail
call, and we choose the location based on the assumption that all
physical register dependencies of a tail call are adjacent to the tail
call. (See FindSplitPointForStackProtector.) This is sort of fragile,
but I don't see any reason to break that assumption.
I'm guessing nobody has seen this before just because it's hard to
convince the scheduler to actually schedule the code in a way that
breaks; even without the glue, the only computation that could actually
be scheduled after the register copies is the computation of the call
address, and the scheduler usually prefers to schedule that before the
copies anyway.
Fixes https://bugs.llvm.org/show_bug.cgi?id=41417
Differential Revision: https://reviews.llvm.org/D60427
llvm-svn: 360099
Eric Fiselier [Mon, 6 May 2019 23:14:31 +0000 (23:14 +0000)]
Remove unneeded <algorithm> include in cmath.
It's a remnant from an earlier version of the lerp change
and is unneeded.
llvm-svn: 360098
Craig Topper [Mon, 6 May 2019 23:09:09 +0000 (23:09 +0000)]
[FastISel] Pass the fneg input operand to hasTrivialKill in FastISel::selectFNeg.
We're trying to calculate the kill flag for OpReg which is the input so we need to pass the input here.
llvm-svn: 360097
Craig Topper [Mon, 6 May 2019 23:08:17 +0000 (23:08 +0000)]
[X86] Add test case to show that we don't set the kill flag properly for fast isel handling of fneg.
llvm-svn: 360096
Stanislav Mekhanoshin [Mon, 6 May 2019 22:49:45 +0000 (22:49 +0000)]
[AMDGPU] gfx1010 verifier changes
Differential Revision: https://reviews.llvm.org/D61521
llvm-svn: 360095
Stanislav Mekhanoshin [Mon, 6 May 2019 22:27:05 +0000 (22:27 +0000)]
[AMDGPU] gfx1010: prefer V_MUL_LO_U32 over V_MUL_LO_I32
GFX10 deprecates v_mul_lo_i32 instruction, so choose u32 form for
all targets.
Differential Revision: https://reviews.llvm.org/D61525
llvm-svn: 360094
Philip Reames [Mon, 6 May 2019 22:25:59 +0000 (22:25 +0000)]
[Tests] Add tests for optimized lowerings of element.unordered.atomic memset/memcmove/memcopy
llvm-svn: 360093
Philip Reames [Mon, 6 May 2019 22:16:55 +0000 (22:16 +0000)]
[Tests] Rename tests before adding new ones
llvm-svn: 360092
Philip Reames [Mon, 6 May 2019 22:12:07 +0000 (22:12 +0000)]
[Tests] Autogen a test in advance of updates
llvm-svn: 360091
Philip Reames [Mon, 6 May 2019 22:09:31 +0000 (22:09 +0000)]
Fix pr33010, a 2 year old crashing regression
The problem was that we were creating a CMOV64rr <TargetFrameIndex>, <TargetFrameIndex>. The entire point of a TFI is that address code is not generated, so there's no way to legalize/lower this. Instead, simply prevent it's creation.
Arguably, we shouldn't be using *Target*FrameIndices in StatepointLowering at all, but that's a much deeper change.
llvm-svn: 360090
Leonard Chan [Mon, 6 May 2019 22:09:12 +0000 (22:09 +0000)]
[Sema] Fix for P41774 where `ExpectNoDerefChunk` is assigned twice
llvm-svn: 360089
Craig Topper [Mon, 6 May 2019 22:04:26 +0000 (22:04 +0000)]
[X86] Add more test cases for fast-isel handling of fneg.
The fneg double case is falling back to a subsd in 32-bit mode if you write a test that doesn't trigger a fast-isel abort on the return value.
The subsd lowering has different behavior with respect to nans than using an xor. This is inconsisent with what we would do in SelectionDAG
and can lead to differences between -O0 and -O2.
llvm-svn: 360088
Stanislav Mekhanoshin [Mon, 6 May 2019 21:57:02 +0000 (21:57 +0000)]
[AMDGPU] gfx1010 memory legalizer
Differential Revision: https://reviews.llvm.org/D61535
llvm-svn: 360087
Jordan Rupprecht [Mon, 6 May 2019 21:55:05 +0000 (21:55 +0000)]
Revert "Re-commit r357452: SimplifyCFG SinkCommonCodeFromPredecessors: Also sink function calls without used results (PR41259)"
This reverts r357452 (git commit
21eb771dcb5c11d7500fa6ad551c97a921997f05).
This was causing strange optimization-related test failures on an internal test. Will followup with more details offline.
llvm-svn: 360086
Craig Topper [Mon, 6 May 2019 21:39:51 +0000 (21:39 +0000)]
[X86] Remove the suffix on vcvt[u]si2ss/sd register variants in assembly printing.
We require d/q suffixes on the memory form of these instructions to disambiguate the memory size.
We don't require it on the register forms, but need to support parsing both with and without it.
Previously we always printed the d/q suffix on the register forms, but it's redundant and
inconsistent with gcc and objdump.
After this patch we should support the d/q for parsing, but not print it when its unneeded.
llvm-svn: 360085
James Y Knight [Mon, 6 May 2019 21:37:59 +0000 (21:37 +0000)]
PR41183: Don't emit strict-prototypes warning for an implicit function
declaration.
It should emit _only_ an implicit-function-declaration warning, not
both of them.
Differential Revision: https://reviews.llvm.org/D59711
llvm-svn: 360084
Jonas Devlieghere [Mon, 6 May 2019 21:28:01 +0000 (21:28 +0000)]
[Docs] Add remote.html redirect
Add a redirect for the old remote.html page and sort the pages to make
dding redirects easier in the future.
llvm-svn: 360083
Martin Storsjo [Mon, 6 May 2019 21:19:07 +0000 (21:19 +0000)]
[AArch64] Add __builtin_sponentry, for calling setjmp in MinGW
In MinGW, setjmp isn't expanded as a builtin in the compiler (like it
is for MSVC), but manually hooked up as calls to the right underlying
functions in headers. Using the actual CRT's real setjmp/longjmp
functions requires this intrinsic. (Currently this is worked around by
using MinGW specific reimplementations of setjmp/longjmp on aarch64.)
Differential Revision: https://reviews.llvm.org/D61592
llvm-svn: 360082
Martin Storsjo [Mon, 6 May 2019 21:19:01 +0000 (21:19 +0000)]
[MinGW] Use SEH by default on AArch64
The implementation of SEH is pretty mature at this point.
Differential Revision: https://reviews.llvm.org/D61591
llvm-svn: 360081
Martin Storsjo [Mon, 6 May 2019 21:18:15 +0000 (21:18 +0000)]
[AArch64] Default to SEH exception handling on MinGW
The SEH implementation is pretty mature at this point.
Differential Revision: https://reviews.llvm.org/D61590
llvm-svn: 360080
Jonas Devlieghere [Mon, 6 May 2019 21:17:50 +0000 (21:17 +0000)]
[CMake] Remove lldbPluginSymbolVendorMacOSX to fix CMake build
This should fix check-lldb-unit on the bots.
llvm-svn: 360079
Jonas Devlieghere [Mon, 6 May 2019 21:02:03 +0000 (21:02 +0000)]
[CMake] Remove inlined-functions.yaml
llvm-svn: 360078
Jonas Devlieghere [Mon, 6 May 2019 20:45:31 +0000 (20:45 +0000)]
[Driver] Change the way we deal with local lldbinit files.
Currently we have special handling for local lldbinit files in the
driver. At the same time, we have an SB API named
`SourceInitFileInCurrentWorkingDirectory` that does the same thing.
This patch removes the special handling from the driver and uses the API
instead. In addition to the obvious advantages of having one canonical
way of doing things and removing code duplication, this change also
means that the code path is the same for global and local lldb init
files.
Differential revision: https://reviews.llvm.org/D61577
llvm-svn: 360077
Reid Kleckner [Mon, 6 May 2019 20:36:58 +0000 (20:36 +0000)]
Fix the cmake build by removing non-existant source file
llvm-svn: 360076
Sanjay Patel [Mon, 6 May 2019 20:34:05 +0000 (20:34 +0000)]
[InstCombine] sink FP negation of operands through select
We don't always get this:
Cond ? -X : -Y --> -(Cond ? X : Y)
...even with the legacy IR form of fneg in the case with extra uses,
and we miss matching with the newer 'fneg' instruction because we
are expecting binops through the rest of the path.
Differential Revision: https://reviews.llvm.org/D61604
llvm-svn: 360075
Peter Collingbourne [Mon, 6 May 2019 20:09:12 +0000 (20:09 +0000)]
gn build: Merge r360063.
llvm-svn: 360074
Alexey Bataev [Mon, 6 May 2019 20:07:20 +0000 (20:07 +0000)]
[OPENMP]Fix PR41767: diagnose DSA for variables in clauses with
default(none).
If the combined directive has default(none) clause and has clauses for
inner directive that reference some variables, for which data-sharing
attributes are not specified, the error messages should be emitted for
such variables.
llvm-svn: 360073
Greg Clayton [Mon, 6 May 2019 20:03:30 +0000 (20:03 +0000)]
Revert xcode scheme changes that I didn't mean to check in.
llvm-svn: 360072
Greg Clayton [Mon, 6 May 2019 20:01:21 +0000 (20:01 +0000)]
Include inlined functions when figuring out a contiguous address range
Checking this in for Antonio Afonso:
This diff changes the function LineEntry::GetSameLineContiguousAddressRange so that it also includes function calls that were inlined at the same line of code.
My motivation is to decrease the step over time of lines that heavly rely on inlined functions. I have multiple examples in the code base I work that makes a step over stop 20 or mote times internally. This can easly had up to step overs that take >500ms which I was able to lower to 25ms with this new strategy.
The reason the current code is not extending the address range beyond an inlined function is because when we resolve the symbol at the next address of the line entry we will get the entry line corresponding to where the original code for the inline function lives, making us barely extend the range. This then will end up on a step over having to stop multiple times everytime there's an inlined function.
To check if the range is an inlined function at that line I also get the block associated with the next address and check if there is a parent block with a call site at the line we're trying to extend.
To check this I created a new function in Block called GetContainingInlinedBlockWithCallSite that does exactly that. I also added a new function to Declaration for convinence of checking file/line named CompareFileAndLine.
To avoid potential issues when extending an address range I added an Extend function that extends the range by the AddressRange given as an argument. This function returns true to indicate sucess when the rage was agumented, false otherwise (e.g.: the ranges are not connected). The reason I do is to make sure that we're not just blindly extending complete_line_range by whatever GetByteSize() we got. If for some reason the ranges are not connected or overlap, or even 0, this could be an issue.
I also added a unit tests for this change and include the instructions on the test itself on how to generate the yaml file I use for testing.
Differential Revision: https://reviews.llvm.org/D61292
llvm-svn: 360071
Simon Pilgrim [Mon, 6 May 2019 19:51:54 +0000 (19:51 +0000)]
Pull out repeated CI->getCalledFunction() calls. NFCI.
llvm-svn: 360070
Craig Topper [Mon, 6 May 2019 19:50:14 +0000 (19:50 +0000)]
[SelectionDAG][X86] Support inline assembly returning an mmx register into a type with fewer than 64 bits.
It's possible to use the 'y' mmx constraint with a type narrower than 64-bits.
This patch supports this by bitcasting the mmx type to 64-bits and then
truncating to the desired type.
There are probably other missing type combinations we need to support, but this
is the case we have a bug report for.
Fixes PR41748.
Differential Revision: https://reviews.llvm.org/D61582
llvm-svn: 360069
Amara Emerson [Mon, 6 May 2019 19:41:01 +0000 (19:41 +0000)]
[GlobalISel] Handle <1 x T> vector return types properly.
After support for dealing with types that need to be extended in some way was
added in r358032 we didn't correctly handle <1 x T> return types. These types
don't have a GISel direct representation, instead we just see them as scalars.
When we need to pad them into <2 x T> types however we need to use a
G_BUILD_VECTOR instead of trying to do a G_CONCAT_VECTOR.
This fixes PR41738.
llvm-svn: 360068
Saleem Abdulrasool [Mon, 6 May 2019 19:38:24 +0000 (19:38 +0000)]
Initialization: move InstructionEmulation to full initialization
The debug server does not need to use the instruction emulation. This
helps reduce the size of the final lldb-server binary by another ~100K
(~1% savings).
llvm-svn: 360067
Craig Topper [Mon, 6 May 2019 19:29:24 +0000 (19:29 +0000)]
Revert r359392 and r358887
Reverts "[X86] Remove (V)MOV64toSDrr/m and (V)MOVDI2SSrr/m. Use 128-bit result MOVD/MOVQ and COPY_TO_REGCLASS instead"
Reverts "[TargetLowering][AMDGPU][X86] Improve SimplifyDemandedBits bitcast handling"
Eric Christopher and Jorge Gorbe Moya reported some issues with these patches to me off list.
Removing the CodeGenOnly instructions has changed how fneg is handled during fast-isel with sse/sse2. We're now emitting fsub -0.0, x instead
moving to the integer domain(in a GPR), xoring the sign bit, and then moving back to xmm. This is because the fast isel table no longer
contains an entry for (f32/f64 bitcast (i32/i64)) so the target independent fneg code fails. The use of fsub changes the behavior of nan with
respect to -O2 codegen which will always use a pxor. NOTE: We still have a difference with double with -m32 since the move to GPR doesn't work
there. I'll file a separate PR for that and add test cases.
Since removing the CodeGenOnly instructions was fixing PR41619, I'm reverting r358887 which exposed that PR. Though I wouldn't be surprised
if that bug can still be hit independent of that.
This should hopefully get Google back to green. I'll work with Simon and other X86 folks to figure out how to move forward again.
llvm-svn: 360066
Paul Robinson [Mon, 6 May 2019 19:12:25 +0000 (19:12 +0000)]
Fix more Windows bots after r360015.
Depending on the environment, the directory separator might
appear as \ or \\ on different bots.
http://lab.llvm.org:8011/builders/llvm-clang-x86_64-expensive-checks-win/builds/17446/steps/test-check-all/logs/stdio
llvm-svn: 360065
Simon Pilgrim [Mon, 6 May 2019 19:10:55 +0000 (19:10 +0000)]
Remove duplicate assignments. NFCI.
llvm-svn: 360064
Gheorghe-Teodor Bercea [Mon, 6 May 2019 18:19:15 +0000 (18:19 +0000)]
[OpenMP][Clang] Support for target math functions
Summary:
In this patch we propose a temporary solution to resolving math functions for the NVPTX toolchain, temporary until OpenMP variant is supported by Clang.
We intercept the inclusion of math.h and cmath headers and if we are in the OpenMP-NVPTX case, we re-use CUDA's math function resolution mechanism.
Authors:
@gtbercea
@jdoerfert
Reviewers: hfinkel, caomhin, ABataev, tra
Reviewed By: hfinkel, ABataev, tra
Subscribers: mgorny, guansong, cfe-commits, jdoerfert
Tags: #clang
Differential Revision: https://reviews.llvm.org/D61399
llvm-svn: 360063
Dimitry Andric [Mon, 6 May 2019 17:58:03 +0000 (17:58 +0000)]
Add non-SSE wrapper for __kmp_{load,store}_mxcsr
Summary:
To be able to successfully build OpenMP on FreeBSD/i386, which still
uses i486 as its default processor, I had to provide wrappers for the
`__kmp_load_mxcsr` and `__kmp_store_mxcsr` functions.
If the compiler signals that SSE is not available, loading and storing
mxcsr does not make sense anway, so in that case the inline functions
are empty. This gives the minimum amount of code churn.
See also https://svnweb.freebsd.org/changeset/base/345283
Reviewers: emaste, jlpeyton, Hahnfeld
Reviewed By: jlpeyton
Subscribers: hfinkel, krytarowski, jdoerfert, openmp-commits, llvm-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D60916
llvm-svn: 360062
Alexey Bataev [Mon, 6 May 2019 17:49:22 +0000 (17:49 +0000)]
[OPENMP]Fix PR41768: check DSA for globals with `default(none)` clauses.
If the `default(none)` was specified for the construct, we might miss
diagnostic for the globals without explicitly specified data-sharing
attributes. Patch fixes this problem.
llvm-svn: 360061
Xing Xue [Mon, 6 May 2019 17:45:21 +0000 (17:45 +0000)]
Add libc++ to link XRay test cases if libc++ is used to build CLANG
Summary: When libc++ is used to build CLANG, its XRay libraries libclang_rt.xray-*.a have dependencies on libc++. Therefore, libc++ is needed to link and run XRay test cases. For Linux -rpath is also needed to specify where to load libc++. This change sets macro LLVM_LIBCXX_USED to 1 if libc++ is actually used in the build. XRay tests then check the flag and add -L<llvm_shlib_dir> -lc++ and -Wl,-rpath=<llvm_shlib_dir> if needed.
Reviewers: hubert.reinterpretcast, amyk, dberris, jasonliu, sfertile, EricWF
Subscribers: dberris, mgorny, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61016
llvm-svn: 360060
Sanjay Patel [Mon, 6 May 2019 17:39:18 +0000 (17:39 +0000)]
[InstCombine] reduce code duplication; NFC
llvm-svn: 360059
Sanjay Patel [Mon, 6 May 2019 17:29:22 +0000 (17:29 +0000)]
[InstCombine] add tests for fneg+sel; NFC
llvm-svn: 360058
Nico Weber [Mon, 6 May 2019 17:17:41 +0000 (17:17 +0000)]
gn build: More TODO tweaking
Differential Revision: https://reviews.llvm.org/D61468
llvm-svn: 360057
Nico Weber [Mon, 6 May 2019 17:15:19 +0000 (17:15 +0000)]
gn build: Update TODO now that libcxx libcxxabi libunwind clang-tools-extra are done
Differential Revision: https://reviews.llvm.org/D61468
llvm-svn: 360056
Nikita Popov [Mon, 6 May 2019 16:59:37 +0000 (16:59 +0000)]
[ConstantRange] Add srem() support
Add support for srem() to ConstantRange so we can use it in LVI. For
srem the sign of the result matches the sign of the LHS. For the RHS
only the absolute value is important. Apart from that the logic is
like urem.
Just like for urem this is only an approximate implementation. The tests
check a few specific cases and run an exhaustive test for conservative
correctness (but not exactness).
Differential Revision: https://reviews.llvm.org/D61207
llvm-svn: 360055
Nikita Popov [Mon, 6 May 2019 16:17:17 +0000 (16:17 +0000)]
[SDAG][AArch64] Boolean and/or reduce to umax/min reduce (PR41635)
This addresses one half of https://bugs.llvm.org/show_bug.cgi?id=41635
by combining a VECREDUCE_AND/OR into VECREDUCE_UMIN/UMAX (if latter is
legal but former is not) for zero-or-all-ones boolean reductions (which
are detected based on sign bits).
Differential Revision: https://reviews.llvm.org/D61398
llvm-svn: 360054
Cameron McInally [Mon, 6 May 2019 16:05:10 +0000 (16:05 +0000)]
Add FNeg support to InstructionSimplify
Differential Revision: https://reviews.llvm.org/D61573
llvm-svn: 360053
Sanjay Patel [Mon, 6 May 2019 16:03:53 +0000 (16:03 +0000)]
[InstCombine] regenerate test checks; NFC
llvm-svn: 360052
Sanjay Patel [Mon, 6 May 2019 15:35:02 +0000 (15:35 +0000)]
[InstCombine] reduce code duplication; NFCI
llvm-svn: 360051
Guillaume Chatelet [Mon, 6 May 2019 15:10:19 +0000 (15:10 +0000)]
Modernize repmovsb implementation of x86 memcpy and allow runtime sizes.
Summary: This is a prerequisite to RFC http://lists.llvm.org/pipermail/llvm-dev/2019-April/131973.html
Reviewers: courbet
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61593
Fix typo.
Turn this patch into an NFC.
Addressing comments
llvm-svn: 360050
Nico Weber [Mon, 6 May 2019 15:06:43 +0000 (15:06 +0000)]
gn build: Merge r360018
llvm-svn: 360049
Ilya Biryukov [Mon, 6 May 2019 14:56:24 +0000 (14:56 +0000)]
[CodeComplete] Update python tests after r360042
llvm-svn: 360048
Simon Pilgrim [Mon, 6 May 2019 14:48:02 +0000 (14:48 +0000)]
[X86] Fix uninitialized members in constructor warnings. NFCI.
Initialize all member variables in X86ATTInstPrinter and X86DAGToDAGISel constructors to fix cppcheck warning.
llvm-svn: 360047
Fangrui Song [Mon, 6 May 2019 14:17:59 +0000 (14:17 +0000)]
[AMDGPU][test] Define local symbols used in amdgpu-relocs.s
Differential Revision: https://reviews.llvm.org/D61594
llvm-svn: 360046
Alexandre Ganea [Mon, 6 May 2019 14:07:01 +0000 (14:07 +0000)]
Fix CMake Invalid Escape Sequence
Patch by xoviat
Differential Revision: https://reviews.llvm.org/D60658
llvm-svn: 360045
Alexandre Ganea [Mon, 6 May 2019 13:41:54 +0000 (13:41 +0000)]
Fix compilation warnings when compiling with GCC 7.3
Differential Revision: https://reviews.llvm.org/D61046
llvm-svn: 360044
Nemanja Ivanovic [Mon, 6 May 2019 13:35:49 +0000 (13:35 +0000)]
[PowerPC] Fix erroneous condition for converting uint-to-fp vector conversion
A condition for exiting the legalization of v4i32 conversion to v2f64 through
extract/convert/build erroneously checks for the extract having type i32.
This is not adequate as smaller extracts are actually legalized to i32 as well.
Furthermore, an early exit is missing which means that we only check that
both extracts are from the same vector if that check fails.
As a result, both cases in the included test case fail - the first gets a
select error and the second generates incorrect code.
The culprit commit is r274535.
llvm-svn: 360043
Ilya Biryukov [Mon, 6 May 2019 13:18:00 +0000 (13:18 +0000)]
[CodeComplete] Add a trailing semicolons to some pattern completions
Summary:
Where semicolon is required in any case. Here's a list of completions
that now have a semicolon:
- namespace <name> = <target>;
- using namespace <name>;
- using <qualifier>::<name>;
- continue;
- break;
- goto <label>;
- return;
- return <expression>;
Reviewers: gribozavr
Reviewed By: gribozavr
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D61589
llvm-svn: 360042
Michal Gorny [Mon, 6 May 2019 13:06:43 +0000 (13:06 +0000)]
[lldb] [lit] Use more readable consts and arrays in register read tests
Replace the constants used for r8/mm/xmm/ymm/zmm tests with something
more readable to ease debugging in case of failures (0x00 0x01 ...).
While at it, put the constants in array and copy them from memory
to simplify inline asm.
The original constants grew out of necessity. The xmm constants were
'weird' because they were intended to be different from mm constants
(as that was necessary to catch NetBSD implementation bug). The ymm
constants were made even weirded to not even partially collide with
other xmm registers (not saying it made sense, just how it was done).
Then, zmm constants were once again designed to avoid accidental
collisions with xmm and ymm constants, and at the same the 16 extra
registers required even more shuffling.
The new constants are meant to be more user-readable, so that a mistake
could be easily spotted. All of xmm, ymm and zmm tests use a sequence
of {0x00 0x01 0x02 ...}, shifted by 1 for every register. This should
provide enough uniquity, and space for future increase in number of
registers. Since mm and r8..r15 are printed as uint64_t rather than
byte-by-byte, they use 0x000102... As a result, on x86 endianness takes
care of making mm different than xmm.
The use of arrays is something I had to learn for zmm write tests. It
avoids having to specify all the input values separately, and makes
GCC happy about zmm-read test (it was rejected previously because of
hitting a limit of 30 constraints).
llvm-svn: 360041
Alexander Kornienko [Mon, 6 May 2019 12:11:30 +0000 (12:11 +0000)]
[lld] A better version of the fix in r359942.
Thanks to George Rimar for the suggestion.
llvm-svn: 360040
Sam McCall [Mon, 6 May 2019 12:03:26 +0000 (12:03 +0000)]
[clangd] Expose whether no-compile completion was used.
Summary: Embedding clients want to experiment with showing such results in e.g. a different color.
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D61588
llvm-svn: 360039
Jan Kratochvil [Mon, 6 May 2019 12:01:38 +0000 (12:01 +0000)]
Merge GetCompileUnitAtOffset + GetCompileUnitContainingDIEOffset
These two methods are very similar and various refactorizations need to modify
both similar ways.
One could also just remove GetCompileUnitAtOffset and make
GetCompileUnitContainingDIEOffset to also accept offset of the CU itself
(currently it accepts only DIE offsets after the CU header).
But that would be less safe regarding some internal sanity checking.
Further code refactorization has been suggested by Pavel Labath.
Differential Revision: https://reviews.llvm.org/D61498
llvm-svn: 360038