Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] Demonstrate the use of CallDescriptionSet
Reviewed By: martong, xazax.hun
Differential Revision: https://reviews.llvm.org/D113592
Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] Switch to using CallDescription::matches() instead of isCalled()
This patch replaces each use of the previous API with the new one.
In variadic cases, it will use the ADL `matchesAny(Call, CDs...)`
variadic function.
Also simplifies some code involving such operations.
Reviewed By: martong, xazax.hun
Differential Revision: https://reviews.llvm.org/D113591
Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] Introduce CallDescription::matches() in addition to isCalled()
This patch introduces `CallDescription::matches()` member function,
accepting a `CallEvent`.
Semantically, `Call.isCalled(CD)` is the same as `CD.matches(Call)`.
The patch also introduces the `matchesAny()` variadic free function template.
It accepts a `CallEvent` and at least one `CallDescription` to match
against.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D113590
Balazs Benics [Fri, 19 Nov 2021 17:32:13 +0000 (18:32 +0100)]
[analyzer][NFC] Introduce CallDescriptionSets
Sometimes we only want to decide if some function is called, and we
don't care which of the set.
This `CallDescriptionSet` will have the same behavior, except
instead of `lookup()` returning a pointer to the mapped value,
the `contains()` returns `bool`.
Internally, it uses the `CallDescriptionMap<bool>` for implementing the
behavior. It is preferred, to reuse the generic
`CallDescriptionMap::lookup()` logic, instead of duplicating it.
The generic version might be improved by implementing a hash lookup or
something along those lines.
Reviewed By: martong, Szelethus
Differential Revision: https://reviews.llvm.org/D113589
Florian Hahn [Fri, 19 Nov 2021 17:17:03 +0000 (17:17 +0000)]
[LV] Remove obsolete comment about creating a dummy block (NFC)
No dummy pre-entry block is created since
a6c4969f5f45. The comment is
stale now and can be removed.
Mentioned by @Ayal in D113182.
Krzysztof Drewniak [Thu, 18 Nov 2021 20:21:33 +0000 (20:21 +0000)]
[MLIR] Make the ROCM integration tests runnable
- Move the #define s to the GPU Transform library from GPU Ops so that
SerializeToHsaco is non-trivially compiled
- Add required includes to SerializeToHsaco
- Move MCSubtargetInfo creation to the correct point in the
compilation process
- Change mlir in ROCM tests to account for renamed/moved ops
Differential Revision: https://reviews.llvm.org/D114184
Adrian Prantl [Fri, 19 Nov 2021 17:05:38 +0000 (09:05 -0800)]
Skip tests when compiler with older versions of clang
Siva Chandra Reddy [Fri, 19 Nov 2021 07:32:58 +0000 (07:32 +0000)]
[libc][Obvious][NFC] A bunch of cosmetic cleanup.
* Added missing header guards.
* Fixed license header format in a few files.
* Renamed files to more suitable names.
Pavel Labath [Thu, 18 Nov 2021 12:56:36 +0000 (13:56 +0100)]
[lldb/test] Add ability to terminate connection from a gdb-client handler
We were using the client socket close as a way to terminate the handler
thread. But this kind of concurrent access to the same socket is not
safe. It also complicates running the handler without a dedicated thread
(next patch).
Instead, here I add an explicit way for a packet handler to request
termination. Waiting for lldb to terminate the connection would almost
be sufficient, but in the pty test we want to keep the pty open so we
can examine its state. Ability to disconnect at an arbitrary point may
be useful for testing other aspects of lldb functionality as well.
The way this works is that now each packet handler can optionally return
a list of responses (instead of just one). One of those responses (it
only makes sense for it to be the last one) can be a special
RESPONSE_DISCONNECT object, which triggers a disconnection (via a new
TerminateConnectionException).
As the mock server now cleans up the connection whenever it disconnects,
the pty test needs to explicitly dup(2) the descriptors in order to
inspect the post-disconnect state.
Differential Revision: https://reviews.llvm.org/D114156
Philip Reames [Fri, 19 Nov 2021 16:40:24 +0000 (08:40 -0800)]
[SCEV] Revert two speculative compile time optimizations which made no difference
Revert "[SCEV] Defer all work from
ea12c2cb as late as possible"
Revert "[SCEV] Defer loop property checks from
ea12c2cb as late as possible"
This reverts commit
734abbad79dbcbd0e880510fbab1ef0e701cfc7b and
1a5666acb281c7510504e726ba481d09ab5f5b95.
Both of these changes were speculative attempts to address a compile time regression. Neither worked, and both complicated the code in undesirable ways.
Philipp Tomsich [Fri, 19 Nov 2021 03:13:46 +0000 (19:13 -0800)]
[RISCV] Don't call setHasMultipleConditionRegisters(), so icmp is sunk
On RISC-V, icmp is not sunk (as the following snippet shows) which
generates the following suboptimal branch pattern:
```
core_list_find:
lh a2, 2(a1)
seqz a3, a0 <<
bltz a2, .LBB0_5
bnez a3, .LBB0_9 << should sink the seqz
[...]
j .LBB0_9
.LBB0_5:
bnez a3, .LBB0_9 << should sink the seqz
lh a1, 0(a1)
[...]
```
due to an icmp not being sunk.
The blocks after `codegenprepare` look as follows:
```
define dso_local %struct.list_head_s* @core_list_find(%struct.list_head_s* readonly %list, %struct.list_data_s* nocapture readonly %info) local_unnamed_addr #0 {
entry:
%idx = getelementptr inbounds %struct.list_data_s, %struct.list_data_s* %info, i64 0, i32 1
%0 = load i16, i16* %idx, align 2, !tbaa !4
%cmp = icmp sgt i16 %0, -1
%tobool.not37 = icmp eq %struct.list_head_s* %list, null
br i1 %cmp, label %while.cond.preheader, label %while.cond9.preheader
while.cond9.preheader: ; preds = %entry
br i1 %tobool.not37, label %return, label %land.rhs11.lr.ph
```
where the `%tobool.not37` is the result of the icmp that is not sunk.
Note that it is computed in the basic-block up until what becomes the
`bltz` instruction and the `bnez` is a basic-block of its own.
Compare this to what happens on AArch64 (where the icmp is correctly sunk):
```
define dso_local %struct.list_head_s* @core_list_find(%struct.list_head_s* readonly %list, %struct.list_data_s* nocapture readonly %info) local_unnamed_addr #0 {
entry:
%idx = getelementptr inbounds %struct.list_data_s, %struct.list_data_s* %info, i64 0, i32 1
%0 = load i16, i16* %idx, align 2, !tbaa !6
%cmp = icmp sgt i16 %0, -1
br i1 %cmp, label %while.cond.preheader, label %while.cond9.preheader
while.cond9.preheader: ; preds = %entry
%1 = icmp eq %struct.list_head_s* %list, null
br i1 %1, label %return, label %land.rhs11.lr.ph
```
This is caused by sinkCmpExpression() being skipped, if multiple
condition registers are supported.
Given that the check for multiple condition registers affect only
sinkCmpExpression() and shouldNormalizeToSelectSequence(), this change
adjusts the RISC-V target as follows:
* we no longer signal multiple condition registers (thus changing
the behaviour of sinkCmpExpression() back to sinking the icmp)
* we override shouldNormalizeToSelectSequence() to let always select
the preferred normalisation strategy for our backend
With both changes, the test results remain unchanged. Note that without
the target-specific override to shouldNormalizeToSelectSequence(), there
is worse code (more branches) generated for select-and.ll and select-or.ll.
The original test case changes as expected:
```
core_list_find:
lh a2, 2(a1)
bltz a2, .LBB0_5
beqz a0, .LBB0_9 <<
[...]
j .LBB0_9
.LBB0_5:
beqz a0, .LBB0_9 <<
lh a1, 0(a1)
[...]
```
Differential Revision: https://reviews.llvm.org/D98932
Craig Topper [Fri, 19 Nov 2021 06:15:09 +0000 (22:15 -0800)]
[RISCV] Pre-commit test for D98932. NFC
Victor Huang [Fri, 19 Nov 2021 16:10:19 +0000 (10:10 -0600)]
[PowerPC] Add a flag for conditional trap optimization
This patch adds a flag to enable/disable conditional trap optimization.
Optimization disabled by default.
Peer reviewed by: nemanjai
Fabian Wolff [Fri, 19 Nov 2021 16:01:36 +0000 (16:01 +0000)]
[DSE] Add additional strncpy tests.
Test for PR#52062 and one of the remaining cases of PR#47644.
Quinn Pham [Thu, 18 Nov 2021 21:10:49 +0000 (15:10 -0600)]
[NFC][llvm] Inclusive language: remove instance of master in IntrinsicsNVVM.td
[NFC] As part of using inclusive language within the llvm project, this patch
replaces master with main in `IntrinsicsNVVM.td`.
Reviewed By: steffenlarsen
Differential Revision: https://reviews.llvm.org/D114193
Mark de Wever [Fri, 19 Nov 2021 15:38:35 +0000 (16:38 +0100)]
[libc++][nfc] Move functions to a generic place.
This allows the floating-point formatter to use the same functions as
the integral formatter. This was tested in D114001.
Mark de Wever [Sat, 23 Oct 2021 16:28:31 +0000 (18:28 +0200)]
[libc++] Adds (to|from)_chars_result operator==.
Implements part of P1614 The Mothership has Landed.
Reviewed By: #libc, Quuxplusone, Mordante
Differential Revision: https://reviews.llvm.org/D112366
Ben Langmuir [Fri, 19 Nov 2021 00:47:16 +0000 (16:47 -0800)]
[ORC] Fix materialization of weak local symbols
We were adding all defined weak symbols to the materialization
responsibility, but local symbols will not be in the symbol table, so it
failed to materialize due to the "missing" symbol.
Local weak symbols come up in practice when using `ld -r` with a hidden
weak symbol.
rdar://
85574696
Matt Morehouse [Fri, 19 Nov 2021 14:12:51 +0000 (06:12 -0800)]
[X86] Selective relocation relaxation for +tagged-globals
For tagged-globals, we only need to disable relaxation for globals that
we actually tag. With this patch function pointer relocations, which
we do not instrument, can be relaxed.
This patch also makes tagged-globals work properly with LTO, as
-Wa,-mrelax-relocations=no doesn't work with LTO.
Reviewed By: pcc
Differential Revision: https://reviews.llvm.org/D113220
Alexey Bataev [Thu, 18 Nov 2021 21:02:43 +0000 (13:02 -0800)]
[SLP][NFC]Introduce TreeEntry::getVectorFactor member function, NFC.
Added TreeEntry::getVectorFactor to get the final vectotization factor
to simplify the code.
Differential Revision: https://reviews.llvm.org/D114190
Alexey Bataev [Fri, 19 Nov 2021 13:59:40 +0000 (05:59 -0800)]
[OpenMP] support depend clause for taskwait directive, by Deepak
Eachempati.
This patch adds clang (parsing, sema, serialization, codegen) support for the 'depend' clause on the 'taskwait' directive.
Reviewed By: ABataev
Differential Revision: https://reviews.llvm.org/D113540
Nico Weber [Thu, 18 Nov 2021 16:38:52 +0000 (11:38 -0500)]
[asm] Allow block address operands in `asm inteldialect`
This makes the following program build with -masm=intel:
int foo(int count) {
asm goto ("dec %0; jb %l[stop]" : "+r" (count) : : : stop);
return count;
stop:
return 0;
}
It's also is another step towards merging EmitGCCInlineAsmStr() and
EmitMSInlineAsmStr().
Differential Revision: https://reviews.llvm.org/D114167
Nico Weber [Thu, 18 Nov 2021 21:59:21 +0000 (16:59 -0500)]
[lld/mac] Crash even less on undefined symbols with --icf=all
Follow-up to https://reviews.llvm.org/D112643. Even after that change, we were
still asserting if two separate functions that are eligible for ICF (same size,
same data, same number of relocs, same reloc types, ...) referred to
Undefineds. This fixes that oversight.
Differential Revision: https://reviews.llvm.org/D114195
Nico Weber [Fri, 19 Nov 2021 03:50:42 +0000 (22:50 -0500)]
[asm] Remove explicit branch for modifier 'l'
No intended behavior change.
EmitGCCInlineAsmStr() used to explicitly check for modifier 'l'
after handling block address and machine basic block operands.
This prevented passing a MachineOperand with 'l' modifier to
PrintAsmMemoryOperand(). Conceptually that seems kind of nice,
but in practice the overrides of PrintAsmMemoryOperand() in all (*)
AsmPrinter subclasses already reject modifiers they don't know about,
and none of them don't know about 'l'. So removing this doesn't have
a behavior difference, is less code, and it makes EmitGCCInlineAsmStr()
and EmitMSInlineAsmStr() more similar, to prepare for merging them later.
(Why not _add_ the branch to EmitMSInlineAsmStr() instead? Because that
always works with X86AsmPrinter I think, and
X86AsmPrinter::PrintAsmMemoryOperand() very decisively rejects the 'l'
modifier, so it's hard to motivate adding that branch.)
*: The one exception was AVRAsmPrinter, which had an llvm_unreachable instead
of returning true. So this commit changes that, so that the AVR target keeps
emitting an error instead of crashing when passing a mem operand with a :l
modifier to it. All the other targets already don't crash on this.
Differential Revision: https://reviews.llvm.org/D114216
Zahira Ammarguellat [Wed, 17 Nov 2021 16:53:36 +0000 (11:53 -0500)]
The _Float16 type is supported on x86 systems with SSE2 enabled.
Operations are emulated by software emulation and “float” instructions.
This patch is allowing the support of _Float16 type without the use of
-max512fp16 flag. The final goal being, perform _Float16 emulation for
all arithmetic expressions.
Manuel Klimek [Fri, 19 Nov 2021 13:11:53 +0000 (14:11 +0100)]
Make clang-format fuzz through Lexing with asserts enabled.
Makes clang-format bail out if an in-memory source file with an
unsupported BOM is handed in instead of creating source locations that
are violating clang's assumptions.
In the future, we should add support to better transport error messages
like this through clang-format instead of printing to stderr and not
creating any changes.
Jay Foad [Fri, 19 Nov 2021 10:32:35 +0000 (10:32 +0000)]
[AMDGPU] Use new opcode for indexed vgpr reads
Introduce V_MOV_B32_indirect_read for indexed vgpr reads
(and rename the old V_MOV_B32_indirect to
V_MOV_B32_indirect_write) so they can be unambiguously
distinguished from regular V_MOV_B32_e32. Previously they
were distinguished by looking for extra implicit operands
but this is fragile because regular moves sometimes have
extra implicit operands too:
- either by accident, when instructions end up with
duplicate implicit operands (see e.g. D100939)
- or by design, when SIInstrInfo::copyPhysReg breaks a
multi-dword copy into individual subreg mov instructions
and adds implicit operands for the super-register.
The effect of this is that SIInstrInfo::isFoldableCopy can
be simplified and identifies more foldable copies. The test
diffs show that more immediate 0 values have been folded as
inline operands.
SIInstrInfo::isReallyTriviallyReMaterializable could
probably be simplified too but that is not part of this
patch.
Differential Revision: https://reviews.llvm.org/D114230
Roman Lebedev [Fri, 19 Nov 2021 12:55:31 +0000 (15:55 +0300)]
[X86][Costmodel] `getReplicationShuffleCost()`: promote 1 bit-wide elements to 8 bit when have AVX512BW+AVX512VBMI
If in addition to AVX512BW (that provides `{k}<->{i8,i16}` casts and i16 shuffles),
we have AVX512VBMI, which provides i8 shuffles, we are in an optimal situation.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D114071
Roman Lebedev [Fri, 19 Nov 2021 12:55:21 +0000 (15:55 +0300)]
[X86][Costmodel] `trunc v16i8 to v8i1` can appear after legalization, cost is same as for `trunc v8i8 to v8i1`
Note that there are many other missing costs, i'm *only* adding the ones that are queried
from `getReplicationShuffleCost()` for the existing (quite exhaustive) test coverage.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D114070
Roman Lebedev [Fri, 19 Nov 2021 12:55:07 +0000 (15:55 +0300)]
[X86][Costmodel] `getReplicationShuffleCost()`: promote 1 bit-wide elements to 16 bit when have AVX512BW
Here we get pretty lucky. AVX512F does not provide any instructions
to convert between a `k` vector mask and a vector,
but AVX512BW adds `{k}<->nX{i8,i16}`conversions,
and just as it happens, with AVX512BW we have a i16 shuffle.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D113915
Fraser Cormack [Fri, 19 Nov 2021 12:06:54 +0000 (12:06 +0000)]
[LangRef][VP] Correct operands' types in vp.select documentation
The types of llvm.vp.select's operands much match the return type.
Simon Pilgrim [Fri, 19 Nov 2021 11:48:49 +0000 (11:48 +0000)]
[X86] LowerRotate - recognise hidden ROTR patterns for better vXi8 codegen
Check for a hidden ISD::ROTR (rotl(sub(0,x))) - vXi8 lowering can handle both (its always beneficial for splats, but otherwise only if we have VPTERNLOG).
We currently hit infinite loops in TargetLowering::expandROT if we set ISD::ROTR to custom, which needs addressing before we extend this much further.
Andrew Ng [Wed, 17 Nov 2021 17:15:20 +0000 (17:15 +0000)]
[ELF] Ensure output section is not discarded in addStartEndSymbols()
Fixes https://bugs.llvm.org/show_bug.cgi?id=52534.
Differential Revision: https://reviews.llvm.org/D114179
Simon Pilgrim [Fri, 19 Nov 2021 10:37:54 +0000 (10:37 +0000)]
[DAG] MatchRotate - support rotate-by-constant of illegal types
Patch to fix some of the regressions in D77804.
By folding to rotate/funnel-shift by constant amounts for illegal types, we prevent SimplifyDemandedBits from destroying the patterns prematurely, allowing us to use the rotate/funnel-shift legalization that was added in D112443.
Differential Revision: https://reviews.llvm.org/D113192
Balazs Benics [Fri, 19 Nov 2021 10:59:46 +0000 (11:59 +0100)]
[analyzer][docs] Ellaborate the docs of cplusplus.StringChecker
Let's describe accurately what the users can expect from the checker in
a direct way.
Also, add an example warning message.
Reviewed By: martong, Szelethus
Differential Revision: https://reviews.llvm.org/D113401
Valentin Clement [Fri, 19 Nov 2021 10:33:57 +0000 (11:33 +0100)]
[fir] Add fir.no_reassoc conversion
Currently `fir.no_reassoc` is just removed in the conversion.
This patch is part of the upstreaming effort from fir-dev branch.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D114154
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Balazs Benics [Fri, 19 Nov 2021 10:31:01 +0000 (11:31 +0100)]
[ASTImporter][NFC] Dump decl name at assertion violation
Sometimes it would be useful to see which Decl kind caused some issue,
along with the name of the concrete instance of the Decl in the source
code.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D113668
Konstantin Schwarz [Thu, 18 Nov 2021 14:21:21 +0000 (15:21 +0100)]
[ELF] Expand LMA region if output section alignment introduces padding
When aligning the start address of an output section introduces a gap between the current dot pointer
and the new aligned address, we were already properly expanding the memory region, if available.
D74286 introduced a new behavior to also align the LMA address if an LMA region is specified.
However, this did not expand the corresponding LMA region.
Now, we also expand the LMA region if it is set.
This fixes PR52510.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D114166
Fabian Wolff [Fri, 19 Nov 2021 09:22:07 +0000 (22:22 +1300)]
[clang-tidy] Fix false positive in readability-identifier-naming check involving override attribute
Overriding methods should not get a readability-identifier-naming
warning because the issue can only be fixed in the base class; but the
current check for whether a method is overriding does not take the
override attribute into account.
Differential Revision: https://reviews.llvm.org/D113830
Diana Picus [Wed, 17 Nov 2021 10:29:42 +0000 (10:29 +0000)]
[flang] Fix printing of constc and parsing of #fir.real
Printing and parsing of constc didn't agree with each other. This patch
treats the parsing of constc as the final word and fixes the printing
accordingly.
More concretely, this patch prints the RealAttrs that make up the
ConstcOp directly instead of casting to mlir::FloatAttr (which blows
up). It also fixes parseFirRealAttr to invoke APFloat's method for
getting the size of a floating point type instead of computing it as
8 * kind (which blows up for BFloat, with kind == 3 and size == 16).
Kudos to Kiran Chandramohan <kiran.chandramohan@arm.com> for noticing
that we were missing tests for constc in fir-ops.fir.
Differential Revision: https://reviews.llvm.org/D114081
Matt Beardsley [Fri, 19 Nov 2021 09:19:05 +0000 (10:19 +0100)]
[clang-tidy] fix debug-only test failure
The clang-tidy/infrastructure/pr37091.cpp test inherits the top-level .clang-tidy configuration because it doesn't specify its own checks. It'd be a more stable test if it operates independently of the top-level .clang-tidy settings.
I've made the clang-tidy/infrastructure/pr37091.cpp test independent of the top-level .clang-tidy (picked an arbitrary check that I saw another clang-tidy/infrastructure test was also using: clang-tidy/infrastructure/temporaries.cpp)
Reviewed By: kbobyrev
Differential Revision: https://reviews.llvm.org/D114034
Valentin Clement [Fri, 19 Nov 2021 08:24:11 +0000 (09:24 +0100)]
[mlir] Expose region utils functions
As discussed in D109579, this patch exposes `runRegionDCE` and
`eraseUnreachableBlocks` so they can be used as separate utilities in
other passes.
Reviewed By: rriddle, mehdi_amini
Differential Revision: https://reviews.llvm.org/D114160
Yonghong Song [Fri, 19 Nov 2021 03:02:11 +0000 (19:02 -0800)]
BPF: Workaround InstCombine trunc+icmp => mask+icmp Optimization
Patch [1] added further InstCombine trunc+icmp => mask+icmp
optimization and this caused a couple of bpf selftest failure.
Previous llvm BPF backend patch [2] introduced llvm.bpf.compare
builtin to handle such situations.
This patch further added support ">" and ">=" icmp opcodes.
Tested with bpf selftests and all tests are passed including two
previously failed ones.
Note Patch [1] also added optimization if the to-be-compared
constant is negative-power-of-2 (-C) or not-of-power-of-2 (~C).
This patch didn't implement these two cases as typical bpf
program compares a scalar to a positive length or boundary value,
and this scalar later is used as a index into an array buffer
or packet buffer.
[1] https://reviews.llvm.org/D112634
[2] https://reviews.llvm.org/D112938
Differential Revision: https://reviews.llvm.org/D114215
Kent Ross [Fri, 19 Nov 2021 04:15:16 +0000 (20:15 -0800)]
[libc++][doc] Mark project for [cmp.concept] done
Mark [cmp.concept] implementation as completed in our documentation.
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D114203
Serguei Katkov [Tue, 5 Oct 2021 06:28:23 +0000 (13:28 +0700)]
[AARCH64] Teach AArch64FrameLowering::getFrameIndexReferencePreferSP really prefer SP.
Do more efforts to use sp if it is possible to lower a frame index.
Reviewers: reames, loicottet, ostannard, t.p.northover
Reviewed By: reames
Subscribers: arphaman, danilaml, hiraditya, kristof.beyls, llvm-commits, Matt, yrouban
Differential Revision: https://reviews.llvm.org/D111133
Vitaly Buka [Fri, 19 Nov 2021 03:37:39 +0000 (19:37 -0800)]
[NFC][sanitizer] Fix naming in StackStore
Vitaly Buka [Thu, 18 Nov 2021 22:11:54 +0000 (14:11 -0800)]
[NFC][sanitizer] constexpr StackStore::StackStore()
Vitaly Buka [Mon, 15 Nov 2021 23:18:53 +0000 (15:18 -0800)]
[NFC][sanitizer] Change StackStore API to use StackTrace
Vitaly Buka [Mon, 15 Nov 2021 21:31:45 +0000 (13:31 -0800)]
[NFC][sanitizer] Move inline implementation of StackStore into cpp
Vitaly Buka [Mon, 15 Nov 2021 06:53:29 +0000 (22:53 -0800)]
[NFC][sanitizer] Rename PersistentAllocator to StackStore
Vitaly Buka [Mon, 15 Nov 2021 06:47:13 +0000 (22:47 -0800)]
[nfc][dfsan] Remove obsolete comment
Vitaly Buka [Mon, 15 Nov 2021 06:37:52 +0000 (22:37 -0800)]
[NFC][sanitizer] Rename persistent_allocator to stack_store
Matheus Izvekov [Fri, 19 Nov 2021 00:17:40 +0000 (01:17 +0100)]
[clang] fix regression deducing pack expansion arguments introduced by D110216
This test case had been missing when the original code
was introduced by
2fcb863b2b278.
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Differential Revision: https://reviews.llvm.org/D114207
Senran Zhang [Thu, 18 Nov 2021 01:23:05 +0000 (09:23 +0800)]
[NFC][OpaquePtr][Evaluator] Remove call to PointerType::getElementType
There are still another 2 uses of PointerType::getElementType in
Evaluator when evaluating BitCast's on pointers. BitCast's on pointers
should be removed when opaque ptr is ready, so I just keep them as is.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D114131
Vitaly Buka [Mon, 15 Nov 2021 06:36:00 +0000 (22:36 -0800)]
[msan] Clang-format the test
Manoj Gupta [Tue, 19 Oct 2021 19:53:51 +0000 (12:53 -0700)]
libfuzzer: All building libfuzzer for ARM32
We need libfuzzer libraries on Arm32 so that we can fuzz
Arm32 binaries on Linux (Chrome OS). Android already
allows Arm32 for libfuzzer.
Reviewed By: morehouse
Differential Revision: https://reviews.llvm.org/D112091
Philip Reames [Fri, 19 Nov 2021 01:18:04 +0000 (17:18 -0800)]
[SCEV] Defer all work from
ea12c2cb as late as possible
This is a second speculative compile time optimization to address a reported regression. My actual suspicion is that availability of no-self-wrap is making some *other* bit of code trigger, but let's rule this out.
Stanislav Mekhanoshin [Thu, 18 Nov 2021 23:35:54 +0000 (15:35 -0800)]
[AMDGPU] Fix SIPostRABundler crash on null register used by dbg value
Recently we started generate DBG_VALUEs with $noreg operands.
This crashes SIPostRABundler, and it should not iterate these
registers anyway.
Fixes: SWDEV-311733
Differential Revision: https://reviews.llvm.org/D114202
Rong Xu [Fri, 19 Nov 2021 00:07:37 +0000 (16:07 -0800)]
[SampleFDO] Add pass name strings for the passes (NFC)
Jim Ingham [Thu, 18 Nov 2021 23:57:56 +0000 (15:57 -0800)]
Remove unused variable.
Victor Huang [Thu, 18 Nov 2021 23:52:04 +0000 (17:52 -0600)]
[PowerPC] Remove the redundant terminator instruction when optimizing conditional trap
This patch is a follow up patch for
ae27ca9a678301969c35f2e27c76f14c9d2bb396 to
the remove redundant terminator when optimizing conditional trap.
Peer reviewed by: nemanjai
Stanislav Mekhanoshin [Thu, 18 Nov 2021 23:47:44 +0000 (15:47 -0800)]
[AMDGPU] Regenerate postra-bundle-memops.mir checks. NFC.
Ahmed Bougacha [Mon, 27 Sep 2021 15:00:00 +0000 (08:00 -0700)]
[AArch64][PAC] Select llvm.ptrauth.sign/sign.generic to PAC*.
The @llvm.ptrauth.sign/sign.generic intrinsics map cleanly to
the various AArch64 PAC[IDG][Z][AB] instructions. Select them.
Differential Revision: https://reviews.llvm.org/D91087
Konstantin Varlamov [Thu, 18 Nov 2021 23:13:30 +0000 (15:13 -0800)]
[libc++][NFC] Assign some Ranges tasks to varconst.
Specifically:
- [special.mem.concepts];
- [specialized.algorithms].
Keith Smiley [Thu, 18 Nov 2021 18:40:06 +0000 (10:40 -0800)]
[lldb] Fix formatted log statement
Previously this would output literally without replacements
Differential Revision: https://reviews.llvm.org/D114178
Adrian Prantl [Thu, 18 Nov 2021 23:07:08 +0000 (15:07 -0800)]
Revert "Increase gdbremote timeout."
This reverts commit
6424dc21bf6b73645ef98a35417e0591b2a95939.
Mogball [Thu, 18 Nov 2021 05:41:25 +0000 (05:41 +0000)]
[mlir][vector] Insert/extract element can accept index
`vector::InsertElementOp` and `vector::ExtractElementOp` have had their `position`
operand changed to accept `AnySignlessIntegerOrIndex` for better operability with
operations that use `index`, such as affine loops.
LLVM's `extractelement` and `insertelement` can also accept `i64`, so lowering
directly to these operations without explicitly inserting casts is allowed. SPIRV's
equivalent ops can also accept `i64`.
Reviewed By: nicolasvasilache, jpienaar
Differential Revision: https://reviews.llvm.org/D114139
Arjun P [Thu, 18 Nov 2021 21:44:25 +0000 (03:14 +0530)]
[MLIR][NFC] Simplex::markRowRedundant: assert that row is not already marked redundant
David Blaikie [Thu, 18 Nov 2021 21:49:32 +0000 (13:49 -0800)]
llvm-dwarfdump: Rebuild type names in dwo type units
Fabian Wolff [Thu, 18 Nov 2021 22:01:11 +0000 (17:01 -0500)]
[libc++] Cast to the right `difference_type` in various algorithms
Differential Revision: https://reviews.llvm.org/D113868
Adrian Prantl [Thu, 18 Nov 2021 22:00:43 +0000 (14:00 -0800)]
make testcase more robust
Bardia Mahjour [Thu, 18 Nov 2021 21:48:29 +0000 (16:48 -0500)]
[docs] Add Loop Optimization WG to the online sync-up page
Philip Reames [Thu, 18 Nov 2021 21:46:59 +0000 (13:46 -0800)]
[SCEV] Defer loop property checks from
ea12c2cb as late as possible
This is a speculative compile time optimization to address a reported regression. It's the only thing which vaguely makes sense.
MaheshRavishankar [Thu, 18 Nov 2021 21:42:23 +0000 (13:42 -0800)]
[mlir][Linalg] Add method to check if LinalgTransformationFilter has been applied.
Differential Revision: https://reviews.llvm.org/D114170
Muiez Ahmed [Thu, 18 Nov 2021 20:57:50 +0000 (15:57 -0500)]
[SystemZ][z/OS] Fix filesystem testing
This patch resolves many of the failures in the `filesystems/` buckets in the libc++ tests. It adds the correct flag to `fopen` and marks a test case as unsupported. In particular, that test assumes time is stored as a 64 bit value when on MVS it is stored as 32 bit.
Differential Revision: https://reviews.llvm.org/D113298
Muiez Ahmed [Thu, 18 Nov 2021 20:49:45 +0000 (15:49 -0500)]
[libc++] Resolve missing table_size symbol
The aim of this patch is to resolve the missing `table_size` symbol (see reduced test case). That const variable is declared and defined in //libcxx/include/locale//; however, the test case suggests that the symbol is missing. This is due to a C++ pitfall (highlighted [[ https://quuxplusone.github.io/blog/2020/09/19/value-or-pitfall/ | here ]]). In summary, assigning the reference of `table_size` doesn't enforce the const-ness and expects to find `table_size` in the DLL. The fix is to use `constexpr` or have an out-of-line definition in the src (for consistency).
Differential Revision: https://reviews.llvm.org/D110647
Nikita Popov [Thu, 18 Nov 2021 20:17:08 +0000 (21:17 +0100)]
[DSE] Remove getLocForWrite() (NFCI)
This implements nearly the same logic as getLocForWriteEx(), and
is only used in one place. In that context, we should also know
that getLocForWriteEx() returns a non-None result. As such,
consolidate everything to use one function.
Nikita Popov [Thu, 18 Nov 2021 20:10:29 +0000 (21:10 +0100)]
[DSE] Move removePartiallyOverlappedStores() into DSEState (NFC)
So it can use getLocForWriteEx().
Markus Böck [Thu, 18 Nov 2021 19:23:23 +0000 (20:23 +0100)]
[mlir] Fully qualify default generated type/attribute printer and parser
This patch makes it possible to use the newly added useDefaultAttributePrinterParser and useDefaultTypePrinterParser dialect options without any using namespace declarations. Two things had to be done to make this possible:
* Fully qualify any type usages or functions from the mlir namespace in the generated C++ code
* Makes sure to emit the printers and parsers inside the same namespace as the Dialect
Differential Revision: https://reviews.llvm.org/D114168
Quinn Pham [Wed, 17 Nov 2021 16:09:16 +0000 (10:09 -0600)]
[NFC][mlir] Inclusive language: Replace an instance of master in docs
[NFC] As part of using inclusive language within the llvm project, this patch
replaces master with main in `SPIR-V.md`.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D114091
Adrian Prantl [Thu, 18 Nov 2021 18:49:51 +0000 (10:49 -0800)]
fix syntax error
Quinn Pham [Wed, 17 Nov 2021 22:23:19 +0000 (16:23 -0600)]
[NFC][lldb] Inclusive language: remove instances of master from comments in lldb
[NFC] As part of using inclusive language within the llvm project, this patch
replaces master in these comments.
Reviewed By: clayborg, JDevlieghere
Differential Revision: https://reviews.llvm.org/D114123
Pavel Labath [Thu, 18 Nov 2021 10:12:19 +0000 (11:12 +0100)]
[lldb] Deobfuscate python-swigsafecast.swig
This file was way more complicated than it needed to be.
This patch removes the automagic reference-to-pointer delegation and
replaces the template specializations with regular free functions
(taking reference arguments).
The reason I chose references is twofold:
- there are more arguments being passed by reference than by pointer
- the reference arguments make it more obvious that there is a lot of
leaking going on in there.
Currently, the code was assuming that the pointer arguments have some
kind of a special meaning and that pointer functions take ownership of
their arguments, which isn't true (it's possible it was true at some
point in the past, I haven't done the archeology).
This makes it easier to implement proper lifetime management in
follow-up patches.
Differential Revision: https://reviews.llvm.org/D114150
Philip Reames [Thu, 18 Nov 2021 18:05:04 +0000 (10:05 -0800)]
[SCEV] Move mustprogress based no-self-wrap logic so it applies to all exit conditions
This change moves logic which we'd added specifically for less than tests so that it applies to equalities and greater than tests as well. The basic idea is that if we can show an IV cycles infinitely through the same series on self-wrap, and that the exit condition must be taken to prevent UB, we can conclude that it must be taken before self-wrap and thus infer said flag.
The motivation here is simple loops with unsigned induction variables w/non-one steps and inequality tests. A toy example would be:
for (unsigned i = 0; i != N; i += 2) { body; }
If body contains no side effects, and this is a mustprogress function, we can assume that this must be a finite loop and thus that the exit count is N/2.
Differential Revision: https://reviews.llvm.org/D103991
Quinn Pham [Tue, 9 Nov 2021 14:38:50 +0000 (08:38 -0600)]
[NFC][clang] Inclusive language: replace masterPort with mainPort
[NFC] This patch replaces `masterPort` with `mainPort` in these
testcases.
Reviewed By: ZarkoCA
Differential Revision: https://reviews.llvm.org/D113505
MaheshRavishankar [Thu, 18 Nov 2021 17:27:27 +0000 (09:27 -0800)]
[mlir][Linalg] Do not return failure when all tile sizes are zero.
Returning failure when tile sizes are all zero prevents the change in
the marker. This makes pattern rewriter run the pattern multiple times
only to exit when it hits a limit. Instead just clone the operation
(since tiling is essentially cloning in this case). Then the
transformation filter kicks in to avoid the pattern rewriter to be
invoked many times.
Differential Revision: https://reviews.llvm.org/D113949
Kazu Hirata [Thu, 18 Nov 2021 17:09:52 +0000 (09:09 -0800)]
[llvm] Use range-based for loops (NFC)
Jean Perier [Thu, 18 Nov 2021 17:06:19 +0000 (18:06 +0100)]
[flang] Skip `Fortran STOP:` before message when NO_STOP_MESSAGE is set
In 'STOP bye bye', do not print 'Fortran STOP:` before 'bye bye' when
NO_STOP_MESSAGE environment variable is set at runtime.
Also only exit with code 1 in StopStatementText if this is an ERROR STOP.
This matches other compiler behaviors.
Move STOP related unit tests in their own test file and add new tests to
cover this change.
Differential Revision: https://reviews.llvm.org/D114152
Philip Reames [Thu, 18 Nov 2021 17:05:28 +0000 (09:05 -0800)]
Add a breadcrumb comment to make debugging a user error when using ./utils/update_analyze_test_checks.py easier.
We won't talk about how long it took me to figure this out. The difference in batch vs interactive on the "did you mean to print bitcode" message made this confusing.
Peter Klausler [Mon, 15 Nov 2021 23:18:32 +0000 (15:18 -0800)]
[flang] Fix off-by-one results from folding MAXEXPONENT and MINEXPONENT
Every one was too low by one.
Differential Revision: https://reviews.llvm.org/D114027
Jacques Pienaar [Thu, 18 Nov 2021 17:03:10 +0000 (09:03 -0800)]
[mlir][doc] Avoid name overlap that confuses copy_docs.sh (NFC)
Simon Pilgrim [Thu, 18 Nov 2021 17:02:18 +0000 (17:02 +0000)]
[X86] LowerRotate - pull out repeated is ISD::ROTL check. NFC.
Philip Reames [Thu, 18 Nov 2021 16:56:35 +0000 (08:56 -0800)]
[SCEV] Add test coverage for invertible functions of IVs
Kiran Chandramohan [Thu, 18 Nov 2021 16:43:16 +0000 (16:43 +0000)]
[Flang] Add a factory class for creating Complex Ops
Use the factory class in the FIRBuilder.
Add unit tests for the factory class function and the convert function
of the Complex class.
Reviewed By: clementval, rovka
Differential Revision: https://reviews.llvm.org/D114125
Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Bradley Smith [Thu, 18 Nov 2021 16:50:16 +0000 (16:50 +0000)]
[Clang][SVE] Fix windows test breakage in
26f56438e3dab44cea4c8f16d4cb16e9424b02c6
Adrian Prantl [Thu, 18 Nov 2021 16:51:40 +0000 (08:51 -0800)]
Unbreak test after D111899
Kerry McLaughlin [Tue, 16 Nov 2021 16:30:54 +0000 (16:30 +0000)]
[LoopVectorize] Check the number of uses of an FAdd before classifying as ordered
checkOrderedReductions looks for Phi nodes which can be classified as in-order,
meaning they can be vectorised without unsafe math. In order to vectorise the
reduction it should also be classified as in-loop by getReductionOpChain, which
checks that the reduction has two uses.
In this patch, a similar check is added to checkOrderedReductions so that we
now return false if there are more than two uses of the FAdd instruction.
This fixes PR52515.
Reviewed By: fhahn, david-arm
Differential Revision: https://reviews.llvm.org/D114002
Andrzej Warzynski [Tue, 16 Nov 2021 08:36:05 +0000 (08:36 +0000)]
[flang][CodeGen] Transform `fir.field_index` to a sequence of LLVM MLIR
This patch extends the `FIRToLLVMLowering` pass in Flang by adding a
hook to transform `fir.field_index` to a sequence of LLVM MLIR
instructions.
This is part of the upstreaming effort from the `fir-dev` branch in [1].
[1] https://github.com/flang-compiler/f18-llvm-project
Differential Revision: https://reviews.llvm.org/D113988
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
Krzysztof Drewniak [Wed, 17 Nov 2021 23:56:35 +0000 (23:56 +0000)]
[MLIR][GPU] Add target arguments to SerializeToHsaco
Compiling code for AMD GPUs requires knowledge of which chipset is
being targeted, especially if the code uses chipset-specific
intrinsics (which is the case in a downstream convolution generator).
This commit adds `target`, `chipset` and `features` arguments to the
SerializeToHsaco constructor to enable passing in this required
information.
It also amends the ROCm integration tests to pass in the target
chipset, which is set to the chipset of the first GPU on the system
executing the tests.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D114107
Jacques Pienaar [Thu, 18 Nov 2021 16:23:49 +0000 (08:23 -0800)]
[mlir][doc] Rename doc to match previous name
Previous change inadvertently changed link.