Linus Walleij [Thu, 17 Nov 2022 09:11:10 +0000 (10:11 +0100)]
Merge tag 'qcom-pinctrl-6.2-2' of https://git./linux/kernel/git/krzk/linux-dt into devel
Qualcomm pinctrl Devicetree bindings changes for v6.2, part two
Continuation of refactoring and improving Qualcomm pin controller bindings:
1. Narrow compatible combinations in PMIC MPP.
2. Convert several bindings from TXT to DT schema format: QCS404,
IPQ8074, MSM8660, MSM8916, MSM8960 and MSM8976.
Neil Armstrong [Tue, 15 Nov 2022 10:06:47 +0000 (11:06 +0100)]
dt-bindings: pinctrl: convert semtech,sx150xq bindings to dt-schema
This converts the Semtech SX150Xq bindings to dt-schemas, add necessary
bindings documentation to cover all differences between HW variants
and current bindings usage.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221005-mdm9615-sx1509q-yaml-v3-0-e8b349eb1900@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Krzysztof Kozlowski [Thu, 10 Nov 2022 08:52:30 +0000 (09:52 +0100)]
dt-bindings: pinctrl: qcom,msm8976: convert to dtschema
Convert Qualcomm MSM8976 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Changes during conversion: update the list of non-mux pins (like sdc1)
to match Linux driver.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20221110085230.15108-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Andy Shevchenko [Fri, 11 Nov 2022 12:00:48 +0000 (14:00 +0200)]
pinctrl: Move for_each_maps() to namespace and hide iterator inside
First of all, while for_each_maps() is private to pin control subsystem
it's still better to have it put into a namespace.
Besides that, users are not relying on iterator variable, so hide it
inside for-loop.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20221111120048.42968-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Thierry Reding [Fri, 4 Nov 2022 14:23:44 +0000 (15:23 +0100)]
pinctrl: tegra: Separate Tegra194 instances
Tegra194 has two separate instances of the pin controller, one called
AON (in the always-on domain) and another called "main". Instead of
treating them as a single pin controller, split them up into two
separate controllers. Doing so allows the mapping between the pinmux
and GPIO controllers to be trivial identity mappings and more cleanly
separates the AON from the main IP blocks.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20221104142345.1562750-4-thierry.reding@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Krzysztof Kozlowski [Wed, 9 Nov 2022 10:51:38 +0000 (11:51 +0100)]
dt-bindings: pinctrl: qcom,msm8960: convert to dtschema
Convert Qualcomm MSM8960 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221109105140.48196-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Tue, 8 Nov 2022 14:23:56 +0000 (15:23 +0100)]
dt-bindings: pinctrl: qcom,ipq8074: convert to dtschema
Convert Qualcomm IPQ8074 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20221108142357.67202-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Mon, 7 Nov 2022 18:59:30 +0000 (19:59 +0100)]
dt-bindings: pinctrl: qcom,msm8660: convert to dtschema
Convert Qualcomm MSM8660 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221107185931.22075-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Andy Shevchenko [Wed, 9 Nov 2022 15:23:56 +0000 (17:23 +0200)]
pinctrl: Put space between type and data in compound literal
It's slightly better to read when compound literal data and type
are separated by a space.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Link: https://lore.kernel.org/r/20221109152356.39868-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Wei Li [Tue, 8 Nov 2022 09:45:29 +0000 (17:45 +0800)]
dt-bindings: pinctrl: Correct the header guard of mt6795-pinfunc.h
Rename the header guard of mt6795-pinfunc.h from __DTS_MT8173_PINFUNC_H to
__DTS_MT6795_PINFUNC_H what corresponding with the file name.
Fixes:
81557a71564a ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings")
Signed-off-by: Wei Li <liwei391@huawei.com>
Link: https://lore.kernel.org/r/20221108094529.3597920-1-liwei391@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jesse Taube [Mon, 7 Nov 2022 07:15:10 +0000 (02:15 -0500)]
pinctrl: freescale: Fix i.MXRT1050 pad names
The pad names for the i.MXRT1050 were incorrect. Fix them.
Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Link: https://lore.kernel.org/r/20221107071511.2764628-7-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jesse Taube [Mon, 7 Nov 2022 07:15:09 +0000 (02:15 -0500)]
dt-bindings: mmc: fsl-imx-esdhc: add i.MXRT1170 compatible
Add i.MXRT1170 compatible string to Documentation.
Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221107071511.2764628-6-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jesse Taube [Mon, 7 Nov 2022 07:15:08 +0000 (02:15 -0500)]
dt-bindings: serial: fsl-lpuart: add i.MXRT1170 compatible
Add i.MXRT1170 compatible string to Documentation.
Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221107071511.2764628-5-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jesse Taube [Mon, 7 Nov 2022 07:15:07 +0000 (02:15 -0500)]
dt-bindings: timer: gpt: Add i.MXRT compatible Documentation
Both the i.MXRT1170 and 1050 have the same GPT timer as "fsl,imx6dl-gpt"
Add i.MXRT to the compatible list.
Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20221107071511.2764628-4-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jesse Taube [Mon, 7 Nov 2022 07:15:06 +0000 (02:15 -0500)]
dt-bindings: pinctrl: Fix file path for pinfunc include
Reference to pinfunc.h was wrong. Fix it.
Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Link: https://lore.kernel.org/r/20221107071511.2764628-3-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jesse Taube [Mon, 7 Nov 2022 07:15:05 +0000 (02:15 -0500)]
dt-bindings: arm: imx: Add i.MXRT compatible Documentation
Recently the imxrt1050 was added but the cpu compatible node wasn't
added. Add both i.MXRT1170 and 1050 compatibles to fsl.yaml.
Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221107071511.2764628-2-Mr.Bossman075@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sam Shih [Sun, 6 Nov 2022 08:01:13 +0000 (09:01 +0100)]
pinctrl: mediatek: add pull_type attribute for mediatek MT7986 SoC
Commit
fb34a9ae383a ("pinctrl: mediatek: support rsel feature")
add SoC specify 'pull_type' attribute for bias configuration.
This patch add pull_type attribute to pinctrl-mt7986.c, and make
bias_set_combo and bias_get_combo available to mediatek MT7986 SoC.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221106080114.7426-7-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sam Shih [Sun, 6 Nov 2022 08:01:12 +0000 (09:01 +0100)]
pinctrl: mediatek: extend pinctrl-moore to support new bias functions
Commit
fb34a9ae383a ("pinctrl: mediatek: support rsel feature")
introduced SoC specify 'pull_type' attribute to mtk_pinconf_bias_set_combo
and mtk_pinconf_bias_get_combo, and make the functions able to support
almost all Mediatek SoCs that use pinctrl-mtk-common-v2.c.
This patch enables pinctrl_moore to support these functions.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221106080114.7426-6-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sam Shih [Sun, 6 Nov 2022 08:01:11 +0000 (09:01 +0100)]
pinctrl: mediatek: fix the pinconf register offset of some pins
Correct the bias-pull-up, bias-pull-down and bias-disable register
offset of mt7986 pin-42 to pin-49, in the original driver, the
relative offset value was erroneously decremented by 1.
Fixes:
360de6728064 ("pinctrl: mediatek: add support for MT7986 SoC")
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221106080114.7426-5-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Sam Shih [Sun, 6 Nov 2022 08:01:10 +0000 (09:01 +0100)]
dt-bindings: pinctrl: mt7986: add generic bias-pull* support
Since the bias-pull-{up,down} attribute already defines in pinctrl driver
of mediatek MT7986 SoC, this patch updates bindings to support mediatek
common bias-pull* function.
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221106080114.7426-4-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Frank Wunderlich [Sun, 6 Nov 2022 08:01:09 +0000 (09:01 +0100)]
dt-bindings: pinctrl: update uart/mmc bindings for MT7986 SoC
Fix mmc and uart pins after uart splitting.
Some pinmux pins of the mt7986 pinctrl driver is composed of multiple
pinctrl groups, the original binding only allows one pinctrl group
per dts node, this patch sets "maxItems" for these groups and add new
examples to the binding documentation.
Fixes:
65916a1ca90a ("dt-bindings: pinctrl: update bindings for MT7986 SoC")
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221106080114.7426-3-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Frank Wunderlich [Sun, 6 Nov 2022 08:01:08 +0000 (09:01 +0100)]
dt-bindings: pinctrl: update pcie/pwm/spi bindings for MT7986 SoC
Allow multiple items for pcie, pwm and spi function.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221106080114.7426-2-linux@fw-web.de
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jonathan Neuschäfer [Sat, 5 Nov 2022 18:59:05 +0000 (19:59 +0100)]
pinctrl: nuvoton: wpcm450: Fix handling of inverted MFSEL bits
SCS3SEL and KBCCSEL use inverted logic: Whereas in other fields 0
selects the GPIO function and 1 selects the special function, in these
two fields, 0 selects the special function and 1 selects the GPIO
function.
Adjust the code to handle this quirk.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221105185911.1547847-3-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jonathan Neuschäfer [Sat, 5 Nov 2022 18:59:04 +0000 (19:59 +0100)]
pinctrl: nuvoton: wpcm450: Refactor MFSEL setting code
In preparation for the next patch, which makes the logic around
setting/resetting bits in MFSEL a little more complicated, move that
code to a new function
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221105185911.1547847-2-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Siarhei Volkau [Tue, 1 Nov 2022 20:51:59 +0000 (23:51 +0300)]
docs/pinctrl: fix runtime pinmuxing example
The example declares "struct pinctrl *p" but refers to
"foo->p" which isn't declared in the context of the example.
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221101205159.1468069-3-lis8215@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Siarhei Volkau [Tue, 1 Nov 2022 20:51:58 +0000 (23:51 +0300)]
docs/pinctrl: fix pinctrl_select_state examples
The function requires two arguments.
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Link: https://lore.kernel.org/r/20221101205159.1468069-2-lis8215@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jonathan Neuschäfer [Mon, 31 Oct 2022 22:28:33 +0000 (23:28 +0100)]
pinctrl: nuvoton: wpcm450: Convert irqchip to IRQCHIP_IMMUTABLE
Commit
6c846d026d490 ("gpio: Don't fiddle with irqchips marked as
immutable") added a warning for irqchips that are not marked with
IRQCHIP_IMMUTABLE.
Convert the pinctrl-wpcm450 driver to an immutable irqchip.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20221031222833.201322-1-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Yassine Oudjana [Fri, 28 Oct 2022 15:34:58 +0000 (18:34 +0300)]
dt-bindings: pinctrl: mediatek,pinctrl-mt6795: Improve interrupts description
Clarify the meaning of sysirq to avoid confusion.
Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221028153505.23741-7-y.oudjana@protonmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Yassine Oudjana [Fri, 28 Oct 2022 15:34:57 +0000 (18:34 +0300)]
dt-bindings: pinctrl: mediatek,pinctrl-mt6795: Fix interrupt count
The document currently states a maximum of 1 interrupt, but the DT
has 2 specified causing a dtbs_check error. Replace the maximum limit
with a minimum and add per-interrupt descriptions to pass the check.
Fixes:
81557a71564a ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings")
Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221028153505.23741-6-y.oudjana@protonmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Yassine Oudjana [Fri, 28 Oct 2022 15:34:56 +0000 (18:34 +0300)]
dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Add MT6797
Combine MT6797 pin controller document into MT6779 one. reg and
reg-names property constraints are set using conditionals.
A conditional is also used to make interrupt-related properties
required on the MT6779 pin controller only, since the MT6797
controller doesn't support interrupts (or not yet, at least).
drive-strength and slew-rate properties which weren't described
in the MT6779 document before are brought in from the MT6797 one.
Both pin controllers share a common driver core so they should
both support these properties.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221028153505.23741-5-y.oudjana@protonmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Yassine Oudjana [Fri, 28 Oct 2022 15:34:55 +0000 (18:34 +0300)]
dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Make gpio-ranges optional
The pin controller can function without specifying gpio-ranges so remove
it from required properties. This is also done in preparation for adding
other pin controllers which currently don't have the gpio-ranges property
defined where they are used in DTS. This allows dtbs_check to pass on
those device trees.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221028153505.23741-4-y.oudjana@protonmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Yassine Oudjana [Fri, 28 Oct 2022 15:34:54 +0000 (18:34 +0300)]
dt-bindings: pinctrl: mediatek,mt6779-pinctrl: Improve description
The current description mentions having to put the pin controller
node under a syscon node, but this is not the case in the current
MT6779 device tree. This is not actually needed, so replace the
current description with something more generic that describes
the use of the hardware block.
Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221028153505.23741-3-y.oudjana@protonmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Krzysztof Kozlowski [Fri, 4 Nov 2022 16:11:31 +0000 (12:11 -0400)]
dt-bindings: pinctrl: qcom,qcs404: convert to dtschema
Convert Qualcomm QCS404 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Changes during conversion: add sdc1_rclk pins (used in qcs404-evb.dtsi).
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221104161131.57719-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Mon, 24 Oct 2022 00:23:55 +0000 (20:23 -0400)]
dt-bindings: pinctrl: qcom,msm8916: convert to dtschema
Convert Qualcomm MSM8916 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221024002356.28261-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Shenwei Wang [Thu, 27 Oct 2022 13:08:59 +0000 (08:08 -0500)]
gpio: mxc: enable pad wakeup on i.MX8x platforms
On i.MX8QM/QXP/DXL SoCs, even a GPIO is selected as the wakeup source,
the GPIO block will be powered off when system enters into suspend
state. This can greatly reduce the power consumption of suspend state
because the whole partition can be shutdown. This is called PAD wakeup
feature on i.MX8x platform.
This patch adds the noirq suspend/resume hooks and uses the pad wakeup
feature as the default wakeup method for GPIO modules on
i.MX8QM/QXP/DXL platforms.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20221027130859.1444412-6-shenwei.wang@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Shenwei Wang [Thu, 27 Oct 2022 13:08:58 +0000 (08:08 -0500)]
pinctrl: freescale: add pad wakeup config
add the logic to configure the pad wakeup function via
the pin_config_set handler.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20221027130859.1444412-5-shenwei.wang@nxp.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Balsam CHIHI [Fri, 21 Oct 2022 08:47:08 +0000 (10:47 +0200)]
pinctrl: mediatek: mt8365: use mt8365_set_clr_mode() callback
On MT8365, the SET/CLR of the mode is broken and some pin modes won't
be set correctly.
Use the mt8365_set_clr_mode() callback to fix the issue.
Co-developed-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
Link: https://lore.kernel.org/r/20221021084708.1109986-3-bchihi@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Balsam CHIHI [Fri, 21 Oct 2022 08:47:07 +0000 (10:47 +0200)]
pinctrl: mediatek: common: add mt8365_set_clr_mode() callback for broken SET/CLR modes
On MT8365, the SET/CLR of the mode is broken and some pin modes won't
be set correctly.
Add mt8365_set_clr_mode() callback for such SoCs, so that instead of
using the SET/CLR register, use the main R/W register to
read/update/write the modes.
Co-developed-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Balsam CHIHI <bchihi@baylibre.com>
Link: https://lore.kernel.org/r/20221021084708.1109986-2-bchihi@baylibre.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Krzysztof Kozlowski [Thu, 8 Sep 2022 08:07:03 +0000 (10:07 +0200)]
dt-bindings: pinctrl: qcom,pmic-mpp: make compatible fallbacks specific
Instead of allowing compatibles followed by any fallback (for SPMI or
SSBI PMICs), make the list specific.
Link: https://lore.kernel.org/r/20220908080703.28643-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Linus Walleij [Wed, 26 Oct 2022 07:58:29 +0000 (09:58 +0200)]
Merge tag 'intel-pinctrl-v6.1-2' of git://git./linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v6.1-2
* Add missing and remove unused headers in the pin control and GPIO drivers
* Revise the pin control and GPIO headers
Andy Shevchenko [Fri, 7 Oct 2022 09:53:44 +0000 (12:53 +0300)]
pinctrl: Clean up headers
There is a few things done:
- include only the headers we are direct user of
- when pointer is in use, provide a forward declaration
- add missing headers
- group generic headers and subsystem headers
- sort each group alphabetically
While at it, fix some awkward indentations.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: intel: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: merrifield: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: lynxpoint: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: cherryview: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: zynqmp: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: uniphier: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: ti-iodelay: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: tegra: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: sunxi: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: stmfx: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: stm32: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: starfive: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: st: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: sprd: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Baolin Wang <baolin.wang@linux.alibaba.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: spear: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: single: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: samsung: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: renesas: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: qcom: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: ocelot: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: npcm7xx: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: mvebu: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: microchip-sgpio: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: mediatek: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: lpc18xx: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: lochnagar: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: lantiq: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: k210: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: ingenic: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: imx: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: gemini: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: cy8c95x0: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: cirrus: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: bm1880: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: bcm: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: axp209: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: at91: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: aspeed: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: apple-gpio: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
pinctrl: actions: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
media: c8sectpfe: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 09:53:44 +0000 (12:53 +0300)]
gpiolib: Clean up headers
There is a few things done:
- include only the headers we are direct user of
- when pointer is in use, provide a forward declaration
- add missing headers
- group generic headers and subsystem headers
- sort each group alphabetically
While at it, fix some awkward indentations.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
gpiolib: cdev: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Rewiewed-by: Kent Gibson <warthog618@gmail.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
gpio: tegra186: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
gpio: wm8350: Remove unused header(s)
Some of the headers are unused in the driver, remove them.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
gpio: reg: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
gpio: pl061: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
gpio: pca953x: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
While at it, sort headers alphabetically.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Fri, 7 Oct 2022 13:44:44 +0000 (16:44 +0300)]
gpio: mockup: Add missing header(s)
Do not imply that some of the generic headers may be always included.
Instead, include explicitly what we are direct user of.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Yang Yingliang [Thu, 20 Oct 2022 07:56:50 +0000 (15:56 +0800)]
pinctrl: qcom: sdm670: change sdm670_reserved_gpios to static
sdm670_reserved_gpios is only used in pinctrl-sdm670.c now, change it
to static.
Fixes:
61164d220f52 ("pinctrl: qcom: add sdm670 pinctrl")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20221020075650.1031228-1-yangyingliang@huawei.com
Acked-by: Richard Acayan <mailingradian@gmail.com>
[Fix up subject]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Mon, 24 Oct 2022 07:48:37 +0000 (09:48 +0200)]
Merge tag 'qcom-pinctrl-6.2' of https://git./linux/kernel/git/krzk/linux-dt into devel
Qualcomm pinctrl Devicetree bindings changes for v6.2
Big set of refactoring and improving Qualcomm pin controller bindings:
1. Convert several bindings from TXT to DT schema format: MDM9615,
MSM8974, MSM8994, MSM8996, MSM8998, SC7180, SDM630, SDM845, SM8150.
2. Refactor existing DT schema bindings to be consistent and similar to
each other, remove unneeded pieces (provided by common bindings) and
unify the style.
2. Fix matching of the existing DT schema bindings, so they properly
validate the DTS. When looking for pin configuration (children
nodes), be specific and expect "state" or "pins" suffixes (depending
on the nesting. This allows the schema later to properly parse also
GPIO hogs, although it is not yet implemented. The changes require
aligning the DTS to new layout, but it does not break any
compatibility.
Andy Shevchenko [Tue, 18 Oct 2022 15:12:23 +0000 (18:12 +0300)]
pinctrl: cy8c95x0: Don't use cy8c95x0_set_mode() twice
Instead, call it once in cy8c95x0_pinmux_mode() and if selector is 0,
shortcut the flow by returning 0 immediately.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20221018151223.80846-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Krzysztof Kozlowski [Wed, 19 Oct 2022 00:13:51 +0000 (20:13 -0400)]
dt-bindings: pinctrl: qcom,sc7180: convert to dtschema
Convert Qualcomm SC7180 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20221019001351.1630089-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Mon, 17 Oct 2022 01:22:24 +0000 (21:22 -0400)]
dt-bindings: pinctrl: qcom,msm8974: convert to dtschema
Convert Qualcomm MSM8974 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221017012225.8579-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Sun, 16 Oct 2022 17:36:25 +0000 (13:36 -0400)]
dt-bindings: pinctrl: qcom: drop minItems equal to maxItems
If minItems are missing, they are implicitly equal to maxItems.
Dropping redundant minItems simplifies a bit the binding.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Iskren Chernev <iskren.chernev@gmail.com>
Link: https://lore.kernel.org/r/20221016173625.53769-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Tue, 18 Oct 2022 15:54:50 +0000 (11:54 -0400)]
dt-bindings: pinctrl: qcom,msm8994: convert to dtschema
Convert Qualcomm MSM8994 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221018155450.39816-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Tue, 18 Oct 2022 15:57:21 +0000 (11:57 -0400)]
dt-bindings: pinctrl: qcom,msm8996: convert to dtschema
Convert Qualcomm MSM8996 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221018155721.47140-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Mon, 17 Oct 2022 23:46:53 +0000 (19:46 -0400)]
dt-bindings: pinctrl: qcom,msm8998: convert to dtschema
Convert Qualcomm MSM8998 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221017234653.55506-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Krzysztof Kozlowski [Tue, 18 Oct 2022 16:01:28 +0000 (12:01 -0400)]
dt-bindings: pinctrl: qcom,sm8150: convert to dtschema
Convert Qualcomm SM8150 pin controller bindings to DT schema. Keep the
parsing of pin configuration subnodes consistent with other Qualcomm
schemas (children named with '-state' suffix, their children with
'-pins').
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221018160128.51851-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>