Quentin Colombet [Thu, 7 Apr 2016 23:31:58 +0000 (23:31 +0000)]
[RegisterBankInfo] Add print and dump method to the InstructionMapping
helper class.
llvm-svn: 265747
Quentin Colombet [Thu, 7 Apr 2016 23:25:43 +0000 (23:25 +0000)]
[RegisterBankInfo] Add print and dump method to the ValueMapping helper
class.
llvm-svn: 265746
Quentin Colombet [Thu, 7 Apr 2016 23:18:11 +0000 (23:18 +0000)]
[MachineInstr] Teach the print method about RegisterBank.
Properly print either the register class or the register bank or a
virtual register.
Get rid of a few ifdefs in the process.
llvm-svn: 265745
Peter Collingbourne [Thu, 7 Apr 2016 23:15:50 +0000 (23:15 +0000)]
ELF: Ignore --detect-odr-violations flag.
Differential Revision: http://reviews.llvm.org/D18877
llvm-svn: 265744
Quentin Colombet [Thu, 7 Apr 2016 23:10:14 +0000 (23:10 +0000)]
[AArch64] Fix a typo in the register class to register bank mapping.
For GPR family we want the GPR register bank, not FPR!
llvm-svn: 265743
Quentin Colombet [Thu, 7 Apr 2016 23:08:52 +0000 (23:08 +0000)]
[RegisterBankInfo] Escap \@ in r265741. [-Wdocumentation]
llvm-svn: 265742
Quentin Colombet [Thu, 7 Apr 2016 23:02:00 +0000 (23:02 +0000)]
[RegisterBankInfo] Change the semantic of recordRegBankForType.
Now, recordRegBankForType records only the first register bank that
covers a type instead of the last. This behavior can, nevertheless, be
override with the additional Force parameter to force the update.
llvm-svn: 265741
David Blaikie [Thu, 7 Apr 2016 22:59:58 +0000 (22:59 +0000)]
llvm-dwarfdump: Use deque rather than vector to preserve object reference/pointer identity
TUs in each unit refer to the unit they are in, if the unit is moved
this reference is invalidated & things break.
No test case because UB isn't testable - ASan would likely catch this on
a large enough test case (just needs to have enough TUs that a
reallocation of the vector would occur) but didn't seem worthwhile. Up
for debate/revisiting if anyone feels strongly.
llvm-svn: 265740
Quentin Colombet [Thu, 7 Apr 2016 22:52:49 +0000 (22:52 +0000)]
[RegisterBankInfo] Strengthen getInstrMappingImpl.
Teach the target independent code how to take advantage of type
information to get the mapping of an instruction.
llvm-svn: 265739
Adrian McCarthy [Thu, 7 Apr 2016 22:52:12 +0000 (22:52 +0000)]
Fix TestImport for Windows by ensuring backslashes in the directory paths are properly escaped in Python.
The Python import works by ensuring the directory of the module or package is in sys.path, and then it does a Python `import foo`. The original code was not escaping the backslashes in the directory path, so this wasn't working.
Differential Revision: http://reviews.llvm.org/D18873
llvm-svn: 265738
Rui Ueyama [Thu, 7 Apr 2016 22:49:21 +0000 (22:49 +0000)]
ELF: Implement --build-id=md5.
Previously, we supported only one hash function, FNV-1, so
BuildIdSection directly handled hash computation. In this patch,
I made BuildIdSection an abstract class and defined two subclasses,
BuildIdFnv1 and BuildIdMd5.
llvm-svn: 265737
Quentin Colombet [Thu, 7 Apr 2016 22:45:42 +0000 (22:45 +0000)]
[RegisterBankInfo] Add a way to record what register bank covers a
specific type.
This will be used to find the default mapping of the instruction.
Also, this information is recorded, instead of computed, because it is
expensive from a type to know which register bank maps it.
Indeed, we need to iterate through all the register classes of all the
register banks to find the one that maps the given type.
llvm-svn: 265736
Quentin Colombet [Thu, 7 Apr 2016 22:35:03 +0000 (22:35 +0000)]
[RegisterBankInfo] Introduce getRegBankFromConstraints as an helper
method.
NFC.
The refactoring intends to make the code more readable and expose
more features to potential derived classes.
llvm-svn: 265735
Quentin Colombet [Thu, 7 Apr 2016 22:16:56 +0000 (22:16 +0000)]
[TargetRegisterInfo] Refactor the code to use BitMaskClassIterator.
llvm-svn: 265734
Quentin Colombet [Thu, 7 Apr 2016 22:08:56 +0000 (22:08 +0000)]
[RegisterBankInfo] Refactor the code to use BitMaskClassIterator.
llvm-svn: 265733
Jason Molenda [Thu, 7 Apr 2016 22:00:55 +0000 (22:00 +0000)]
In GDBRemoteCommunicationClient::GetHostInfo, don't set the
os to "ios" or "macosx" if it is unspecified. For environments
where there genuinely is no os, we don't want to errantly
convert that to ios/macosx, e.g. bare board debugging.
Change PlatformRemoteiOS, PlatformRemoteAppleWatch, and
PlatformRemoteAppleTV to not create themselves if we have
an unspecified OS. Same problem - these are not appropriate
platforms for bare board debugging environments.
Have Process::Attach's logging take place if either
process or target logging is enabled.
<rdar://problem/
25592378>
llvm-svn: 265732
Mehdi Amini [Thu, 7 Apr 2016 21:59:28 +0000 (21:59 +0000)]
Const correctness for BranchProbabilityInfo (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265731
Quentin Colombet [Thu, 7 Apr 2016 21:55:21 +0000 (21:55 +0000)]
[TargetRegisterInfo] Introduce a helper class, BitMaskClassIterator, to
iterate over register class bitmask.
Thanks to this helper class, it would not require for each user of the
register classes bitmask to actually know how they are represents.
Moreover, it will make the code much easier to read.
llvm-svn: 265730
Mehdi Amini [Thu, 7 Apr 2016 21:49:31 +0000 (21:49 +0000)]
Rename parameter I to Index for WriteCombinedGlobalValueSummary() (NFC)
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265729
Richard Smith [Thu, 7 Apr 2016 21:46:12 +0000 (21:46 +0000)]
Replace Sema-level implementation of -fassume-sane-operator-new with a
CodeGen-level implementation. Instead of adding an attribute to clang's
FunctionDecl, add the IR attribute directly. This means a module built with
this flag is now compatible with code built without it and vice versa.
This change also results in the 'noalias' attribute no longer being added to
calls to operator new in the IR; it's now only added to the declaration. It
also fixes a bug where we failed to add the attribute to the 'nothrow' versions
(because we didn't implicitly declare them, there was no good time to inject a
fake attribute).
llvm-svn: 265728
Quentin Colombet [Thu, 7 Apr 2016 21:32:23 +0000 (21:32 +0000)]
[RegBankSelect] Reuse RegisterBankInfo logic to get to the register bank
from a register.
On top of duplicating the logic, it was buggy! It would assert on
physical registers, since MachineRegisterInfo does not have any
information regarding register classes/banks for them.
llvm-svn: 265727
Amaury Sechet [Thu, 7 Apr 2016 21:29:39 +0000 (21:29 +0000)]
Do not select EhPad BB in MachineBlockPlacement when there is regular BB to schedule
Summary:
EHPad BB are not entered the classic way and therefor do not need to be placed after their predecessors. This patch make sure EHPad BB are not chosen amongst successors to form chains, and are selected as last resort when selecting the best candidate.
EHPad are scheduled in reverse probability order in order to have them flow into each others naturally.
Reviewers: chandlerc, majnemer, rafael, MatzeB, escha, silvas
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D17625
llvm-svn: 265726
Quentin Colombet [Thu, 7 Apr 2016 21:24:40 +0000 (21:24 +0000)]
[AArch64] Get rid of some GlobalISel ifdefs.
llvm-svn: 265725
Rui Ueyama [Thu, 7 Apr 2016 21:10:42 +0000 (21:10 +0000)]
Sort options.
llvm-svn: 265724
Rui Ueyama [Thu, 7 Apr 2016 21:10:09 +0000 (21:10 +0000)]
ELF: Define -S as an alias for --strip-debug.
llvm-svn: 265723
Rui Ueyama [Thu, 7 Apr 2016 21:04:51 +0000 (21:04 +0000)]
ELF: Add --strip-debug option.
If --strip-debug option is given, then all sections whose names start
with ".debug" are removed from output.
llvm-svn: 265722
Quentin Colombet [Thu, 7 Apr 2016 21:04:30 +0000 (21:04 +0000)]
[TargetRegisterInfo] Fix the comment of SuperRegClassIterator::getMask.
llvm-svn: 265721
Quentin Colombet [Thu, 7 Apr 2016 20:49:15 +0000 (20:49 +0000)]
[AArch64] gcc does not like litteral without quotes even on preprocessor macros.
llvm-svn: 265720
Quentin Colombet [Thu, 7 Apr 2016 20:47:51 +0000 (20:47 +0000)]
[AArch64][CallLowering] Do not build the API if GlobalISel is not built.
This gets rid of some ifdefs and dummy implementations that were here
just to fill the blanks.
llvm-svn: 265719
Richard Smith [Thu, 7 Apr 2016 20:47:37 +0000 (20:47 +0000)]
[modules] Allow differences in flags that only affect preprocessor predefines
(and __has_feature checks) between explicitly-specified module files and the
current compilation.
llvm-svn: 265718
Rui Ueyama [Thu, 7 Apr 2016 20:41:41 +0000 (20:41 +0000)]
ELF: Add --no-gnu-unique option.
When the option is specified, then all STB_GNU_UNIQUE symbols are
converted to STB_GLOBAL symbols.
llvm-svn: 265717
Quentin Colombet [Thu, 7 Apr 2016 20:27:33 +0000 (20:27 +0000)]
[GlobalISel] Add RegBankSelect hooks into the pass pipeline.
Now, RegBankSelect will happen after the IRTranslation and the target
may optionally add additional passes in between.
llvm-svn: 265716
Evgeniy Stepanov [Thu, 7 Apr 2016 20:26:28 +0000 (20:26 +0000)]
[sanitizer] Fix sem_init_glibc.cc test on __HAVE_64B_ATOMIC arches.
glibc can use one of 2 layouts for semaphores: architectures that
don't HAVE_64B_ATOMIC use an uint32_t field with semaphore value,
then a private field, then a waiting thread count field - this is
the layout currently assumed by the test. However, HAVE_64B_ATOMIC
arches use a fused uint64_t field that contains the value in low bits
and waiting thread count in high bits, followed by a private field.
This resulted in taking private field from the wrong offset on 64-bit
atomic platforms (the test still passed, but didn't actually test
the private field). On big-endian platforms, this resulted in a fail,
since the first 4 bytes overlay the thread count field, and not
the value field.
Found while porting ASan to s390x.
Patch by Marcin KoĆcielnicki.
llvm-svn: 265715
Mike Aizatsky [Thu, 7 Apr 2016 20:21:21 +0000 (20:21 +0000)]
[sancov] updaing android test after enabling cc edge pruning
llvm-svn: 265714
Konstantin Zhuravlyov [Thu, 7 Apr 2016 19:54:19 +0000 (19:54 +0000)]
[AMDGPU] Implement get_local_size for amdgcn--amdhsa triple
Differential Revision: http://reviews.llvm.org/D18284
llvm-svn: 265713
Manman Ren [Thu, 7 Apr 2016 19:32:24 +0000 (19:32 +0000)]
[ObjC kindof] Use type bound to filter out the candidate methods.
rdar://
21306753
llvm-svn: 265712
Manman Ren [Thu, 7 Apr 2016 19:30:20 +0000 (19:30 +0000)]
NFC: simplify code in BuildInstanceMessage.
Instead of searching the global pool multiple times: in
LookupFactoryMethodInGlobalPool, LookupInstanceMethodInGlobalPool,
CollectMultipleMethodsInGlobalPool, and AreMultipleMethodsInGlobalPool,
we now collect the method candidates in CollectMultipleMethodsInGlobalPool
only, and other functions will use the collected method set.
This commit adds parameter "Methods" to AreMultipleMethodsInGlobalPool,
and SelectBestMethod. It also changes the implementation of
CollectMultipleMethodsInGlobalPool to collect the desired kind first, if none is
found, to collect the other kind. This avoids the need to call both
LookupFactoryMethodInGlobalPool and LookupInstanceMethodInGlobalPool.
llvm-svn: 265711
Rui Ueyama [Thu, 7 Apr 2016 19:24:51 +0000 (19:24 +0000)]
ELF: Implement --start-lib and --end-lib
start-lib and end-lib are options to link object files in the same
semantics as archive files. If an object is in start-lib and end-lib,
the object is linked only when the file is needed to resolve
undefined symbols. That means, if an object is in start-lib and end-lib,
it behaves as if it were in an archive file.
In this patch, I introduced a new notion, LazyObjectFile. That is
analogous to Archive file type, but that works for a single object
file instead of for an archive file.
http://reviews.llvm.org/D18814
llvm-svn: 265710
Jan Vesely [Thu, 7 Apr 2016 19:23:11 +0000 (19:23 +0000)]
AMDGPU/SI: Implement atomic load/store for i32 and i64
Standard load/store instructions with GLC bit set.
Reviewers: tstellardAMD, arsenm
Differential Revision: http://reviews.llvm.org/D18760
llvm-svn: 265709
Tom Stellard [Thu, 7 Apr 2016 18:30:05 +0000 (18:30 +0000)]
AMDGPU/SI: Add latency for export instructions
Reviewers: arsenm, nhaehnle
Subscribers: nhaehnle, arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18599
llvm-svn: 265708
Quentin Colombet [Thu, 7 Apr 2016 18:19:27 +0000 (18:19 +0000)]
[RegBankSelect] Initial implementation for non-optimized output.
The pass walk through the machine function and assign the register banks
using the default mapping. In other words, there is no attempt to reduce
cross register copies.
llvm-svn: 265707
Marshall Clow [Thu, 7 Apr 2016 18:13:41 +0000 (18:13 +0000)]
Recommit r263036 with additional inlining, so that it will continue to work with existing system dylibs. Implements LWG#2583
llvm-svn: 265706
Derek Bruening [Thu, 7 Apr 2016 18:07:09 +0000 (18:07 +0000)]
[sanitizer] Add early call handling to strlen interceptor
Summary:
The strlen interceptor is sometimes invoked too early for REAL(strlen) to
be initialized. A special check is added to use internal_strlen for this
situation.
Reviewers: dim
Subscribers: llvm-commits, samsonov
Differential Revision: http://reviews.llvm.org/D18851
Change-Id: I3acc58f4abbae1904f25324abd84efea67aad0a2
llvm-svn: 265705
Quentin Colombet [Thu, 7 Apr 2016 18:07:07 +0000 (18:07 +0000)]
[RegisterBankInfo] Add more details on the expectation of
getInstrMapping.
llvm-svn: 265704
Quentin Colombet [Thu, 7 Apr 2016 18:01:19 +0000 (18:01 +0000)]
[RegisterBankInfo] Provide a target independent helper function to guess
the mapping of an instruction on register bank.
For most instructions, it is possible to guess the mapping of the
instruciton by using the encoding constraints.
It remains instructions without encoding constraints.
For copy-like instructions, we try to propagate the information we get
from the other operands. Otherwise, the target has to give this
information.
llvm-svn: 265703
Saleem Abdulrasool [Thu, 7 Apr 2016 17:49:44 +0000 (17:49 +0000)]
Basic: move CodeGenOptions from Frontend
This is a mechanical move of CodeGenOptions from libFrontend to libBasic. This
fixes the layering violation introduced earlier by threading CodeGenOptions into
TargetInfo. It should also fix the modules based self-hosting builds. NFC.
llvm-svn: 265702
Quentin Colombet [Thu, 7 Apr 2016 17:44:54 +0000 (17:44 +0000)]
[RegisterBankInfo] Change the signature of getSizeInBits to factor out
the access to MRI and TRI.
llvm-svn: 265701
Simon Pilgrim [Thu, 7 Apr 2016 17:38:24 +0000 (17:38 +0000)]
Minor Wdocumentation fix. NFCI.
llvm-svn: 265700
Quentin Colombet [Thu, 7 Apr 2016 17:30:18 +0000 (17:30 +0000)]
[RegisterBankInfo] Provide a default constructor for InstructionMapping
helper class.
The default constructor creates invalid (isValid() == false) instances
and may be used to communicate that a mapping was not found.
llvm-svn: 265699
Eugene Zelenko [Thu, 7 Apr 2016 17:28:35 +0000 (17:28 +0000)]
Mention readability-static-definition-in-anonymous-namespace in release notes.
Consistency in using ` and ``.
Differential revision: http://reviews.llvm.org/D18797
llvm-svn: 265698
Simon Pilgrim [Thu, 7 Apr 2016 17:23:55 +0000 (17:23 +0000)]
[X86][SSE] Added bitmask pattern shuffle tests
Based on OR(AND(MASK,V0),AND(~MASK,V1)) style patterns
llvm-svn: 265697
Quentin Colombet [Thu, 7 Apr 2016 17:20:29 +0000 (17:20 +0000)]
[MachineRegisterInfo] Track register bank for virtual registers.
A virtual register may have either a register bank or a register class.
This is represented by a PointerUnion between the related classes.
Typically, a virtual register went through the following states
regarding register class and register bank:
1. Creation: None is set. Virtual registers are fully generic.
2. Register bank assignment: Register bank is set. Virtual registers
live into a register bank, but we do not know the constraints they need
to fulfil.
3. Instruction selection: Register class is set. Virtual registers are
bound by encoding constraints.
To map these states to GlobalISel, the IRTranslator implements #1,
RegBankSelect #2, and Select #3.
llvm-svn: 265696
Quentin Colombet [Thu, 7 Apr 2016 17:09:39 +0000 (17:09 +0000)]
[RegisterBank] Rename RegisterBank::contains into RegisterBank::covers.
llvm-svn: 265695
Ehsan Amiri [Thu, 7 Apr 2016 16:47:35 +0000 (16:47 +0000)]
[PPC] Added a note to release notes
A draft line added to release notes for PPC, to keep a record of changes.
This is just a draft and will be rewritten towards the end of release.
llvm-svn: 265694
Ulrich Weigand [Thu, 7 Apr 2016 16:33:25 +0000 (16:33 +0000)]
[SystemZ] Fix build break from r265689
Fix build error seen on some build bots due to:
error: default label in switch which covers all enumeration values
llvm-svn: 265693
Mike Aizatsky [Thu, 7 Apr 2016 16:22:34 +0000 (16:22 +0000)]
[sancov] updaing android test
llvm-svn: 265692
Etienne Bergeron [Thu, 7 Apr 2016 16:16:36 +0000 (16:16 +0000)]
[clang-tidy] add new checker for string literal with NUL character.
Summary:
This patch adds the support for detecting suspicious string
literals and their //incorrect// usage.
The following example shows a incorrect character escaping leading
to an embedded NUL character.
```
std::string str = "\0x42"; // Should be "\x42".
```
The patch also add detection of truncated literal when a literal
is passed to a string constructor.
Reviewers: hokein, alexfh
Subscribers: LegalizeAdulthood, bcraig, Eugene.Zelenko, bkramer, cfe-commits
Differential Revision: http://reviews.llvm.org/D18783
llvm-svn: 265691
Kevin B. Smith [Thu, 7 Apr 2016 16:15:34 +0000 (16:15 +0000)]
[X86]: Fix for PR27251.
Differential Revision: http://reviews.llvm.org/D18850
llvm-svn: 265690
Ulrich Weigand [Thu, 7 Apr 2016 16:11:44 +0000 (16:11 +0000)]
[SystemZ] Implement conditional returns
Return is now considered a predicable instruction, and is converted
to a newly-added CondReturn (which maps to BCR to %r14) instruction by
the if conversion pass.
Also, fused compare-and-branch transform knows about conditional
returns, emitting the proper fused instructions for them.
This transform triggers on a *lot* of tests, hence the huge diffstat.
The changes are mostly jX to br %r14 -> bXr %r14.
Author: koriakin
Differential Revision: http://reviews.llvm.org/D17339
llvm-svn: 265689
Davide Italiano [Thu, 7 Apr 2016 15:55:28 +0000 (15:55 +0000)]
[IR/Verifier] Merge two ifs into one. NFC.
llvm-svn: 265688
Ulrich Weigand [Thu, 7 Apr 2016 15:55:11 +0000 (15:55 +0000)]
[GVN] Address review comments for D18662
As suggested by Chandler in his review comments for D18662, this
follow-on patch renames some variables in GetLoadValueForLoad and
CoerceAvailableValueToLoadType to hopefully make it more obvious
which variables hold value sizes and which hold load/store sizes.
No functional change intended.
llvm-svn: 265687
Rafael Espindola [Thu, 7 Apr 2016 15:50:23 +0000 (15:50 +0000)]
Fix an use after free.
Thanks to asan for pointing it out that OutputSections was being
resized.
llvm-svn: 265686
JF Bastien [Thu, 7 Apr 2016 15:50:05 +0000 (15:50 +0000)]
NFC: disallow comparison of AtomicOrdering
Follow-up to D18775 and related clang change. AtomicOrdering is a lattice, 'stronger' is the right thing to do, direct comparison is fraught with peril.
llvm-svn: 265685
Ulrich Weigand [Thu, 7 Apr 2016 15:45:02 +0000 (15:45 +0000)]
[GVN] Fix handling of sub-byte types in big-endian mode
When GVN wants to re-interpret an already available value in a smaller
type, it needs to right-shift the value on big-endian systems to ensure
the correct bytes are accessed. The shift value is the difference of
the sizes of the two types.
This is correct as long as both types occupy multiples of full bytes.
However, when one of them is a sub-byte type like i1, this no longer
holds true: we still need to shift, but only to access the correct
*byte*. Accessing bits within the byte requires no shift in either
endianness; e.g. an i1 resides in the least-significant bit of its
containing byte on both big- and little-endian systems.
Therefore, the appropriate shift value to be used is the difference of
the *storage* sizes of the two types. This is already handled correctly
in one place where such a shift takes place (GetStoreValueForLoad), but
is incorrect in two other places: GetLoadValueForLoad and
CoerceAvailableValueToLoadType.
This patch changes both places to use the storage size as well.
Differential Revision: http://reviews.llvm.org/D18662
llvm-svn: 265684
Ehsan Amiri [Thu, 7 Apr 2016 15:30:55 +0000 (15:30 +0000)]
[PPC] Enable transformations in PPCPassConfig::addIRPasses at O2
http://reviews.llvm.org/D18562
A large number of testcases has been modified so they pass after this test.
One testcase is deleted, because I realized even after undoing the original
change that was committed with this testcase, the testcase still passes. So
I removed it. The change to one other testcase (test/CodeGen/PowerPC/pr25802.ll)
is an arbitrary change to keep it passing. Given the original intention of the
testcase, and the fact that fixing it will require some time to change the testcase,
we concluded that this quick change will be enough.
llvm-svn: 265683
Rafael Espindola [Thu, 7 Apr 2016 15:20:56 +0000 (15:20 +0000)]
Simplify dynamic relocation creation.
The position of a relocation can always be expressed as an offset in an
output section.
llvm-svn: 265682
Etienne Bergeron [Thu, 7 Apr 2016 14:58:13 +0000 (14:58 +0000)]
[clang-tidy] fix a crash with -fdelayed-template-parsing in UnnecessaryValueParamCheck.
Summary:
This is the same kind of bug than [[ http://reviews.llvm.org/D18238 | D18238 ]].
Fix crashes caused by deferencing null pointer when declarations parsing may be delayed.
The body of the declarations may be null.
The crashes were observed with a Windows build of clang-tidy and the following command-line.
```
command-line switches: -fms-compatibility-version=19 -fms-compatibility
```
Reviewers: alexfh
Subscribers: kimgr, LegalizeAdulthood, cfe-commits
Differential Revision: http://reviews.llvm.org/D18852
llvm-svn: 265681
Benjamin Kramer [Thu, 7 Apr 2016 14:55:25 +0000 (14:55 +0000)]
[clang-tidy] Remove unnecessary getName() on Decls and Types feeding into a DiagnosticBuilder
Going through a string removes some of the smarts of the diagnosic printer
and makes the code more complicated. This change has some cosmetic impact
on the output but that's mostly minor.
llvm-svn: 265680
Etienne Bergeron [Thu, 7 Apr 2016 14:52:52 +0000 (14:52 +0000)]
[clang-tidy] Fix infinite loop in MisplacedWideningCastCheck.
Summary:
In Release mode, the check was infinite looping over chromium code base.
It seems there is something strange with the creation of the Maps.
I believe the compiler is making some assumption with the implicit conversion from enum <-> int.
By moving the map to a standard switch/cases, we no longer allocate memory and we can keep the same behavior. For a small amount of elements, this is fine.
Reviewers: alexfh
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D18833
llvm-svn: 265679
Tom Stellard [Thu, 7 Apr 2016 14:47:07 +0000 (14:47 +0000)]
AMDGPU/SI: Add MachineBasicBlock parameter to SIInstrInfo::insertWaitStates
Summary: This makes it possible to insert nops at the end of blocks.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D18549
llvm-svn: 265678
Michael Zuckerman [Thu, 7 Apr 2016 14:44:08 +0000 (14:44 +0000)]
Fixing duplicate declaration "_mm256 _mm_set_epi32" in revision 262177
Differential Revision: http://reviews.llvm.org/D17685
llvm-svn: 265677
Rafael Espindola [Thu, 7 Apr 2016 14:34:15 +0000 (14:34 +0000)]
Delete Off_Bss.
It is now just a special case of Off_Sec.
llvm-svn: 265676
Sanjay Patel [Thu, 7 Apr 2016 14:29:05 +0000 (14:29 +0000)]
make __builtin_isfinite more efficient (PR27145)
isinf (is infinite) and isfinite should be implemented with the same function
except we change the comparison operator.
See PR27145 for more details:
https://llvm.org/bugs/show_bug.cgi?id=27145
Ref: forked off of the discussion in D18513.
Differential Revision: http://reviews.llvm.org/D18648
llvm-svn: 265675
Marshall Clow [Thu, 7 Apr 2016 14:24:16 +0000 (14:24 +0000)]
Added a noexcept test
llvm-svn: 265674
Rafael Espindola [Thu, 7 Apr 2016 14:22:09 +0000 (14:22 +0000)]
Don't create dynamic relocs for discarded .eh_frame entries.
This requires knowing input section offsets in output sections before
scanRelocs. This is generally a good thing and should allow further
simplifications in the creation of dynamic relocations.
llvm-svn: 265673
Marshall Clow [Thu, 7 Apr 2016 14:20:31 +0000 (14:20 +0000)]
Fix bug #27260 - add missing swap(reference, reference) to vector<bool>.
llvm-svn: 265672
Etienne Bergeron [Thu, 7 Apr 2016 14:18:53 +0000 (14:18 +0000)]
[clang-tidy] Fix FP with readability-redundant-string-init for default arguments
Summary:
Clang-tidy is reporting a warning of redundant string initialisation
on a string parameter initialized with empty string.
See bug: 27087
The reported example is:
```
#include <string>
void fn(std::string a = "");
```
Reviewers: alexfh
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D18829
llvm-svn: 265671
Valery Pykhtin [Thu, 7 Apr 2016 13:41:51 +0000 (13:41 +0000)]
[AMDGPU] fix readlane/readfirstlane src vgpr operand type.
For VGPR_32 operand disassembler expects a VGPR register encoded as 0..255 (enum8 src operand).
readfirstlane/readline actually has enum9 operand and this change fixes VGPR_32 to VS_32 (enum9 encoding).
Differential Revision: http://reviews.llvm.org/D18696
llvm-svn: 265670
Dmitry Polukhin [Thu, 7 Apr 2016 13:18:43 +0000 (13:18 +0000)]
Fix test/Assembler/ifunc-asm.ll test on hexagon-elf bots
Temporary disable llc test, it seems that such test should be in some
other directory.
llvm-svn: 265669
Alexey Bataev [Thu, 7 Apr 2016 12:45:37 +0000 (12:45 +0000)]
[OPENMP 4.0] Parsing/sema analysis for 'simdlen' clause in 'declare simd'
construct.
OpenMP 4.0 defines '#pragma omp declare simd' construct that may have
associated 'simdlen' clause with constant positive expression as an
argument:
simdlen(<const_expr>)
Patch adds parsin and semantic analysis for simdlen clause.
llvm-svn: 265668
Dmitry Polukhin [Thu, 7 Apr 2016 12:32:19 +0000 (12:32 +0000)]
[GCC] Attribute ifunc support in llvm
This patch add support for GCC attribute((ifunc("resolver"))) for
targets that use ELF as object file format. In general ifunc is a
special kind of function alias with type @gnu_indirect_function. Patch
for Clang http://reviews.llvm.org/D15524
Differential Revision: http://reviews.llvm.org/D15525
llvm-svn: 265667
Kuba Brecka [Thu, 7 Apr 2016 12:10:28 +0000 (12:10 +0000)]
[tsan] Remove long sleeps from fork tests
On one of our testing machines, we're running the tests under heavy load, and especially in the fork-based TSan tests, we're seeing timeouts when a test uses sleep(10), assuming that calling fork() on another thread will finish sooner than that. This patch removes a timeout and makes another one longer.
Differential Revision: http://reviews.llvm.org/D18476
llvm-svn: 265666
Kuba Brecka [Thu, 7 Apr 2016 12:05:09 +0000 (12:05 +0000)]
[tsan] Add support for OS X OSAtomic* functions
OS X provides atomic functions in libkern/OSAtomic.h. These provide atomic guarantees and they have alternatives which have barrier semantics. This patch adds proper TSan support for the functions from libkern/OSAtomic.h.
Differential Revision: http://reviews.llvm.org/D18500
llvm-svn: 265665
Rafael Espindola [Thu, 7 Apr 2016 12:02:42 +0000 (12:02 +0000)]
Add a test for the offset of dynamic relocations.
I found that a patch I am working on would have broken this and no
existing test found it.
llvm-svn: 265664
Kuba Brecka [Thu, 7 Apr 2016 11:59:36 +0000 (11:59 +0000)]
[tsan] Add TSan __tsan_atomic* functions to tsan_interface.h
To avoid using the public header (tsan_interface_atomic.h), which has different data types, let's add all the __tsan_atomic* functions to tsan_interface.h.
Differential Revision: http://reviews.llvm.org/D18543
llvm-svn: 265663
Kuba Brecka [Thu, 7 Apr 2016 11:52:51 +0000 (11:52 +0000)]
[tsan] Add interceptors for dispatch_apply
Adding an interceptor with two more release+acquire pairs to avoid false positives with dispatch_apply.
Differential Revision: http://reviews.llvm.org/D18722
llvm-svn: 265662
Kuba Brecka [Thu, 7 Apr 2016 11:47:11 +0000 (11:47 +0000)]
[tsan] Add XPC support (OS X)
XPC APIs have async callbacks, and we need some more happen-before edges to avoid false positives. This patch add them, plus a test case (sorry for the long boilerplate code, but XPC just needs all that).
Differential Revision: http://reviews.llvm.org/D18493
llvm-svn: 265661
Kuba Brecka [Thu, 7 Apr 2016 11:38:53 +0000 (11:38 +0000)]
[tsan] Add support for dispatch event sources
GCD has APIs for event sources, we need some more release-acquire pairs to avoid false positives in TSan.
Differential Revision: http://reviews.llvm.org/D18515
llvm-svn: 265660
Kuba Brecka [Thu, 7 Apr 2016 11:33:44 +0000 (11:33 +0000)]
[tsan] Fix synchronization in dispatch_sync
In the interceptor for dispatch_sync, we're currently missing synchronization between the callback and the code *after* the call to dispatch_sync. This patch fixes this by adding an extra release+acquire pair to dispatch_sync() and similar APIs. Added a testcase.
Differential Revision: http://reviews.llvm.org/D18502
llvm-svn: 265659
Kuba Brecka [Thu, 7 Apr 2016 11:31:02 +0000 (11:31 +0000)]
[tsan] Fix Darwin tests (missing FileCheck's)
A little embarrassing, but we're missing the call to FileCheck in several Darwin tests. Let's fix this.
Differential Revision: http://reviews.llvm.org/D18503
llvm-svn: 265658
NAKAMURA Takumi [Thu, 7 Apr 2016 11:30:06 +0000 (11:30 +0000)]
InlineSpiller.cpp: Escap \@ in r265547. [-Wdocumentation]
llvm-svn: 265657
Kuba Brecka [Thu, 7 Apr 2016 11:01:05 +0000 (11:01 +0000)]
Enabling AddressSanitizer tests, they should pass now (and this time I mean it).
llvm-svn: 265656
Alexander Kornienko [Thu, 7 Apr 2016 10:17:23 +0000 (10:17 +0000)]
[docs] Update version (http://llvm.org/PR27253)
llvm-svn: 265655
Benjamin Kramer [Thu, 7 Apr 2016 10:14:54 +0000 (10:14 +0000)]
Move class into an anonymous namespace. NFC.
llvm-svn: 265654
Benjamin Kramer [Thu, 7 Apr 2016 10:10:09 +0000 (10:10 +0000)]
Make helper functions static. NFC.
llvm-svn: 265653
Kuba Brecka [Thu, 7 Apr 2016 10:07:45 +0000 (10:07 +0000)]
Simplify the ASan expression (follow-up for the previous commit, r265651).
llvm-svn: 265652
Kuba Brecka [Thu, 7 Apr 2016 10:02:43 +0000 (10:02 +0000)]
Tentative fix (add `extern "C"` declarations to expression prefix) and printing evaluation errors for AddressSanitizer (both MemoryHistoryASan.cpp and AddressSanitizerRuntime.cpp). Hopefully this will make the ASan testcases pass or at least the failure should be easier to diagnose.
llvm-svn: 265651
Pavel Labath [Thu, 7 Apr 2016 09:25:04 +0000 (09:25 +0000)]
Enable TestDebugBreak on x86_64 as well
Test passes there, and this would have helped me catch the snafu in the previous commit.
llvm-svn: 265650
Valery Pykhtin [Thu, 7 Apr 2016 08:38:20 +0000 (08:38 +0000)]
fix r265645: target dependent printf formatting flags.
llvm-svn: 265649
Jeroen Ketema [Thu, 7 Apr 2016 08:36:13 +0000 (08:36 +0000)]
[CMake] Check for sys/types.h in config-ix.cmake
`sys/types.h` has a related define in `config.h.cmake`, but was never
checked for in CMake. Sync this.
Differential Revision: http://reviews.llvm.org/D18825
llvm-svn: 265648