Erik Faye-Lund [Mon, 10 Feb 2020 14:45:22 +0000 (15:45 +0100)]
zink: do not convert bools to/from uint
Since bools are the only 1-bit type, we always know if an SSA-def is a
bool or not. So we don't need to marshal it to uint.
So let's simplify the code a bit here.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
Erik Faye-Lund [Mon, 10 Feb 2020 15:04:45 +0000 (16:04 +0100)]
zink/spirv: uint -> raw
Similarly to the previous commit, the important bit here is the rawness
of these variables, not the uintness. So let's rename these to reflect
this.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
Erik Faye-Lund [Mon, 10 Feb 2020 14:26:41 +0000 (15:26 +0100)]
zink/spirv: unit_value -> raw_value
The point here isn't that the value is uint, but that is't untreated. So
raw seems more fitting as a description.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
Erik Faye-Lund [Fri, 7 Feb 2020 22:16:17 +0000 (23:16 +0100)]
zink/spirv: rename functions a bit
The code is about to change so the whole uint-story isn't as true as it
used to be. So let's soften up the semantics a bit here; we only care
about if we're doing a typed ot untyped store here, really.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
Erik Faye-Lund [Fri, 7 Feb 2020 22:52:43 +0000 (23:52 +0100)]
zink/spirv: prefer store_dest over store_dest_uint
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
Erik Faye-Lund [Fri, 7 Feb 2020 22:52:08 +0000 (23:52 +0100)]
zink/spirv: do not reinvent store_dest
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3763>
luc [Sat, 15 Feb 2020 04:55:16 +0000 (12:55 +0800)]
zink: confused compilation macro usage for zink in target helpers.
Fixes:
8d46e35d16e ("zink: introduce opengl over vulkan")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3831>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3831>
Erik Faye-Lund [Fri, 14 Feb 2020 14:42:51 +0000 (15:42 +0100)]
zink: do not report texture-samplers for unsupported stages
This caused the max combined samplers to be reported as artificially
high.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3826>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3826>
Erik Faye-Lund [Fri, 14 Feb 2020 15:50:42 +0000 (16:50 +0100)]
zink: fix binding-usage
Rewriting the variable bindings is nasty and error-prone, and this code
triggered an assert when trying to resolve API bindings into Vulkan
bindings.
This code still needs some tweaks, but this makes things much better,
and fixes a few bugs where we incorrectly accounted for the
array-indexes.
Fixes:
1c3f4c07047 ("zink: fixup sampler-usage")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3826>
Samuel Pitoiset [Thu, 13 Feb 2020 08:52:53 +0000 (09:52 +0100)]
radv: add a comment about VK_AMD_mixed_attachment_samples on GFX6-GFX7
There is some CTS failures.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
Samuel Pitoiset [Thu, 13 Feb 2020 08:43:25 +0000 (09:43 +0100)]
radv: enable VK_NV_compute_shader_derivatives on GFX6-GFX7
All Crucible tests pass.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
Samuel Pitoiset [Thu, 13 Feb 2020 08:22:04 +0000 (09:22 +0100)]
radv: enable VK_EXT_sampler_filter_minmax on GFX6
Works fine.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
Samuel Pitoiset [Thu, 13 Feb 2020 08:00:22 +0000 (09:00 +0100)]
radv: enable shaderStorageImageMultisample on GFX6-GFX7
It was disabled because untested, but CTS is happy with it.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3808>
Mathias Fröhlich [Fri, 13 Dec 2019 16:09:56 +0000 (17:09 +0100)]
egl: Implement getImage/putImage on pbuffer swrast.
This change adds getImage/putImage callbacks to the swrast pbuffer
loader extension.
This fixes a recent crash with Weston as well as a crashing
test with classic swrast without an official gitlab issue.
v2: Determine bytes per pixel differently and fix non X11 builds.
v3: Plug memory leak and fix crash on out of bounds access.
(Daniel Stone)
v4: Follow the code structure of the wayland get/put image
implementation - hopefully being more obvious.
Handle 64 bits formats.
Use BufferSize directly.
(Emil Velikov)
v5: Change pixel size computation.
(Eric Engestrom)
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2219
Fixes:
d6edccee8da "egl: add EGL_platform_device support"
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3711>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3711>
Qiang Yu [Mon, 10 Feb 2020 08:25:11 +0000 (16:25 +0800)]
lima: rename lima_submit to lima_job
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Mon, 10 Feb 2020 08:09:31 +0000 (16:09 +0800)]
lima: move dump check to macro for lima_dump_command_stream_print
This can prevent the execution of some function like lima_ctx_buff_va
which is passed in as parameter when no dump case.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Fri, 7 Feb 2020 12:32:51 +0000 (20:32 +0800)]
lima: enable multi submit optimization
Also provide a debug option to disable it.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Fri, 7 Feb 2020 11:43:10 +0000 (19:43 +0800)]
lima: optinal flush submit in lima_clear
flush current submit only when there is any draw pending instead of
flush all submits.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Wed, 5 Feb 2020 06:25:21 +0000 (14:25 +0800)]
lima: use per submit dump file
After multi lima_submit, commands for one lima_submit may not be
flushed when change framebuffer. But we want to track command
stream for one submit, so save dump file for each submit.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sun, 9 Feb 2020 12:07:12 +0000 (20:07 +0800)]
lima: move framebuffer info to lima_submit
draw code path does not use framebuffer info, only flush
code path use it now.
Use zsbuf/cbuf in submit instead of context.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Wed, 5 Feb 2020 12:05:03 +0000 (20:05 +0800)]
lima: move clear into submit (v2)
clear info is needed when submit flush and may be changed after
framebuffer switch, so we need to move it into submit.
This also fixes 5 dEQP tests as a side effect: clear info is per
submit so clear value when one submit won't affect next submit.
v2:
remove fixed dEQP test from CI list.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Tue, 4 Feb 2020 14:52:59 +0000 (22:52 +0800)]
lima: move damage_rect into lima_submit
damage_rect is preserved across draws.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Tue, 4 Feb 2020 13:35:33 +0000 (21:35 +0800)]
lima: move pp_max_stack_size to lima_submit
pp_max_stack_size is preserved across draws.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Tue, 4 Feb 2020 10:24:37 +0000 (18:24 +0800)]
lima: move resolve into lima_submit
resolve is preserved across draws.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Tue, 4 Feb 2020 09:30:59 +0000 (17:30 +0800)]
lima: move plbu/vs_cmd_array into lima_submit
This information is preserved across draws and needed
when task submission.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Thu, 6 Feb 2020 12:02:31 +0000 (20:02 +0800)]
lima: track write submits of context (v3)
We need to flush submit which write to the FBO before read it as
texture.
v2:
rename lima_flush_previous_write_submit to
lima_flush_previous_submit_writing_resouce.
v3:
delay add submit to hash_table to lima_update_submit_wb when really
know the render target will be written.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sun, 9 Feb 2020 08:10:18 +0000 (16:10 +0800)]
lima: make lima_submit one time use drop data (v3)
lima_submit is created by lima_submit_get() in draw/clear functions
and freed after submit to kernel.
There is a hash map to find the same lima_submit for color/depth
buffer combination if user switch framebuffer w/o flush the command
then switch back again.
v2:
rename lima_flush_submit to lima_flush_submit_accessing_bo.
v3:
delay flush access submit to lima_update_submit_wb when really know
if this submit will write to the target buffer.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sun, 9 Feb 2020 03:49:52 +0000 (11:49 +0800)]
lima: add lima_submit_get
Replace all usage of "ctx->submit" in draw code path with
lima_submit_get(). This function will create new submit
in the following changes.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sun, 9 Feb 2020 02:19:49 +0000 (10:19 +0800)]
lima: use lima_submit_create_stream_bo for plbu/vs_cmd and pp_stack
lima_ctx_buff is used cross function calls in draws. But plbu/vs_cmd
and pp_stack are used immediately after create. And we need to get
rid of "ctx->submit" in the flush code path which exists in
lima_ctx_buff.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sun, 9 Feb 2020 02:05:33 +0000 (10:05 +0800)]
lima: adjust pp_stream to use lima_submit_create_stream_bo
No need to save the bo, just map and va for use in this submit
is enough.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sun, 9 Feb 2020 01:37:53 +0000 (09:37 +0800)]
lima: add lima_submit_create_stream_bo
For creating stream buffer which is used in single submit
and freed after the submit is passed to kernel driver.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sat, 8 Feb 2020 12:21:12 +0000 (20:21 +0800)]
lima: pass submit parameter for functions in lima_submic.c (v2)
"ctx->submit" won't be used directly, so remove the usage in
lima_submit.c by directly passing the submit parameter. And
more data in lima_context will be moved to lima_submit, so
"ctx" will be replaced by "submit" in those functions.
v2:
rename lima_submit_flush to lima_do_submit.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sat, 8 Feb 2020 11:24:34 +0000 (19:24 +0800)]
lima: move flush code to lima_submit.c
Just code move, no content change.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sat, 8 Feb 2020 10:44:00 +0000 (18:44 +0800)]
lima: put hardware related info to lima_gpu.h
For sharing with multi .c files.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Tue, 4 Feb 2020 07:23:11 +0000 (15:23 +0800)]
lima: merge gp/pp submit
Use single lima_submit for the submit operation. This is also
for moving more information in lima_context to lima_submit.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Tue, 4 Feb 2020 06:32:31 +0000 (14:32 +0800)]
lima: move syncobj from lima_submit to lima_context
As there will be multi lima_submit per context, move
syncobj out of it.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Wed, 12 Feb 2020 03:07:03 +0000 (11:07 +0800)]
lima: add missing resolve check for damage and reload
If color buffer is not touched, we do not need to reload or get
damage region from it.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Fri, 7 Feb 2020 09:07:51 +0000 (17:07 +0800)]
lima: add render target to submit by dirty buffer flags
No need to add un-touched buffer to submit.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sat, 8 Feb 2020 10:00:24 +0000 (18:00 +0800)]
lima: delay plbu head command generation to flush stage (v2)
Prepare for multi submit in which case only know the plb_index when
final flush. Another need for this is proper reload detection: only
when flush stage can we know if need to do reload, because user may
first clear depth, then color individually, so we don't know if need
to pack repload plbu cmd when first clear depth.
v2:
move lima_update_submit_wb before ctx->resolve change for lima_ctx_dirty
to work in lima_submit_wb.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Sun, 2 Feb 2020 08:48:44 +0000 (16:48 +0800)]
lima: delay add plb buffer to submit when flush
Prepare for multi submit in which case plb buffer is known
only when flush.
Keep the write back buffer update which is needed for FB
dirty track.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Tue, 4 Feb 2020 03:06:54 +0000 (11:06 +0800)]
lima: pass array as parameter to PLBU and VS command macros
Don't assume the ctx parameter, prepare for moving PLBU and
VS arrary from lima_context to lima_submit and adding new
plbu_cmd_head array.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Tue, 4 Feb 2020 02:54:40 +0000 (10:54 +0800)]
lima: remove lima_ctx_buff_va submit flags (v2)
We don't have any shared lima_ctx_buff for both GP and PP,
so no need to have these flags.
v2:
still add submit in lima_ctx_buff_va because some bo need
to exist cross flush, so not every submit will call
lima_ctx_buff_alloc.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Tue, 11 Feb 2020 02:32:38 +0000 (10:32 +0800)]
lima: always add texture bo to submit
No matter texture desc change, we need to add texture to submit.
Otherwise texture may be freed before submit finish.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Fri, 7 Feb 2020 03:12:09 +0000 (11:12 +0800)]
lima: use util_copy_framebuffer_state
Use this helper to replace self written code.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Qiang Yu [Thu, 6 Feb 2020 12:20:28 +0000 (20:20 +0800)]
lima: remove definition of lima_is_scanout
There is no implementation of this function.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3755>
Alyssa Rosenzweig [Wed, 12 Feb 2020 02:50:04 +0000 (21:50 -0500)]
pan/decode: Remove extraneous newline
pandecode_log already does this.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Thu, 13 Feb 2020 22:14:05 +0000 (17:14 -0500)]
pan/midgard: Use fprintf instead of printf for constants
I was wondering where those constants disappeared to :-)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes:
968f36d1fc0 ("pan/midgard: Support disassembling to a file")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Thu, 13 Feb 2020 22:12:51 +0000 (17:12 -0500)]
pan/midgard: Don't crash with constants on unknown ops
Just use a dummy name instead.. we can't know a priori what type an
unknown op will consume, but we don't want to dereference a null
pointer.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes:
24360966ab3 ("panfrost/midgard: Prettify embedded constant
prints")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Thu, 13 Feb 2020 12:41:38 +0000 (07:41 -0500)]
pan/midgard: Identify stack barrier flag
In case thread local storage is used.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Wed, 12 Feb 2020 13:39:29 +0000 (08:39 -0500)]
pan/midgard: Set xyzx swizzle for load_compute_arg
Probably harmless but the w component doesn't appear valid so let's
match the blob... one less bit to be nervous about.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Wed, 12 Feb 2020 02:43:43 +0000 (21:43 -0500)]
pan/midgard: Infer tags entirely
We're so close, again marking off a few edge cases is enough to allow us
to omit this data entirely. Woot!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Wed, 12 Feb 2020 02:37:18 +0000 (21:37 -0500)]
pan/midgard: Imply next tags
As long as we can disambiguate a few edge cases, we can imply next tags
entirely which cleans up the disassembly a fair bit (though not as much
as implying tags entirely would -- we'll get there!)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Wed, 12 Feb 2020 02:20:30 +0000 (21:20 -0500)]
pan/midgard: Overhaul tag handling
We unify disparate metadata about tags into a single structure to ensure
information is not left out.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Tue, 11 Feb 2020 20:58:18 +0000 (15:58 -0500)]
pan/midgard: Improve barrier disassembly
Just move some state from unknowns to actual keywords.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Tue, 4 Feb 2020 14:34:11 +0000 (09:34 -0500)]
pan/midgard: Use dummy tag for empty shaders
Fixes INSTR_INVALID_ENC in dEQP-GLES31.functional.compute.basic.empty
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Tue, 4 Feb 2020 14:29:59 +0000 (09:29 -0500)]
pan/midgard: Fix 32/64 mixed swizzle packing
Occurs in SSBO address computation.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Tue, 4 Feb 2020 14:28:06 +0000 (09:28 -0500)]
pan/midgard: Allow jumping out of a shader
This comes up as a `return;` instruction in a compute shader. We need to
use the special tag 1 to signify "break". Fixes numerous
INSTR_INVALID_ENC faults in dEQP-GLES31.functional.compute.basic.*
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Tue, 4 Feb 2020 01:23:41 +0000 (20:23 -0500)]
pan/midgard: Implement barriers
Barriers execute on the texture pipeline on Midgard, so let's
tentatively handle barrier() as conservatively as possible (forcing
memory barriers of both buffers and shared memory). Implementation isn't
quite there yet -- it doesn't look at interactions of adjacent barriers
like it's supposed to -- but the core is there.
Fixes dEQP-GLES31.functional.compute.basic.ssbo_local_barrier_single_invocation
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Tue, 4 Feb 2020 00:21:59 +0000 (19:21 -0500)]
pan/midgard: Fix swizzles harder
Just for disassembly for now~
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Mon, 3 Feb 2020 20:12:24 +0000 (15:12 -0500)]
pan/midgard: Fix missing prefixes
I was wondering where those were going... :)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes:
c1952779d68 ("pan/decode: Dump to a file")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Mon, 3 Feb 2020 19:55:58 +0000 (14:55 -0500)]
pan/midgard: Track pressure when scheduling ld/st
Fixes RA failure in
dEQP-GLES31.functional.shaders.builtin_functions.common.modf.* (which
uses multiple indirect SSBO writes)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Thu, 6 Feb 2020 19:29:42 +0000 (14:29 -0500)]
panfrost: Allocate RAM backing of shared memory
Unlike other GPUs, Mali does not have dedicated shared memory for
compute workloads. Instead, we allocate shared memory (backed to RAM),
and the general memory access functions have modes to access shared
memory (essentially, think of these modes as adding this allocates base
+ workgroupid * stride in harder). So let's allocate enough memory
based on the shared_size parameter and supply it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Mon, 10 Feb 2020 13:56:33 +0000 (08:56 -0500)]
panfrost: Rename unknown2_8 to padding
It's zero everywhere.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Mon, 10 Feb 2020 13:51:37 +0000 (08:51 -0500)]
panfrost: Rename bifrost_framebuffer->mali_framebuffer
(And bifrost_fb_extra to mali_framebuffer_extra, bifrost_render_target
to mali_render_target)
These structures are the norm on midgard t760+, drop the bifrost names,
it's silly... unrelated to the rest of the series but while I'm messing
with pandecode and cleaning up bifrost abstractions, might as well.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Mon, 10 Feb 2020 13:47:09 +0000 (08:47 -0500)]
panfrost: Unify bifrost_scratchpad with mali_shared_memory
It looks like these are the same structure, so this allows us to reuse
mali_shared_memory across architectures, and dispels with the
Bifrost-specific mystery of the scratchpads... nothing so mysterious
after all, just stack.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Wed, 5 Feb 2020 20:58:28 +0000 (15:58 -0500)]
panfrost: Identify mali_shared_memory structure
This small structure is used to configure shared memory and stack for
compute shaders, and is also present at the beginning of framebuffer
descriptors. Let's factor it out.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Tue, 4 Feb 2020 19:24:44 +0000 (14:24 -0500)]
panfrost: Ensure compute shader_meta is zeroed
In theory the hardware doesn't care but it'll make for easier traces.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Alyssa Rosenzweig [Tue, 4 Feb 2020 19:15:27 +0000 (14:15 -0500)]
panfrost: Update comment about magic number relating to barriers
It's a complicated story. But from what I can tell, in GL compute
without barriers, the blob is able to redistribute the workgroups in
various ways (that are not yet understood), whereas with barriers it
cannot redistribute anything, which accounts for erratic workgroup
packing without barriers.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
Dave Airlie [Fri, 14 Feb 2020 05:47:20 +0000 (15:47 +1000)]
ci: bump debian image and change llvm deps to 8
v3: remove version in a few places (Michel)
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3805>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3805>
Dave Airlie [Thu, 13 Feb 2020 00:35:51 +0000 (10:35 +1000)]
gallivm/s390: fix pass init order on s390 with llvm 8 (v2)
llvm 8 has some missing pass dependencies, fix the s390 case
as well.
v2: add ARM also (Michel)
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3805>
Kenneth Graunke [Tue, 11 Feb 2020 19:36:09 +0000 (11:36 -0800)]
iris: Trim "../../src/gallium/drivers/iris/" out of debug dump filenames
Easier to read.
v2: Also trim "/iris/" (Jordan Justen)
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3830>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3830>
Kenneth Graunke [Tue, 11 Feb 2020 19:21:47 +0000 (11:21 -0800)]
iris: Dump frame markers with INTEL_DEBUG=submit
Now you can see which batches go with which frames.
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3830>
Marek Olšák [Wed, 22 Jan 2020 03:53:13 +0000 (22:53 -0500)]
gallium/cso_hash: remove another layer of pointer indirection
Convert this:
struct cso_hash {
union {
struct cso_hash_data *d;
struct cso_node *e;
} data;
};
to this:
struct cso_hash {
struct cso_hash_data data;
struct cso_node *end;
};
1) data is not a pointer anymore.
2) "end" points to "data" and acts as the end of the linked list.
3) This code is still crazy.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Wed, 22 Jan 2020 02:47:47 +0000 (21:47 -0500)]
gallium/cso_hash: cosmetic changes, no behavior changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Wed, 22 Jan 2020 01:18:54 +0000 (20:18 -0500)]
gallium/cso_hash: remove always constant variable nodeSize
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Wed, 22 Jan 2020 01:10:43 +0000 (20:10 -0500)]
gallium/cso_hash: make cso_hash declared within structures instead of alloc'd
This removes one level of indirection.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Wed, 22 Jan 2020 00:46:34 +0000 (19:46 -0500)]
gallium/cso_hash: inline a bunch of functions
I'm probably not getting anything out of this, but it's harmless.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Tue, 21 Jan 2020 00:57:05 +0000 (19:57 -0500)]
gallium/u_vbuf: adjust the heuristic for unrolling indices
This improves performance in the first subtest of Viewperf11/Catia by 10%.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Fri, 24 Jan 2020 01:40:35 +0000 (20:40 -0500)]
gallium/u_upload_mgr: don't do align twice in the u_upload_alloc fast path
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Fri, 24 Jan 2020 01:35:48 +0000 (20:35 -0500)]
gallium/u_upload_mgr: reduce dereferences by adding buffer_size
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Fri, 24 Jan 2020 02:13:44 +0000 (21:13 -0500)]
st/mesa: simplify releasing the current attrib buffer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Fri, 24 Jan 2020 02:10:06 +0000 (21:10 -0500)]
st/mesa: make st_setup_current static
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Fri, 24 Jan 2020 02:08:30 +0000 (21:08 -0500)]
st/mesa: change some loops from while to do..while in st_atom_array.c
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Thu, 23 Jan 2020 03:38:09 +0000 (22:38 -0500)]
st/mesa: simplify determination whether a draw needs min/max index
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Thu, 23 Jan 2020 03:23:09 +0000 (22:23 -0500)]
st/mesa: simplify determination whether a draw has user vertex buffers
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Tue, 21 Jan 2020 03:14:11 +0000 (22:14 -0500)]
st/mesa: always inline the code setting non-64bit vertex elements
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Tue, 4 Feb 2020 01:53:52 +0000 (20:53 -0500)]
mesa: remove unused _mesa_draw_indirect
All drivers that expose ARB_draw_indirect also set the driver callback.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Marek Olšák [Tue, 21 Jan 2020 03:06:30 +0000 (22:06 -0500)]
mesa: translate into gallium vertex formats in mesa/main
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3829>
Francisco Jerez [Sun, 5 Jan 2020 00:16:24 +0000 (16:16 -0800)]
intel/fs/gen7+: Implement discard/demote for SIMD32 programs.
At this point this simply involves fixing the initialization of the
sample mask flag register to take the right dispatch mask from the
thread payload, and fixing sample_mask_reg() to return f1.1 for the
second half of a SIMD32 thread. This improves Manhattan 3.1
performance by 2.4%±0.31% (N>40) on my ICL with SIMD32 enabled
relative to falling back to SIMD16 for the shaders that use discard.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Sun, 5 Jan 2020 00:11:23 +0000 (16:11 -0800)]
intel/fs: Return consistent UW types from sample_mask_reg() in fragment shaders.
In SIMD32 programs that don't use discard, the upper 16 bits of the UD
result of sample_mask_reg() don't contain the sample mask of the upper
16 channels as one would expect. Stop pretending we are returning a
valid 32-bit mask.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Sun, 5 Jan 2020 00:08:16 +0000 (16:08 -0800)]
intel/fs: Refactor predication on sample mask into helper function.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Sat, 4 Jan 2020 23:48:07 +0000 (15:48 -0800)]
intel/fs/gen7+: Swap sample mask flag register and FIND_LIVE_CHANNEL temporary.
FIND_LIVE_CHANNEL was using f1.0-f1.1 as temporary flag register on
Gen7, instead use f0.0-f0.1. In order to avoid collision with the
discard sample mask, move the latter to f1.0-f1.1. This makes room
for keeping track of the sample mask of the second half of SIMD32
programs that use discard.
Note that some MOVs of the sample mask into f1.0 become redundant now
in lower_surface_logical_send() and lower_a64_logical_send().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>x
Francisco Jerez [Sat, 4 Jan 2020 22:32:09 +0000 (14:32 -0800)]
intel/fs: Use helper for discard sample mask flag subregister number.
Use it instead of hard-coding f0.1 for the sample mask of programs
that use discard. This will make the task easier when we replace f0.1
with another flag register location in order to support discard with
SIMD32 shaders.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 23 Jan 2020 20:50:50 +0000 (12:50 -0800)]
intel/fs: Make sample_mask_reg() local to brw_fs.cpp and use it in more places.
It's only really useful there. This will avoid confusion with another
helper with a similar purpose I'm about to introduce that will be
useful in multiple files from the FS back-end.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Tue, 21 Jan 2020 21:55:36 +0000 (13:55 -0800)]
intel/fs/gen11: Work around dual-source blending hangs in combination with SIMD32.
The SIMD8 dual-source blending framebuffer write messages seem to have
trouble releasing the pixel scoreboard dependency in SIMD32 dispatch
mode, which leads to hangs. I have a better workaround for this which
doesn't involve disabling SIMD32 when dual-source blending is enabled,
but I'm still investigating some issues with it. Limit the dispatch
width to SIMD16 in such cases for the moment in order to make the CI
happy on ICL with SIMD32 fragment shaders enabled.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 27 Dec 2019 22:14:06 +0000 (14:14 -0800)]
intel/fs: Set src0 alpha present bit in header when provided in message payload.
Currently the "Source0 Alpha Present to RenderTarget" bit of the RT
write message header is derived from brw_wm_prog_data::replicate_alpha.
However the src0_alpha payload is provided anytime it's specified to
the logical message. This could theoretically lead to an
inconsistency if somebody provided a src0_alpha value while
brw_wm_prog_data::replicate_alpha was false, as I'm planning to do in
a future commit in order to implement a hardware workaround.
Instead calculate the header bit based on whether a src0_alpha value
was provided to the logical message, which guarantees the same
behavior on pre-ICL and ICL+ (the latter used an extended descriptor
bit for this which didn't suffer from the same issue). Remove the
brw_wm_prog_data::replicate_alpha flag.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 24 Jan 2020 23:09:52 +0000 (15:09 -0800)]
intel/fs/gen12: Workaround data coherency issues due to broken NoMask control flow.
Together with the fixup_nomask_control_flow() pass introduced in a
previous patch, this implements a less invasive alternative to the
workaround documented in the hardware spec for GEN:BUG:
1407528679,
which doesn't involve disabling structured control flow.
Under some conditions Gen12 hardware can end up executing a BB with
all channels disabled, which will lead to the execution of any NoMask
instructions in it, even though any execution-masked instructions will
be correctly shot down. This could break assumptions of the SWSB pass
if the data computed by a NoMask instruction is synchronized against
by using an SWSB annotation baked into a regular execution-masked
instruction, since the first (NoMask) instruction may be executed
redundantly by the hardware, even though the second will correctly be
shot down, potentially leading to a RaW or WaW hazard if a third
instruction subsequently accesses the destination register of the
first instruction.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Francisco Jerez [Fri, 24 Jan 2020 06:27:21 +0000 (22:27 -0800)]
intel/fs/gen12: Fixup/simplify SWSB annotations of SIMD32 scratch writes.
Found by inspection. Existing code was trying to avoid assuming that
an SBID had been assigned to the virtual instruction, but
synchronizing the header setup with respect to the previous SIMD16
SEND by using SYNC.ALLRD doesn't really seem possible unless the SEND
instruction had been assigned an SBID. Assert-fail instead if no SBID
has been allocated.
Fixes:
15e3a0d9d264becc "intel/eu/gen12: Set SWSB annotations in hand-crafted assembly."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Francisco Jerez [Fri, 24 Jan 2020 06:55:33 +0000 (22:55 -0800)]
intel/fs/gen12: Workaround unwanted SEND execution due to broken NoMask control flow.
This is a less invasive alternative to the workaround documented in
the hardware spec for GEN:BUG:
1407528679, which doesn't involve
disabling structured control flow (it's unlikely that switching to
GOTO/JOIN would have actually fixed the problem anyway).
Under some conditions Gen12 hardware can end up executing a BB with
all channels disabled, which will lead to the execution of any NoMask
instructions in it, even though any execution-masked instructions will
be correctly shot down. This may break assumptions of some NoMask
SEND messages whose descriptor depends on data generated by live
invocations of the shader.
This avoids the problem by predicating certain instructions on an ANY
horizontal predicate that makes sure that their execution is omitted
when all channels of the program are disabled. The shader-db impact
of this patch seems to be minimal:
total instructions in shared programs:
17169833 ->
17169913 (0.00%)
instructions in affected programs: 30663 -> 30743 (0.26%)
helped: 0
HURT: 42
total cycles in shared programs:
336966176 ->
336968568 (0.00%)
cycles in affected programs: 2367290 -> 2369682 (0.10%)
helped: 0
HURT: 13
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>
Francisco Jerez [Fri, 24 Jan 2020 07:01:32 +0000 (23:01 -0800)]
intel/fs: Add virtual instruction to load mask of live channels into flag register.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: 20.0 <mesa-stable@lists.freedesktop.org>