Samuel Pitoiset [Tue, 24 May 2022 10:13:33 +0000 (12:13 +0200)]
radv: unify radv_pipeline_has_XXX() helpers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16688>
Samuel Pitoiset [Tue, 24 May 2022 09:38:37 +0000 (11:38 +0200)]
radv: rename radv_cmd_state::pipeline to graphics_pipeline
To be consistent with compute pipelines.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16688>
Samuel Pitoiset [Tue, 24 May 2022 09:35:42 +0000 (11:35 +0200)]
radv: move HS info and task_num_entries to the physical device
They are not logical device properties.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16688>
Timur Kristóf [Sun, 22 May 2022 08:43:42 +0000 (10:43 +0200)]
radv: Implement conditional rendering for async compute queue.
MEC (the compute queue firmware) does not support real
predication, so we have to emulate that using COND_EXEC
packets before each dispatch.
Additionally, COND_EXEC doesn't have an inverted mode, so
in order to support inverted mode conditional rendering, we
allocate a new piece of memory in which we invert the condition.
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6533
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16653>
Alejandro Piñeiro [Tue, 24 May 2022 14:54:37 +0000 (16:54 +0200)]
v3dv/bo: unmap any bo that goes to the bo cache
As it could happens that when a bo is reused from the cache, it is
being mapped with a smaller size that needed. So let's just unmap it,
and let be remapped with the needed size.
Even if we could try to be smarter when deciding when to unmap or not,
to avoid uneeded re-mappings later, it is also true that doing the
unmap would help to reduce the memory used.
This fixes an assert when running the following tests in a row (same
deqp-vk execution):
dEQP-VK.pipeline.creation_feedback.graphics_tests.vertex_stage_fragment_stage
dEQP-VK.pipeline.executable_properties.graphics.vertex_stage_geometry_stage_fragment_stage
dEQP-VK.pipeline.executable_properties.graphics.vertex_stage_fragment_stage_internal_representations
That hits the following assertion:
assert(qpu_bo && qpu_bo->map_size >= variant->assembly_offset +
variant->qpu_insts_size);
at v3dv_pipeline.c, pipeline_get_qpu.
v2: use just one call to v3dv_bo_unmap (move call at v3dv_bo_free,
replace call at bo_free for assert) (Iago)
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16678>
Kenneth Graunke [Tue, 24 May 2022 09:44:53 +0000 (02:44 -0700)]
intel/compiler: Move spill/fill tracking to the register allocator
Originally, we had virtual opcodes for scratch access, and let the
generator count spills/fills separately from other sends. Later, we
started using the generic SHADER_OPCODE_SEND for spills/fills on some
generations of hardware, and simply detected stateless messages there.
But then we started using stateless messages for other things:
- anv uses stateless messages for the buffer device address feature.
- nir_opt_large_constants generates stateless messages.
- XeHP curbe setup can generate stateless messages.
So counting stateless messages is not accurate. Instead, we move the
spill/fill accounting to the register allocator, as it generates such
things, as well as the load/store_scratch intrinsic handling, as those
are basically spill/fills, just at a higher level.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16691>
Dave Airlie [Wed, 25 May 2022 03:28:43 +0000 (13:28 +1000)]
lavapipe: fix depth bias offset flag enables.
When vulkan enables depth bias, enable it for all 3 prim types
in gallium.
This fixes:
dEQP-VK.draw.renderpass.depth_bias.depth_bias_*
and
one zink test in CI
Cc: mesa-stable
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16701>
Mike Blumenkrantz [Tue, 17 May 2022 15:08:37 +0000 (11:08 -0400)]
zink: use XOR for descriptor hash accumulation
these values are already hashed, so there's no need to use as much cpu
to fully re-hash them again
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16645>
Mike Blumenkrantz [Mon, 16 May 2022 21:28:59 +0000 (17:28 -0400)]
zink: add a "compact" descriptor mode
this compacts the ubo+ssbo and samplerview+image sets, enabling zink
to run fully featured with only 4 descriptor sets used
fixes #4964
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16645>
Mike Blumenkrantz [Fri, 20 May 2022 16:05:29 +0000 (12:05 -0400)]
zink: flag descriptor sets as changed before updating hashes
if the program changes, assume the hashes changed
this could probably be improved in the future to check for matching shader
interfaces, but that's a problem for later
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16645>
Mike Blumenkrantz [Mon, 16 May 2022 21:27:56 +0000 (17:27 -0400)]
zink: use descriptor set index indirection in cache state updates
no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16645>
Mike Blumenkrantz [Mon, 16 May 2022 21:26:59 +0000 (17:26 -0400)]
zink: use descriptor set index indirection in program init
should be no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16645>
Mike Blumenkrantz [Mon, 16 May 2022 20:56:11 +0000 (16:56 -0400)]
zink: use descriptor indices in compiler
should be no functional changes, just adding indirection
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16645>
Mike Blumenkrantz [Mon, 16 May 2022 20:54:47 +0000 (16:54 -0400)]
zink: add screen-based indexing to descriptor sets
this allows indirection for internal descriptor type -> vk descriptor set
and enables more easily altering the descriptor set index at runtime
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16645>
Mike Blumenkrantz [Mon, 16 May 2022 20:52:48 +0000 (16:52 -0400)]
zink: create all descriptor ref templates at once
no functional changes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16645>
Mike Blumenkrantz [Sun, 22 May 2022 15:34:57 +0000 (11:34 -0400)]
zink: clamp dynamic render layerCount to 1
util function unhelpfully returns 0
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16656>
Mike Blumenkrantz [Fri, 20 May 2022 16:39:03 +0000 (12:39 -0400)]
zink: only warn once for SRGB fb without KHR_swapchain_mutable_format
Fixes:
4bb45bcd168 ("zink: add error logging for SRGB framebuffer without KHR_swapchain_mutable_format")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16642>
Yiwei Zhang [Tue, 24 May 2022 16:44:32 +0000 (16:44 +0000)]
venus: use common entry point for VkPhysicalDeviceMemoryProperties
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16694>
Yiwei Zhang [Tue, 24 May 2022 16:41:45 +0000 (16:41 +0000)]
radv: remove VkPhysicalDeviceMemoryProperties2 workaround
This reverts
03888bf09c0dce42d1857f3c7acbb86715837198
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16694>
Yiwei Zhang [Tue, 24 May 2022 16:39:12 +0000 (16:39 +0000)]
vulkan: remove the VkPhysicalDeviceMemoryProperties workaround
cts fix landed in vulkan-cts-1.2.5 while mesa CI has bumped once.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Tested-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16694>
Michael Skorokhodov [Fri, 8 Apr 2022 18:18:44 +0000 (21:18 +0300)]
anv: Update line range
This commit increases the maximum line width to 8.0 for SLK+
and to 7.9921875 for BDW and earlier.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6234
Fixes:
fce0027d ("anv: Unbreak wide lines on HSW/BDW")
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15879>
Kenneth Graunke [Mon, 23 May 2022 19:54:22 +0000 (12:54 -0700)]
intel: Fix analysis invalidation in eliminate_find_live_channel
If we saw a HALT instruction, we would forget to invalidate our analysis
pass information before returning progress.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16677>
Marcin Ślusarz [Tue, 24 May 2022 17:27:21 +0000 (19:27 +0200)]
intel/tools: fix 32-bit build
Fixes:
0aac3b1009d ("intel/tools/aubinator: add support for 2 "new" subopcodes")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6553
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16695>
Marcin Ślusarz [Mon, 23 May 2022 14:43:47 +0000 (16:43 +0200)]
nir: add load_task_payload intrinsic to nir_divergence_analysis
It's divergent depending on sources.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16668>
Marcin Ślusarz [Thu, 12 May 2022 15:03:09 +0000 (17:03 +0200)]
nir: add load_mesh_inline_data_intel intrinsic to nir_divergence_analysis
It's not divergent.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16668>
Timur Kristóf [Mon, 23 May 2022 05:54:58 +0000 (07:54 +0200)]
nir: Add explicit task payload atomic intrinsics.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16693>
Alyssa Rosenzweig [Wed, 4 May 2022 19:42:09 +0000 (15:42 -0400)]
panfrost: Don't allocate SHARED as scanout
This is useless and might cause problems.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Extremely-acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16334>
Alyssa Rosenzweig [Wed, 4 May 2022 18:51:20 +0000 (14:51 -0400)]
panfrost: Simplify the kmsro create path
Unify the "create regular resource" and "create scanout resource" code paths.
They only differ in how the backing memory is allocated. This unifies the layout
code as well, avoiding hacks for AFBC.
What I really care about is that, if we're creating the resource, we choose the
layout first with pan_image_layout_init and allocate that layout.
pan_image_layout_init is a common, extensively tested (including unit tested)
helper written for correctness with a deep understanding of the hardware.
By contrast, we currently guess the layout with some hacks specific to AFBC,
allocate our guess, and then then tell pan_image_layout_init to use the layout
we guessed and pray everything works out. (It does work out, but it's all kinds
of wrong, in terms of layering violation. If that really is the way to go, I can
add the required routines to the layout code. But that doesn't seem right.)
All of this is motivated by extending the layout code to handle AFBC with other
superblock sizes or tiled headers without having to pile on extra hacks in this
WSI path.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16334>
Sil Vilerino [Mon, 23 May 2022 14:10:36 +0000 (07:10 -0700)]
meson: Add build option for gallium-d3d12-video feature
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6511
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16597>
Sil Vilerino [Mon, 23 May 2022 14:06:58 +0000 (07:06 -0700)]
meson: Update DirectX-Headers dependency to 1.602.0 version with fallback to the wrap
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16597>
Icecream95 [Tue, 24 May 2022 06:25:47 +0000 (18:25 +1200)]
panfrost: Only write depth / stencil once if MRT is used
We can't assume that RT0 will be written, so this has to be based on
whether a combined store has already been emitted, not the location of
the store.
Emit a non-special combined_store intrinsic that only writes colour
for the other RTs, as reordering stores breaks the Midgard compiler.
Fixes:
d37e901e35a ("pan/mdg: Add new depth store lowering")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6527
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16685>
Icecream95 [Tue, 24 May 2022 04:30:54 +0000 (16:30 +1200)]
pan/mdg: Read base for combined stores
Fixes depth/stencil writes with MRT.
Fixes:
b3d72727537 ("pan/mdg: Don't read base for combined stores")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16685>
Icecream95 [Tue, 24 May 2022 04:29:46 +0000 (16:29 +1200)]
pan/bi: Read base for combined stores
Fixes depth/stencil writes with MRT.
Fixes:
996645e4794 ("pan/bi: Don't read base for combined stores")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16685>
Icecream95 [Tue, 24 May 2022 04:09:42 +0000 (16:09 +1200)]
nir: Add store_combined_output_pan BASE back
It's meaningful for this intrinsic and so does not add noise to the
lowering pass.
(Although dual-source writes must be to RT 0, depth and stencil
writes, which store_combined_output_pan is also used for, can still be
done with MRT enabled.)
Fixes:
5c168f09eb9 ("nir: Eliminate store_combined_output_pan BASE")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16685>
Timur Kristóf [Sat, 21 May 2022 14:31:08 +0000 (16:31 +0200)]
radv: Clarify emitting graphics shader pointers.
Rename radv_emit_global_shader_pointers to radv_emit_graphics_shader_pointers
and don't call it on compute queues. Note that the registers
that this function sets, are not available on the async compute
queue anyway.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16395>
Timur Kristóf [Sun, 8 May 2022 18:11:49 +0000 (20:11 +0200)]
radv: Refactor queue state to separate structure.
In the future we'll need a 1:N mapping between radv_queue objects and
HW queues, meaning that 1 radv_queue object will need to be able to
submit to multiple queues. To do that, we'll must also maintain a different
state for each HW queue.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16395>
Timur Kristóf [Sun, 8 May 2022 17:57:27 +0000 (19:57 +0200)]
radv: Pass radv_device pointer to some functions.
This will be needed for a future refactor of these functions
where we won't pass radv_queue to them anymore.
Also remove the radv_queue pointer from functions which
don't actually need it.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16395>
Timur Kristóf [Sun, 8 May 2022 17:49:35 +0000 (19:49 +0200)]
radv: Use a ws variable during preamble creation.
This is to prevent excessive code repetition, and hopefully make the
code a bit easier to read.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16395>
Timur Kristóf [Thu, 5 May 2022 20:46:38 +0000 (22:46 +0200)]
radv: Introduce ring info structure for queues, refactor preamble generation.
Put the shader ring information into a separate structure.
Also clean up how this information is used when generating the preambles
and add a few comments that explain how it works.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16395>
Viktoriia Palianytsia [Tue, 17 May 2022 06:36:26 +0000 (09:36 +0300)]
anv: Add workaround for sample mask with multisampling
The game Batman: Arkham Knight expects OpenGL behavior
with sample mask and multisampling which is different
from the Vulkan one.
This workaround fix changes key->ignore_sample_mask_out
value that is used for
prog_data->uses_omask definition in brv_fs.cpp(9740)
In that way prog_data->uses_omask also changes it value
and the cloak stops flickering.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6078
Signed-off-by: Viktoriia Palianytsia <v.palianytsia@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16551>
Timur Kristóf [Mon, 23 May 2022 12:33:38 +0000 (14:33 +0200)]
aco: Fix scratch with task shaders.
Task shaders work like compute shaders, their scratch pointer
is currently located at the first two user SGPRs.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16692>
Italo Nicola [Tue, 15 Feb 2022 14:09:56 +0000 (11:09 -0300)]
tgsi: Add SEPARABLE_PROGRAM property
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16308>
Samuel Pitoiset [Tue, 24 May 2022 11:09:22 +0000 (13:09 +0200)]
radv/ci: fix fails list for NAVI21
Probably a wrong rebase. Also add Vangogh.
Fixes:
72910242a6a ("radv/ci: Skip slow/crashing ray tracing tests")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16690>
Timothy Arceri [Tue, 24 May 2022 04:38:11 +0000 (14:38 +1000)]
etnaviv: vectorise io
This etnaviv backend code depends heavly on optimisation passes eliminating
all but a single write to shader outputs. Here we make sure that shader
output writes are vectorised.
Fixes:
7647023f3bb5 ("glsl: enable the use of the nir based varying linker")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6536
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16683>
Timothy Arceri [Tue, 24 May 2022 04:35:19 +0000 (14:35 +1000)]
etnaviv: assert if etna_shader_io_file reg overrun
This code depends on optimisations eliminating all but a single write
to outputs. assert if we are about to overrun the array i.e an
output was possibly written to twice.
See: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6536
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16683>
Konstantin Seurer [Wed, 4 May 2022 13:51:23 +0000 (15:51 +0200)]
radv: Add fail/flake lists for navi22
This is a copy of the sienna_cichlid ones and
only useful for running vk-cts-image on navi22
cards.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16007>
Konstantin Seurer [Tue, 10 May 2022 06:58:38 +0000 (08:58 +0200)]
radv: Enable ray queries by default
Ray queries and acceleration structure builds
are quite stable now and so we can enable those
features for CI and more feedback and bug reports.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16007>
Konstantin Seurer [Tue, 10 May 2022 07:01:29 +0000 (09:01 +0200)]
radv/ci: Skip slow/crashing ray tracing tests
In preparation to enable ray queries by default.
This is also useful for testing ray tracing
pipeline changes with vk-cts-image.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16007>
Marcin Ślusarz [Thu, 19 May 2022 15:10:58 +0000 (17:10 +0200)]
intel/tools: add macros for gfx12+ variant of VCSUNIT0
Not used for now.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16664>
Marcin Ślusarz [Thu, 19 May 2022 15:08:43 +0000 (17:08 +0200)]
intel/tools/aubinator: list all platforms in help message
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16664>
Marcin Ślusarz [Thu, 19 May 2022 15:06:48 +0000 (17:06 +0200)]
intel/tools/aubinator: add support for 2 "new" subopcodes
... and add macros for subopcodes we haven't seen yet
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16664>
Marcin Ślusarz [Thu, 19 May 2022 15:05:18 +0000 (17:05 +0200)]
intel/tools: drop wrappers around mmio regs macros
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16664>
Marcin Ślusarz [Thu, 19 May 2022 14:35:52 +0000 (16:35 +0200)]
intel/tools: clean up mmio regs definitions
Each unit has the same regs at the same offsets.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16664>
Marcin Ślusarz [Wed, 18 May 2022 10:25:51 +0000 (12:25 +0200)]
intel/tools: add support for GEM_CREATE_EXT in intel_dump_gpu
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16664>
Konstantin Seurer [Sat, 21 May 2022 21:53:31 +0000 (23:53 +0200)]
radv: Replace nir_vector_extract with nir_channel
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16650>
Konstantin Seurer [Sat, 21 May 2022 21:43:42 +0000 (23:43 +0200)]
radv: Add and use radv_bvh_node_type
We use magic numbers for node types in many
places of the RADV code. This commit adds an enum
for the node types and uses it to replace magic
numbers in the acceleration structure build code.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16650>
Vasily Khoruzhick [Mon, 23 May 2022 06:32:16 +0000 (23:32 -0700)]
lima: enable PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
It looks like we don't need to do anything special to enable it.
Piglit spec@arb_buffer_storage@bufferstorage-persistent skip: 16 =>
skip: 12, pass: 4. The rest require GL_ARB_shader_image_load_store
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16660>
Vasily Khoruzhick [Sun, 22 May 2022 21:13:45 +0000 (14:13 -0700)]
lima: Implement texture_barrier
Improves x11perf -copywinwin100 from ~1520/sec to ~3700/sec
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16658>
Guilherme Gallo [Mon, 16 May 2022 00:44:48 +0000 (21:44 -0300)]
ci/lava: Fix Gitlab Section markers
LAVA is mangling the escape codes from ANSI during log fetching from the
target device, making the gitlab section markers from deqp, for example,
to not work, inputting noise into the log.
This commit makes the simplest fix which is to replace the mangled
characters to the fixed ones.
This approach is error-prone, since it may unwittingly replace a genuine
log that resembles the mangled escape code. But this solution should
suffice until we get a proper fix from LAVA team itself.
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16520>
Guilherme Gallo [Mon, 16 May 2022 00:35:48 +0000 (21:35 -0300)]
ci/lava: Fix colored LAVA outputs
LAVA is mangling the escape codes from ANSI during log fetching from the
target device, making the colored lines from deqp, for example, to not
work, inputting noise into the log.
This commit makes the most straightforward fix which is to replace the
mangled characters to the fixed ones.
This approach is error-prone since it may unwittingly replace a genuine
log that resembles the mangled escape code. But this solution should
suffice until we get a proper fix from LAVA developers itself.
Fixes: #5503
Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16520>
Yonggang Luo [Mon, 23 May 2022 14:16:34 +0000 (22:16 +0800)]
nir: Fixes MSVC compiling error about unused variable `_`
Fixes:
836470d4331 ("nir: allow NIR_PASS(_, )")
MSVC compiling error:
```
nir/nir_lower_shader_calls.c
../mesa/src/compiler/nir/nir_lower_shader_calls.c(1188): error C2220: the following warning is treated as an error
../mesa/src/compiler/nir/nir_lower_shader_calls.c(1188): warning C4101: '_': unreferenced local variable
../mesa/src/compiler/nir/nir_lower_shader_calls.c(1190): warning C4101: '_': unreferenced local variable
```
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16666>
Jason Ekstrand [Wed, 18 May 2022 17:23:17 +0000 (12:23 -0500)]
nir/algebraic: Add two more pack/unpack rules
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16591>
Erik Faye-Lund [Fri, 20 May 2022 12:38:46 +0000 (14:38 +0200)]
d3d12: add missing cmath includes
If we want to use the std:: version of the math functions, we need to
include <cmath>.
Fixes:
b171a6baa21 ("d3d12: Add video encode implementation of pipe_video_codec")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16636>
Rhys Perry [Wed, 11 May 2022 18:33:32 +0000 (19:33 +0100)]
aco: only add/subtract low bits of program addresses
fossil-db (Sienna Cichlid):
Totals from 4007 (2.47% of 162293) affected shaders:
Instrs: 3733239 -> 3728018 (-0.14%)
CodeSize:
20770340 ->
20749456 (-0.10%)
Latency:
46883958 ->
46872764 (-0.02%); split: -0.02%, +0.00%
InvThroughput:
10550392 ->
10548698 (-0.02%); split: -0.02%, +0.00%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16460>
Rhys Perry [Wed, 11 May 2022 18:23:43 +0000 (19:23 +0100)]
aco/tests: add test for p_constaddr with a non-zero offset
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16460>
Rhys Perry [Wed, 11 May 2022 18:23:00 +0000 (19:23 +0100)]
aco: fix p_constaddr with a non-zero offset
Seems this broke a while ago and we never noticed.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes:
0af7ff49fde ("aco: lower p_constaddr into separate instructions earlier")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16460>
Samuel Pitoiset [Fri, 20 May 2022 16:37:50 +0000 (18:37 +0200)]
radv: introduce radv_graphics_pipeline_info and split existing info structs
I should have introduced radv_graphics_pipeline_info earlier. More
states will be added later.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16643>
Erico Nunes [Tue, 26 Apr 2022 09:09:47 +0000 (11:09 +0200)]
lima/ppir: merge branch nodes in simple cases
In some simple cases, we can merge the branch operation with an existing
instruction and avoid the creation of an empty new instruction just for
the branch node.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16163>
Erico Nunes [Tue, 26 Apr 2022 09:09:24 +0000 (11:09 +0200)]
lima/ppir: optimize branch comparison when possible
The branch operation supports comparisons, so it may be possible to
merge a previous comparison operation with the branch operation.
There are several restrictions to do it at this stage, but it may save
instructions in many cases.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16163>
Erico Nunes [Sun, 27 Mar 2022 12:07:46 +0000 (14:07 +0200)]
docs/ci: fix literalinclude of caching setup files
Fix the syntax to show the files in the generated sphinx, otherwise
they just don't show at all.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15599>
Jan Palus [Fri, 20 May 2022 09:20:33 +0000 (11:20 +0200)]
pvr: use UINT64_C for 64-bit constant
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6528
Signed-off-by: Jan Palus <jpalus@fastmail.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16630>
Boris Brezillon [Fri, 20 May 2022 11:53:30 +0000 (04:53 -0700)]
dzn: Use the correct ICD path on Win32
Similar to commit
c6cddd2e17e ("lavapipe: Use the correct ICD path on
Win32"), but applied to dozen.
Suggested-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16634>
Boris Brezillon [Fri, 20 May 2022 11:17:33 +0000 (04:17 -0700)]
spirv: Fix windows build
Looks like MSVC doesn't like VLAs:
src/compiler/spirv/spirv_to_nir.c(3879): error C2057: expected constant expression
src/compiler/spirv/spirv_to_nir.c(3879): error C2466: cannot allocate an array of constant size 0
src/compiler/spirv/spirv_to_nir.c(3879): error C2133: 'srcs': unknown size
so let's use a static array size.
Fixes:
87d74311985 ("spirv: Use nir_vec_scalars() to simplify matrix transpose.")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16632>
Boris Brezillon [Fri, 20 May 2022 08:31:24 +0000 (10:31 +0200)]
dzn: Use the vk_sync_binary abstraction
D3D12 fences are capable of handling binary operations, but the
current dzn_sync implementation doesn't match vk_sync expectations
when sync objects are used to back semaphores. In that case, the wait
operation is supposed to set the sync object back to an unsignaled
state after the wait succeeded, but there's no way of knowing what
the sync object is used for, and this implicit-reset behavior is not
expected on fence objects, which also use the sync primitive.
That means we currently have a semaphore implementation that works
only once, and, as soon as the semaphore object has been signaled it
stays in a signaled state until it's destroyed.
We could extend the sync framework to pass an
implicit-reset-after-wait flag, but, given no one else seems to
need that, it's probably simpler to drop the binary sync
capability and rely on the binary-on-top-of-timeline emulation provided
by the core.
Fixes:
a012b219640e ("microsoft: Initial vulkan-on-12 driver")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16629>
Samuel Pitoiset [Wed, 18 May 2022 09:26:53 +0000 (11:26 +0200)]
radv: split radv_pipeline into radv_{graphics,compute,library}pipeline
Instead of using a union in radv_pipeline, this introduces new
structures for graphics, compute and library pipelines which inherit
from radv_pipeline. This will ease graphics pipeline libary implem.
There is still no radv_raytracing_pipeline because RADV actually
uses a compute pipeline for everything but it could be introduced
later when necessary.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16603>
Samuel Pitoiset [Wed, 18 May 2022 12:59:42 +0000 (14:59 +0200)]
radv: cleanup using device/physical_device during pipeline creation
This removes a TON of pipeline->device occurences which were a mess.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16603>
Samuel Pitoiset [Wed, 18 May 2022 12:57:01 +0000 (14:57 +0200)]
radv: move gs_table_depth to the physical_device
This is not a logical device property.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16603>
Samuel Pitoiset [Wed, 18 May 2022 08:42:51 +0000 (10:42 +0200)]
radv: remove unused radv_get_conservative_raster_mode() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16603>
Samuel Pitoiset [Wed, 18 May 2022 08:41:15 +0000 (10:41 +0200)]
radv: remove couple of useless pCreateInfo pointers in the emit path
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16603>
Samuel Pitoiset [Wed, 18 May 2022 08:39:02 +0000 (10:39 +0200)]
radv: rename radv_pipeline_generate_XXX() to radv_pipeline_emit_XXX()
Shorter and clearer.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16603>
Samuel Pitoiset [Wed, 18 May 2022 08:32:48 +0000 (10:32 +0200)]
radv: constify radv_pipeline in more radv_pipeline_generate_XXX() helpers
These functions should only emit registers and not change the pipeline.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16603>
Corentin Noël [Fri, 20 May 2022 08:24:08 +0000 (10:24 +0200)]
virgl/ci: Update virglrenderer
Update virglrenderer to the latest version on time.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16627>
Alyssa Rosenzweig [Sun, 22 May 2022 21:57:34 +0000 (17:57 -0400)]
docs/asahi: Add initial driver docs
Emma asked for some docs on how to use wrap for when wrap gets landed.
This should do :-)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sat, 10 Jul 2021 16:30:40 +0000 (12:30 -0400)]
asahi: Add wrap library
Add a library that wraps the key IOKit entrypoints used in the macOS
UABI for AGX. Our wrapped routines print information about the kernel
calls made and dump work submitted to the GPU using agxdecode. This code
has two major use cases:
1. Debugging Mesa, particularly around the undocumented macOS
user-kernel interface. Logs from Mesa may compared to Metal to check
that the UABI is being used correcrly.
2. Reverse-engineering the hardware, using this as glue to get at the
"interesting" GPU memory.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 22 May 2022 20:51:44 +0000 (16:51 -0400)]
asahi: Guard against encoder overflows
We don't seem to hit this yet, but it's possible so add an assert to
rule it out for failing tests.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 22 May 2022 02:37:14 +0000 (22:37 -0400)]
asahi: Allocate a larger segment list
This ought to be dynamically allocated but because this is macOS kernel
UABI only gunk, let's just hack around it...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 22 May 2022 01:44:27 +0000 (21:44 -0400)]
asahi: Handle RECT textures as 2D
Rectangle textures are just 2D textures with unnormalized coordinates,
but we already handle unnormalized coordinates in the sampler state. So
we just need to alias RECT and 2D.
Fixes GALLIUM_HUD.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Mon, 9 May 2022 01:12:47 +0000 (21:12 -0400)]
asahi: Fix pipeline decoding
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Mon, 9 May 2022 01:02:20 +0000 (21:02 -0400)]
asahi: Improve render target dumping
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Mon, 9 May 2022 00:55:05 +0000 (20:55 -0400)]
asahi: Sync some more unknown fields
I don't understand these structs well. Good news, though-- Asahi Lina
confirmed this is all software-defined crap in the macOS UABI.
Unfortunately, they seem to correspond to physical registers.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 3 Apr 2022 16:28:20 +0000 (12:28 -0400)]
asahi: Drop some unknowns
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 3 Apr 2022 15:19:01 +0000 (11:19 -0400)]
asahi: Identify suballocated size
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 3 Apr 2022 15:13:01 +0000 (11:13 -0400)]
asahi: Identify suballocation mechanism
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 3 Apr 2022 14:34:00 +0000 (10:34 -0400)]
asahi: Decode resource allocation requests
We already know much of this structure, let's pretty print to simplify
our traces.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 3 Apr 2022 14:24:50 +0000 (10:24 -0400)]
asahi: Decode resource allocation responses
We already know much of this structure, let's pretty print to simplify
our traces.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 3 Apr 2022 02:25:51 +0000 (22:25 -0400)]
asahi: Align segment list unknowns with Metal
No observable change.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 3 Apr 2022 02:23:57 +0000 (22:23 -0400)]
asahi: Compute segment list length
Quiesces agxdecode error introduced in previous commit.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 3 Apr 2022 02:21:15 +0000 (22:21 -0400)]
asahi: Validate segment list length
This is easy now!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 3 Apr 2022 02:18:01 +0000 (22:18 -0400)]
asahi: Split unknown field in segment list header
Seen as 0x8000.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>
Alyssa Rosenzweig [Sun, 3 Apr 2022 02:14:11 +0000 (22:14 -0400)]
asahi: Add segment list pretty printer
Validate all the new expectations and print all the fields. This should
make differences between the drivers obvious, I hope.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>