review.tizen.org Git - platform/upstream/mesa.git/log

aco: fix num_waves on GFX10+

There are half the SIMDs per CU and physical_vgprs should be 512 instead
of 256.

fossil-db (GFX10.3):
Totals from 3622 (2.60% of 139391) affected shaders:
VGPRs: 298192 -> 289732 (-2.84%); split: -3.43%, +0.59%
CodeSize: 29443432 -> 29458388 (+0.05%); split: -0.00%, +0.06%
MaxWaves: 21703 -> 23395 (+7.80%); split: +7.84%, -0.05%
Instrs: 5677920 -> 5681438 (+0.06%); split: -0.01%, +0.07%
Cycles: 280715524 -> 280895676 (+0.06%); split: -0.00%, +0.07%
VMEM: 981142 -> 981894 (+0.08%); split: +0.18%, -0.10%
SMEM: 243315 -> 243454 (+0.06%); split: +0.07%, -0.02%
VClause: 88991 -> 89767 (+0.87%); split: -0.02%, +0.89%
SClause: 200660 -> 200659 (-0.00%); split: -0.00%, +0.00%
Copies: 430729 -> 434160 (+0.80%); split: -0.07%, +0.86%
Branches: 158004 -> 158021 (+0.01%); split: -0.01%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8523>

radv: fix max_waves estimation on GFX10.3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8523>

zink: enable WSI-faking for RADV too

temporary until we get real WSI support

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8284>

zink: add VK_KHR_driver_properties

yet another extension that breaks naming conventions for structs/enums,
even if it does so in a very sensible way

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8284>

st/mesa: fix pbo upload/download for arrays of textures with only 1 layer

Having only one layer we can put 0 as third texture coordinate

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4115
Fixes: 36097fc7 ("st/pbo: fix pbo uploads without PIPE_CAP_TGSI_VS_LAYER_VIEWPORT and skip gs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8576>

ci: exclude one CTS test that timeout most of the time for RADV CI

dEQP is too slow.

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8587>

turnip: don't emit tess consts if they are not used

If tess consts aren't used they don't get included in constlen,
and we risk overrunning consts of the next stage.

Fixes:
dEQP-VK.tessellation.invariance.outer_edge_index_independence.quads_fractional_even_spacing_ccw
dEQP-VK.tessellation.invariance.outer_triangle_set.quads_fractional_odd_spacing
dEQP-VK.tessellation.invariance.primitive_set.isolines_fractional_odd_spacing_ccw
dEQP-VK.tessellation.invariance.primitive_set.quads_fractional_odd_spacing_cw

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4117

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8578>

v3d/compiler: enable lower_add_sat NIR option

We are enabling this option for the Vulkan driver, so it makes sense
to enable it for the OpenGL one.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8582>

v3dv/pipeline: enable lower_add_sat NIR option

We don't support them by hw, so we would need to get them
lowered. This fix some crashes while using renderdoc with UE4 shooter
demo traces.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8582>

r600: Enable sb also for NIR

Currently, r600/nir doens't have a proper scheduler or optimizer backend,
to be able to make use of this code path without performance regressions,
we enable the sb optimizer also for NIR.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>

r600/sb: fall back to un-optimized byte code when ra_init fails

Some emulated fp64 piglit create code that seems to make the register
allocation with sb worse than the original shader created from NIR, so
fall back to using the un-optimized shader.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>

r600/sb: fix boundary assert for mem-instruction decoding

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>

r600/sfn: Keep array registers alive for the whole shader

This is needed when using sb as a post-optimizer.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>

r600/sfn: update shader array info

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>

r600/nir: pass array info to r600_shader for sb

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>

r600/sb: Add support for INTERP_X and INTERP_Z ops

v2: Fix parsing the 2-slot instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>

r600: Add flags to INTERP_X and INTERP_Z two-slot ops

v2: use the gap in the enum bit field to add the 2-slot bit

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>

r600/sfn: fix use of b32all/and

Fixes: f79b7fcf7c7f5db626efdb63f27e8bc64d0aed77
r600/sfn: use 32 bit bools

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>

r600/nir: clone shader before first query to shader key

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8563>

v3d: use a compatible supported format for TFU-based blit

When trying to blit using the TFU, as we are doing an exact copy with no
conversions, we can choose a supported format that is compatible with the
underlying format's texel size.

This allows to use the TFU to blit formats that are not supported, like
r8ui or r16ui.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8495>

Revert "mesa: allow half float textures based on ARB_half_float_pixel"

This reverts commit aca67a555c011f59c37b05544eecbeea9aa42f3e, which
regressed the following Piglit test on i915 (and presumably r200):

   piglit/spec/!opengl 1.1/sized-texture-format-channels

Specifically, it begins testing glTexImage2D with format GL_RGBA,
type GL_FLOAT, and internalFormat GL_RGB16F, which leads to the
following error:

   Mesa 21.0.0-devel implementation error: unexpected format GL_RGB16F in _mesa_choose_tex_format()
   Please report at https://gitlab.freedesktop.org/mesa/mesa/-/issues
   sized-texture-format-channels: ../../src/mesa/main/teximage.c:2836: _mesa_choose_texture_format: Assertion `f != MESA_FORMAT_NONE' failed.

i915 and r200 unconditionally support ARB_half_float_pixel, but neither
support RGB16F as an internal format.  According to Ian's rationale
in the commit message for 1edca151a00134778b959366d5e7c0a3b63cc8f7
(which enabled that extension for all drivers):

    "This extension only adds data types that can be passed to, for
     example, glTexImage2D.  It does not add internal formats.  Since
     you can already pass GL_FLOAT to glTexImage2D this shouldn't pose
     any additional issues with those drivers.  Note that r200 and i915
     already supported this extension, and they don't support
     floating-point textures either."

So, commit aca67a55c011 enabled half-float internal formats on hardware
that cannot support them.  We should revert the change.

v2: Don't reintroduce the _mesa_is_gles3() condition, as that shouldn't
    be necessary (feedback from Erik Faye-Lund).

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8458>

tnl: Reset nr_bos to 0 between map/unmap cycles.

_tnl_draw_prims loops over the prims, and for each one, maps the VBOs,
draws, and unmaps them.  But it failed to reset nr_bos = 0 between each
loop iteration, which meant that when processing prim[n], the BO list
had all BOs for prior primitives too.  Assuming each primitive used the
same VBOs, that means the same VBO would appear in the list multiple
times, and it would try to unmap the same BO multiple times.  This
triggered asserts on the second unmap, as it had already been unmapped.

Fixes Piglit's oes_draw_elements_base_vertex-multidrawelements on i915.

Fixes: e99e7aa4c1d ("mesa: switch Draw(Range)Elements(BaseVertex) calls to DrawGallium")
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8522>

tnl: Respect `start` when converting indices to GLuint

Prior to commit e99e7aa4c1ddd7b8c2c4388f4f8e4fa1955ca771 (mesa: switch
Draw(Range)Elements(BaseVertex) calls to DrawGallium), the indices
parameter of glDrawElements (an offset into the VBO) was handled by
setting ib->ptr. With that commit, it instead began binding the
index buffer with offset 0, and adding the offset to draw->start,
which eventually becomes prim->start.

t_draw.c's bind_indices() was trying to convert the relevant section of
the index buffer to GLuints, but was failing to account for start, so
it nabbed the wrong portion of the index buffer.

Fixes: e99e7aa4c1d ("mesa: switch Draw(Range)Elements(BaseVertex) calls to DrawGallium")
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8522>

tnl: Try not to botch index buffer munging when start > 0.

Commit 4c751ad67aa2bbde5897030495f86e31c9e1fda7 (vbo/dlist: use a shared
index buffer) caused multiple draws to use the same index buffer, and
began setting the primitive's `start` field to the offset needed to
access the right portion of the index buffer.

Unfortunately, t_rebase_prims completely botches handling this case.
Say for example we had start = 40, min_index = 6, max_index = 11.
The actual indexes in the buffer are ib[40..45].  t_rebase_prims,
however, would allocate an index buffer containing only 6 elements,
and populate them with <ib[0..5] - min_index>.  For one, this reads
the wrong source data, leading to garbage index values.  For another,
it stores the new index buffer in the wrong spot, so drawing will try
and read elements [40..45] of an array of length 6, and crash.

This patch makes t_rebase_prims allocate a larger index buffer, with
the blank space at the beginning, and try to copy the correct section
of index buffer data over.  This only works if `start` is the same for
all primitives, however, so if we detect different ones, we recurse
to rebase and call draw() separately for each different start value.

Fixes: 4c751ad67aa ("vbo/dlist: use a shared index buffer")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4082
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8522>

vbo: Only mark merged line strips as lines when actually converting them

We only convert line strips to lines in certain cases, but were flagging
node->merged.prim as GL_LINES even if we simply copied a GL_LINE_STRIP
prim[0] over without modifying it.

Fixes Piglit's lineloop test (which triggers loop -> strip conversion
earlier in this path, then was incorrectly triggering strip -> list
mode modification with no changes to the underlying data).

Fixes: 310991415ee ("vbo/dlist: implement primitive merging")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8522>

vbo: Don't set node->min_index = max_index = indices_offset when merging

I'm can't see why this is necessary. There are already new fields
(node->merged.{min,max}_index) for the new values in the merged case.
But in vbo_save_draw.c, in the !draw_using_merged_prim case, we would
try and use the original node...with the now destroyed min/max index.

Fixes some assert failures when running with swtnl and forcing the
non-merged path (though it takes the merged path by default).

Fixes: 4c751ad67aa ("vbo/dlist: use a shared index buffer")
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8522>

r600/sfn: Remove StoreMerger unused member b.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8540>

ci/piglit: Upgrade to a newer piglit in our containers.

Pulls in test fixes for rasterpos on softpipe and for
simple-barrier-atomics on freedreno. Note that many xfail-vs-xskips end
up changing, because apparently the

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8499>

intel/fs: Separate SLM size calculation from encoding

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8486>

mesa/main: Replace the uint format packing code with util/format's.

Cuts another 60kb of generated code from Mesa drivers.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8532>

mesa/main: Replace float pack function with util_format_pack_rgba().

Less main-specific code when we're pulling in util/ formats anyway. Drops
about 20kb from Mesa drivers.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8532>

swrast: Use util_format_write_4/4ub for the scattered pixel writes.

This was the only code using the "get a pack-a-pixel function pointer"
generated code, switch it over to using util/format's.

This does mean some more format desc lookups in the loop, but this code is
only accessible from classic driver swrast fallbacks at this point, where
GPU read perf completely dominates the profile anyway.

basically no change to driver size.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8532>

radv: flush L2 for images affected by the pipe misaligned issue on GFX10+

In some rare cases, L2 needs to be flushed if an image is affected
by the pipe misaligned issue. This is roughly based on AMDVLK.

I confirmed that disabling TC-compat HTILE, and respectively DCC,
for the relevant images also fixes the regressions below.

This fixes some regressions introduced with L2 coherency for
dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_* and for
dEQP-VK.renderpass2.suballocation.multisample_resolve.*.

Fixes: 4a783a3c784 ("radv: Use L2 coherency on GFX9+.")
Co-Authored-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8557>

radv: restore invalidating the vector cache for internal meta operations

The driver used to invalidate the vector cache for meta operations
but this has been removed and I think it should be restored to fix
a bunch of regressions on GFX8.

This probably needs to be cleaned up but this is a hotfix.

This fixes a bunch of regressions and flakes on GFX8 like
dEQP-VK.pipeline.multisample.sample_locations_ext.draw.color.samples_4.*.

Fixes: 8f8d72af555 ("radv: Use access helpers for flushing with meta operations.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8573>

radv: enable TC-compat HTILE for D16S8 on GFX9+

I don't know why this wasn't enabled but I think it should be.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8562>

radv: enable TC-compat HTILE with D32S8 and MSAA on GFX9+

Only GFX8 has some depth/stencil resolve failures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8562>

radv: add a comment explaining the micro tile mode resolve

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8558>

frontend/dri: fix doesn't support RGBA ordering still expose RGBA in config

Signed-off-by: cheyang <cheyang@bytedance.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8553>

aco: add test for incorrect convert_to_SDWA() check

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8577>

aco: fix convert_to_SDWA() check in add_subdword_definition()

v_or_b32 with a v2b definition should use SDWA if is_partial=true.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 56345b8c610 ("aco: allow reading/writing upper halves/bytes when possible")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8577>

zink: process ubos with location values set as long as they're actually ubos

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8514>

zink: tweak xfb slot mapping in ntv

ARB_enhanced_layouts allows specifying overlapping variable locations
for xfb outputs, so we need to explode the arrays here to a full 128
components so we can do per-component mapping

sometimes this fails though, as in the case where xfb is just selecting
a single component from a vec but still considering the whole slot, and
so for those cases we just decrement our array index until we get to the
base, which will be within 3 components

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8515>

intel: change urb max shader geometry for CML GT1

Below deqp cts failure is seen on CML GT1 only , GT2 all test
passes, changing the max shader geometry to 256 (previous 640)
fixes all failure tests.Similar issue on BDW GT1
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3173

dEQP-GLES31.functional.geometry_shading.layered.
render_with_default_layer_cubemap
render_with_default_layer_3d
render_with_default_layer_2d_array

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4102

Signed-off-by: Abhishek Kumar <abhishek4.kumar@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8550>

v3dv: use PIPE_TIMEOUT_INFINITE

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8554>

v3dv: don't wait for idle on occlusion query pool resets

Instead, wait for the specific queries being reset to
not be in use by the GPU.

This takes query pool resets in the UE4 Shooter demo from
50-60ms down to 0.5-2ms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8554>

v3dv: disable early Z writes if Z writes are disabled

I saw this while inspecting CL dumps from the UE Shooter demo,
where they disable Z writes for occlusion queries. The hardware
is probably doing this internally, but it doesn't hurt
to do this explicitly and make CL traces consistent with intended
behavior.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8571>

radeonsi: inhibit clockgating when using SQTT

Ported from PAL.

Fixes: 07c1504d1b0 ("radeonsi: implement SQTT support")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8480>

v3dv: only update uniforms for dirty descriptors if stage has descriptors

If we have dirty descriptor set state we have to update our uniform
data to reference the new resources such as addresses for textures
or UBOs. This is known to have a high CPU cost, so we want to limit
this as much as we can.

It is a common rendering pattern in applications to render many objects
using the same pipeline, but modifying the descriptor sets bound to update
textures, UBOs, etc. In this scenario, we would be incurring in unnecessary
uniform stream updates for stages that don't access descriptor sets at all.

This change makes it so we track which shader stages in a pipeline
use descriptor set state and skips updating uniform streams for them
when dirty descriptor set state is the only reason requiring us to
generate new uniform streams for a draw call.

v2: reuse shader stage information from the pipeline set layouts
to track shader stages that use descriptor state.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8555>

radv: flush L2 metadata as part of CB/DB flush instead of CS_DONE on GFX9

This restores the previous logic because L2 coherency was fully
implemented. It appears that flushing L2 metadata with a CS_DONE
event hangs.

This fixes GPU hangs with Monster Hunter World.

Fixes: 4a783a3c ("radv: Use L2 coherency on GFX9+.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8566>

nv50/ir: Initialize DataArray members in constructor.

Fix defects reported by Coverity Scan.

uninit_member: Non-static class member array is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member arrayIdx is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member baseAddr is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member arrayLen is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member baseSym is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member vecDim is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member eltSize is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member file is not initialized in this constructor nor in any functions that it calls.
uninit_member: Non-static class member regOnly is not initialized in this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7764>

radv: Add a trivial implementation of VK_KHR_deferred_host_operation

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8545>

mesa: fix alpha channel of ETC2_SRGB8 decompression for !bgra

If software decompression is used for ETC2, the alpha channel
for sRGB8 textures would be set only if BGRA is true.

Fixes: e5604ef78bd "st/mesa/i965: Allow decompressing ETC2 to GL_RGBA"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8529>

pan/bi: Iterate from zero when setting RA interference

It is now valid for a node to have an index of zero.

Fixes: 39aa8c4a5ac ("pan/bi: Switch to new IR")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Fix printing of node 0

Fixes: 1893a3805e4 ("pan/bi: Generate instruction printer")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Fix RA of node 0

Fixes: 39aa8c4a5ac ("pan/bi: Switch to new IR")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Fix 64-bit SSBO addresses

Fixes: 9c7efc45105 ("pan/bi: Add intrinsic emits for builder")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/mdg: Fix spilling when scratch memory is used

Add the tls_size from NIR before spilling so that it doesn't alias
with spill slots.

Fixes: 152bc5d15e1 ("pan/mdg: Support loads and stores to scratch memory")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Implement packing ops between 32-bit vec1 and 16-bit vec2

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Implement ihadd/irhadd operations

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Implement saturated add/sub operations

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Set TLS for compute jobs

Fixes CL programs using scratch storage, such as the Piglit test
i32-stack-array.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Lower umul_high

Also lower uadd_carry, which the mul_high lowering generates.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Add w0 to the 'h01' swizzle bucket

A number of instructions, such as LOAD.i8, use this swizzle in the XML.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/mdg: Allow 64-bit src_bitsize for comparison operations

Fixes Piglit test attributes.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/mdg: Don't reorder loads/stores past each other

Fixes Piglit test local-memory.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/mdg: Limit int64 vectorization

Previously, nir_opt_vectorize was sometimes vectorizing 64-bit
load_const instructions to vec4.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Assert on sysval overflow

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Add a sysval for local_work_dim

Fixes Piglit test get-work-dim.cl.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Add a sysval for local_group_size

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Use pan_nir_lower_64bit_intrin

The intrinsics covered by the pass are implemented by reading 32-bit
registers, so there is no reason to keep them 64-bit.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Use the correct NIR options for OpenCL on Bifrost

This is needed so that 64-bit operations are lowered properly.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Improve unknown intrinsic error

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

panfrost: Set bifrost_props for compute shaders

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Implement load_kernel_input

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Implement load/store intrinsics

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Improve interoperability of the command-line disassembler

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Set compute lowering options

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Add some compute intrinsic loads

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Handle 64-bit pack and unpack operations

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Lower 64-bit integers

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

pan/bi: Pipe scratch_size in from NIR

Needs to be added to whatever we spill ourselves.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8358>

nvc0: index_bias is now only set for indexed draws

Fixes: cbdc00ac3a6 ("nouveau: fix handling draw info")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8539>

cso: set index_bounds_valid = true for arrays draws

The min/max indices are valid. Set the bit to true to indicate that.

Fixes glClear (+ clear_with_quads) on nouveau.

Fixes: 72ff53098c64 (gallium: add pipe_draw_info::index_bounds_valid)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reported-by: Simon Ser <contact@emersion.fr>
Tested-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8546>

zink: handle NULL views in zink_set_sampler_views

Passing NULL for the views parameter should be the same as passing an
array of NULL, according to the documentation. So let's respect that
detail.

This fixes a crash when using GALLIUM_HUD.

Fixes: 8d46e35d16e ("zink: introduce opengl over vulkan")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8564>

turnip: disable UBWC on Z24_S8 MSAA images on A630

Fixes GPU hangs in dEQP-VK.renderpass2.depth_stencil_resolve.* tests
on A630.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8381>

anv: Add a trivial implementation of VK_KHR_deferred_host_operation

This isn't actually capable of deferring anything; it just trivially
returns success.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7735>

radv: Do not use a pipe offset for aliased sparse images.

Otherwise the offset might not match between the images that are
aliased.

Fixes: e553ea51e8c ("radv: Create sparse images.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4072
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8535>

wsi/x11: Use get_screen_resources_current in wsi_x11_detect_xwayland

get_screen_resources may trigger an active probe of display connections
in the X server, which may take significant time and/or result in log
file spam.

Fixes: b5268d532a01 "wsi/x11: Detect Xwayland"
Reported-by: Sylvain Bertrand <sylvain.bertrand@legeek.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8492>

radeonsi: trim the size of si_vgt_param_key and si_vgt_stages_key

These are the minimum sizes we can use.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: don't use si_get_vs_state in most places

It's incorrect because si_get_vs_state returns gs_copy_shader for legacy
GS. It was harmless, but let's use si_get_vs, which is simpler.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: rearrange condition for streamout workaround on gfx7 and gfx8

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: get out of si_emit_vs_state early for blit vertex shaders

They don't use current_vs_state.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: remove MRT-draw-calls, spill-draw-calls, spill-compute-calls

due to limited usefulness and overhead in si_draw_vbo.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: make sctx->vertex_elements always non-NULL

Bind a state with 0 vertex elements there.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: add a specialized function for CP DMA L2 prefetch

This radically simplifies the code to decrease CPU overhead in si_draw_vbo.
The generic CP DMA copy function is too complicated.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: make cik_emit_prefetch_L2 templated and move it to si_state_draw.cpp

This is a great candidate for a template. There are a lot of conditions
that are already templated in si_draw_vbo.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: fix si_num_prims_for_vertices for PIPE_PRIM_POLYGON

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>

radeonsi: don't compute average vertex count in si_draw_vbo

It's probably not needed and we also have draw merging on gfx10,
so we should be able to use total_driver_count in theory.
(I may be wrong, but I don't know if having avg_direct_count really
improves anything)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8548>