Simon Glass [Sun, 13 Aug 2023 14:26:40 +0000 (08:26 -0600)]
fs/erofs: Quieten test for filesystem presence
At present listing a partition produces lots of errors about this
filesystem:
=> part list mmc 4
cannot find valid erofs superblock
cannot find valid erofs superblock
cannot read erofs superblock: -5
[9 more similar lines]
Use debugging rather than errors when unable to find a signature, as is
done with other filesystems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Gao Xiang <hsiangkao@linux.alibaba.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Jonas Karlman [Thu, 17 Aug 2023 21:52:48 +0000 (21:52 +0000)]
rockchip: rk3566-anbernic-rgxx3: Rename defconfig to include SoC name
Rename defconfig to include SoC name, use similar pattern as other
RK356x boards: <soc>-<name>.dts -> <name>-<soc>_defconfig
Suggested-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Fri, 18 Aug 2023 14:05:04 +0000 (10:05 -0400)]
Merge tag 'tegra-for-2023.10-rc1' of https://source.denx.de/u-boot/custodians/u-boot-tegra
ARM: tegra: Changes for v2023.10-rc1
This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
has some other minor enhancements, such as enabling the poweroff command
on several Tegra210 and Tegra186 boards.
Tom Rini [Thu, 17 Aug 2023 19:01:11 +0000 (15:01 -0400)]
Merge branch '2023-08-17-assorted-minor-fixes'
- More MAINTAINERS updates, update CI to use a newer coreboot and make
arm-ffa a bit less verbose by default.
Jonas Karlman [Thu, 17 Aug 2023 06:04:38 +0000 (06:04 +0000)]
board: rockchip: rk35xx: Add myself as reviewer to MAINTAINERS
Add myself as a reviewer for RK3566/RK3568/RK3588 boards that I have and
can help with review and testing of defconfig and device tree changes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
Jonas Karlman [Thu, 17 Aug 2023 06:04:36 +0000 (06:04 +0000)]
board: rockchip: rk35xx: Add device tree files to MAINTAINERS
Update MAINTAINERS files for RK3566/RK3568/RK3588 boards to include
related device tree files. Also replace space with tabs.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Eugen Hristev <eugen.hristev@collabora.com>
Jonas Karlman [Thu, 17 Aug 2023 06:04:34 +0000 (06:04 +0000)]
doc: rockchip: Add supported RK3566/RK3568 boards
Update Rockchip documentation to include RK3566/RK3568 boards already
supported. Also list Pine64 boards under RK3566 and drop defconfig to
match other listed boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Neha Malcom Francis [Thu, 17 Aug 2023 12:09:14 +0000 (17:39 +0530)]
MAINTAINERS: Update UFS maintainer
Dropping Faiz Abbas from the UFS maintainer list as his e-mail ID is no
longer valid.
Adding Bhupesh Sharma who has been using this framework working on
Qualcomm Snapdragon SoCs as well as sending out fixes.
Adding myself as well to support in reviewing and testing patches.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Acked-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Simon Glass [Fri, 11 Aug 2023 18:17:43 +0000 (12:17 -0600)]
CI: x86: coreboot: Update to latest coreboot
Use a recent coreboot build for this test.
The coreboot commit is:
6f5ead14b4 mb/google/nissa/var/joxer: Update eMMC DLL settings
This is build with default settings, i.e. QEMU x86 i440fx/piix4
Add some documentation as to how to update it next time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Abdellatif El Khlifi [Fri, 11 Aug 2023 12:22:57 +0000 (13:22 +0100)]
corstone1000: update maintainers
Update MAINTAINERS of corstone1000 board.
Signed-off-by: Xueliang Zhong <xueliang.zhong@arm.com>
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Abdellatif El Khlifi [Wed, 9 Aug 2023 11:47:30 +0000 (12:47 +0100)]
arm_ffa: use debug logs
replace info logs with debug logs
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 7 Aug 2023 21:08:11 +0000 (17:08 -0400)]
arm: Add arch/arm/dts/Makefile specifically to MAINTAINERS
In order to reduce the number of people that are cc'd on a patch for
simply touching arch/arm/dts/Makefile (which is a big common file) add
an entry specifically to MAINTAINERS under the ARM entry.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 16 Aug 2023 15:23:58 +0000 (11:23 -0400)]
Merge tag 'u-boot-stm32-
20230816' of https://source.denx.de/u-boot/custodians/u-boot-stm
DHSOM: Power cycle Buck3 in reset
DHCOM: Switch DWMAC RMII clock to MCO2
stm32f746: fix display pinmux
stm32mp: psci: Inhibit PDDS because CSTBYDIS is set
stm32mp1: DT alignment with v6.4
stm32mp1: add splashscreen with STMicroelectronics logo
stm32mp1: clk: remove error for disabled clock in stm32mp1_clk_get_parent
serial: stm32: Extend TC timeout
Valentin Caron [Fri, 4 Aug 2023 14:09:04 +0000 (16:09 +0200)]
serial: stm32: extend TC timeout
Waiting 150us TC bit couldn't be enough.
If TFA lets 16 bits in USART fifo, we has to wait 16 times 87 us (time
of 10 bits (1 byte in most use cases) at a baud rate of 115200).
Fixes:
b4dbc5d65a67 ("serial: stm32: Wait TC bit before performing initialization")
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Wed, 26 Jul 2023 23:58:07 +0000 (01:58 +0200)]
ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM
The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC
block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK
pad for the PHY and the same 50 MHz clock are fed back to ETHRX via
internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at
all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and
the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad
using external pad-to-pad connection.
Option (1) has two downsides. ETHCK_K is supplied directly from either
PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and
since the same PLL output is also used to supply SDMMC blocks, the
performance of SD and eMMC access is affected. The second downside is
that using this option, the EMI of the SoM is higher.
Option (2) solves both of those problems, so implement it here. In this
case, the PLL4_P is no longer limited and can be operated faster, at
100 MHz, which improves SDMMC performance (read performance is improved
from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M
count=1). The EMI interference also decreases.
Ported from Linux kernel commit
73ab99aad50cd ("ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOM")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 10 Jul 2023 11:30:59 +0000 (13:30 +0200)]
board: stm32mp1: add splash screen with stmicroelectronics logo
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on STMicroelectronics boards.
With CONFIG_SYS_VENDOR = "st", the logo st.bmp is selected, loaded at the
address indicated by splashimage and centered with "splashpos=m,m".
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Mon, 10 Jul 2023 08:38:45 +0000 (10:38 +0200)]
ARM: dts: stm32mp: alignment with v6.4
Device tree alignment with Linux kernel v6.4.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Thu, 6 Jul 2023 21:32:27 +0000 (23:32 +0200)]
ARM: stm32: Inhibit PDDS because CSTBYDIS is set
The PWR_MPUCR CSTBYDIS bit is set, therefore the CA cores can never
enter CStandby state and would always end up in CStop state. Clear
the PDDS bit, which indicates the CA cores can enter CStandby state
as it makes little sense to keep it set with CSTBYDIS also set.
This does however fix a problem too. When both PWR_MPUCR and PWR_MCUCR
PDDS bits are set, then the chip enters CStandby state even though the
PWR_MCUCR CSTBYDIS is set. Clearing the PWR_MPUCR PDDS prevents that
from happening.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Dario Binacchi [Mon, 3 Jul 2023 16:02:33 +0000 (18:02 +0200)]
ARM: dts: stm32: fix display pinmux for stm32f746-disco
As reported by the datasheet (DocID027590 Rev 4) for PG12:
- AF9 -> LCD_B4
- AF14 -> LCD_B1
So replace AF14 with AF9 for PG12 in the dts.
Fixes:
fe63d3cfb77ef ("ARM: dts: stm32: Sync DT with v4.20 kernel for stm32f7")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Fri, 23 Jun 2023 13:05:16 +0000 (15:05 +0200)]
clk: stm32mp1: remove error for disabled clock in stm32mp1_clk_get_parent
To disabled a clock in clock tree initialization for a mux of STM32MP15,
the selected clock source index is set with the latest possible index for
the number of bit used. Today this valid configuration cause a error
in U-Boot messages, for example with CLK_ETH_DISABLED, when this clock
is not needed for the used ETH PHY without crystal:
no parents defined for clk id 123
This patch change the level of this message to avoid this trace for
valid clock tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Wed, 17 May 2023 22:02:39 +0000 (00:02 +0200)]
ARM: stm32: Power cycle Buck3 in reset on DHSOM
In case the DHSOM is in suspend state and either reset button is pushed
or IWDG2 triggers a watchdog reset, then DRAM initialization could fail
as follows:
"
RAM: DDR3L 32bits 2x4Gb 533MHz
DDR invalid size : 0x4, expected 0x40000000
DRAM init failed: -22
### ERROR ### Please RESET the board ###
"
Avoid this failure by not keeping any Buck regulators enabled during reset,
let the SoC and DRAMs power cycle fully. Since the change which keeps Buck3
VDD enabled during reset is ST specific, move this addition to ST specific
SPL board initialization so that it wouldn't affect the DHSOM .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Tue, 15 Aug 2023 17:08:17 +0000 (13:08 -0400)]
Merge tag 'efi-2023-10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2023-10-rc3
Documentation:
* Correct description of board_get_usable_ram_top
* Add partition API to HTML documentation
* Describe lmb_is_reserved
* doc/sphinx/requirements.txt: Bump certifi up
UEFI:
* Fix efi_add_known_memory
* Make distro_efi_boot() static
Other:
* Correct return type board_get_usable_ram_top
Heinrich Schuchardt [Sat, 12 Aug 2023 18:16:58 +0000 (20:16 +0200)]
common: return type board_get_usable_ram_top
board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Mon, 14 Aug 2023 05:50:53 +0000 (07:50 +0200)]
efi_loader: fix efi_add_known_memory()
In efi_add_known_memory() we currently call board_get_usable_ram_top() with
an incorrect value 0 of parameter total_size. This leads to an incorrect
value for ram_top depending on the code in board_get_usable_ram_top().
Use the value of gd->ram_top instead which is set before relocation by
calling board_get_usable_ram_top().
Fixes:
7b78d6438a2b ("efi_loader: Reserve unaccessible memory")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Bin Meng [Thu, 3 Aug 2023 09:30:05 +0000 (17:30 +0800)]
bootmeth: efi: Make distro_efi_boot() static
As it is only called in bootmeth_efi.c
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Heinrich Schuchardt [Tue, 15 Aug 2023 10:30:19 +0000 (12:30 +0200)]
doc: add partition API to HTML documentation
* Convert comments in part.h to Sphinx style.
* Create documentation page for the partition API.
* Add the partition API page to the API index page.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Mon, 14 Aug 2023 06:44:26 +0000 (08:44 +0200)]
doc: description of board_get_usable_ram_top()
Improve the description of function board_get_usable_ram_top().
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Sat, 12 Aug 2023 17:09:32 +0000 (19:09 +0200)]
lmb: description lmb_is_reserved, lmb_is_reserved_flags
* provide a description for function lmb_is_reserved()
* improve the description of funciton lmb_is_reserved_flags()
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Tue, 1 Aug 2023 18:53:30 +0000 (14:53 -0400)]
doc/sphinx/requirements.txt: Bump certifi up
Upgrade certifi to the latest version, to remove e-Tugra from the root
store.
Link: https://groups.google.com/a/mozilla.org/g/dev-security-policy/c/C-HrP1SEq1A?pli=1
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Tue, 15 Aug 2023 14:44:32 +0000 (10:44 -0400)]
Merge tag 'ubi-updates-for-v2023.10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-ubi
ubi changes for v2023.10-rc3
Fix:
- Fix 'ubi list' command arguments parsing
from Dmitry
Tom Rini [Tue, 15 Aug 2023 14:44:20 +0000 (10:44 -0400)]
Merge tag 'i2c-updates-for-v2023.10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2023.10-rc3
Bugfixes:
- mvtwsi driver fix stuck "bus error" state
from Sam
Dmitry Dunaev [Wed, 12 Jul 2023 12:58:21 +0000 (15:58 +0300)]
cmd: ubi: Fix 'ubi list' command arguments parsing
This fixes allowed argc variable value for arguments parsing
Fixes:
6de1daf64b1 ("cmd: ubi: Add 'ubi list' command")
Signed-off-by: Dmitry Dunaev <dunaev@tecon.ru>
Sam Edwards [Tue, 25 Jul 2023 22:13:05 +0000 (16:13 -0600)]
i2c: mvtwsi: reset controller if stuck in "bus error" state
The MVTWSI controller can act either as a master or slave device. When
acting as a master, the FSM is driven by the CPU. As a slave, the FSM is
driven by the bus directly. In what is (apparently) a safety mechanism,
if the bus transitions our FSM in any improper way, the FSM goes to a
"bus error" state (0x00). I could find no documented or experimental way
to get the FSM out of this state, except for a controller reset.
Since U-Boot only uses the MVTWSI controller as a bus master, this
feature only gets in the way: we do not care what happened on the bus
previously as long as the bus is ready for a new transaction. So, when
trying to start a new transaction, check for this state and reset the
controller if necessary.
Note that this should not be confused with the "deblocking" technique
(used by the `i2c reset` command), which involves pulsing SCL repeatedly
if SDA is found to be held low, in an attempt to force the bus back to
an idle state. This patch only resets the controller in case something
else had previously upset it, and (in principle) results in no
externally-observable change in behavior.
Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Mon, 14 Aug 2023 13:11:09 +0000 (09:11 -0400)]
Merge tag 'u-boot-rockchip-
20230814' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add board: rk3568 EmbedFire Lubancat 2
- Fixes for rk3568 clock and pinctrl;
- Fixes for rk3308 clock and uart;
- rk3328 rock64 updates;
- Video fix on veyron board;
Tom Rini [Mon, 14 Aug 2023 13:09:23 +0000 (09:09 -0400)]
Merge tag 'video-
20230814' of https://source.denx.de/u-boot/custodians/u-boot-video
- fix NULL dereference in vidconsole_measure()
- fix simplefb format for raspberrypi-4b
- fix typo in Kconfig
Jonas Karlman [Mon, 14 Aug 2023 00:28:26 +0000 (00:28 +0000)]
pinctrl: rockchip: Fix drive and input schmitt on RK3568
On RK3568 most pins have a configurable drive strength of level 0-5 and
some pins level 0-11. When rk3568_set_drive is called with a strength
value above 7 the drv value written to reg may overflow into the write
enable bits, resulting in a bad configuration.
This cause e.g. ethernet PHY on Radxa CM3-IO board not to work after
drive is configured according to the device tree.
Could not get PHY for ethernet@
fe010000: addr 0
Level 6-11 can be configured using a second reg for some pins, however
the drv value is reused resulting in lower 6 bits being written to reg.
Input schmitt is configured in 2-bit fields on RK3568 compared to
earlier generation and 2'b10 should be used to enable input schmitt.
Change to use regmap_update_bits with a rmask to fix the overflow issue
and closer match the linux driver. Bit shift the drv value used for the
second reg to configure drive strength level 6-11. Also write correct
values for input schmitt setting.
Fixes:
1977d746aa54 ("rockchip: rk3568: add rk3568 pinctrl driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Meng Li [Wed, 26 Jul 2023 02:42:35 +0000 (10:42 +0800)]
rpi: set the correct parameter for simple framebuffer node
When raspberrpi-4b platform boots up, there are 2 sets of same bootup
log displayed on HDMI monitor screen, it looks like the screen is split
into 2 parts. The root cause is that video format of u-boot is different
from kernel. The fixing "a8r8g8b8" video format is used in u-boot, but
"r5g6b5" video format from framebuffer node is used in kernel image. In
order to avoid weird display status on screen, it needs to set the correct
parameter for simple framebuffer node even if it has existed.
Signed-off-by: Meng Li <Meng.Li@windriver.com>
Jason Wessel [Wed, 26 Jul 2023 02:42:34 +0000 (10:42 +0800)]
bcm2835: Add simiple-framebuffer for use with fkms
When the fkms dtb overlay is used only the simple-framebuffer is
presented as a usable video display. So, add "simple-framebuffer"
compatible to enable video driver bcm2835.
Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
Signed-off-by: Meng Li <Meng.Li@windriver.com>
Bin Meng [Thu, 3 Aug 2023 10:40:08 +0000 (18:40 +0800)]
video: kconfig: Fix a typo in SPL_VIDEO_REMOVE
Add one space between 'before' and 'loading'.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 3 Aug 2023 09:32:41 +0000 (17:32 +0800)]
video: vidconsole: Fix null dereference of ops->measure
At present vidconsole_measure() tests ops->select_font before calling
ops->measure, which would result in a null dereference when the console
driver provides no ops for measure.
Fixes:
b828ed7d7929 ("console: Allow measuring the bounding box of text")
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
FUKAUMI Naoki [Thu, 3 Aug 2023 08:04:32 +0000 (17:04 +0900)]
rockchip: MAINTAINERS: fix board name for Radxa ROCK 4C+
align with other ROCK series.
Fixes:
2b506407c8 ("rockchip: Add MAINTAINERS entry for Radxa Rock 4C+")
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Massimo Pegorer [Thu, 3 Aug 2023 11:08:13 +0000 (13:08 +0200)]
dts: rockchip: rk3308: Avoid warning for serial probe on prereloc
Make device tree complete and consistent for pre relocation phase. Some
nodes are missing, causing warnings to be issued on serial port probing
during pre relocation phase (uclass_get_device_by_phandle_id fails when
called by pinctrl_select_state_full: none of these failures is fatal
nor causing issues). Add to *-u-boot.dtsi all required nodes with the
'bootph-some-ram' attribute.
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Massimo Pegorer [Thu, 3 Aug 2023 11:08:12 +0000 (13:08 +0200)]
clk: rockchip: rk3308: Support reading UART rate and clock registers
Add support to read RK3308 registers used to configure UART clocks, and
thus to get UART rate and baudrate. This fixes clock_get_rate returning
error on serial device probing. Moreover, there is no need anymore to
use 'clock-frequency' property for UART nodes in *-u-boot.dtsi files
for all cases where UART is not inited by U-Boot proper or by SPL o by
TPL code but by a preliminary external boot phase (for Rock PI S, UART
is inited by external TPL).
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Massimo Pegorer [Thu, 3 Aug 2023 11:08:11 +0000 (13:08 +0200)]
clk: rockchip: rk3308: Fix ordering between masking and shifting
As per definitions of masks and shift offsets in cru_rk3308.h, values
read from registers must be first masked and then shifted. By the way,
this fix is binary invariant, because in all of fixed cases the shift
offset is zero.
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Massimo Pegorer [Wed, 2 Aug 2023 17:05:24 +0000 (19:05 +0200)]
rockchip: spl: Drop out of scope debug message related to uart init
Debug uart is no more inited in board_init_f function: remove this
debug message from board_init_f. If an earliest-as-possible message
after debug uart initialization is needed, enable DEBUG_UART_ANNOUNCE
Kconfig option, instead.
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Massimo Pegorer [Wed, 2 Aug 2023 17:05:23 +0000 (19:05 +0200)]
rockchip: spl: Drop useless call to debug_uart_init
Since commit
0dba45864b2a ("arm: Init the debug UART") function
debug_uart_init is called in crt files _main before calling
board_init_f. Therefore, there is no need to call it again
inside board_init_f implementation in arm/mach-rockchip/spl.c.
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Fri, 4 Aug 2023 09:34:01 +0000 (09:34 +0000)]
rockchip: rk356x-u-boot: Set max-frequency prop in sdhci node
Most board device trees for RK356x set max-frequency = <
200000000> in
the sdhci node, some boards like Quartz64 do not. This result in an
error message due to sdhci driver trying to set a clock rate of 0
instead of the max-frequency value.
rockchip_sdhci_probe clk set rate fail!
Fix this by setting a common max-frequency in rk356x-u-boot.dtsi. A
patch to set default max-frequency of sdhci node in linux is planned.
Also remove the forced status = "okay" for the sdhci and sdmmc0 nodes,
boards already set correct state for these nodes.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Fri, 4 Aug 2023 09:34:00 +0000 (09:34 +0000)]
clk: rockchip: rk3568: Add dummy support for GMAC speed clocks
Pine64 Quartz64 boards DT reference SCLK_GMAC1_RGMII_SPEED in the
assigned-clocks property of the gmac1 node. This result in a ENOENT
error when driver core tries to set a parent for this clock.
The clock speed in rgmii/rmii mode is changed using clk_set_rate of the
tx_rx clock and not using clk_set_parent of the speed clock.
Add dummy support for SCLK_GMAC1_RGMII_SPEED and similar clocks to clk
driver to allow a driver for gmac node to probe.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Fri, 4 Aug 2023 09:33:59 +0000 (09:33 +0000)]
clk: rockchip: rk3568: Include UART clocks in SPL
The clock driver for RK3568 does not include support for UART clocks in
SPL. This result in the following message with high enough loglevel.
ns16550_serial serial@
fe660000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
Fix this by including support for UART clocks in SPL.
Fixes:
4a262feba3a5 ("rockchip: rk3568: add clock driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Fri, 4 Aug 2023 09:33:59 +0000 (09:33 +0000)]
clk: rockchip: rk3568: Fix mask for clk_cpll_div_25m_div
The field for clk_cpll_div_25m_div in CRU_CLKSEL_CON81 is 6 bits wide,
not 5 bits wide as currently defined in CPLL_25M_DIV_MASK.
Fix this and the assert so that CPLL_25M can be assigned a 25 MHz rate.
Fixes:
4a262feba3a5 ("rockchip: rk3568: add clock driver")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Damon Ding [Fri, 4 Aug 2023 09:33:57 +0000 (09:33 +0000)]
clk: rockchip: rk3568: Fix clk selection in rk3568_pwm_get_clk
Fix use of wrong clk selection for CLK_PWM1 on RK3568.
Fixes:
4a262feba3a5 ("rockchip: rk3568: add clock driver")
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Anton [Mon, 7 Aug 2023 07:04:46 +0000 (10:04 +0300)]
rockchip: cru: Enable cpu info support for rk3568
Add cru structure definition in head file to support cpu_info driver.
Series-version: 2
Series-changes: 2
Format the patch header, add commit message and signature.
Signed-off-by: Anton <vao@asu-vei.ru>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Alvaro Fernando GarcÃa [Fri, 4 Aug 2023 00:35:38 +0000 (21:35 -0300)]
video: avoid build failure on veyron board
533ad9dc avoided an overflow but causes compilation
failure on 32bit boards (eg. veyron speedy)
this commit uses div_u64 which has a fallback codepath
for 32bit platforms
Signed-off-by: Alvaro Fernando GarcÃa <alvarofernandogarcia@gmail.com>
Tested-by: Simon Glass <sjg@chromium.org> # chromebook_jerry
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Andy Yan [Sat, 5 Aug 2023 12:00:11 +0000 (20:00 +0800)]
rockchip: rk3568: Add EmbedFire Lubancat 2 support
LubanCat2 is a rk3568 based SBC from EmbedFire.
Specification:
- Rockchip rk3568
- LPDDR4/4X 1/2/4/8 GB
- TF scard slot
- eMMC 8/32/64/128 GB
- Gigabit ethernet x 2
- HDMI out
- USB 2.0 Host x 1
- USB 2.0 Type-C OTG x 1
- USB 3.0 Host x 1
- Mini PCIE interface for WIFI/BT module
- M.2 key for 2280 NVME
- 40 pin header
The dts file is sync from linux mainline.
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Sat, 29 Jul 2023 13:41:42 +0000 (19:11 +0530)]
rockchip: rv1126: Enable fdtoverlay support
Add fdtoverlay_addr_r and enable OF_LIBFDT_OVERLAY for the
use of DT overlay in RV1126.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Peter Robinson [Wed, 14 Jun 2023 12:43:14 +0000 (13:43 +0100)]
rockchip: dts: rk3328: rock64: Align spi flash entry
Align the SPI flash entry with upstream. There's no need
to diverge here.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Peter Robinson [Wed, 14 Jun 2023 12:43:13 +0000 (13:43 +0100)]
rockchip: dts: rk3328: Add rng details to u-boot.dtsi
Add the rk3328 rng details to the u-boot.dtsi and
enable the RNG on the Rock64 to be able to provide
a random seed via UEFI.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
(Fix typo message)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Peter Robinson [Wed, 14 Jun 2023 12:43:12 +0000 (13:43 +0100)]
config: rock64: enable efuse for stable mac addr
Enable the rockchip efuse driver on the Rock64 to
provide a stable ethernet address on the device.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Tue, 11 Jul 2023 23:13:56 +0000 (23:13 +0000)]
pci: rockchip: Release resources on failing probe
The PCIe driver for RK3399 is affected by a similar issue that was fixed
for RK35xx in the commit
e04b67a7f4c1 ("pci: pcie_dw_rockchip: release
resources on failing probe").
Resources are not released on failing probe, e.g. regulators may be left
enabled and the ep-gpio may be left in a requested state.
Change to use regulator_set_enable_if_allowed and disable regulators
after failure to keep regulator enable count balanced, ep-gpio is also
released on regulator failure.
Also add support for the vpcie12v-supply, remove unused include and
check return value from dev_read_addr_name.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Quentin Schulz [Fri, 22 Jul 2022 10:09:08 +0000 (12:09 +0200)]
rockchip: rk3399: remove duplicate call to regulators_enable_boot_on
An earlier commit makes the common SPL code call
regulators_enable_boot_on and regulators_enable_boot_off before
iterating over possible boot media for U-Boot proper. There is therefore
no need to do this in the rk3399-specific code, so let's remove it.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Tested-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Thu, 10 Aug 2023 15:40:09 +0000 (11:40 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-watchdog
- cmd: cyclic: Remove duplicate command name in help text (Alexander)
- ftwdt010: need to reset watchdog in ftwdt010_wdt_start() (Sergei)
Tom Rini [Thu, 10 Aug 2023 14:36:43 +0000 (10:36 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
+ Add USB host support on VisionFive2 board
+ Enable SPI flash support on VisionFive2 board
+ Enable Random Number Generator in RISC-V QEMU board
+ Display new SBI extension
+ Add SPL_ZERO_MEM_BEFORE_USE Kconfig for jh7110 L2 LIM
(Loosely-Integrated Memory)
Sergei Antonov [Sun, 30 Jul 2023 17:14:16 +0000 (20:14 +0300)]
watchdog: ftwdt010: need to reset watchdog in ftwdt010_wdt_start()
ftwdt010_wdt_start() has to call ftwdt010_wdt_reset() after setting-up
the timeout in the same fashion ftwdt010_wdt_expire_now() does it.
Without this patch the "wdt start <ms>" command does not actually start
the watchdog timer until the "wdt reset" command is executed.
Signed-off-by: Sergei Antonov <saproj@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Alexander Dahl [Fri, 4 Aug 2023 15:53:23 +0000 (17:53 +0200)]
cmd: cyclic: Remove duplicate command name in help text
Function 'cmd_usage()' already prints one command in usage before
printing out the help text given to the U_BOOT_CMD_WITH_SUBCMDS macro.
Wrong previous output:
Usage:
cyclic cyclic demo <cycletime_ms> <delay_us> - register cyclic demo function
cyclic list - list cyclic functions
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Shengyu Qu [Wed, 9 Aug 2023 13:11:33 +0000 (21:11 +0800)]
riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE
Add Kconfig item for Starfive JH7110 to select SPL_ZERO_MEM_BEFORE_USE.
Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Shengyu Qu [Wed, 9 Aug 2023 13:11:32 +0000 (21:11 +0800)]
riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation
Add the actual support code for SPL_ZERO_MEM_BEFORE_USE and remove
existing Starfive JH7110's L2 LIM clean code, since existing code has
following issues:
1. Each hart (in the middle of a function call) overwriting its own
stack and other harts' stacks.
(data-race and data-corruption)
2. Lottery winner hart can be doing "board_init_f_init_reserve",
while other harts are in the middle of zeroing L2 LIM.
(data-race)
Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Shengyu Qu [Wed, 9 Aug 2023 13:11:31 +0000 (21:11 +0800)]
riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE
Add a Kconfig item to allow SPL to clear stack/GD/malloc area before
using them.
Signed-off-by: Bo Gan <ganboing@gmail.com>
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Shengyu Qu [Tue, 8 Aug 2023 13:14:36 +0000 (21:14 +0800)]
configs: starfive: Enable environment in SPI flash support
On Starfive Visionfive 2, the u-boot environment settings are saved to
on-board SPI flash. Enable relative configs by default and set offset
and size according to upstream linux dts.
Signed-off-by: Shengyu Qu <wiagn233@outlook.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Minda Chen [Mon, 7 Aug 2023 08:53:38 +0000 (16:53 +0800)]
configs: riscv: starfive: Add VF2 PCIe USB3 XHCI support
Add XHCI_PCI to enable usb3-host functions.
Also add usb command and keyboard config.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Minda Chen [Mon, 7 Aug 2023 08:53:37 +0000 (16:53 +0800)]
riscv: starfive: Add SYS_CACHE_SHIFT_6 to enable SYS_CACHELINE_SIZE
Some device driver need SYS_CACHELINE_SIZE macro. Add StarFive
SYS_CACHE_SHIFT_6 to enable it.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Minda Chen [Mon, 7 Aug 2023 08:53:36 +0000 (16:53 +0800)]
riscv: dts: starfive: Enable pcie0 dts node
In StarFive VF2 board. pcie0 connect to VTI usb controller.
Enable it to support usb host.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Minda Chen [Mon, 7 Aug 2023 08:53:35 +0000 (16:53 +0800)]
pci: plda: Get correct ECAM offset in multiple PCIe RC case
Get the correct ECAM offset and record the secondary bus
number in Multiple RC case.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Heinrich Schuchardt [Wed, 2 Aug 2023 20:39:46 +0000 (22:39 +0200)]
cmd/sbi: display new extensions
The SBI specification v2.0-rc2 defines new extensions:
* Nested Acceleration Extension (NACL)
* Steal Time Accounting (STA)
Allow the sbi command to display these.
Add missing implementation IDs.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Heinrich Schuchardt [Fri, 28 Jul 2023 13:54:15 +0000 (15:54 +0200)]
riscv: qemu: imply CONFIG_DM_RNG
The EFI_RNG_PROTOCOL is needed for Linux' KASLR.
QEMU can provide a virtio-rng device to emulate a hardware random number
generator which is supported by our virtio_rng driver.
Enabling CONFIG_DM_RNG will enable CONFIG_VIRTIO_RNG and
CONFIG_EFI_RNG_PROTOCOL by default too.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Wed, 9 Aug 2023 17:17:34 +0000 (13:17 -0400)]
Merge tag 'x86-pull-
20230809' of https://source.denx.de/u-boot/custodians/u-boot-x86
- x86: Fixes for distro booting
- x86: Move some boards to text environment
Simon Glass [Mon, 31 Jul 2023 03:02:05 +0000 (21:02 -0600)]
x86: qemu-x86: Convert to text environment
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:02:04 +0000 (21:02 -0600)]
x86: qemu: Add required linux/sizes.h include
These files rely on the config.h file provided this include. Add it
explictily so we can move to a text environment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:02:03 +0000 (21:02 -0600)]
x86: efi-x86_payload: Convert to text environment
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:02:02 +0000 (21:02 -0600)]
x86: efi-x86_app: Convert to text environment
Use the common include. Drop the unnecessary changes, since missing
stdio drivers will be ignored.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:02:01 +0000 (21:02 -0600)]
x86: slimbootloader: Convert to text environment
Use the common include along with some additions.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Drop common env from slimbootloader.env]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:02:00 +0000 (21:02 -0600)]
x86: minnowmax: Convert to text environment
Use the common include along with some additions.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:59 +0000 (21:01 -0600)]
x86: cougarcanyon2: Convert to text environment
Use the common include. The existing environment includes "vga" but that
is not valid anymore, so let it use vidconsole
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:58 +0000 (21:01 -0600)]
x86: cherryhill: Convert to text environment
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:57 +0000 (21:01 -0600)]
x86: edison: Convert to text environment
Don't use the common include since Edison's environment is empty.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:56 +0000 (21:01 -0600)]
x86: galileo: Convert to text environment
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:55 +0000 (21:01 -0600)]
x86: bayleybay: Convert to text environment
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:54 +0000 (21:01 -0600)]
x86: crownbay: Convert to text environment
Use the common include.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:53 +0000 (21:01 -0600)]
x86: coreboot: Convert to text environment
Use the common include and add some options specific to this board.
Drop everything from the config.h file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:52 +0000 (21:01 -0600)]
x86: Add a common include for environment settings
Create a text-file version of x86-common.h which can be used by x86
boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:51 +0000 (21:01 -0600)]
x86: Drop unused distro settings
No x86 board uses distro boot, so drop these settings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:50 +0000 (21:01 -0600)]
x86: Drop inclusion of ibmpc.h
This is not needed in this file anymore. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:49 +0000 (21:01 -0600)]
x86: edison: Drop inclusion of ibmpc.h
This should be included by files that need it, not the config.h file.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:48 +0000 (21:01 -0600)]
x86: i8254: Include required ibmpc.h header
This is needed for this file, so include it here explicitly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:47 +0000 (21:01 -0600)]
x86: Drop CFG_SYS_STACK_SIZE
This is only used in one file and the value is the same for both boards
which define it. Use the fixed value of 32KB and drop the CFG. This will
allow removal of the config.h files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:46 +0000 (21:01 -0600)]
env: Explain how to use #include files in text environment
Provide documentation on how to share common settings among boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:45 +0000 (21:01 -0600)]
env: Use include/env for text-environment includes
The 'environment' word is too long. We mostly use 'env' in U-Boot, so use
that as the name of the include directory too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 31 Jul 2023 03:01:44 +0000 (21:01 -0600)]
doc: Explain how to avoid the distro-boot scripts
Now that standard boot is available, mention this in the environment
documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # Intel Edison
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 30 Jul 2023 17:16:07 +0000 (11:16 -0600)]
x86: Update qemu documentation
Add some hints and observations related to booting distros on QEMU on x86.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 30 Jul 2023 17:16:06 +0000 (11:16 -0600)]
x86: Enable useful options for qemu-86
This build can be used to boot 32-bit standard-distro builds. Enable some
more options, so that all possible EFI UUIDs are decoded, we can search
memory for tables, support the full set of standard-boot features, have
full logging along with debug UART and can boot from CDROM media.
This mirrors a similar patch for qemu-x86_64
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Drop the unknown option from defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 30 Jul 2023 17:16:05 +0000 (11:16 -0600)]
video: Add a Kconfig option for SPL video handoff
At present this feature is enabled in SPL if a bloblist is available.
Some platforms may not want to use this, so add an option to allow the
feature to be disabled.
Note that the feature unfortunately only fills in part of the
video-handoff information, so causes failures on x86 platforms. For now,
disable it there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com> # qemu-x86_64