Markus Böck [Sun, 1 Aug 2021 12:01:20 +0000 (14:01 +0200)]
[mlir] Change ABI breaking use of NDEBUG to LLVM_ENABLE_ABI_BREAKING_CHECKS
The `DataLayout` class currently contains the member `layoutStack` which is hidden behind a preprocessor region dependant on the NDEBUG macro. Code wise this makes a lot of sense, as the `layoutStack` is used for extra assertions that users will want when compiling a debug build.
It however has the uncomfortable consequence of leading to a different ABI in Debug and Release builds. This I think is a bit annoying for downstream projects and others as they may want to build against a stable Release of MLIR in Release mode, but be able to debug their own project depending on MLIR.
This patch changes the related uses of NDEBUG to LLVM_ENABLE_ABI_BREAKING_CHECKS. As the macro is computed at configure time of LLVM, it may not change based on compiler settings of a downstream projects like NDEBUG would.
Differential Revision: https://reviews.llvm.org/D107227
Butygin [Wed, 28 Jul 2021 19:31:26 +0000 (22:31 +0300)]
[mlir] Add populateGpuToLLVMConversionPatterns function
Differential Revision: https://reviews.llvm.org/D107218
Tommy Chiang [Sun, 1 Aug 2021 08:50:00 +0000 (16:50 +0800)]
[docs] Update outdated doxygen download link
Fangrui Song [Sun, 1 Aug 2021 01:57:19 +0000 (18:57 -0700)]
[ELF][test] Improve .symver & --version-script tests
And delete redundant tests.
Craig Topper [Sat, 31 Jul 2021 22:44:39 +0000 (15:44 -0700)]
[RISCV] Add some tests for SimplifyCFG's switch to lookup table transform
These are some of the basic cases taken from X86.
We currently fail to use lookup tables on many of these cases
because SimplifyCFG requires a legal type to do the transform and
RISCV only has one legal integer type.
Shimin Cui [Sat, 31 Jul 2021 22:42:02 +0000 (18:42 -0400)]
[GlobalOpt] support ConstantExpr use of global address for OptimizeGlobalAddressOfMalloc
I'm working on extending the OptimizeGlobalAddressOfMalloc to handle some more general cases. This is to add support of the ConstantExpr use of the global variables. The function allUsesOfLoadedValueWillTrapIfNull is now iterative with the added CE use of GV. Also, the recursive function valueIsOnlyUsedLocallyOrStoredToOneGlobal is changed to iterative using a worklist with the GEP case added.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D106589
Jan Kratochvil [Sat, 31 Jul 2021 22:37:10 +0000 (00:37 +0200)]
[nfc] [lldb] Removed unused DWARFDebugInfo::GetDIEForDIEOffset
Its last use was removed by D63428.
Hsiangkai Wang [Fri, 23 Jul 2021 03:26:58 +0000 (11:26 +0800)]
[RISCV][Docs] Add description about inline asm constraint for V.
Add inline asm constraint 'vr' for vector registers and 'vm' for vector
mask registers.
Differential Revision: https://reviews.llvm.org/D106633
Hsiangkai Wang [Fri, 30 Jul 2021 09:10:30 +0000 (17:10 +0800)]
[RISCV] Rename vector inline constraint from 'v' to 'vr' and 'vm' in IR.
Differential Revision: https://reviews.llvm.org/D107139
Eli Friedman [Sat, 31 Jul 2021 21:09:59 +0000 (14:09 -0700)]
Fix the default alignment of i1 vectors.
Currently, the default alignment is much larger than the actual size of
the vector in memory. Fix this to use a sane default.
For SVE, temporarily remove lowering of load/store operations for
predicates with less than 16 elements. The layout the backend was
assuming for SVE predicates with less than 16 elements doesn't agree
with the frontend. More work probably needs to be done here.
This change is, strictly speaking, not backwards-compatible at the
bitcode level. But probably nobody is actually depending on that; i1
vectors in memory are rare, and the code that does use them probably
ends up forcing the alignment to something sane anyway. If we think
this is a concern, I can restrict this to scalable vectors for now
(where it's actually causing issues for me at the moment).
Differential Revision: https://reviews.llvm.org/D88994
Eli Friedman [Sat, 31 Jul 2021 20:41:15 +0000 (13:41 -0700)]
Fix a couple regression tests I missed updating in
2a284782
Eli Friedman [Sat, 31 Jul 2021 20:20:47 +0000 (13:20 -0700)]
[ConstantFold] Get rid of special cases for sizeof etc.
Target-dependent constant folding will fold these down to simple
constants (or at least, expressions that don't involve a GEP). We don't
need heroics to try to optimize the form of the expression before that
happens.
Fixes https://bugs.llvm.org/show_bug.cgi?id=51232 .
Differential Revision: https://reviews.llvm.org/D107116
Aart Bik [Sat, 31 Jul 2021 00:52:39 +0000 (17:52 -0700)]
[mlir][sparse] add sparse tensor type conversion operation
Introduces a conversion from one (sparse) tensor type to another
(sparse) tensor type. See the operation doc for details. Actual
codegen for all cases is still TBD.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D107205
Sanjay Patel [Sat, 31 Jul 2021 19:13:42 +0000 (15:13 -0400)]
[Analysis] improve function signature checking for snprintf
The check for size_t parameter 1 was already here for snprintf_chk,
but it wasn't applied to regular snprintf. This could lead to
mismatching and eventually crashing as shown in:
https://llvm.org/PR50885
Craig Topper [Sat, 31 Jul 2021 18:05:55 +0000 (11:05 -0700)]
[RISCV] Rename RISCVISD::FCVT_W_RV64 to FCVT_W_RTZ_RV64. NFC
fcvt.w(u) supports multiple rounding modes, but the ISD node
doesn't encode that. So name it to match the rounding mode it uses.
Sanjay Patel [Sat, 31 Jul 2021 18:07:30 +0000 (14:07 -0400)]
[SROA] prevent crash on large memset length (PR50910)
I don't know much about this pass, but we need a stronger
check on the memset length arg to avoid an assert. The
current code was added with D59000.
The test is reduced from:
https://llvm.org/PR50910
Differential Revision: https://reviews.llvm.org/D106462
Sanjay Patel [Sat, 31 Jul 2021 17:16:25 +0000 (13:16 -0400)]
[InstCombine] canonicalize cmp-of-bitcast-of-vector-cmp to use zero constant
We can invert a compare constant and preserve the logic
as shown in this sampling:
https://alive2.llvm.org/ce/z/YAXbfs
(In theory, we could deal with non-all-ones/zero as well,
but it doesn't seem worthwhile.)
I noticed this as a part of the x86 codegen difference in
https://llvm.org/PR51259 - it ends up using "test"
instead of "not + cmp" in that example.
This pattern also shows up in https://llvm.org/PR41312
and https://llvm.org/PR50798 .
Differential Revision: https://reviews.llvm.org/D107170
Simon Pilgrim [Sat, 31 Jul 2021 17:05:13 +0000 (18:05 +0100)]
[TTI] Make SK_ExtractSubvector matching length-changing only and simplify nested shuffle mask detection chain.
Match style and don't use an else after a return.
Minor cleanup for an upcoming SK_InsertSubvector patch.
pooja2299 [Sat, 31 Jul 2021 07:50:43 +0000 (13:20 +0530)]
Fixed syntax error that occured in the patch D104974
David Green [Sat, 31 Jul 2021 15:28:52 +0000 (16:28 +0100)]
[ARM] Switch order of creating VADDV and VMLAV.
It can be beneficial to attempt to try the larger VMLAV patterns before
VADDV, in case both may match the same code.
David Green [Sat, 31 Jul 2021 10:02:52 +0000 (11:02 +0100)]
[ARM] Regenerate Thumb PR35481.ll test. NFC
Florian Hahn [Sat, 31 Jul 2021 14:59:49 +0000 (15:59 +0100)]
[VPlan] Add interleave group printing test.
Matt Arsenault [Tue, 27 Jul 2021 15:08:06 +0000 (11:08 -0400)]
GlobalISel: Scalarize unaligned vector stores
This has the same problems and limitations as the load path.
Matt Arsenault [Tue, 27 Jul 2021 21:47:31 +0000 (17:47 -0400)]
AMDGPU/GlobalISel: Check some remarks for failed legalizations
The load/store tests are giant and have some cases that fail in them,
but it's hard to tell which ones are really failing. Check the remarks
to make it easier to track.
Kazu Hirata [Sat, 31 Jul 2021 14:24:53 +0000 (07:24 -0700)]
[ADT] Remove set_is_strict_subset (NFC)
The last use was removed on Mar 13, 2020 in commit
6b57d7f57d2cec7ec717757a6a52f2203d6e9db7.
Simon Pilgrim [Sat, 31 Jul 2021 14:08:13 +0000 (15:08 +0100)]
[DAG] isGuaranteedNotToBeUndefOrPoison - handle ISD::BUILD_VECTOR nodes
If all demanded elements of the BUILD_VECTOR pass a isGuaranteedNotToBeUndefOrPoison check, then we can treat this specific demanded use of the BUILD_VECTOR as guaranteed not to be undef or poison either.
Differential Revision: https://reviews.llvm.org/D107174
Matt Arsenault [Mon, 26 Jul 2021 23:41:48 +0000 (19:41 -0400)]
GlobalISel: Have lowerStore handle some unaligned stores
This is NFC until some of the AMDGPU legalization rules are ripped
out.
Uday Bondhugula [Fri, 30 Jul 2021 09:47:43 +0000 (15:17 +0530)]
[MLIR] NFC Clean up doc comments on memref replacement utility
NFC. Clean up stale doc comments on memref replacement utility and some
variable renaming in it to avoid confusion.
Differential Revision: https://reviews.llvm.org/D107144
Alexandros Lamprineas [Sat, 31 Jul 2021 07:59:19 +0000 (08:59 +0100)]
[AArch64] Legalize MVT::i64x8 in DAG isel lowering
This patch legalizes the Machine Value Type introduced in D94096 for loads
and stores. A new target hook named getAsmOperandValueType() is added which
maps i512 to MVT::i64x8. GlobalISel falls back to DAG for legalization.
Differential Revision: https://reviews.llvm.org/D94097
Alexandros Lamprineas [Sat, 31 Jul 2021 07:46:20 +0000 (08:46 +0100)]
[AArch64] Add a Machine Value Type for 8 consecutive registers
Adds MVT::i64x8, a Machine Value Type needed for lowering inline assembly
operands which materialize a sequence of eight general purpose registers.
Differential Revision: https://reviews.llvm.org/D94096
Alexandros Lamprineas [Wed, 28 Jul 2021 15:40:59 +0000 (16:40 +0100)]
[Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'
In LLVM IR terms the ACLE type 'data512_t' is essentially an aggregate
type { [8 x i64] }. When emitting code for inline assembly operands,
clang tries to scalarize aggregate types to an integer of the equivalent
length, otherwise it passes them by-reference. This patch adds a target
hook to tell whether a given inline assembly operand is scalarizable
so that clang can emit code to pass/return it by-value.
Differential Revision: https://reviews.llvm.org/D94098
Eric Leese [Fri, 30 Jul 2021 11:08:00 +0000 (13:08 +0200)]
[lldb] [DWARF-5] Be lazier about loading .dwo files
This change makes sure that DwarfUnit does not load a .dwo file until
necessary. I also take advantage of DWARF 5's guarantee that the first
support file is also the primary file to make it possible to create
a compile unit without loading the .dwo file.
Testcases now require Linux as it is needed for -gsplit-dwarf.
Review By: jankratochvil, dblaikie
Differential Revision: https://reviews.llvm.org/D100299
Fangrui Song [Sat, 31 Jul 2021 07:36:16 +0000 (00:36 -0700)]
[profile][test] Delete --path-equivalence=/tmp,%S
This causes the test to fail if %S is under /tmp
Dmitry Vyukov [Sat, 31 Jul 2021 07:09:01 +0000 (09:09 +0200)]
tsan: prevent insertion of memset into BenignRaceImpl
Some bots started failing with the following error
after changing Alloc to New. Change it back.
ThreadSanitizer: CHECK failed: ((locked[i].recursion)) == ((0))
4 __sanitizer::CheckedMutex::CheckNoLocks()
5 __tsan::ScopedInterceptor::~ScopedInterceptor()
6 memset
7 __tsan::New<__tsan::ExpectRace>()
8 __tsan::AddExpectRace()
9 BenignRaceImpl()
Differential Revision: https://reviews.llvm.org/D107212
Dmitry Vyukov [Fri, 30 Jul 2021 11:50:15 +0000 (13:50 +0200)]
tsan: introduce Tid and StackID typedefs
Currently we inconsistently use u32 and int for thread ids,
there are also "unique tid" and "os tid" and just lots of other
things identified by integers.
Additionally new tsan runtime will introduce yet another
thread identifier that is very different from current tids.
Similarly for stack IDs, it's easy to confuse u32 with other
integer identifiers. And when a function accepts u32 or a struct
contains u32 field, it's not always clear what it is.
Add Tid and StackID typedefs to make it clear what is what.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D107152
Dmitry Vyukov [Fri, 30 Jul 2021 14:56:36 +0000 (16:56 +0200)]
sanitizers: build tests with -g
We currently build tests without -g, which is quite inconvenient.
Crash stacks don't have line numbers, gdb don't how line numbers either.
Always build tests with -g.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D107168
Dmitry Vyukov [Fri, 30 Jul 2021 16:05:47 +0000 (18:05 +0200)]
tsan: remove "expected" races
"Expected" races is a very ancient facility used in tsanv1 tests.
It's not used/needed anymore. Remove it.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D107175
Dmitry Vyukov [Fri, 30 Jul 2021 17:52:48 +0000 (19:52 +0200)]
tsan: always setup sigaction signal handler
Currently we setup either sigaction signal handler with 3 arguments
or old style signal handler with 1 argument depending on user handler type.
This unnecessarily complicates code. Always setup sigaction handler.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D107186
Vitaly Buka [Sat, 31 Jul 2021 02:24:45 +0000 (19:24 -0700)]
[NFC][sanitizer] clang-format few files
Petr Hosek [Sat, 31 Jul 2021 01:56:51 +0000 (18:56 -0700)]
Revert "[clang][cache] Update Fuchsia-stage2.cmake to create hwasan multilibs"
This reverts commit
bb438f6cbfc08eaa2cd9124a0ad581dd29f819b4 since
it broke our Windows builders and we need more time to investigate
the issue.
Petr Hosek [Fri, 30 Jul 2021 09:40:27 +0000 (02:40 -0700)]
[profile] Fix profile merging with binary IDs
This fixes support for merging profiles which broke as a consequence
of
e50a38840dc3db5813f74b1cd2e10e6d984d0e67. The issue was missing
adjustment in merge logic to account for the binary IDs which are
now included in the raw profile just after header.
In addition, this change also:
* Includes the version in module signature that's used for merging
to avoid accidental attempts to merge incompatible profiles.
* Moves the binary IDs size field after version field in the header
as was suggested in the review.
Differential Revision: https://reviews.llvm.org/D107143
Petr Hosek [Sat, 31 Jul 2021 01:53:48 +0000 (18:53 -0700)]
Revert "[profile] Fix profile merging with binary IDs"
This reverts commit
dcadd64986b8a84dc244d4e7faa848fb4c18cea6.
Stella Stamenova [Sat, 31 Jul 2021 01:33:13 +0000 (18:33 -0700)]
Revert "[lldb] [DWARF-5] Be lazier about loading .dwo files"
This reverts commit
8dfd6cae9bd62ae5ef056b994ece2e98f1558830.
This change broke the windows lldb bot:
https://lab.llvm.org/buildbot/#/builders/83/builds/8842
Siva Chandra Reddy [Sat, 31 Jul 2021 01:30:26 +0000 (01:30 +0000)]
[libc] Add trigonometric and exponential functions to the windows config.
Vitaly Buka [Fri, 30 Jul 2021 22:24:59 +0000 (15:24 -0700)]
[sanitizer] Remove cpplint annotations
cpplint was removed by D107197
Differential Revision: https://reviews.llvm.org/D107198
River Riddle [Sat, 31 Jul 2021 00:49:47 +0000 (00:49 +0000)]
[vscode-mlir] Fix the package repo url.
It should be llvm/vscode-mlir not llvm-project/vscode-mlir.
Petr Hosek [Fri, 30 Jul 2021 09:40:27 +0000 (02:40 -0700)]
[profile] Fix profile merging with binary IDs
This fixes support for merging profiles which broke as a consequence
of
e50a38840dc3db5813f74b1cd2e10e6d984d0e67. The issue was missing
adjustment in merge logic to account for the binary IDs which are
now included in the raw profile just after header.
In addition, this change also:
* Includes the version in module signature that's used for merging
to avoid accidental attempts to merge incompatible profiles.
* Moves the binary IDs size field after version field in the header
as was suggested in the review.
Differential Revision: https://reviews.llvm.org/D107143
River Riddle [Fri, 30 Jul 2021 23:53:01 +0000 (23:53 +0000)]
[mlir-vscode] Create a proper output channel for the MLIRContext
This allows for reusing the same output channel when the extension reloads after updating the server. Currently, whenever the extension restarts a new output channel is created (which can lead to a large number of seemingly dead output channels).
River Riddle [Fri, 30 Jul 2021 23:52:47 +0000 (23:52 +0000)]
[vscode-mlir] Update package.json in preparation for publishing
Quite a few things were out-of-date, or just not
organized well. This revision updates the extension
name, repo, icon, and many other components in
preperation for publishing the extension to the
marketplace.
Siva Chandra Reddy [Fri, 30 Jul 2021 05:22:20 +0000 (05:22 +0000)]
[libc] Move FPExceptMatcher out of TestHelpers.h
TestHelpers.h pulls few pieces from LLVM libc's unittest framework
which aren't available on platforms like Fuchsia which use their own
unittest framework. So, by moving FPExceptMatcher to a different file
we can exclude LLVM libc specific pieces in a cleaner way.
In a later pass, it might make more sense to rename TestHelpers.h also
to FPMatcher.h. That way, we can make macros like EXPECT_FP_EQ to be
equivalent to EXPECT_EQ on platforms like Fuchsia.
Reviewed By: michaelrj
Differential Revision: https://reviews.llvm.org/D107129
Vitaly Buka [Fri, 30 Jul 2021 21:53:09 +0000 (14:53 -0700)]
[sanitizer] Remove cpplint
As code diverge from Google style we need
to add more and more exceptions to suppress
conflicts with clang-format and clang-tidy.
As this point it does not provide a additional value.
Reviewed By: morehouse
Differential Revision: https://reviews.llvm.org/D107197
peter klausler [Fri, 23 Jul 2021 23:41:04 +0000 (16:41 -0700)]
[flang] Produce proper "preprocessor output" for -E option
Rename the current -E option to "-E -Xflang -fno-reformat".
Add a new Parsing::EmitPreprocessedSource() routine to convert the
cooked character stream output of the prescanner back to something
more closely resembling output from a traditional preprocessor;
call this new routine when -E appears.
The new -E output is suitable for use as fixed form Fortran source to
compilation by (one hopes) any Fortran compiler. If the original
top-level source file had been free form source, the output will be
suitable for use as free form source as well; otherwise there may be
diagnostics about missing spaces if they were indeed absent in the
original fixed form source.
Unless the -P option appears, #line directives are interspersed
with the output (but be advised, f18 will ignore these if presented
with them in a later compilation).
An effort has been made to preserve original alphabetic character case
and source indentation.
Add -P and -fno-reformat to the new drivers.
Tweak test options to avoid confusion with prior -E output; use
-fno-reformat where needed, but prefer to keep -E, sometimes
in concert with -P, on most, updating expected results accordingly.
Differential Revision: https://reviews.llvm.org/D106727
zoecarver [Fri, 30 Jul 2021 22:07:35 +0000 (15:07 -0700)]
[libcxx][docs] Take locks on the last three views.
Lei Zhang [Fri, 30 Jul 2021 21:39:32 +0000 (17:39 -0400)]
[mlir][spirv] Add support for i8 serialization
Reviewed By: hanchung
Differential Revision: https://reviews.llvm.org/D107122
Lei Zhang [Fri, 30 Jul 2021 00:22:01 +0000 (20:22 -0400)]
[mlir][spirv] Fix loading bool with proper storage capabilities
If the source value to load is bool, and we have native storage
capability support for the source bitwidth, we still cannot directly
rewrite uses; we need to perform casting to bool first.
Reviewed By: hanchung
Differential Revision: https://reviews.llvm.org/D107119
Lei Zhang [Fri, 30 Jul 2021 00:21:44 +0000 (20:21 -0400)]
[mlir][spirv] Fix storing bool with proper storage capabilities
If the source value to store is bool, and we have native storage
capability support for the target bitwidth, we still cannot directly
store; we need to perform casting to match the target memref
element's bitwidth.
Reviewed By: hanchung
Differential Revision: https://reviews.llvm.org/D107114
Jon Chesterfield [Fri, 30 Jul 2021 22:01:07 +0000 (23:01 +0100)]
[libomptarget][nfc] Only set cuda-path for nvptx tests
Remove --cuda-path=CUDA_TOOLKIT_ROOT_DIR-NOTFOUND
from the invocation of non-nvptx test cases. Better signal
to noise ratio on other architectures.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D107074
Shoaib Meenai [Fri, 30 Jul 2021 01:39:04 +0000 (18:39 -0700)]
[builtins] Try to ensure single copy of emulated TLS state
Multiple copies of emulated TLS state means inconsistent results when
accessing the same thread-local variable from different shared objects
(https://github.com/android/ndk/issues/1551). Making `__emutls_get_address`
be a weak default visibility symbol should make the dynamic linker
ensure only a single copy gets used at runtime. This is best-effort, but
the more robust approach of putting emulated TLS into its own shared
object would (a) be a much bigger change, and (b) shared objects are
pretty heavyweight, and adding a new one to a space-constrained
environment isn't an easy sell. Given the expected rarity of direct
accesses to emulated TLS variables across different shared objects, the
best-effort approach should suffice.
Reviewed By: danalbert, rprichard
Differential Revision: https://reviews.llvm.org/D107127
Petr Hosek [Fri, 30 Jul 2021 21:32:15 +0000 (14:32 -0700)]
Revert "[profile] Fix profile merging with binary IDs"
This reverts commit
89d6eb6f8c5d94093f30a5f37b193a2422491642, this
seemed to have break a few builders.
Florian Mayer [Fri, 30 Jul 2021 21:32:04 +0000 (22:32 +0100)]
Revert "[hwasan] Detect use after scope within function."
This reverts commit
84705ed913659d1d5e0ee6b5ae7b298914ec87d4.
Brendon Cahoon [Fri, 30 Jul 2021 16:45:04 +0000 (12:45 -0400)]
[LoopStrengthReduction] Fix pointer extend asserts
Additional asserts were added to ScalarEvolution to enforce
pointer/int type rules. An assert is triggered when the LSR pass
attempts to extend a pointer SCEV in GenerateTruncates.
This patch changes GenerateTruncates to exit early if the Formaula
contains a ScaledReg or BaseReg with a pointer type.
Differential Revision: https://reviews.llvm.org/D107185
Eric Leese [Fri, 30 Jul 2021 11:08:00 +0000 (13:08 +0200)]
[lldb] [DWARF-5] Be lazier about loading .dwo files
This change makes sure that DwarfUnit does not load a .dwo file until
necessary. I also take advantage of DWARF 5's guarantee that the first
support file is also the primary file to make it possible to create
a compile unit without loading the .dwo file.
Review By: jankratochvil, dblaikie
Differential Revision: https://reviews.llvm.org/D100299
Jon Chesterfield [Fri, 30 Jul 2021 21:03:23 +0000 (22:03 +0100)]
Revert "[OpenMP][AMDGCN] Initial math headers support"
Broke nvptx compilation on files including <complex>
This reverts commit
12da97ea10a941f0123340831300d09a2121e173.
Eli Friedman [Fri, 30 Jul 2021 20:17:45 +0000 (13:17 -0700)]
[polly] Fix up regression test config with current features.
Primarily, configure substitutions so we can copy-paste the "RUN" line
of failed tests without worrying about the paths.
Petr Hosek [Fri, 30 Jul 2021 09:40:27 +0000 (02:40 -0700)]
[profile] Fix profile merging with binary IDs
This fixes support for merging profiles which broke as a consequence
of
e50a38840dc3db5813f74b1cd2e10e6d984d0e67. The issue was missing
adjustment in merge logic to account for the binary IDs which are
now included in the raw profile just after header.
In addition, this change also:
* Includes the version in module signature that's used for merging
to avoid accidental attempts to merge incompatible profiles.
* Moves the binary IDs size field after version field in the header
as was suggested in the review.
Differential Revision: https://reviews.llvm.org/D107143
Jay Foad [Thu, 29 Jul 2021 08:43:49 +0000 (09:43 +0100)]
[AMDGPU] Autogenerate checks in kernel-args.ll
Differential Revision: https://reviews.llvm.org/D107052
Aart Bik [Fri, 30 Jul 2021 19:59:20 +0000 (12:59 -0700)]
[mlir][sparse] move comments from cpp files into dialect doc
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D107191
Jonas Devlieghere [Fri, 30 Jul 2021 16:35:44 +0000 (09:35 -0700)]
[lldb] Fix remote macOS debugging on Apple Silicon
Update ARMGetSupportedArchitectureAtIndex to consider remote macOS
debugging. Currently, it defaults to an iOS triple when IsHost() returns
false. This fixes TestPlatformSDK.py on Apple Silicon.
Differential revision: https://reviews.llvm.org/D107179
Fanbo Meng [Fri, 30 Jul 2021 19:03:40 +0000 (15:03 -0400)]
[z/OS]Remove overriding default attribute aligned value
Make DefaultAlignForAttributeAligned consistent with SystemZ.
Reviewed By: abhina.sreeskantharajan, anirudhp
Differential Revision: https://reviews.llvm.org/D107189
Nemanja Ivanovic [Fri, 30 Jul 2021 19:33:55 +0000 (14:33 -0500)]
[PowerPC] Fix byte ordering of ld/st with length on BE
The builtins vec_xl_len_r and vec_xst_len_r actually use the
wrong side of the vector on big endian Power9 systems. We never
spotted this before because there was no such thing as a big
endian distro that supported Power9. Now we have AIX and the
elements are in the wrong part of the vector. This just fixes
it so the elements are loaded to and stored from the right
side of the vector.
pooja2299 [Thu, 29 Jul 2021 11:21:28 +0000 (16:51 +0530)]
[doc]Added examples for generic opcodes
Added examples to G_BR, G_BRCOND, G_BRJT, G_BRINDIRECT
Differential Revision: https://reviews.llvm.org/D104974
Rahman Lavaee [Fri, 30 Jul 2021 02:20:12 +0000 (19:20 -0700)]
Explain the symbols of basic block clusters with an example in the header comments.
This prevents from confusion with the ``labels`` option.
Reviewed By: snehasish
Differential Revision: https://reviews.llvm.org/D107128
Leonard Chan [Fri, 30 Jul 2021 18:52:27 +0000 (11:52 -0700)]
[clang][cache] Update Fuchsia-stage2.cmake to create hwasan multilibs
Differential Revision: https://reviews.llvm.org/D99364
Fangrui Song [Fri, 30 Jul 2021 18:52:18 +0000 (11:52 -0700)]
[InstrProfiling] Make CountersPtr in __profd_ relative
Change `CountersPtr` in `__profd_` to a label difference, which is a link-time
constant. On ELF, when linking a shared object, this requires that `__profc_` is
either private or linkonce/linkonce_odr hidden. On COFF, we need D104564 so that
`.quad a-b` (64-bit label difference) can lower to a 32-bit PC-relative relocation.
```
# ELF: R_X86_64_PC64 (PC-relative)
.quad .L__profc_foo-.L__profd_foo
# Mach-O: a pair of 8-byte X86_64_RELOC_UNSIGNED and X86_64_RELOC_SUBTRACTOR
.quad l___profc_foo-l___profd_foo
# COFF: we actually use IMAGE_REL_AMD64_REL32/IMAGE_REL_ARM64_REL32 so
# the high 32-bit value is zero even if .L__profc_foo < .L__profd_foo
# As compensation, we truncate CountersDelta in the header so that
# __llvm_profile_merge_from_buffer and llvm-profdata reader keep working.
.quad .L__profc_foo-.L__profd_foo
```
(Note: link.exe sorts `.lprfc` before `.lprfd` even if the object writer
has `.lprfd` before `.lprfc`, so we cannot work around by reordering
`.lprfc` and `.lprfd`.)
With this change, a stage 2 (`-DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_BUILD_INSTRUMENTED=IR`)
`ld -pie` linked clang is 1.74% smaller due to fewer R_X86_64_RELATIVE relocations.
```
% readelf -r pie | awk '$3~/R.*/{s[$3]++} END {for (k in s) print k, s[k]}'
R_X86_64_JUMP_SLO 331
R_X86_64_TPOFF64 2
R_X86_64_RELATIVE 476059 # was: 607712
R_X86_64_64 2616
R_X86_64_GLOB_DAT 31
```
The absolute function address (used by llvm-profdata to collect indirect call
targets) can be converted to relative as well, but is not done in this patch.
Differential Revision: https://reviews.llvm.org/D104556
David Green [Fri, 30 Jul 2021 18:50:07 +0000 (19:50 +0100)]
[ARM] Distribute reductions based on ascending load offset
This distributes reductions based on the relative offset of loads, if
one is found from their operands. Given chains of reductions this will
then sort them in ascending load order, which in turn can help simple
prefetches latch on to increasing strides more easily.
Differential Revision: https://reviews.llvm.org/D106569
Anton Zabaznov [Fri, 30 Jul 2021 16:21:05 +0000 (19:21 +0300)]
[OpenCL] Replace test for pipe struct to test it with fixed triple
Reviewed By: Anastasia
Differential Revision: https://reviews.llvm.org/D107176
Sanjay Patel [Fri, 30 Jul 2021 18:11:28 +0000 (14:11 -0400)]
[InstCombine] add more tests for vector cmp-bitcast; NFC
D107170
Sanjay Patel [Fri, 30 Jul 2021 13:26:34 +0000 (09:26 -0400)]
[InstCombine] add more tests for vector-cmp bitcast; NFC
Leonard Chan [Wed, 2 Jun 2021 18:19:56 +0000 (11:19 -0700)]
[compiler-rt][Fuchsia] Support HWASan on Fuchsia
This allows for hwasan to be built targetting fuchsia.
Differential Revision: https://reviews.llvm.org/D103543
Leonard Chan [Thu, 25 Mar 2021 21:36:47 +0000 (14:36 -0700)]
[compiler-rt][hwasan] Remove __sanitizer allocation functions from hwasan interface
These functions should not be externally used. We also do not need them internally for Fuchsia.
Differential Revision: https://reviews.llvm.org/D99381
Mark de Wever [Fri, 30 Jul 2021 18:35:37 +0000 (14:35 -0400)]
[libc++] Improve LIBCXX_ENABLE_INCOMPLETE_FEATURES.
@tcanens pointed out the current behavior of the macro breaks the usage
pattern described in http://wg21.link/SD6
```
# if __has_include(<optional>)
# include <optional>
# if __cpp_lib_optional >= 201606
# define have_optional 1
# endif
```
To support this usage pattern the hard errror is removed. Instead the
header includes nothing but the `<version>` header.
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D107134
Simon Pilgrim [Fri, 30 Jul 2021 17:31:50 +0000 (18:31 +0100)]
[InstCombine] getMaskedTypeForICmpPair - remove dead code. NFCI.
Ok should be true at this point, so the early-out is dead - replace with an assert.
Simon Pilgrim [Fri, 30 Jul 2021 16:49:03 +0000 (17:49 +0100)]
SelectionDAGDumper.cpp - remove nested if-else return chain. NFCI.
Match style and don't use an else after a return.
Simon Pilgrim [Fri, 30 Jul 2021 16:32:01 +0000 (17:32 +0100)]
SelectionDAGDumper.cpp - printrWithDepthHelper - remove dead code. NFCI.
Fixes coverity warning - we have an early-out for unsigned depth == 0, so the depth < 1 early-out later on is dead code.
Aart Bik [Fri, 30 Jul 2021 16:48:41 +0000 (09:48 -0700)]
[mlir][sparse] template the memory resident coordinate scheme storage
Rationale:
External file formats always store the values as doubles, so this was
hard coded in the memory resident COO scheme used to pass data into the
final sparse storage scheme during setup. However, with alternative methods
on the horizon of setting up these temporary COO schemes, it is time to
properly template this data structure.
Reviewed By: gussmith23
Differential Revision: https://reviews.llvm.org/D107001
Jonas Devlieghere [Fri, 30 Jul 2021 18:14:19 +0000 (11:14 -0700)]
[lldb] Always codesign binaries on macOS
Always codesign binaries on macOS. Apple Silicon has stricter
codesigning requirements, for example requiring macCatalyst binaries to
be signed. Ad-hoc sign everything like we do for other Darwin platforms.
Jose M Monsalve Diaz [Fri, 30 Jul 2021 16:26:26 +0000 (11:26 -0500)]
[OpenMP] Fixing llvm-omp-device-info compilation with runtimes
When using `-DLLVM_ENABLED_RUNTIMES` instead of `-DLLVM_ENABLED_PROJECTS`
the `llvm-omp-device-info` tool is not compiled or installed.
In general, no llvm tool would be build on runtimes, because the
-DLLVM_BUILD_TOOLS flag is removed by the way runtimes compilation calls
cmake again.
This patch is simple. Just forward the value of this flag to the
runtime cmake command.
I'm also removing an unnecessary comment in the compilation of the tool
Differential Revision: https://reviews.llvm.org/D107177
LLVM GN Syncbot [Fri, 30 Jul 2021 17:57:30 +0000 (17:57 +0000)]
[gn build] Port
481ad59b9fa4
Walter Erquinigo [Fri, 30 Jul 2021 17:54:38 +0000 (10:54 -0700)]
[nfc] improve a simple call
@jingham correctly pointed out that this call can be simplified. So
let's better do it.
zoecarver [Tue, 27 Jul 2021 00:27:40 +0000 (17:27 -0700)]
[libcxx][ranges] Add `std::ranges::single_view`.
Differential Revision: https://reviews.llvm.org/D106840
Paul Robinson [Fri, 30 Jul 2021 17:51:01 +0000 (10:51 -0700)]
Trim failing test
Don't try to run the non-integrated assembler; just verify that the
invocations look like what we expect. Do verify that the integrated
assembler handles warnings as expected.
Siva Chandra Reddy [Fri, 30 Jul 2021 17:38:04 +0000 (17:38 +0000)]
[libc][NFC] Add dummy errno target to satisfy mixed mode builds.
In mixed mode builds, we should not be including errno as part of
LLVM libc - errno from another library (or the system library) should be
used. But, other entrypoints which use errno list LLVM libc's errno as a
dep ta satisfy the full build mode. So, we add a dummy errno
implementation with empty files to make both mixed mode and full build
mode happy.
Matt Arsenault [Mon, 26 Jul 2021 18:10:26 +0000 (14:10 -0400)]
GlobalISel: Have lowerLoad scalarize unaligned vectors
This could be smarter by picking an ideal type, or at least splitting
the vector in half first. Also handles lower for non-power-of-2,
non-extending vector loads.
Currently this just avoids failing to legalize some odd vector AMDGPU
tests, but is a step towards removing the split logic from the
NarrowScalar logic.
Alexey Bataev [Thu, 29 Jul 2021 20:47:57 +0000 (13:47 -0700)]
[SLP]Improve splats vectorization.
Replace insertelement instructions for splats with just single
insertelement + broadcast shuffle. Also, try to merge these instructions
if they come from the same/shuffled gather node.
Differential Revision: https://reviews.llvm.org/D107104
Kerry McLaughlin [Fri, 30 Jul 2021 13:26:30 +0000 (14:26 +0100)]
Reland "[LV] Use lookThroughAnd with logical reductions"
If a reduction Phi has a single user which `AND`s the Phi with a type mask,
`lookThroughAnd` will return the user of the Phi and the narrower type represented
by the mask. Currently this is only used for arithmetic reductions, whereas loops
containing logical reductions will create a reduction intrinsic using the widened
type, for example:
for.body:
%phi = phi i32 [ %and, %for.body ], [ 255, %entry ]
%mask = and i32 %phi, 255
%gep = getelementptr inbounds i8, i8* %ptr, i32 %iv
%load = load i8, i8* %gep
%ext = zext i8 %load to i32
%and = and i32 %mask, %ext
...
^ this will generate an and reduction intrinsic such as the following:
call i32 @llvm.vector.reduce.and.v8i32(<8 x i32>...)
The same example for an add instruction would create an intrinsic of type i8:
call i8 @llvm.vector.reduce.add.v8i8(<8 x i8>...)
This patch changes AddReductionVar to call lookThroughAnd for other integer
reductions, allowing loops similar to the example above with reductions such
as and, or & xor to vectorize.
Reviewed By: david-arm, dmgreen
Differential Revision: https://reviews.llvm.org/D105632
Matt Arsenault [Thu, 22 Jul 2021 12:11:14 +0000 (08:11 -0400)]
GlobalISel: Have load lowering handle some unaligned accesses
The code for splitting an unaligned access into 2 pieces is
essentially the same as for splitting a non-power-of-2 load for
scalars. It would be better to pick an optimal memory access size and
directly use it, but splitting in half is what the DAG does.
As-is this fixes handling of some unaligned sextload/zextloads for
AMDGPU. In the future this will help drop the ugly abuse of
narrowScalar to handle splitting unaligned accesses.
Paul Robinson [Fri, 30 Jul 2021 16:39:44 +0000 (09:39 -0700)]
XFAIL ppc => powerpc
Matt Arsenault [Tue, 27 Jul 2021 16:42:14 +0000 (12:42 -0400)]
AMDGPU/GlobalISel: Fix tests using illegal copies to physregs
These are unlegalizable and introduce spurious failures. Ideally the
verifier would reject them. Also avoid some weird G_INSERTs.
Matt Arsenault [Sun, 6 Jun 2021 16:44:24 +0000 (12:44 -0400)]
AMDGPU/GlobalISel: Remove special case lowering for non-pow-2 stores
We end up with extra copies from buildAnyExtOrTrunc if these are
lowered after the register types are legalized.
Liuke Gehry [Wed, 21 Jul 2021 11:49:00 +0000 (11:49 +0000)]
[clang-tidy] Fix cppcoreguidelines-init-variables by removing the enum
FixIt, and add support for initialization check of scoped enum
In C++, the enumeration is never Integer, and the enumeration condition judgment is added to avoid compiling errors when it is initialized to an integer.
Add support for initialization check of scope enum.
As the following case show, clang-tidy will give a wrong automatic fix:
enum Color {Red, Green, Blue};
enum class Gender {Male, Female};
void func() {
Color color; // Color color = 0; <--- fix bug
Gender gender; // <--- no warning
}
Reviewd By: aaron.ballman, whisperity
Differential Revision: http://reviews.llvm.org/D106431