Samuel Pitoiset [Fri, 30 Jul 2021 11:41:30 +0000 (13:41 +0200)]
amd/addrlib: expose CMASK address equations to drivers on GFX9
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
Samuel Pitoiset [Fri, 30 Jul 2021 11:58:25 +0000 (13:58 +0200)]
ac: introduce a structure to store DCC address equations for GFX9
CMASK addr equations will use the same struct.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
Paulo Zanoni [Fri, 30 Jul 2021 00:26:37 +0000 (17:26 -0700)]
iris: mark the workaround_bo as asynchronous
Opt out of implicit synchronization for the workaround bo: we already
never mark it as writable and we only write to it as part of
PIPE_CONTROL synchronization requirements. Setting it as ASYNC should
be enough for i915.ko to pin it.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12151>
Rob Clark [Thu, 29 Jul 2021 22:46:10 +0000 (15:46 -0700)]
freedreno: Unleash the dragon!
A number of android games are so far, sadly, unaware of open source
drivers. And when they see an unknown driver they lump it in the lowest
performance tier, artificially limiting framerate and/or gfx settings.
So until the games catch up, use driconf to override vendor/renderer
settings for moar fps and nicer gfx.
Furthermore, some games seem to be limiting *too* conservatively when
we otherwise have plenty of headroom even if we claim to be a bigger
adreno. Possibly a concession to battery life or tighter thermal
constraints in a phone, as compared to something like a chromebook.
Or maybe the flagship gaming phone thing is a scam ;-)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12135>
Rob Clark [Sat, 31 Jul 2021 00:00:32 +0000 (17:00 -0700)]
freedreno: Support per-device driconf overrides
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12135>
Rob Clark [Thu, 29 Jul 2021 01:41:01 +0000 (18:41 -0700)]
driconf: Add force_gl_renderer override
Allow driconf to also override GL_RENDERER string.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12135>
Rob Clark [Thu, 29 Jul 2021 01:17:42 +0000 (18:17 -0700)]
driconfig: Add support for device specific config
Add support for driconf overrides on a per-device level, for cases
where we don't want to override behavior for all devices supported
by a particular driver.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12135>
Emma Anholt [Fri, 30 Jul 2021 21:47:33 +0000 (14:47 -0700)]
gallium/driconf: Allow the driver to parse the driconf options.
This will give the driver a chance to set a device name separate from the
driver name, using info probed during screen creation. All drivers
querying driconf in screen creation now have to call parsing on their own,
but other drivers get fallback parsing after screen creation.
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12135>
Emma Anholt [Fri, 30 Jul 2021 21:35:53 +0000 (14:35 -0700)]
gallium/dri2: Make dri_init_options just init DRI options.
pipe_loader_create_screen() sets up the driconf anyway, so we can just
call this after that.
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12135>
Ella-0 [Wed, 28 Jul 2021 08:53:00 +0000 (08:53 +0000)]
v3dv: Implement VK_EXT_custom_border_color
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12076>
Ella-0 [Wed, 28 Jul 2021 08:52:44 +0000 (08:52 +0000)]
v3dv: Add is_unorm, is_snorm and is_float format functions
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12076>
Chia-I Wu [Fri, 30 Jul 2021 18:17:56 +0000 (11:17 -0700)]
venus: break up vn_device.c
Break it up into vn_{device,instance,physical_device}.c. Suggested by
Ryan Neph.
vn_EnumerateDeviceExtensionProperties and
vn_EnumerateDeviceLayerProperties were previously said to be device
commands. But in this commit, we move them to vn_physical_device.c
instead.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12144>
Chia-I Wu [Fri, 30 Jul 2021 18:07:55 +0000 (11:07 -0700)]
venus: break up vn_device.h
Break it up into vn_{device,instance,physical_device}.h. Suggested by
Ryan Neph.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12144>
Chia-I Wu [Fri, 30 Jul 2021 18:40:29 +0000 (11:40 -0700)]
venus: update venus-protocol headers
Updated to 1.2.182. Added some NULL checks.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12144>
Chia-I Wu [Fri, 30 Jul 2021 21:55:22 +0000 (14:55 -0700)]
iris, crocus: add idep_genxml to per_hw target dependencies
Fixes
In file included from ../src/gallium/drivers/iris/iris_query.c:49:
../src/gallium/drivers/iris/iris_genx_macros.h:81:10: fatal error: genxml/genX_bits.h: No such file or directory
and
In file included from ../src/gallium/drivers/crocus/crocus_query.c:50:
../src/gallium/drivers/crocus/crocus_genx_macros.h:86:10: fatal error: genxml/genX_bits.h: No such file or directory
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12149>
Marek Olšák [Fri, 28 May 2021 05:01:51 +0000 (01:01 -0400)]
st/mesa: remove st_vertex_program::input_to_index
It's the same as a prefix bitcount of inputs_read.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11370>
Marek Olšák [Fri, 28 May 2021 05:01:51 +0000 (01:01 -0400)]
st/mesa: remove st_vertex_program::index_to_input
We just need the mask of used vertex attribs.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11370>
Marek Olšák [Thu, 27 May 2021 03:59:24 +0000 (23:59 -0400)]
st/mesa: remove lowering of 64-bit vertex attribs to 32 bits
pipe_context::create_vertex_elements_state lowers them now.
This removes a bunch of code that is no longer needed.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11370>
Marek Olšák [Thu, 27 May 2021 03:45:45 +0000 (23:45 -0400)]
gallium: lower raw 64-bit vertex formats in cso/vbuf instead of st/mesa
This lower each 64-bit vertex element into 1 or 2 32-bit vertex elements.
The motivation is to simplify st/mesa, which uses a lot more complicated
code to do the same thing, and do the lowering only on a cso_cache miss.
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11370>
Marek Olšák [Fri, 28 May 2021 20:11:17 +0000 (16:11 -0400)]
gallium: add pipe_vertex_element::dual_slot to move lowering to CSO creation
This just adds the new field. It will be used to lower 64-bit attribs
in drivers (via a helper).
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11370>
Marek Olšák [Mon, 14 Jun 2021 23:51:11 +0000 (19:51 -0400)]
gallium: add multi-component 64-bit UINT formats for raw double vertex attribs
This is the distinction between formats:
- PIPE_FORMAT_R64_FLOAT is the legacy "convert-to-float" vertex format.
- PIPE_FORMAT_R64_UINT is the raw double format.
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11370>
Marek Olšák [Fri, 28 May 2021 19:22:03 +0000 (15:22 -0400)]
gallium: change pipe_vertex_element::src_format to uint8_t
This removes the bitfield packing/unpacking.
pipe_format entries are reordered to have vertex formats first because
vertex formats must be <= 255.
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11370>
Marek Olšák [Thu, 27 May 2021 01:14:56 +0000 (21:14 -0400)]
shader_enums,mesa: move VERT_ATTRIB_EDGEFLAG to slot 31 for st/mesa
A future commit will replace st_vertex_program::input_to_index with
a prefix bitcount of inputs_read, but it needs vertex inputs to be
in the same order as vertex attribs.
Some of the FF definitions don't make sense with this ordering and are
removed.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11370>
Dave Airlie [Sun, 1 Aug 2021 23:59:31 +0000 (19:59 -0400)]
crocus: add support for set alpha to one with blt.
This is ported from 965 and fixes
dEQP-GLES2.functional.fbo.render.recreate_colorbuffer.*rebind_tex2d_rgb*
Fixes:
f3630548f1da9 ("crocus: initial gallium driver for Intel gfx 4-7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12164>
Dave Airlie [Sun, 1 Aug 2021 23:59:10 +0000 (19:59 -0400)]
intel/genxml: fix raster operation field in blt genxml
This field should be a uint, further changes on top of previous
ones in this area
Fixes:
4d80ec8fcfaad ("intel/genxml: fix raster op fields on gen4/5")
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12164>
Dave Airlie [Mon, 2 Aug 2021 06:26:46 +0000 (02:26 -0400)]
crocus/gen45: fix mapping compressed textures
I don't think iris ever hits this path, but probably has the same bug if
it did.
Fixes texsubimage on gfx4 + gfx4.5
Fixes:
5bf6ec31ccf6 ("crocus/gen4: restrict memcpy mapping to gen5")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12164>
xantares [Mon, 2 Aug 2021 10:13:46 +0000 (10:13 +0000)]
lavapipe: Fix 32bits windows build
Fixes:
94a49828
Closes #5161
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12165>
Emma Anholt [Fri, 30 Jul 2021 20:00:52 +0000 (13:00 -0700)]
turnip: Fix assertions on checking mutable combined samplers support.
We would determine that it was unsupported, then ask for the size and
triggered the assertion checking that we never ask for the size of a
combined sampler.
Fixes:
ee3495e46504 ("turnip: Add support for VK_VALVE_mutable_descriptor_type")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12148>
Danylo Piliaiev [Thu, 4 Mar 2021 14:33:54 +0000 (16:33 +0200)]
turnip: reduce maxComputeWorkGroupSize
Blob advertises { 1024, 1024, 64 }, but from tests they all
could be 1024.
Fixes tests:
dEQP-VK.compute.basic.max_local_size_x
dEQP-VK.compute.basic.max_local_size_y
dEQP-VK.compute.basic.max_local_size_z
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9409>
Yiwei Zhang [Mon, 2 Aug 2021 15:49:55 +0000 (15:49 +0000)]
venus: cache ahb backed buffer memory type bits requirement
To properly init buffer memory requirement for AHB, memory type bits
from dma_buf fd properties need to be masked. However, creating a test
AHB at buffer creation is too costy. This patch caches the ahb backed
buffer memory type bits at device creation time if the app is requesting
AHB extension.
Cc: 21.2 mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12171>
Sagar Ghuge [Thu, 29 Jul 2021 21:56:19 +0000 (14:56 -0700)]
genxml/gen125: Update debug register fields according to HW
Updating fields helps to decode the error state correctly.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12133>
Sagar Ghuge [Thu, 29 Jul 2021 21:54:35 +0000 (14:54 -0700)]
genxml/gen12: Update debug register fields according to HW
Updating fields helps to decode the error state correctly.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12133>
Pierre-Eric Pelloux-Prayer [Fri, 12 Mar 2021 14:42:34 +0000 (15:42 +0100)]
radeonsi: add expected tests results for Navi10 GPU
These results will not be enforced by CI, but they'll be helpful to test
a changeset against a baseline.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9561>
Pierre-Eric Pelloux-Prayer [Fri, 12 Mar 2021 14:40:09 +0000 (15:40 +0100)]
radeonsi: add a script to run piglit/glcts/deqp tests
To make it easy to run deqp-runner/piglit-runner.
It's heavily based on Marek' script from:
https://github.com/marekolsak/marek-build/blob/master/run-piglit.sh
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9561>
Timur Kristóf [Thu, 15 Jul 2021 13:28:13 +0000 (15:28 +0200)]
ac/nir: Remove unhelpful nir_opt_cse from ac_nir_lower_ngg_nogs.
This CSE call adds to our compile time without adding any real
benefit to the compiled code.
Fossil DB results on Sienna Cichlid (with NGGC on):
Totals from 1580 (1.23% of 128647) affected shaders:
CodeSize: 4563912 -> 4562312 (-0.04%); split: -0.07%, +0.03%
Instrs: 870722 -> 870338 (-0.04%); split: -0.09%, +0.04%
Latency: 3349863 -> 3351458 (+0.05%); split: -0.10%, +0.14%
InvThroughput: 617796 -> 617971 (+0.03%); split: -0.01%, +0.03%
VClause: 22604 -> 22568 (-0.16%); split: -0.75%, +0.59%
SClause: 16285 -> 16327 (+0.26%); split: -0.07%, +0.33%
Copies: 83472 -> 83599 (+0.15%); split: -0.07%, +0.22%
PreSGPRs: 62340 -> 62334 (-0.01%)
No Fossil DB changes with NGGC off.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
Timur Kristóf [Thu, 15 Jul 2021 12:38:27 +0000 (14:38 +0200)]
nir, aco: Remove vertex and primitive count overwrite intrinsic.
It's no longer needed.
No Fossil DB changes.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
Timur Kristóf [Thu, 15 Jul 2021 12:37:39 +0000 (14:37 +0200)]
ac/nir: Don't count vertices and primitives in wave after culling.
These are not needed anymore, because the EXEC mask doesn't depend on them.
Fossil DB results on Sienna Cichlid (with NGGC on):
Totals from 58239 (45.27% of 128647) affected shaders:
Latency:
138113669 ->
138285372 (+0.12%)
InvThroughput:
22404840 ->
22405245 (+0.00%)
No Fossil DB changes with NGGC off.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
Timur Kristóf [Thu, 15 Jul 2021 12:32:34 +0000 (14:32 +0200)]
ac/nir: Use gs_accepted variable after culling.
This prevents us from recalculating the EXEC mask later
in the shader, and removes the requirement for
counting the number of primitives.
The stats are better than expected because they also
show that some code that is still there is now DCE'd by ACO.
Fossil DB results on Sienna Cichlid (with NGGC on):
Totals from 58239 (45.27% of 128647) affected shaders:
SpillSGPRs: 330 -> 340 (+3.03%)
CodeSize:
166356072 ->
162805724 (-2.13%)
Instrs:
31920041 ->
31089256 (-2.60%)
Latency:
138815742 ->
138113669 (-0.51%); split: -0.54%, +0.03%
InvThroughput:
22459553 ->
22404840 (-0.24%); split: -0.26%, +0.02%
SClause: 753746 -> 753765 (+0.00%); split: -0.00%, +0.01%
Copies: 3226647 -> 3268973 (+1.31%); split: -0.45%, +1.76%
Branches: 1223441 -> 1223440 (-0.00%); split: -0.00%, +0.00%
PreSGPRs: 2025339 -> 2091013 (+3.24%)
No Fossil DB changes with NGGC off.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
Timur Kristóf [Thu, 15 Jul 2021 12:20:59 +0000 (14:20 +0200)]
ac/nir: Use es_accepted variable after culling.
This avoids re-calculating the exec mask for ES vertices,
and makes it unnecessary to count the number of vertices left.
Fossil DB results on Sienna Cichlid (with NGGC on):
Totals from 58239 (45.27% of 128647) affected shaders:
CodeSize:
166521108 ->
166356072 (-0.10%); split: -0.10%, +0.00%
Instrs:
31961308 ->
31920041 (-0.13%); split: -0.13%, +0.00%
Latency:
138820463 ->
138815742 (-0.00%); split: -0.04%, +0.04%
InvThroughput:
22460177 ->
22459553 (-0.00%); split: -0.00%, +0.00%
SClause: 753744 -> 753746 (+0.00%)
Copies: 3093140 -> 3226647 (+4.32%); split: -0.03%, +4.34%
No Fossil DB changes with NGGC off.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
Timur Kristóf [Thu, 15 Jul 2021 11:56:18 +0000 (13:56 +0200)]
aco, nir, ac: Simplify sequence of getting initial NGG VS edge flags.
Instead of v_bfe + v_lshl_or for each vertex, get all 3 edge flags
at once of every vertex. This takes fewer VALU instructions than
previously.
Fossil DB results on Sienna Cichlid (with NGGC on):
Totals from 56917 (44.24% of 128647) affected shaders:
CodeSize:
161028288 ->
158751628 (-1.41%)
Instrs:
30917985 ->
30519571 (-1.29%)
Latency:
130617204 ->
129975532 (-0.49%); split: -0.50%, +0.01%
InvThroughput:
21280238 ->
20927401 (-1.66%)
Copies: 3011120 -> 3011125 (+0.00%); split: -0.00%, +0.00%
No Fossil DB changed with NGGC off.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
Connor Abbott [Wed, 28 Jul 2021 12:42:08 +0000 (14:42 +0200)]
tu: Implement non-aligned multisample GMEM STORE_OP_STORE
We have to a bit careful here when disabling draw states. This also
necessitates moving the actual recording of the stores to the end so
that we set the dirty flag correctly.
Closes: #4462
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12102>
Connor Abbott [Wed, 28 Jul 2021 12:27:59 +0000 (14:27 +0200)]
tu: Make tile stores use a dedicated CS
We were trying to calculate how much space they need, That was already
difficult and one of the most opaque and hard-to-verify uses of sub_cs,
but it will become even more difficult with the 3D path. What's worse is
that sometimes we have to touch that path when we start touching
registers that would affect rasterization, and there's no indication
that you have to then recalculate the size etc. Just rip this out and
start keeping a separate CS for it instead. Note that this adds a small
amount of memory wastage and extra buffers (at worst one buffer per
command buffer).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12102>
Iago Toral Quiroga [Wed, 28 Jul 2021 11:01:16 +0000 (13:01 +0200)]
v3dv: handle IMAGE_DRM_FORMAT_MODIFIER_EXPLICIT_CREATE_INFO_EXT
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12098>
Iago Toral Quiroga [Wed, 28 Jul 2021 10:48:28 +0000 (12:48 +0200)]
v3dv: fill in drmFormatModifierTilingFeatures
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12098>
Rhys Perry [Fri, 30 Jul 2021 16:51:53 +0000 (17:51 +0100)]
ac/llvm: implement v2f16 fsat
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12143>
Pierre-Eric Pelloux-Prayer [Fri, 16 Jul 2021 12:16:43 +0000 (14:16 +0200)]
dlist: implement vertices deduplication
Now that the vertices attributes are in RAM, we can easily
compute their hash and compare to earlier vertices (in the
same list so they have compatible vertex_size).
We can't do that for list that will be executed using
loopback because the replay code ignore the index buffer.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11927>
Pierre-Eric Pelloux-Prayer [Fri, 16 Jul 2021 11:59:17 +0000 (13:59 +0200)]
dlist: upload vertices in compile_vertex_list
Previously vertices were uploaded on-the-fly: each time
the position attribute was set, the newly added vertex
was copied to the mapped bo.
Replace this with a plain RAM buffer, and do the upload
at the end of compile_vertex_list.
This allows to remove the we-need-to-unmap-the-buffer-
before-drawing special case, but more importantly it
will allow to implement vertices deduplication in the
next commit.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11927>
Lionel Landwerlin [Thu, 29 Jul 2021 14:35:19 +0000 (17:35 +0300)]
drm-shim: implement stat/fstat when xstat variants are not there
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
027095065dfb79 ("drm-shim: fix compile with glibc >= 2.33")
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12129>
Ian Romanick [Fri, 30 Jul 2021 17:57:18 +0000 (10:57 -0700)]
mesa: Fix tiny race condition in _mesa_debug_get_id
Two threads enter and see *id == 0. Both threads update the value.
Upon returning, one of the threads might see the overwritten value some
of the time and the updated value other times. Use cmpxchg to ensure
that there's only ever one value written to *id.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12136>
Ian Romanick [Thu, 29 Jul 2021 21:27:57 +0000 (14:27 -0700)]
intel/compiler: Add id parameter to shader_perf_log callback
There are two problems with the current architecture.
In OpenGL, the id is supposed to be a unique identifier for a particular
log source. This is done so that applications can (theoretically)
filter particular log messages. The debug callback infrastructure in
Mesa assigns a uniqe value when a value of 0 is passed in. This causes
the id to get set once to a unique value for each message.
By passing a stack variable that is initialized to 0 on every call,
every time the same message is logged, it will have a different id.
This isn't great, but it's also not catastrophic.
When threaded shader compiles are used, the id *pointer* is saved and
dereferenced at a possibly much later time on a possibly different
thread. This causes one thread to access the stack from a different
thread... and that stack frame might not be valid any more. :(
I have not observed any crashes related to this particular issue.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12136>
Ian Romanick [Thu, 29 Jul 2021 21:13:27 +0000 (14:13 -0700)]
intel/compiler: Add id parameter to shader_debug_log callback
There are two problems with the current architecture.
In OpenGL, the id is supposed to be a unique identifier for a particular
log source. This is done so that applications can (theoretically)
filter particular log messages. The debug callback infrastructure in
Mesa assigns a uniqe value when a value of 0 is passed in. This causes
the id to get set once to a unique value for each message.
By passing a stack variable that is initialized to 0 on every call,
every time the same message is logged, it will have a different id.
This isn't great, but it's also not catastrophic.
When threaded shader compiles are used, the id *pointer* is saved and
dereferenced at a possibly much later time on a possibly different
thread. This causes one thread to access the stack from a different
thread... and that stack frame might not be valid any more. :(
This fixes shader-db crashes of various kinds on Iris with threaded
shader compiles enabled.
Fixes:
42c34e1ac8d ("iris: Enable threaded shader compilation")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12136>
Michel Zou [Fri, 30 Jul 2021 11:25:26 +0000 (13:25 +0200)]
meson: dont use missing dumpbin path
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Cc: 21.2 mesa-stable
Closes #5142
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12139>
Icecream95 [Thu, 22 Jul 2021 08:17:31 +0000 (20:17 +1200)]
pan/mdg: Analyze helper termination after scheduling
Similar to the fix in
6bf8e960faa ("pan/bi: Do helper termination
analysis on clauses")
Though apparently a "theoretical issue only", fixes artefacts in
DarkPlaces with both D3D9 and GL renderers.
Fixes:
9a7f0e268b7 ("pan/mdg: Use the helper invo analyze passes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12156>
Dave Airlie [Tue, 27 Jul 2021 19:53:00 +0000 (05:53 +1000)]
intel/decode: add gfx4 vertex shader decode
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12160>
Dave Airlie [Tue, 27 Jul 2021 19:52:48 +0000 (05:52 +1000)]
intel/decode: add gfx4 constant buffer decode
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12160>
Icecream95 [Sat, 31 Jul 2021 01:21:54 +0000 (13:21 +1200)]
pan/bi: Fix infinite loop parsing arguments for bifrost_compiler
While char is signed on macOS AArch64, on Linux it is unsigned. This
means it cannot represent the -1 return value of getopt_long.
Change the type of `c` to int, the type that getopt_long returns, so
that the -1 will be kept intact and can be checked for.
Fixes:
c6be4f85e3c ("pan/bi: Use getopt for bifrost_compiler")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12153>
Icecream95 [Sat, 31 Jul 2021 00:27:43 +0000 (12:27 +1200)]
pan/bi: Use padding bytes for checking whether to stop disassembly
Both Panfrost and the DDK add padding zero bytes to the end of
shaders, so we can use this instead of the end-of-shader clause for
checking whether to stop disassembling.
Shaders can have end-of-shader clauses partway through; these shaders
will now be completely disassembled instead of cut off at the first
end-of-shader clause.
A tag byte of zero is an invalid encoding, so unlike the previous
version of this test only check the first word.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12153>
Icecream95 [Fri, 30 Jul 2021 23:57:38 +0000 (11:57 +1200)]
pan/bi: Print the clause of branch targets
Rather than just printing an offset such as '(pc + 192)', print the
target of branches as a clause number that matches up with the clause
headers printed by disassemble_bifrost.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12153>
Mike Blumenkrantz [Wed, 9 Jun 2021 21:54:06 +0000 (17:54 -0400)]
zink: add locking for zink_shader::programs
shaders are screen objects now with liveshader caching,
so modifications after creation need to be locked
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12147>
Eric Engestrom [Wed, 28 Jul 2021 21:27:37 +0000 (22:27 +0100)]
docs: update calendar and link releases notes for 21.1.6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12116>
Eric Engestrom [Wed, 28 Jul 2021 21:03:16 +0000 (22:03 +0100)]
docs: add release notes for 21.1.6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12116>
Juan A. Suarez Romero [Fri, 30 Jul 2021 17:18:58 +0000 (19:18 +0200)]
ci: update to VK-GL-CTS 1.2.7.0
v2:
- Read mustpass files from vk-default.txt (Matt)
- Remove freedreno atomic geom tests from fail list (Emma)
- Move freedreno flake to separated line (Emma)
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12069>
Corentin Noël [Wed, 28 Jul 2021 09:07:43 +0000 (11:07 +0200)]
ci: Re-enable piglit trace for virgl
The glmark2/texture-texture-filter=linear.rdc trace is now passing.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12100>
Hoe Hao Cheng [Fri, 30 Jul 2021 08:59:21 +0000 (16:59 +0800)]
zink: make codegen compatible with python 3.5
Fixes:
f1432fd3 ("zink: generate extension infrastructure using a python script")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12137>
Samuel Pitoiset [Wed, 28 Jul 2021 14:06:17 +0000 (16:06 +0200)]
radv: init radv_image::l2_coherent when creating the layout
Otherwise, it might not be correctly initialized for Android.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12103>
Samuel Pitoiset [Wed, 28 Jul 2021 13:08:38 +0000 (15:08 +0200)]
radv: do not use radeon_set_context_reg_seq() for only one register
radeon_set_context_reg() is a shortcut for that.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12099>
Samuel Pitoiset [Wed, 28 Jul 2021 12:26:32 +0000 (14:26 +0200)]
radv: reduce number of emitted DWORDS for contiguous context registers
radeon_set_context_reg() emits 3 DWORDS, while
radeon_set_context_reg_seq() + 2 values only needs 4 DWORDS.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12099>
Pavel Asyutchenko [Sun, 25 Jul 2021 17:11:16 +0000 (20:11 +0300)]
vulkan/overlay: Fix violation of VUID-VkMappedMemoryRange-size-01389
Mapping lentgh must be a multiple of 'nonCoherentAtomSize' bytes
when using VK_WHOLE_SIZE in vkFlushMappedMemoryRanges.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12131>
Erik Faye-Lund [Thu, 29 Jul 2021 09:06:12 +0000 (11:06 +0200)]
gallivm: let nir_lower_tex handle projectors
There's no need for us to do this lowering ourselves while emitting
code, when there's already a helper that can do this for us that we're
even using. Let's just set the right flag, and not worry about
projectors any more.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12126>
Pierre-Eric Pelloux-Prayer [Mon, 26 Jul 2021 08:47:20 +0000 (10:47 +0200)]
amd/registers: fix fields conflict detection
The existing code handled the case where the new definition of the
same field was larger than the old one.
This commit adds a check to handle the reverse case: the new def
is smaller than the old one (= so writing using the merged macro
would affect the next fields).
The affected fields are:
* LGKM_CNT (in SQ_WAVE_IB_STS)
* DONUT_SPLIT (in VGT_TESS_DISTRIBUTION)
* HEAD_QUEUE (in GDS_GWS_RESOURCE)
DONUT_SPLIT is the only one used by radeonsi/radv.
Fixes:
e6184b08924 ("amd/registers: scripts for processing register descriptions in JSON")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12063>
Pierre-Eric Pelloux-Prayer [Mon, 26 Jul 2021 13:47:24 +0000 (15:47 +0200)]
gallium/va: don't use key=NULL in hash tables
Add 1 to the key index otherwise we hit the following assert
in hash_table_insert:
assert(!key_pointer_is_reserved(ht, key));
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12105>
Tomeu Vizoso [Thu, 29 Jul 2021 07:41:07 +0000 (09:41 +0200)]
freedreno/ci: Move rules for restricted jobs to test-source-dep.yml
GitLab doesn't merge the rules array from a job that is extended, so we
were missing the changes rules.
To avoid this, create a .freedreno-rules-restricted job that includes
the changes rules and the restricted user checks.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Fixes:
92f9141f009f ("ci/freedreno: Test with non-redistributable traces")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5139
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12122>
Dave Airlie [Wed, 28 Jul 2021 03:51:38 +0000 (13:51 +1000)]
intel/fs: restrict max push length on older GPUs to a smaller amount
Fixes crash in dEQP-GLES2.functional.uniform_api.random.79
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12093>
Connor Abbott [Tue, 27 Jul 2021 14:39:56 +0000 (16:39 +0200)]
tu: Handle multisample vkCmdCopyColorImage()
There was a bit of code already to select the 3d path, but we actually
need another shader variant for it.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12080>
Alyssa Rosenzweig [Tue, 27 Jul 2021 22:34:35 +0000 (18:34 -0400)]
pan/bi: Validate the live set starts empty
Otherwise there is an uninitialized read, and the register allocation
will fail. (In the sense of failing a precondition. This manifests as
synthetic interference leading to higher register pressure and useless
moves. The allocation itself is ok, but it indicates a real bug.)
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12130>
Alyssa Rosenzweig [Wed, 28 Jul 2021 23:48:28 +0000 (19:48 -0400)]
pan/bi: Stub 64-bit in count_write_registers
When Valhall lands, we'll need to be more methodical about this. In the
mean time, this gets validation passing on
KHR-GLES31.core.compute_shader.atomic-case3 which was crashing in RA and
now again passes.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12130>
Alyssa Rosenzweig [Wed, 28 Jul 2021 23:48:06 +0000 (19:48 -0400)]
pan/bi: Handle asymmetric staging in bi_count_read_registers
Needed for atomics.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12130>
Alyssa Rosenzweig [Tue, 27 Jul 2021 22:29:58 +0000 (18:29 -0400)]
pan/bi: Add bi_entry_block helper
Useful for checking invariants at the start of the program.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12130>
Alyssa Rosenzweig [Tue, 27 Jul 2021 23:46:24 +0000 (19:46 -0400)]
pan/bi: Lower fragment output with <4 components
This avoids undefined behaviour in the shader, which will fail
validation added later in the series. shader-db results are neglible --
the extra moves required in a few cases are cancelled out by the extra
moves eliminated by allowing register allocation to work properly.
total instructions in shared programs: 146903 -> 146907 (<.01%)
instructions in affected programs: 33 -> 37 (12.12%)
helped: 0
HURT: 1
total tuples in shared programs: 123616 -> 123613 (<.01%)
tuples in affected programs: 764 -> 761 (-0.39%)
helped: 6
HURT: 4
helped stats (abs) min: 1.0 max: 4.0 x̄: 1.67 x̃: 1
helped stats (rel) min: 0.54% max: 5.88% x̄: 2.64% x̃: 1.86%
HURT stats (abs) min: 1.0 max: 2.0 x̄: 1.75 x̃: 2
HURT stats (rel) min: 4.55% max: 13.33% x̄: 8.57% x̃: 8.19%
95% mean confidence interval for tuples value: -1.73 1.13
95% mean confidence interval for tuples %-change: -2.72% 6.41%
Inconclusive result (value mean confidence interval includes 0).
total clauses in shared programs: 25656 -> 25654 (<.01%)
clauses in affected programs: 43 -> 41 (-4.65%)
helped: 2
HURT: 1
helped stats (abs) min: 1.0 max: 2.0 x̄: 1.50 x̃: 1
helped stats (rel) min: 6.25% max: 12.50% x̄: 9.38% x̃: 9.38%
HURT stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
HURT stats (rel) min: 33.33% max: 33.33% x̄: 33.33% x̃: 33.33%
total cycles in shared programs: 12114.21 -> 12114.12 (<.01%)
cycles in affected programs: 27.42 -> 27.33 (-0.30%)
helped: 4
HURT: 3
helped stats (abs) min: 0.
04166700000000034 max: 0.
08333299999999966 x̄: 0.06 x̃: 0
helped stats (rel) min: 0.57% max: 1.59% x̄: 1.02% x̃: 0.96%
HURT stats (abs) min: 0.
0416669999999999 max: 0.
08333299999999999 x̄: 0.06 x̃: 0
HURT stats (rel) min: 4.17% max: 16.67% x̄: 8.80% x̃: 5.56%
95% mean confidence interval for cycles value: -0.07 0.05
95% mean confidence interval for cycles %-change: -2.90% 9.27%
Inconclusive result (value mean confidence interval includes 0).
total arith in shared programs: 4601.08 -> 4601.04 (<.01%)
arith in affected programs: 29 -> 28.96 (-0.14%)
helped: 6
HURT: 4
helped stats (abs) min: 0.
04166700000000001 max: 0.
08333299999999966 x̄: 0.06 x̃: 0
helped stats (rel) min: 0.57% max: 10.00% x̄: 3.63% x̃: 1.39%
HURT stats (abs) min: 0.
04166700000000001 max: 0.
08333399999999991 x̄: 0.07 x̃: 0
HURT stats (rel) min: 5.56% max: 16.67% x̄: 10.85% x̃: 10.60%
95% mean confidence interval for arith value: -0.05 0.05
95% mean confidence interval for arith %-change: -3.95% 8.28%
Inconclusive result (value mean confidence interval includes 0).
total quadwords in shared programs: 110008 -> 110002 (<.01%)
quadwords in affected programs: 1090 -> 1084 (-0.55%)
helped: 11
HURT: 8
helped stats (abs) min: 1.0 max: 7.0 x̄: 2.18 x̃: 1
helped stats (rel) min: 0.61% max: 13.16% x̄: 4.07% x̃: 1.82%
HURT stats (abs) min: 1.0 max: 6.0 x̄: 2.25 x̃: 1
HURT stats (rel) min: 3.70% max: 42.86% x̄: 12.55% x̃: 7.50%
95% mean confidence interval for quadwords value: -1.76 1.13
95% mean confidence interval for quadwords %-change: -2.95% 8.81%
Inconclusive result (value mean confidence interval includes 0).
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12130>
Connor Abbott [Wed, 28 Jul 2021 08:50:38 +0000 (10:50 +0200)]
ir3: Delete old packed struct encoding
turnip clear/blit shaders were the last user of these.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12079>
Connor Abbott [Tue, 27 Jul 2021 13:35:03 +0000 (15:35 +0200)]
tu: Use NIR for clear/blit shaders
This is much more maintainable, extensible, and easy to read than
hand-rolled structs approximating assembly. This also removes the last
use of the old hand-written packing structs. There are a few minor
differences:
- The shaders are larger because ir3 currently doesn't support (rpt),
which means that some shaders are larger than one instrlen and the
current logic has to be extended to allow for that. This seems a small
price to pay, ir3 will gain support for (rpt) eventually, and we
shouldn't have limitations like this baked in anyway. For example some
GL blob r8g8 <-> r16 copy shaders are apparently quite large.
- Due to the inability to switch inputs/outputs on the fly, we need to
split the VS into two variants. I made the layer-writing variant also
used for other clears, because the old method of overloading c0.z/c1.z
to mean both "src x coordinate" and "z clear value" in the same shader
seemed too clever and I didn't want to add yet another variant. This
means that non-layered clears will also write the layer (to 0), but
that shouldn't be a big deal performance-wise.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12079>
Iván Briano [Thu, 29 Jul 2021 03:32:15 +0000 (20:32 -0700)]
anv: Don't copy the lineStipple values if lineStipple is not enabled
If the passed VkPipelineRasterizationLineStateCreateInfoEXT wasn't zero
initialized, we copy garbage values that are later on used to set the
state and may end up crashing when they are beyond the limits of the HW.
v2 (Lionel): Simplify if condition
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12121>
Alyssa Rosenzweig [Mon, 19 Jul 2021 19:52:19 +0000 (15:52 -0400)]
pan/bi: Use getopt for bifrost_compiler
Specify gpu id with --gpu-id or marketing name with --gpu. Still have
compile/disasm as commands, but allow -v for verbose printing.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12134>
Jesse Natalie [Sun, 11 Apr 2021 21:11:43 +0000 (14:11 -0700)]
microsoft/clc: Add a test for compiling a kernel with a read-write image
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10163>
Jesse Natalie [Sun, 11 Apr 2021 21:11:07 +0000 (14:11 -0700)]
microsoft/compiler: Implement texture loads from UAVs
This comes to the backend as image_load rather than txf but the
DXIL intrinsic is the same at the end of the day.
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10163>
Joshua Watt [Tue, 27 Jul 2021 16:41:53 +0000 (11:41 -0500)]
v3d, vc4: Fix dmabuf import for non-scanout buffers
Failure to create a buffer for scanout should not be fatal when
importing a buffer. Buffers allocated from a render-only device may not
be able to scanned out directly but can still be used for other
rendering purposes (e.g. as a texture).
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12081>
Emma Anholt [Fri, 16 Jul 2021 23:24:57 +0000 (16:24 -0700)]
nir_to_tgsi: Add support for nir_intrinsic_load_sample_pos.
The sysval translation already handles it.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11937>
Emma Anholt [Fri, 16 Jul 2021 23:13:58 +0000 (16:13 -0700)]
nir_to_tgsi: Declare buffers for all of num_ssbos.
Now all SSBO tests pass on virgl when taking the nir-to-tgsi path.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11937>
Eric Anholt [Sat, 9 Jan 2021 00:45:42 +0000 (16:45 -0800)]
nir_to_tgsi: Add support for HW atomics.
Found missing when taking virgl on the nir-to-tgsi path. Needs an SSBO
fix as well to pass all of the atomic_counters tests.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11937>
Alyssa Rosenzweig [Wed, 28 Jul 2021 18:34:34 +0000 (14:34 -0400)]
pan/bi: Remove incorrect errata workaround
This worked around a symptom of the underlying issue worked around in
the previous commit. This workaround is wrong in the sense of failing to
correct some broken code sequences and needlessly rejecting some working
code sequences.
total tuples in shared programs: 123770 -> 123630 (-0.11%)
tuples in affected programs: 9548 -> 9408 (-1.47%)
helped: 133
HURT: 0
helped stats (abs) min: 1.0 max: 2.0 x̄: 1.05 x̃: 1
helped stats (rel) min: 0.42% max: 16.67% x̄: 4.07% x̃: 1.15%
95% mean confidence interval for tuples value: -1.09 -1.01
95% mean confidence interval for tuples %-change: -4.98% -3.17%
Tuples are helped.
total cycles in shared programs: 12114.83 -> 12114.50 (<.01%)
cycles in affected programs: 34.08 -> 33.75 (-0.98%)
helped: 9
HURT: 1
helped stats (abs) min: 0.
04166599999999998 max: 0.
04166700000000034 x̄: 0.04 x̃: 0
helped stats (rel) min: 0.72% max: 12.50% x̄: 2.99% x̃: 2.04%
HURT stats (abs) min: 0.
04166700000000034 max: 0.
04166700000000034 x̄: 0.04 x̃: 0
HURT stats (rel) min: 0.62% max: 0.62% x̄: 0.62% x̃: 0.62%
95% mean confidence interval for cycles value: -0.05 -0.01
95% mean confidence interval for cycles %-change: -5.27% <.01%
Inconclusive result (%-change mean confidence interval includes 0).
total arith in shared programs: 4603.42 -> 4601.54 (-0.04%)
arith in affected programs: 50.50 -> 48.62 (-3.71%)
helped: 41
HURT: 1
helped stats (abs) min: 0.
04166599999999998 max: 0.
08333299999999999 x̄: 0.05 x̃: 0
helped stats (rel) min: 0.72% max: 33.33% x̄: 17.23% x̃: 13.33%
HURT stats (abs) min: 0.
04166700000000034 max: 0.
04166700000000034 x̄: 0.04 x̃: 0
HURT stats (rel) min: 0.62% max: 0.62% x̄: 0.62% x̃: 0.62%
95% mean confidence interval for arith value: -0.05 -0.04
95% mean confidence interval for arith %-change: -20.93% -12.69%
Arith are helped.
total quadwords in shared programs: 110116 -> 110009 (-0.10%)
quadwords in affected programs: 7829 -> 7722 (-1.37%)
helped: 106
HURT: 0
helped stats (abs) min: 1.0 max: 2.0 x̄: 1.01 x̃: 1
helped stats (rel) min: 0.49% max: 7.14% x̄: 1.91% x̃: 1.35%
95% mean confidence interval for quadwords value: -1.03 -0.99
95% mean confidence interval for quadwords %-change: -2.23% -1.59%
Quadwords are helped.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12114>
Alyssa Rosenzweig [Thu, 29 Jul 2021 18:34:32 +0000 (14:34 -0400)]
pan/bi: Test restrictions on same-cycle temporaries
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12114>
Alyssa Rosenzweig [Thu, 29 Jul 2021 18:26:08 +0000 (14:26 -0400)]
pan/bi: Restrict swizzles on same cycle temporaries
Hand typed. We could generate this from the XML to avoid the repititon
but I think the cure is worse than the disease.
This fixes instruction encoding faults seen in conformance tests.
Only a single shader-db affected, and it was likely already broken...
quadwords HURT: shaders/glmark/22-1.shader_test MESA_SHADER_FRAGMENT: 133 -> 135 (1.50%)
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12114>
Simon Ser [Tue, 27 Jul 2021 07:04:14 +0000 (09:04 +0200)]
lima: fail in get_handle(TYPE_KMS) without a scanout resource
The previous logic was returning a handle valid for the render-only
device if rsc->scanout was NULL. However the caller doesn't expect
this: the caller will use the handle with the KMS device.
Instead of returning a handle for the wrong device, fail if we don't
have one.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12074>
Simon Ser [Tue, 27 Jul 2021 06:59:52 +0000 (08:59 +0200)]
panfrost: fail in get_handle(TYPE_KMS) without a scanout resource
The previous logic was returning a handle valid for the render-only
device if rsc->scanout was NULL. However the caller doesn't expect
this: the caller will use the handle with the KMS device.
Instead of returning a handle for the wrong device, fail if we don't
have one.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12074>
Simon Ser [Tue, 27 Jul 2021 06:59:09 +0000 (08:59 +0200)]
freedreno: fail in get_handle(TYPE_KMS) without a scanout resource
The previous logic was returning a handle valid for the render-only
device if rsc->scanout was NULL. However the caller doesn't expect
this: the caller will use the handle with the KMS device.
Instead of returning a handle for the wrong device, fail if we don't
have one.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Emma Anholt <emma@anholt.net>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12074>
Simon Ser [Tue, 27 Jul 2021 06:55:02 +0000 (08:55 +0200)]
etnaviv: fail in get_handle(TYPE_KMS) without a scanout resource
The previous logic was returning a handle valid for the render-only
device if rsc->scanout was NULL. However the caller doesn't expect
this: the caller will use the handle with the KMS device.
Instead of returning a handle for the wrong device, fail if we don't
have one.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12074>
Simon Ser [Tue, 27 Jul 2021 06:52:45 +0000 (08:52 +0200)]
etnaviv: fix renderonly check in etna_resource_alloc
When the driver hasn't been initialized via renderonly, screen->ro
will be NULL. This fixes a crash when passing USE_SCANOUT to etnaviv
when it's missing renderonly.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12074>
Thomas H.P. Andersen [Wed, 14 Jul 2021 12:51:26 +0000 (14:51 +0200)]
nine: Fix assert in tx_src_param
A previous commit cleaned up the asserts but the last part of
this assert looks like it got mixed up. It should have allowed
param->rel for D3DSPR_INPUT if version is 3.0. Instead it does
&& on the enum value D3DSPR_ADDR which is of course always true,
with the version check. The result is that we miss input
validation with version 3.0.
Spotted by a compile warning
Fixes:
5974401a4ad ("st/nine: Regroup param->rel tests")
Reviewed-by: Axel Davy davyaxel0@gmail.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11880>
Emma Anholt [Thu, 15 Jul 2021 21:41:49 +0000 (14:41 -0700)]
nir_to_tgsi: Add support for TXP.
This doesn't perfectly emit all the TXPs we might be able to (if you get
any non-TXP-able projectors, that whole sampler dim gets lowered), but it
should be a big boost to i915g.
softpipe shader-db:
total instructions in shared programs: 2953625 -> 2951201 (-0.08%)
instructions in affected programs: 108901 -> 106477 (-2.23%)
total temps in shared programs: 565869 -> 566632 (0.13%)
temps in affected programs: 8922 -> 9685 (8.55%)
i915g shader-db:
total instructions in shared programs: 372570 -> 370254 (-0.62%)
instructions in affected programs: 39825 -> 37509 (-5.82%)
total tex_indirect in shared programs: 11420 -> 11074 (-3.03%)
tex_indirect in affected programs: 913 -> 567 (-37.90%)
LOST: 0
GAINED: 12
Closes: #4984
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11912>
Emma Anholt [Wed, 14 Jul 2021 23:41:58 +0000 (16:41 -0700)]
nir_to_tgsi: Pack our tex coords into vec4 nir_tex_src_backend[12].
For TGSI, we need the coordinate, comparator, bias, and LOD all together
in the first two vec4 args, and by doing it in the backend we were
generating extra MOVs.
softpipe shader-db results:
total instructions in shared programs: 2985416 -> 2953625 (-1.06%)
instructions in affected programs: 499937 -> 468146 (-6.36%)
total temps in shared programs: 544769 -> 565869 (3.87%)
temps in affected programs: 105469 -> 126569 (20.01%)
i915g shader-db:
total instructions in shared programs: 371625 -> 369594 (-0.55%)
instructions in affected programs: 24903 -> 22872 (-8.16%)
total tex_indirect in shared programs: 11381 -> 11365 (-0.14%)
tex_indirect in affected programs: 43 -> 27 (-37.21%)
LOST: 7
GAINED: 16
The temps increase is the pre-existing issue that we never release temps
for NIR regs, which doesn't matter much for softpipe (just memory/cache
footprint) but does for i915g as seen by shaders that no longer compile
(though overall we seem to win).
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11912>