Walker Chen [Tue, 26 Jul 2022 02:36:17 +0000 (10:36 +0800)]
TDM:fix 32bit only has 1 channel of data
TDM: playback or record with 32bit format, only has 1 channel of data.
This bug has been resolved.
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
Jason Zhou [Fri, 22 Jul 2022 09:50:39 +0000 (09:50 +0000)]
Merge branch 'CR_1590_GPU_Enable_515_Andy.Hu' into 'jh7110-5.15.y-devel'
CR_1590: defconfig: enable GPU building
See merge request sdk/linux!320
Andy Hu [Fri, 22 Jul 2022 08:36:20 +0000 (16:36 +0800)]
defconfig: enable GPU building
Enable CONFIG_DRM_IMG and CONFIG_DRM_IMG_ROGUE in jh7110 defconfig
Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
Jason Zhou [Fri, 22 Jul 2022 05:36:36 +0000 (05:36 +0000)]
Merge branch 'CR_1584_pwmdac_11025_compatible_issue_minda' into 'jh7110-5.15.y-devel'
CR_1584 pwmdac:sound: support 11025hz sample rate.
See merge request sdk/linux!275
Jason Zhou [Fri, 22 Jul 2022 01:43:47 +0000 (01:43 +0000)]
Merge branch 'CR_1649_7110_evb_5.15_vout_retbug_shengyang.chen' into 'jh7110-5.15.y-devel'
CR_1649_5.15-evb_vout: fix failure problem of vout while startup
See merge request sdk/linux!299
minda.chen [Wed, 13 Jul 2022 06:04:54 +0000 (14:04 +0800)]
pwmdac:sound: support 11025hz play mode.
1. set the correct clock rate and sample cnt.
2. using aplay 11.025kz wave file can pass.
3. fix issue redmine 1584
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
Jason Zhou [Thu, 21 Jul 2022 10:46:04 +0000 (10:46 +0000)]
Merge branch 'CR_1422_V4L2_515_mason.huo' into 'jh7110-5.15.y-devel'
Cr 1422 v4 l2 515 mason.huo
See merge request sdk/linux!316
Jason Zhou [Thu, 21 Jul 2022 10:43:22 +0000 (10:43 +0000)]
Merge branch 'CR_1667_TDM_change_reset_interface_walker.chen' into 'jh7110-5.15.y-devel'
CR_1667_TDM_change_reset_interface
See merge request sdk/linux!304
Jason Zhou [Thu, 21 Jul 2022 10:41:29 +0000 (10:41 +0000)]
Merge branch 'CR_1541_PDM_Increase_walker.chen' into 'jh7110-5.15.y-devel'
CR_1541_PDM: support more data width and sample rate
See merge request sdk/linux!310
Jason Zhou [Thu, 21 Jul 2022 10:40:44 +0000 (10:40 +0000)]
Merge branch 'CR_1661_Watchdog_api_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_1661 watchdog:starfive:Update reset api
See merge request sdk/linux!308
Jason Zhou [Thu, 21 Jul 2022 10:39:37 +0000 (10:39 +0000)]
Merge branch 'CR_1600_v4l2_reset_515_changhuang.liang' into 'jh7110-5.15.y-devel'
CR_1600_v4l2_reset_515_changhuang.liang
See merge request sdk/linux!282
Jason Zhou [Thu, 21 Jul 2022 10:38:00 +0000 (10:38 +0000)]
Merge branch 'CR_1657_clock_tree_api_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_1657 clock tree api xingyu.wu
See merge request sdk/linux!305
Jason Zhou [Thu, 21 Jul 2022 10:36:57 +0000 (10:36 +0000)]
Merge branch 'CR_1658_I2S_515_curry.zhang' into 'jh7110-5.15.y-devel'
CR_1658_I2S [Audio: I2S] Updated the reset API
See merge request sdk/linux!301
Jason Zhou [Thu, 21 Jul 2022 10:35:03 +0000 (10:35 +0000)]
Merge branch 'CR_1656_RTC_hal.feng' into 'jh7110-5.15.y-devel'
Cr 1656 rtc hal.feng
See merge request sdk/linux!292
Walker Chen [Wed, 20 Jul 2022 09:53:32 +0000 (17:53 +0800)]
TDM:change reset interface
1.Modify reset interface with devm_reset_control_array_get_exclusive
2.Support more sample rate: 11025, 22050, 32000, 44100, 48000
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
mason.huo [Mon, 27 Jun 2022 08:33:18 +0000 (16:33 +0800)]
media: starfive: Fix v4l2 compliance test issues
To get the v4l2 compliance test passed:
Add some v4l2 operations which are needed.
Improve the ioctl operations of sensor too.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
mason.huo [Mon, 4 Jul 2022 03:27:37 +0000 (11:27 +0800)]
media: starfive: Add video format debug information
Add some debug log for set/get video format,
so that we can check if the v4l2 driver accepts
or not the format set by user.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
changhuang.liang [Tue, 19 Jul 2022 02:20:40 +0000 (10:20 +0800)]
v4l2: fixed v4l2 compliance issue
imx219 add set/get frameintervals
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
Walker Chen [Thu, 21 Jul 2022 06:02:22 +0000 (14:02 +0800)]
PDM: support more data width and sample rate
PDM driver: support data width 16, 32 bits, sample rate 8000, 11025,
16000 Hz
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
curry.zhang [Wed, 20 Jul 2022 01:36:38 +0000 (18:36 -0700)]
[Audio: I2S] Updated the reset API
changed the standard reset API
Signed-off-by: curry.zhang <curry.zhang@starfivetech.com>
Jason Zhou [Thu, 21 Jul 2022 05:28:59 +0000 (05:28 +0000)]
Merge branch 'CR_1582_evb_515_DRM_RGB_keith.zhao' into 'jh7110-5.15.y-devel'
riscv:linux:vout:rgb
See merge request sdk/linux!278
Hal Feng [Tue, 19 Jul 2022 13:11:20 +0000 (21:11 +0800)]
rtc: starfive: Change reset api
Use devm_reset_control_array_get_exclusive() to get reset
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Hal Feng [Tue, 19 Jul 2022 13:09:14 +0000 (21:09 +0800)]
riscv: dts: starfive: Modify order of reset in rtc node
For changing reset api used in rtc driver
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
xingyu.wu [Wed, 20 Jul 2022 02:07:06 +0000 (10:07 +0800)]
clk:starfive:Update clk and reset api about vout
Use 'clk_bulk_get' api to replace 'clk_get' and use
'share' replace 'exclusive' about reset.
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
xingyu.wu [Wed, 20 Jul 2022 02:02:06 +0000 (10:02 +0800)]
clk:starfive:Update clk and reset api about isp
Use 'clk_bulk_get' and 'devm_reset_control_array_get' api
to replace 'clk_get' and 'devm_reset_control_get' api.
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
changhuang.liang [Thu, 14 Jul 2022 07:48:02 +0000 (15:48 +0800)]
v4l2: modify reset api
modify reset api
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
Jason Zhou [Wed, 20 Jul 2022 09:28:58 +0000 (09:28 +0000)]
Merge branch 'CR_1176_CLOCK_TREE_PLL_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR 1176 clock tree pll xingyu.wu
See merge request sdk/linux!280
xingyu.wu [Wed, 20 Jul 2022 05:58:15 +0000 (13:58 +0800)]
watchdog:starfive:Update reset api
Use 'devm_reset_control_array_get_exclusive' api to
get reset controllers.
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
xingyu.wu [Mon, 18 Jul 2022 02:11:56 +0000 (10:11 +0800)]
clk:starfive:Modify function format about 'jh7110_pll_data_from'
Modify function format about 'jh7110_pll_data_from'
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
xingyu.wu [Fri, 15 Jul 2022 09:31:36 +0000 (17:31 +0800)]
defconfig:Add CONFIG_CLK_STARFIVE_JH7110_PLL
Add CONFIG_CLK_STARFIVE_JH7110_PLL
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
xingyu.wu [Fri, 15 Jul 2022 08:51:21 +0000 (16:51 +0800)]
clk:starfive:Set PLL2 frequency when clock tree registering
In the file drivers/clk/starfive/clk-starfive-jh7110-pll.h,
If set PLL2_DEFAULT_FREQ NULL of 0 , then PLL2 frequency is original.
If set PLL2_DEFAULT_FREQ one of 'starfive_pll2_freq_value', then PLL2
frequency will be set the new rate during clock tree registering.
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
xingyu.wu [Fri, 15 Jul 2022 03:53:25 +0000 (11:53 +0800)]
clk:starfive:Add PLL2 frequency controller
If enable CONFIG_CLK_STARFIVE_JH7110_PLL, also could read or set PLL1 clock's
rate by reading or setting syscon registers.
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
xingyu.wu [Mon, 11 Jul 2022 08:46:18 +0000 (16:46 +0800)]
clk:starfive:Add PLL0 frequency controller
If enable CONFIG_CLK_STARFIVE_JH7110_PLL, could read or set PLL0 clock's
rate by reading or setting syscon registers.
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
xingyu.wu [Mon, 4 Jul 2022 03:02:31 +0000 (11:02 +0800)]
clk:starfive:Modify the format
Modify the clocktree files' format
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
xingyu.wu [Tue, 21 Jun 2022 12:41:11 +0000 (20:41 +0800)]
dt-bindings:clock:Delete external clock definitions
Move external clock definitions to C files that avoid illegal use.
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
shengyang.chen [Wed, 20 Jul 2022 07:16:04 +0000 (15:16 +0800)]
vout: fix failure problem of vout while startup
fix failure problem of vout while startup
Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
Jason Zhou [Wed, 20 Jul 2022 06:23:30 +0000 (06:23 +0000)]
Merge branch 'CR_1651_7110_evb_5.15_voutrst-1_shengyang.chen' into 'jh7110-5.15.y-devel'
Cr 1651 7110 evb 5.15 voutrst 1 shengyang.chen
See merge request sdk/linux!285
Jason Zhou [Wed, 20 Jul 2022 06:22:11 +0000 (06:22 +0000)]
Merge branch 'CR_1562_SPI_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR_1562 spi xingyu.wu
See merge request sdk/linux!288
Jason Zhou [Wed, 20 Jul 2022 06:21:25 +0000 (06:21 +0000)]
Merge branch 'CR_1564_I2C_hal.feng' into 'jh7110-5.15.y-devel'
CR 1564 i2c hal.feng
See merge request sdk/linux!290
Jason Zhou [Wed, 20 Jul 2022 06:20:37 +0000 (06:20 +0000)]
Merge branch 'CR_1560_v4l2_changhuang.liang' into 'jh7110-5.15.y-devel'
CR_1560_v4l2_changhuang.liang
See merge request sdk/linux!294
Jason Zhou [Wed, 20 Jul 2022 06:19:45 +0000 (06:19 +0000)]
Merge branch 'CR_1631_7110_evb_5.15_mipitx_shengyang.chen' into 'jh7110-5.15.y-devel'
CR_1631-5.15 riscv:linux:drm:mipitx
See merge request sdk/linux!296
Jason Zhou [Wed, 20 Jul 2022 06:19:12 +0000 (06:19 +0000)]
Merge branch 'CR_1274_SEC_jiajie.ho' into 'jh7110-5.15.y-devel'
crypto:starfive: Switch CSR polling instead of interrupt for HMAC.
See merge request sdk/linux!298
jiajie.ho [Wed, 20 Jul 2022 03:20:55 +0000 (11:20 +0800)]
crypto:starfive: Switch CSR polling instead of interrupt for HMAC.
Observed interrupt signal goes HIGH before HMAC calculations
has been completed. Switching to use CSR polling to check for
HMAC_DONE instead.
Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
shengyang.chen [Wed, 20 Jul 2022 01:54:46 +0000 (09:54 +0800)]
riscv:linux:drm:
fix mipi shifted display problem
remove useless process in vs_dc_hw.c
Signed-off-by:shengyang.chen<shengyang.chen@starfivetech.com>
Hal Feng [Tue, 19 Jul 2022 06:20:44 +0000 (14:20 +0800)]
riscv: dts: starfive: Correct i2c scl/sda falling time
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
xingyu.wu [Tue, 19 Jul 2022 07:51:13 +0000 (15:51 +0800)]
spi:pl022-starfive:Turn off dma channel search under overlay
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
xingyu.wu [Tue, 19 Jul 2022 06:49:20 +0000 (14:49 +0800)]
spi:pl022-starfive:Avoid power device error when CONFIG_PM enable
It would be error when CONFIG_PM enable and use overlay by of-platform to register.
And disable 'auto_runtime_pm' can be avoid.
And add some power manager operation in platform probe function.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
shengyang.chen [Tue, 19 Jul 2022 03:02:16 +0000 (11:02 +0800)]
riscv:linux:drm:
replace some reset interfaces for vout
Signed-off-by:shengyang.chen<shengyang.chen@starfivetech.com>
shengyang.chen [Tue, 19 Jul 2022 03:01:15 +0000 (11:01 +0800)]
riscv:arch:dts:
reduce some useless calling in vout port
Signed-off-by:shengyang.chen<shengyang.chen@starfivetech.com>
changhuang.liang [Mon, 18 Jul 2022 02:31:34 +0000 (10:31 +0800)]
v4l2: fixed close wr due to system hung
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
Jason Zhou [Fri, 15 Jul 2022 01:41:37 +0000 (01:41 +0000)]
Merge branch 'CR_1566_RTC_hal.feng' into 'jh7110-5.15.y-devel'
CR_1566: rtc hal.feng
See merge request sdk/linux!276
keith.zhao [Thu, 14 Jul 2022 19:55:35 +0000 (03:55 +0800)]
riscv:linux:vout:rgb
Solve RGB channel display offset problem
Signed-off-by: keith <keith.zhao@starfivetech.com>
Hal Feng [Wed, 13 Jul 2022 13:10:54 +0000 (21:10 +0800)]
rtc: starfive: Improve rtc driver
1. Set initial time if rtc is never set.
2. Add timeout when clearing interrupt flag register.
3. Improve alarm function.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Hal Feng [Mon, 20 Jun 2022 07:34:13 +0000 (15:34 +0800)]
rtc: starfive: Improve coding style
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Jason Zhou [Tue, 12 Jul 2022 13:57:24 +0000 (13:57 +0000)]
Merge branch 'CR_1458_timer_watchdog_wording_Xingyu.Wu' into 'jh7110-5.15.y-devel'
CR 1458 timer watchdog wording xingyu.wu
See merge request sdk/linux!269
Jason Zhou [Tue, 12 Jul 2022 13:46:33 +0000 (13:46 +0000)]
Merge branch 'CR_1455_PCIe_Kevin.xie' into 'jh7110-5.15.y-devel'
driver: pci: Add extended reset time for better compatibility
See merge request sdk/linux!273
Jason Zhou [Tue, 12 Jul 2022 13:11:48 +0000 (13:11 +0000)]
Merge branch 'CR_1537_USB_515_mason.huo' into 'jh7110-5.15.y-devel'
usb: cdns3: Configuare phy as down-spread-spectrum
See merge request sdk/linux!253
Jason Zhou [Tue, 12 Jul 2022 13:06:40 +0000 (13:06 +0000)]
Merge branch 'CR_1480_7110_evb_5.15_mipitx_shengyang.chen' into 'jh7110-5.15.y-devel'
riscv:linux:drm:mipidsi
See merge request sdk/linux!265
Jason Zhou [Tue, 12 Jul 2022 13:05:06 +0000 (13:05 +0000)]
Merge branch 'CR_1383_v4l2_pipeline_515_changhuang.liang' into 'jh7110-5.15.y-devel'
v4l2: delete csiphy1 and csi1 subdev
See merge request sdk/linux!255
Jason Zhou [Tue, 12 Jul 2022 13:03:35 +0000 (13:03 +0000)]
Merge branch 'CR_1496_DRM_mipi_hdmi_colorIssue_keith.zhao' into 'jh7110-5.15.y-devel'
riscv:driver:drm:DC8200
See merge request sdk/linux!271
Jason Zhou [Tue, 12 Jul 2022 12:56:22 +0000 (12:56 +0000)]
Merge branch 'CR_1352_DRM_plane_overlay_515_Jack.Zhu' into 'jh7110-5.15.y-devel'
[VOUT][DRM]fix redmine #1352: disable plane overlay in close flow
See merge request sdk/linux!259
Jason Zhou [Tue, 12 Jul 2022 12:53:00 +0000 (12:53 +0000)]
Merge branch 'CR_1427_I2C_hal.feng' into 'jh7110-5.15.y-devel'
Cr 1427 i2c hal.feng
See merge request sdk/linux!263
Kevin.xie [Tue, 12 Jul 2022 11:14:08 +0000 (19:14 +0800)]
driver: pci: Add extended reset time for better compatibility
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
Jason Zhou [Tue, 12 Jul 2022 09:58:36 +0000 (09:58 +0000)]
Merge branch 'CR_1563_v4l2_515_changhuang.liang' into 'jh7110-5.15.y-devel'
CR_1563_v4l2_515_changhuang.liang
See merge request sdk/linux!267
keith.zhao [Tue, 12 Jul 2022 05:40:53 +0000 (13:40 +0800)]
riscv:driver:drm:DC8200
1、fix issue #1496(#1320 is the same issue)
Signed-off-by:keith.zhao <keith.zhao@statfivetech.com>
Ley Foon Tan [Thu, 7 Jul 2022 09:53:08 +0000 (09:53 +0000)]
clocksource: starfive: Update timer names
The existing implementation uses DT clock-names 'timer0', 'timer1' and etc
as timer names. This will have issue if there are two timer instance IPs
in the system.
This patch update timer names to format below, example:
timer@
13050000.ch0
timer@
13050000.ch1
timer@
13050000.ch2
timer@
13050000.ch3
Signed-off-by: Ley Foon Tan <leyfoon.tan@linux.starfivetech.com>
xingyu.wu [Tue, 12 Jul 2022 03:00:52 +0000 (11:00 +0800)]
dtsi:Add reset nodes about timer
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
xingyu.wu [Tue, 12 Jul 2022 02:57:13 +0000 (10:57 +0800)]
clocksource: starfive: Add reset control support
Reset the timer if the reset control is available.
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Ley Foon Tan <leyfoon.tan@linux.starfivetech.com>
xingyu.wu [Tue, 12 Jul 2022 01:57:17 +0000 (09:57 +0800)]
dtsi:Update compatible string about timer
jh7110.dtsi:Update compatible string to "starfive,timers"
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Ley Foon Tan [Tue, 28 Jun 2022 09:31:14 +0000 (09:31 +0000)]
dt-bindings: watchdog: starfive: Add StarFive watchdog
Add dt-bindigns documentation for StarFive watchdog.
Signed-off-by: Ley Foon Tan <leyfoon.tan@linux.starfivetech.com>
Ley Foon Tan [Tue, 28 Jun 2022 08:38:56 +0000 (08:38 +0000)]
dt-bindings: timer: Add compatible for StarFive timer
Adds dt-binding documentation of timer for StarFive timer.
Signed-off-by: Ley Foon Tan <leyfoon.tan@linux.starfivetech.com>
Ley Foon Tan [Tue, 28 Jun 2022 05:49:43 +0000 (05:49 +0000)]
watchdog: starfive: Change "si5" to "starfive"
Change all "si5" wording in driver to "starfive".
No functional change.
Signed-off-by: Ley Foon Tan <leyfoon.tan@linux.starfivetech.com>
Ley Foon Tan [Tue, 28 Jun 2022 03:59:09 +0000 (03:59 +0000)]
clocksource: starfive: Update compatible string to "starfive,timers"
Update compatible string to "starfive,timers".
Signed-off-by: Ley Foon Tan <leyfoon.tan@linux.starfivetech.com>
Ley Foon Tan [Tue, 28 Jun 2022 05:55:37 +0000 (05:55 +0000)]
clocksource: Kconfig: starfive: Update StarFive timer help description
Same StarFive timer IP is used in JH8100 SoC. Remove JH71xx wording from
description to be more generic.
Signed-off-by: Ley Foon Tan <leyfoon.tan@linux.starfivetech.com>
changhuang.liang [Mon, 11 Jul 2022 12:50:56 +0000 (20:50 +0800)]
v4l2: modify bus_info
shengyang.chen [Mon, 11 Jul 2022 11:42:27 +0000 (19:42 +0800)]
riscv:linux:drm:mipidsi
fix mipi display color problem
Signed-off-by:shengyang.chen<shengyang.chen@starfivetech.com>
Hal Feng [Mon, 11 Jul 2022 07:14:23 +0000 (15:14 +0800)]
drm: verisilicon: inno_hdmi: Fix an i2c failure during kernel startup
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
jack.zhu [Fri, 8 Jul 2022 12:07:29 +0000 (20:07 +0800)]
[VOUT][DRM]fix redmine #1352: disable plane overlay in close flow
Jason Zhou [Fri, 8 Jul 2022 10:21:33 +0000 (10:21 +0000)]
Merge branch 'CR_1534_gpiomon_jianlong' into 'jh7110-5.15.y-devel'
CR_1534 pinctrl: starfive: Fix gpiomon erro
See merge request sdk/linux!249
Jason Zhou [Fri, 8 Jul 2022 08:30:21 +0000 (08:30 +0000)]
Merge branch 'CR_1346_PWM_hal.feng' into 'jh7110-5.15.y-devel'
Cr 1346 pwm hal.feng
See merge request sdk/linux!257
Hal Feng [Tue, 5 Jul 2022 13:22:51 +0000 (21:22 +0800)]
pwm: pwm-starfive-ptc: Improve pwm accuracy
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Jason Zhou [Fri, 8 Jul 2022 06:27:05 +0000 (06:27 +0000)]
Merge branch 'CR_1490_7110_evb_5.15_mipitx_shengyang.chen' into 'jh7110-5.15.y-devel'
riscv:linux:vout:m31
See merge request sdk/linux!250
mason.huo [Fri, 8 Jul 2022 03:24:21 +0000 (11:24 +0800)]
usb: cdns3: Configuare phy as down-spread-spectrum
The default phy spread-spectrum mode is up-spread-spectrum,
which is violated the usb3 spec.
The up-spread-spectrum mode leads to phy buffers overrun.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
changhuang.liang [Fri, 8 Jul 2022 02:34:19 +0000 (10:34 +0800)]
v4l2: delete csiphy1 and csi1 subdev
Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
andy.hu [Fri, 8 Jul 2022 00:48:47 +0000 (00:48 +0000)]
Merge branch 'CR_1311_CPUIdle_mason.huo' into 'jh7110-5.15.y-devel'
Cr 1311 cpu idle mason.huo
See merge request sdk/linux!247
shengyang.chen [Thu, 7 Jul 2022 12:19:52 +0000 (20:19 +0800)]
riscv:linux:vout:m31
fix 'NULL device' printing problem in console
Signed-off-by:shengyang.chen<shengyang.chen@starfivetech.com>
Jianlong Huang [Thu, 7 Jul 2022 08:47:24 +0000 (16:47 +0800)]
pinctrl: starfive: Fix gpiomon erro
If enable CONFIG_PM, 'pm_runtime_get_sync' will return erro
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Hal Feng [Tue, 21 Jun 2022 14:01:09 +0000 (22:01 +0800)]
pwm: pwm-starfive-ptc: Improve coding style
Disable clock properly, delete redundant comments, modify compatible
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Hal Feng [Tue, 5 Jul 2022 01:38:32 +0000 (09:38 +0800)]
riscv: dts: starfive: Modify the compatible of pwm(ptc) driver
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
andy.hu [Tue, 5 Jul 2022 06:53:37 +0000 (06:53 +0000)]
Merge branch 'CR_1468_I2C_Kevin.xie' into 'jh7110-5.15.y-devel'
dts: starfive: Set static i2c bus number
See merge request sdk/linux!244
Kevin.xie [Mon, 4 Jul 2022 09:46:49 +0000 (17:46 +0800)]
dts: starfive: Set static i2c bus number
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
mason.huo [Wed, 22 Jun 2022 05:18:28 +0000 (13:18 +0800)]
riscv: dts: Add the cpuidle states
Add four cpuidle states per the dt binding document.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
mason.huo [Wed, 22 Jun 2022 05:16:32 +0000 (13:16 +0800)]
riscv: deconfig: Enable the riscv cpuidle config
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
mason.huo [Wed, 22 Jun 2022 05:11:59 +0000 (13:11 +0800)]
riscv: Add the make function for SBI version
After cherry pick the riscv cpuidle driver,
there is a compilation error due to lack of
sbi_mk_version(); add it manually.
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
Anup Patel [Thu, 10 Feb 2022 05:49:46 +0000 (11:19 +0530)]
dt-bindings: Add common bindings for ARM and RISC-V idle states
The RISC-V CPU idle states will be described in under the
/cpus/idle-states DT node in the same way as ARM CPU idle
states.
This patch adds common bindings documentation for both ARM
and RISC-V idle states.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Anup Patel [Thu, 10 Feb 2022 05:49:45 +0000 (11:19 +0530)]
cpuidle: Add RISC-V SBI CPU idle driver
The RISC-V SBI HSM extension provides HSM suspend call which can
be used by Linux RISC-V to enter platform specific low-power state.
This patch adds a CPU idle driver based on RISC-V SBI calls which
will populate idle states from device tree and use SBI calls to
entry these idle states.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Anup Patel [Thu, 10 Feb 2022 05:49:44 +0000 (11:19 +0530)]
cpuidle: Factor-out power domain related code from PSCI domain driver
The generic power domain related code in PSCI domain driver is largely
independent of PSCI and can be shared with RISC-V SBI domain driver
hence we factor-out this code into dt_idle_genpd.c and dt_idle_genpd.h.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
mason.huo [Wed, 22 Jun 2022 02:31:05 +0000 (10:31 +0800)]
RISC-V: Add SBI HSM suspend related defines
We add defines related to SBI HSM suspend call and also
update HSM states naming as-per latest SBI specification.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
Anup Patel [Thu, 10 Feb 2022 05:49:42 +0000 (11:19 +0530)]
RISC-V: Add arch functions for non-retentive suspend entry/exit
The hart registers and CSRs are not preserved in non-retentative
suspend state so we provide arch specific helper functions which
will save/restore hart context upon entry/exit to non-retentive
suspend state. These helper functions can be used by cpuidle
drivers for non-retentive suspend entry/exit.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: mason.huo <mason.huo@starfivetech.com>
Anup Patel [Thu, 10 Feb 2022 05:49:41 +0000 (11:19 +0530)]
RISC-V: Rename relocate() and make it global
The low-level relocate() function enables mmu and relocates
execution to link-time addresses. We rename relocate() function
to relocate_enable_mmu() function which is more informative.
Also, the relocate_enable_mmu() function will be used in the
resume path when a CPU wakes-up from a non-retentive suspend
so we make it global symbol.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>