venus: refactor vn_device_memory to prepare for async alloc

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25611>

venus: track VkPhysicalDeviceMemoryProperties instead

For code simplicity.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25611>

venus: remove redundant bo roundtrip and add more docs

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25611>

ci/crocus: Disable flaky unvanquished-ultra trace

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25626>

ci/zink: Skip dmat[34] op tests in general, as well

More "make full-run zink CI take less time".  You still get dmat2 to see
if double matrices work at all.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25626>

ci/zink: Skip 3-minute-long glx-visuals timeouts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25626>

ci/crocus: Generalize the drawarrays-vertex-count flakes.

We just got it for triangle fan as well.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25626>

nir: round f2f16{_rtne/_rtz} correctly for constant expressions

As noted in the previous commit, the intermediate cast to float from
double can produce wrong results.

Fixes upcoming Vulkan CTS tests:
dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp16.input_args.rounding_rte_sconst_conv_from_fp64_up
dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp16.input_args.rounding_rte_sconst_conv_from_fp64_up_nostorage
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.input_args.rounding_rte_sconst_conv_from_fp64_up_vert
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.input_args.rounding_rte_sconst_conv_from_fp64_up_nostorage_vert
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.input_args.rounding_rte_sconst_conv_from_fp64_up_frag
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.input_args.rounding_rte_sconst_conv_from_fp64_up_nostorage_frag

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25281>

util: add double_to_float16 helpers

We convert from doubles to half by going through float in between, but
as noted in the comment in this commit, that can give wrong results in
some cases.

Add some helpers to ensure correct results based on rounding mode that
will be used in the next commit.

v2: Use fi/di from u_math.h (Ian)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25281>

intel/compiler: round f2f16 correctly for RTNE case

v2: bcsel -> b2i32 (Ian)

Fixes upcoming Vulkan CTS tests:
dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp16.input_args.rounding_rte_conv_from_fp64_up
dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp16.input_args.rounding_rte_conv_from_fp64_up_nostorage
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.input_args.rounding_rte_conv_from_fp64_up_vert
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.input_args.rounding_rte_conv_from_fp64_up_nostorage_vert
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.input_args.rounding_rte_conv_from_fp64_up_frag
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp16.input_args.rounding_rte_conv_from_fp64_up_nostorage_frag

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25281>

nir/lower_int64: respect rounding mode when casting to float

Appendix A: Vulkan environemtn for SPIR-V says:
  Operations described as “correctly rounded” will return the infinitely
  precise result, x, rounded so as to be representable in
  floating-point. The rounding mode is not specified, unless the entry
  point is declared with the RoundingModeRTE or the RoundingModeRTZ
  Execution Mode.

Conversion between types are classified as correctly rounded, so let's
do rounding correctly.

v2: check rounding mode for destination bit size (Georg)

Fixes upcoming Vulkan CTS tests:
dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp32.input_args.rounding_rtz_conv_from_uint64_up
dEQP-VK.spirv_assembly.instruction.compute.float_controls.fp32.input_args.rounding_rtz_conv_from_int64_up
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp32.input_args.rounding_rtz_conv_from_uint64_up_vert
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp32.input_args.rounding_rtz_conv_from_int64_up_vert
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp32.input_args.rounding_rtz_conv_from_uint64_up_frag
dEQP-VK.spirv_assembly.instruction.graphics.float_controls.fp32.input_args.rounding_rtz_conv_from_int64_up_frag

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25281>

vulkan/runtime: add internal parameter to vk_spirv_to_nir

If used to compile internal shaders, it will lack the flag while running
through all the optimization passes it does.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25281>

iris: Nuke useless flags from iris_fine_fence_new()

Only IRIS_FENCE_TOP_OF_PIPE was changing the PIPE_CONTROL flags but it
was not set in any caller.
So we can remove IRIS_FENCE_* and flags from iris_fine_fence struct.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25571>

iris: Lock bufmgr->lock before call vma_free() in error path

vma_free() requires that bufmgr->lock is held.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25571>

gbm: delete some zink handling

this has never been functional and may never be

Fixes: d760a9151b7 ("gallium: Learn about kopper")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25526>

zink: error at handle export on missing EXT_image_drm_format_modifier

this doesn't work anyway

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25526>

egl: don't set ForceSoftware for all zink loading

sometimes this is desired, other times it isn't

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25526>

nir: fix several crashes in `nir_lower_tex`

This patch fixes the following issues that lead to crashes in some cases:

* an instruction is inserted to get texture lod that depends on a
  texture instruction that hasn't been inserted yet.
* this code tries to read channel 1 of the lod, but lod is scalar
* the code assumed there would only be 2 srcs, this isn't the case when
  bindless is used.

Fixes: b154a4154b4 ("nir/lower_tex: rewrite tex/txb -> txd/txl before saturating srcs")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25621>

i915: Use nir_group_loads() to reduce texture indirection phases.

total instructions in shared programs: 467049 -> 467040 (<.01%)
instructions in affected programs: 573 -> 564 (-1.57%)

total tex_indirect in shared programs: 14133 -> 14019 (-0.81%)
tex_indirect in affected programs: 491 -> 377 (-23.22%)

total temps in shared programs: 28543 -> 29178 (2.22%)
temps in affected programs: 3307 -> 3942 (19.20%)

LOST:   0
GAINED: 65
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>

i915: Make exceeding tex indirect count fatal.

The HW should fail to run shaders that have too many phases, so do this so
that we get link failures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>

i915: Do a test compile at glLinkShader() time.

This lets us throw errors back to the app for shaders that are too
complex.  The X server would really like to have this instead of guessing
based on renderer strings when shaders might be too complicated.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>

i915: Save fragment program compile error messages in the fragment shader.

We'll want this for doing linking failure messages for shaders that are
too long.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>

i915: Don't log I915_DEBUG=fs output for blit shaders.

Unless you have NIR_DEBUG=print_internal, the rest of the shader debug
pipeline is also hidden.  Cleans up output when looking at shader-db
compiles.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>

i915: Print the relevant counts vs limits when throwing errors.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>

i915: Re-clang-format and enforce it in CI.

I want to be able to mash the format button at any point when hacking on
this thing instead of doing bespoke whitespace.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25533>

pvr: Adjust EOT PBE state to account for the iview's base array layer

Fixes various dEQP array tests.
E.g.
  dEQP-VK.pipeline.monolithic.framebuffer_attachment
    .1d_array_32_64_4

Reported-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25348>

pvr: Use the render passes' attachments array to setup ISP state

`pvr_setup_isp_faces_and_control()` can be called from a secondary
command buffer. The render pass info's `attachments` array is only
populated in the primary command buffer on which the render pass
was started, thus the `ds_aspect` being used always ended up being
`0` leading to incorrect ISP state being setup.

This commit changes the function to use the `attachments` array
from the render pass struct instead of the one from the recording
state.

dEQP tests fixed:
  dEQP-VK.renderpass.suballocation.attachment
    .{1.13, 1.65, 1.74, 3.219, 3.236, 3.314, 3.385, 4.426}

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25351>

anv: flag 3DSTATE_RASTER as dirty after simple shader primitive

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 50f6903bd9 ("anv: add new low level emission & dirty state tracking")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9899
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25618>

anv: fix a couple of missing input for 3DSTATE_RASTER programming

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 50f6903bd9 ("anv: add new low level emission & dirty state tracking")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25618>

anv: add missing workaround handling in simple shader

It's not going to make any real difference because of the type of
primitive used, but it feels safer to have this everywhere after a
3DPRIMITIVE.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25618>

anv: implement INTEL_DEBUG=reemit

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25618>

pvr: Fix cubemap layer stride

The hw calculates the layer stride with the assumption of a full
mip chain being there even though certain levels might never be
used.

Fix the `layer_size` by accounting for any missing mip levels.

Fixes: 8991e6464 ("pvr: Add a Vulkan driver for Imagination Technologies PowerVR Rogue GPUs")
Reported-by: James Glanville <james.glanville@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25344>

pvr: fix mipmap size calculation for bc formats

The block size given by vk_format_get_blocksize is in blocks, not
texels.

dEQP tests affected:
  dEQP-VK.pipeline.monolithic.image_view.view_type*
    .format.eac*lod_base_mip_level

Fixes: 8991e6464 ("pvr: Add a Vulkan driver for Imagination Technologies PowerVR Rogue GPUs")
Signed-off-by: SoroushIMG <soroush.kashani@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25344>

docs: use html_static_path for static files

I'm not sure why I picked html_extra_path instead, as it's meant for
slightly less directly related files than what html_static_path is for.

So let's switch. It shouldn't make much of a real-world difference, but
should make it a bit easier to understand what this is about.

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

docs: only link to old docs from html

Only the HTML builder knows about these files, so we can't really link
to them when using other builders. This only matter to the link-checker
right now, because that's the only other builder we use.

It's a bit sad that we can't linkcheck files like these, but it doesn't
work either way. Another way of making it work could be to use the
download-role for these files. I'm not sure I think that's any better,
as that makes the code read a bit more confusingly to me; the intent
isn't to *download* the files, but to view them as raw-text.

I could go either way here, though. Neither is fantastic IMO, but
neither is a disaster either.

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

docs: mark some redirects as allowed

These redirects are all fine. I don't think we want to apply them,
because they are more about implementation details on the target site.

So let's just mark them as OK. They cause no harm.

There's also some redirects that are all about authentication. We also
don't want to apply these, because they would break the links.

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

docs: keep up with intels ever-moving documentation

No location is ever good enough for Intel. Let's catch up with their
latests churns in documentation URLs...

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

docs: use doc-role when linking to lists article

This makes the link-checker see the target.

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

docs: apply some trivial redirects

These were found by using the linkcheck builder.

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

docs: link to upstream etnaviv

The Wiki in this repo has been removed, and the about section mentions
that this is laanwj's personal fork, and not the upstream. So let's
update the link to the upstream repo instead.

There's no wiki there either, but the main repo itself contains a readme
file with some docs. Most of this is pretty stale, but it seems better
than nothing.

In the longer run, we should probably create a page about etnaviv in the
drivers directory of these docs, and try to keep that up to date.

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

docs: update link to git-wiki

The Git Wiki has been long deprecated, and is now partially removed. The
article we pointed to here seems to not have been backed up.

However, there's a new place that documents installing on Windows in the
Git Docs instead. So let's send users there instead.

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

docs: update anchor for link

GitLab has renamed "specific" runners to "project"-runners. And
additionally, they currently document two ways of creating them.

Let's update the link to point to the new, non-deprecated way.

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

docs: update a few links to https

These links forward to the HTTPS version now, let's save the users a
redirect.

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

docs: fix linkcheck

When running with the linkcheck builder,
app.builder.default_translator_class is None, making us throw an
exception and give up.

We don't need the bootstrap extension in this case, so just do nothing
instead.

Fixes: f72033bb707 ("docs: add bootstrap extension")
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25585>

util: Deduplicate macros between u_math.h and macros.h

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24484>

anv: Fix transfer type assert

Fix defect reported by Coverity Scan.

Constant expression result (CONSTANT_EXPRESSION_RESULT)
always_true_or: The or condition
type != ANV_TIMESTAMP_CAPTURE_AT_CS_STALL || type != ANV_TIMESTAMP_REWRITE_COMPUTE_WALKER
will always be true because type cannot be equal to two different values
at the same time, so it must be not equal to at least one of them.

Fixes: 5112b421462 ("anv: Handle end of pipe with MI_FLUSH_DW on transfer queue")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25605>

freedreno: Rework supported-modifiers handling

We should be taking into account the format while deciding if we support
a given modifier or not.  So a simple array of supported modifiers does
not do the trick.

While we are at it, also handle QCOM_TILED3.  (We really only use
QCOM_TILED2 in GMEM so it isn't user visible.)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9938
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25575>

ci/freedreno: re-enable Cheza (Adreno 630) runners

Problems we're resolved.

This reverts commit 1f3446499f2d3ffa056e3c5928ecbc8c4faac836.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25376>

util: Avoid waste space when linear alloc'ing large sizes

In the linear allocator, when a size larger than the minimum
buffer size is allocated, we currently create the new buffer
to fit exactly the requested size.

In that case, don't bother updating the `latest` pointer, since
this newly created buffer is already full.  In the worst case,
the current `latest` is full and it would be the same; in the
best case, there's still room for small allocations, so we avoid
wasting space if the next allocations would fit.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25517>

nvk: set optimization level to 3

The refactor in a4f8fd9dd53d90307c98c1b4ed15ec1deaa8f8d3 changed NV50_PROG_OPTIMIZE
from 3 to 0.

Running with NV50_PROG_OPTIMIZE=0 causes some shaders to not compile. One example is
dEQP-VK.pipeline.monolithic.creation_cache_control.compute_pipelines.duplicate_single_recreate_explicit_caching
which fails with:
"Assertion `insn->src(src0 & FA_SRC_MASK).getFile() == FILE_GPR' failed"
A similar error also happen when testing Serious Sam Fusion 2017

Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25601>

ci: print deqp version in the job log

This allows to easily verify which version was actually running in some
job, to notice if an image tag wasn't properly bumped, for instance.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21850>

v3d/ci: move traces job to wayland

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24094>

ci: do not report failed job when flakes reporting fails

It's not critical for the job itself.

Suggested-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25604>

pick-ui: add `Backport-to: XX.Y` nomination

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13664>

pick-ui: use more expressive variable names

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13664>

pick-ui: use assignment expressions

Python 3.8 is 2 years old by now, I think it's time to allow using its
features, especially for a script that's only used by the release
maintainers.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13664>

tu,util/driconf: Add option to not reserve descriptor set

A descriptor set is internally reserved for descriptor set dynamic
offset which might not be used by an applications which otherwise
requires an extra descriptor set. This driconf option allows making
that trade-off by dropping support for dynamic offsets in exchange
for an extra descriptor set which means 5 usable descriptor sets on
A6XX and 8 on A7XX.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25534>

tu: Support higher descriptor set count for A7XX

Allows for the descriptor set count to vary at runtime depending on
the specific GPU to allow for 7 usable descriptor sets on A7XX with
one reserved for dynamic offsets.

Passing VK-CTS: dEQP-VK.binding_model.*

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25534>

freedreno/common: Add max_sets property to A6xxGPUInfo

A7XX increases the maximum amount of descriptor sets from 5 to 8,
the amount of descriptor sets was added as a property of the
A6xxGPUInfo to accommodate it changing across GPUs.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25534>

anv: fix index buffer size programming

This is a merge issue due to 2 MRs touching the same code.

Fixes a few maintence5 tests like : dEQP-VK.robustness.bind_index_buffer2.offset_0.draw_indexed.oo_size

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 50f6903bd9 ("anv: add new low level emission & dirty state tracking")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25599>

nir: handle nir_var_mem_ubo in nir_clone_uniform_variable

for UBOs

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: expose reusable linking helpers for cloning uniform loads

for the new varying optimizer

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: gather dual slot input information

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: take dual slot input info into account when computing IO driver locations

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: add dual-slot input information into load_input intrinsics

This is necessary to allow optimizing VS inputs after nir_lower_io, which
is currently impossible because the loss of dual-slot information in NIR
would break VS inputs. With this, driver locations can be recomputed by
calling nir_recompute_io_bases. It's a prerequisite for optimizing varyings
with lowered IO.

When this is used, we will be able to eliminate unused dual-slot VS inputs
as well as unused low and high halves of dual-slot VS inputs for the first
time, which can happen due to optimizations of varyings. Without this,
st/mesa binds vertex buffers for dual-slot inputs that are fully or
partially unused in the shader.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: recompute IO bases after DCE in nir_lower_io_passes

otherwise the IO bases can be incorrect due to non-DCE'd input loads

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

nir: sort variables by location in nir_lower_io_passes to work around a bug

I don't know why this is necessary, but it unblocks the work on varying
optimizations.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25394>

virgl: Use common clear_texture if host doesn't support the feature

v2: Fix include (osy)

Fixes: a1eabeff (gallium: remove PIPE_CAP_CLEAR_TEXTURE)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9944

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25580>

ci: Uprev crosvm

Recent commit in linux kernel 6.6 rc3 broke booting
in crosvm. Latest crosvm contains a fix for this issue.
So bump the crosvm version to latest.

https://issuetracker.google.com/issues/303128596
https://chromium-review.googlesource.com/c/crosvm/crosvm/+/4906858

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25582>

ci/lima: farm is down, disable for now

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25596>

ci/b2c: switch containers to a back-up ahead of valve-infra renaming

We are about to rename mupuf/valve-infra into gfx-ci/ci-tron.

While most resources will transparently be redirected, gitlab does
not allow us to keep our containers during the migration.

To work around that, I uploaded the current containers to Eric's fork
of valve-infra. Let's use these containers until the migration is over!

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25593>

nvk: Invalidate SKED caches at the top of command buffers

This is the cache that caches QMDs.  We need to invalidate it or else we
can end up with cache collisions and end up running the wrong shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25595>

nvk: Invalidate sampler/texture header caches in BeginCommandBuffer()

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25595>

nvk: Add a nvk_cmd_buffer_compute_cls() helper

We have one of these for 3D and it's more ergonamic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25595>

nouveau: Generate headers for Maxwell B compute

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25595>

intel/fs: Add DP4A to get_lowered_simd_width

While working on cooperative matrix support, I noticed some invalid
DP4A instructions being generated.

    dp4a(32)    g33<1>UD    g21<8,8,1>UD    g1.0<0,1,0>UD   g9<1,1,1>UD

This violates the constraint that the destination or a source can only
access two consecutive GRFs.

I'm a little surprised that validation didn't catch this. Perhaps
because it's a 3 source instruction? Either way, it seems like a bigger
project to fix that.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Fixes: 0f809dbf404 ("intel/compiler: Basic support for DP4A instruction")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25554>

util: Add function print information about a ralloc tree

In release mode print the ralloc tree header pointers.  In debug mode,
will look at the child allocations recursively checking for the canary
values.  In most cases this should work and give us extra information
about the type of the subtree (GC, Linear) and the allocation sizes.

For example, calling it at the end of spirv_to_nir() will output the
following tree with a summary at the end (lines elided to focus on the
general structure of the output)

```
0xca8d00 (472 bytes)
  0xdf2c60 (32 bytes)
  0xdf2c00 (32 bytes)
  0xdf2ba0 (32 bytes)
  0xdf2b40 (32 bytes)
  (...)
  0xcde8b0 (64 bytes)
  0xcde760 (72 bytes)
    0xd2de40 (168 bytes)
  0xcce660 (64 bytes)
  0xcce510 (72 bytes)
    0xcce5a0 (120 bytes)
  0xcce490 (64 bytes)
  (...)
  0xcbc450 (456 bytes)
    0xdf55c0 (160 bytes)
      0xdf5730 (72 bytes)
        0xdf57c0 (80 bytes)
      0xdf5530 (72 bytes)
        0xdf56a0 (80 bytes)
    (...)
    0xcbe840 (128 bytes)
      0xcc4310 (4 bytes)
    0xcbc660 (536 bytes) (gc context)
      0xde6b40 (32576 bytes) (gc slab or large block)
      0xddb160 (32704 bytes) (gc slab or large block)
      0xdc8d50 (32704 bytes) (gc slab or large block)
      (...)
      0xcde9a0 (32704 bytes) (gc slab or large block)
      0xcd6720 (32704 bytes) (gc slab or large block)
      0xcce6e0 (32768 bytes) (gc slab or large block)
  0xcbc330 (72 bytes)
    0xd680a0 (208 bytes)
  0xca9010 (78560 bytes)
  0xca8f20 (176 bytes)

==== RALLOC INFO ptr=0xca8d30 info=0xca8d00
ralloc allocations    = 4714
  - linear            = 0
  - gc                = 23
  - other             = 4691
content bytes         = 1055139
ralloc metadata bytes = 226272
linear metadata bytes = 0
====
```

There's a flag to pass so only the summary at the end is printed.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25482>

util: Add a canary to identify gc_ctx in debug mode

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25482>

util: Add size to ralloc_header in debug mode

For 64-bit environments this just fills a padding.  Will enable
dumping more information when debugging ralloc trees.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25482>

rusticl: Add Rust bindings for inline glsl_types functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Flip wrapping of basic "get type" functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Flip wrapping of convenience accessors for vector types

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Flip wrapping of various type identification checks

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Flip wrapping of base_type checks

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Move C declarations into glsl_types.h

This ensures they'll be visible for the C++ inline implementations.
Reordered the functions to better organize them: queries, getters,
transformers, layout functions.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

compiler/types: Move the C++ inline functions in glsl_type out of the struct body

Just move code, will make easier to flip these to be wrappers to the C code.  Keep
those in a separate header file to reduce cluttering glsl_types.h.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25470>

venus: fix re-export of imported classic 3d resources

When the guest driver is Virgl while Xwayland is on Zink, Virgl can
request virtgpu classic 3d resource allocations for swapchain images.
Zink will import when the image is shared with xserver and will export
for fd info of all 2d images later to be forwarded.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25579>

radv: fix re-emitting streamout descriptors for NGG streamout

In a scenario like:
CmdBindTransformFeedbackBuffers()
BeginTransformFeedback()
CmdDraw() --> streamout descriptors emitted
EndTransformFeedback() --> streamout descriptors emitted as 0 (disabled)
CmdDraw()
BeginTransformFeedback()
CmdDraw() --> streamout descriptor not re-emitted
EndTransformFeedback()

Fix this by re-emitting streamout descriptors when streamout is
enabled/disabled because a buffer size of 0 acts like a disable bit.

This fixes dEQP-VK.transform_feedback.simple.backward_dependency_indirect*
on NAVI31.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25583>

zink: store bindless var when creating it to avoid creating it again

When bindless variables are created they get used directly and never
stored anywhere so if another bindless instruction is encountered
duplicate variables are created.

Fixes: fe2ba184d8c ("zink: use descriptor indices in compiler")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25591>

tu/kgsl: Fix field order in kgsl_command_object init

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9942

Fixes: ec268fa5b666a49adafc431dbc05b73bfd74526e
("tu/kgsl: Support u_trace and perfetto")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25581>

egl/wayland: Don't segfault if `create_wl_buffer` returns `NULL`

Normally, this shouldn't fail, but it has various cases where it returns
`NULL`. Without this change, it would result in a segfault when
`wl_buffer_add_listener` is called.

This instead makes `EGLSwapBuffers` return a `EGL_BAD_ALLOC` error.

The other place `create_wl_buffer` is called already checks the return
value, and the Vulkan WSI code doesn't seem to have an issue like this.

Signed-off-by: Ian Douglas Scott <ian@iandouglasscott.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24915>

ci: skip dEQP-VK.api.driver_properties.conformance_version for everyone

This test checks the driver's reported conformance version against the
version of the CTS we're running. This check fails every few months
and everyone has to go and bump the number in every driver.

Running this check only makes sense while preparing a conformance
submission, so skip it in the regular CI.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25519>

docs/ci: rewrite the "farm maintenance ^ other change" rule to mean what we actually meant

Sometimes updates to the farm config are needed before re-enabling it,
or updating test expectations with new failures that happened while the
farm was down, etc.

These need to be allowed, as the alternative is to update the
config/expectations/etc. blindly in one MR, merge it, and then merge
another MR with the farm re-enablement.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25560>

fix: clover: LLVM 18: s/CodeGenOpt::/CodeGenOptLevel::/

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9833
Reference: https://github.com/llvm/llvm-project/commit/0a1aa6cda2758b0926a95f87d39ffefb1cb90200
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25586>

fix: clover: LLVM 18 renamed/moved CGFT_*, update compat layer

LLVm renamed and moved the CGFT_* stuff, we need to update the clover
compat header to follow suit.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9833
Reference: https://github.com/llvm/llvm-project/commit/0a1aa6cda2758b0926a95f87d39ffefb1cb90200
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25586>

radv: fix gang submissions with chaining

Gang submissions are mostly only be used for task shaders to both
submit GFX and ACE command buffers in the same submission. Though,
the gang leader (the last submitted CS) IP type should match the
queue IP type to determine which fence to signal.

But if chaining is enabled, it's possible that all GFX cmdbufs are
chained to the first GFX cmdbuf, which means the last CS is ACE and
not GFX.

Fix this by resetting chaining for GFX when a cmdbuffer has GFX+ACE.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9724
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24966>

radv: fill the scratch BO in radv_fill_shader_rings()

Cleanup.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25529>

radv: always write the sample positions when a new descriptor BO is created

This was completely broken, for example in the following scenario:
- submits something which needs sample positions (this creates a new
descriptor BO with sample positions)
- submits something which needs the tess rings (this creates a new
descriptor BO with tess rings but without sample positions, ie.
add_sample_positions would be FALSE)
- submits something which needs sample positions again (this won't
create a new descriptor BO because it incorrectly remembered that
sample positions were set)

Fix this by always writing the sample positions.

This should fix the following flakes:
- dEQP-VK.fragment_shading_barycentric.*.weights.pipeline_topology_dynamic.msaa_interpolate_at_sample.*
- dEQP-VK.pipeline.fast_linked_library.multisample_interpolation.sample_interpolate_at_distinct_values.*
- dEQP-VK.pipeline.fast_linked_library.multisample_interpolation.sample_interpolation_consistency.*
- dEQP-VK.draw.renderpass.linear_interpolation.*
- dEQP-VK.draw.dynamic_rendering.primary_cmd_buff.linear_interpolation.*

These flakes were extremely hard to reproduce!

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25529>

intel/ds: track acceleration RT commands

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25570>

anv: use buffer pools for BVH build buffers

Private memory for BVH builds doesn't need to be mapped on the host,
it's purely for use by the GPU. So it can be put into a different
buffer pool that can put into VRAM only buffers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25570>