Greg Clayton [Thu, 27 Sep 2018 17:45:14 +0000 (17:45 +0000)]
Add an interactive mode to BSD archive parser.
llvm-svn: 343242
Simon Pilgrim [Thu, 27 Sep 2018 17:29:13 +0000 (17:29 +0000)]
[X86] Remove BT/BTC/BTR/BTS rr/ri overrides
llvm-svn: 343241
Jonas Hahnfeld [Thu, 27 Sep 2018 17:27:48 +0000 (17:27 +0000)]
Fix greedy FileCheck expression in test/Driver/mips-abi.c
'ld{{.*}}"' seems to match the complete line for me which is failing
the test. Only allow an optional '.exe' for Windows systems as most
other tests do.
Another possibility would be to collapse the greedy expression with
the next check to avoid matching the full line.
Differential Revision: https://reviews.llvm.org/D52619
llvm-svn: 343240
George Karpenkov [Thu, 27 Sep 2018 17:26:41 +0000 (17:26 +0000)]
[analyzer] Highlight nodes which have error reports in them in red in exploded graph
Differential Revision: https://reviews.llvm.org/D52584
llvm-svn: 343239
Simon Pilgrim [Thu, 27 Sep 2018 17:13:57 +0000 (17:13 +0000)]
[X86][Btver2] (V)MPSADBW instructions take 3uops not 1
llvm-svn: 343238
Kadir Cetinkaya [Thu, 27 Sep 2018 17:13:07 +0000 (17:13 +0000)]
Introduce completionItemKind capability support.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: ilya-biryukov, ioeric, jkorous, arphaman, cfe-commits
Differential Revision: https://reviews.llvm.org/D52616
llvm-svn: 343237
Luke Cheeseman [Thu, 27 Sep 2018 16:48:04 +0000 (16:48 +0000)]
Revert r343193 together with r343192
llvm-svn: 343236
Luke Cheeseman [Thu, 27 Sep 2018 16:47:30 +0000 (16:47 +0000)]
Revert r343192 as an ubsan build is currently failing
llvm-svn: 343235
Simon Pilgrim [Thu, 27 Sep 2018 16:39:52 +0000 (16:39 +0000)]
[X86][Btver2] BTC/BTR/BTS instructions take 2uops not 1
llvm-svn: 343234
Simon Pilgrim [Thu, 27 Sep 2018 16:24:42 +0000 (16:24 +0000)]
[X86] Split BT and BTC/BTR/BTS scheduler classes
llvm-svn: 343233
Simon Pilgrim [Thu, 27 Sep 2018 16:21:35 +0000 (16:21 +0000)]
[Sparc] EXPENSIVE_CHECKS now passes all machine verifier errors (PR27461)
Now that D51487 has landed, the last machine verifier tests that failed EXPENSIVE_CHECKS builds have now been fixed/removed, so we can remove @MatzeB 's isMachineVerifierClean() hack for sparc targets.
Differential Revision: https://reviews.llvm.org/D52612
llvm-svn: 343232
Oliver Stannard [Thu, 27 Sep 2018 16:19:04 +0000 (16:19 +0000)]
[AArch64] Refactor immediate details out of add/sub tblgen class (NFCI)
Bits [23-22] are used in Add and Sub to specify the shift. The value of the
shift field must be 0x; values of 1x are unallocated. MTE adds some instructions
that use such encodings, and this patch refactors the Add/Sub class so that
another class could derive from this one to implement other encodings and other
formats of bitfields.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52489
llvm-svn: 343231
Jonas Hahnfeld [Thu, 27 Sep 2018 16:12:32 +0000 (16:12 +0000)]
[OpenMP] Improve search for libomptarget-nvptx
When looking for the bclib Clang considered the default library
path first while it preferred directories in LIBRARY_PATH when
constructing the invocation of nvlink. The latter actually makes
more sense because during development it allows using a non-default
runtime library. So change the search for the bclib to start
looking in directories given by LIBRARY_PATH.
Additionally add a new option --libomptarget-nvptx-path= which
will be searched first. This will be handy for testing purposes.
Differential Revision: https://reviews.llvm.org/D51686
llvm-svn: 343230
Oliver Stannard [Thu, 27 Sep 2018 16:09:05 +0000 (16:09 +0000)]
[AArch64][v8.5A] Add speculation barriers SSBB and PSSBB
This adds two new barrier instructions which can be used to restrict
speculative execution of load instructions.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52483
llvm-svn: 343229
Sanjay Patel [Thu, 27 Sep 2018 15:59:24 +0000 (15:59 +0000)]
[InstCombine] Without infinites, fold (C / X) < 0.0 --> (X < 0)
When C is not zero and infinites are not allowed (C / X) > 0 is a sign
test. Depending on the sign of C, the predicate must be swapped.
E.g.:
foo(double X) {
if ((-2.0 / X) <= 0) ...
}
=>
foo(double X) {
if (X >= 0) ...
}
Patch by: @marels (Martin Elshuber)
Differential Revision: https://reviews.llvm.org/D51942
llvm-svn: 343228
Simon Pilgrim [Thu, 27 Sep 2018 14:57:57 +0000 (14:57 +0000)]
[X86][Btver2] BLSI/BLSMSK/BLSR instructions take 2uops not 1 (same as TZCNT)
llvm-svn: 343227
Teresa Johnson [Thu, 27 Sep 2018 14:55:32 +0000 (14:55 +0000)]
[WPD] Fix incorrect devirtualization after indirect call promotion
Summary:
Add a dominance check to ensure that the possible devirtualizable
call is actually dominated by the type test/checked load intrinsic being
analyzed. With PGO, after indirect call promotion is performed during
the compile step, followed by inlining, we may have a type test in the
promoted and inlined sequence that allows an indirect call in that
sequence to be devirtualized. That indirect call (inserted by inlining
after promotion) will share the same vtable pointer as the fallback
indirect call that cannot be devirtualized.
Before this patch the code was incorrectly devirtualizing the fallback
indirect call.
See the new test and the example described there for more details.
Reviewers: pcc, vitalybuka
Subscribers: mehdi_amini, Prazek, eraman, steven_wu, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D52514
llvm-svn: 343226
Oliver Stannard [Thu, 27 Sep 2018 14:54:33 +0000 (14:54 +0000)]
[AArch64][v8.5A] Add Branch Target Identification instructions
This adds new instructions used by the Branch Target Identification
feature. When this is enabled, these are the only instructions which can
be targeted by indirect branch instructions.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52485
llvm-svn: 343225
Eric Liu [Thu, 27 Sep 2018 14:50:24 +0000 (14:50 +0000)]
[Tooling] Get rid of uses of llvm::Twine::str which is slow. NFC
llvm-svn: 343224
Eric Liu [Thu, 27 Sep 2018 14:27:02 +0000 (14:27 +0000)]
[clangd] Make IncludeInserter less slow. NFC
llvm-svn: 343223
Sanjay Patel [Thu, 27 Sep 2018 14:24:29 +0000 (14:24 +0000)]
[InstCombine] add tests for FP sign-bit cmp optimization with fdiv; NFC
These are baseline tests for D51942.
Patch by: @marels (Martin Elshuber)
llvm-svn: 343222
Kadir Cetinkaya [Thu, 27 Sep 2018 14:21:07 +0000 (14:21 +0000)]
Tell whether file/folder for include completions.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: ilya-biryukov, ioeric, jkorous, arphaman, cfe-commits
Differential Revision: https://reviews.llvm.org/D52547
llvm-svn: 343221
Oliver Stannard [Thu, 27 Sep 2018 14:20:59 +0000 (14:20 +0000)]
[AArch64][v8.5A] Test optional Armv8.5-A random number extension
The implementation of this is in TargetParser, so we only need to add a
test for it in clang.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52492
llvm-svn: 343220
Oliver Stannard [Thu, 27 Sep 2018 14:05:46 +0000 (14:05 +0000)]
[AArch64][v8.5A] Add speculation restriction system registers
This adds some new system registers which can be used to restrict
certain types of speculative execution.
Patch by Pablo Barrio and David Spickett!
Differential revision: https://reviews.llvm.org/D52482
llvm-svn: 343218
Oliver Stannard [Thu, 27 Sep 2018 14:01:40 +0000 (14:01 +0000)]
[AArch64][v8.5A] Add Armv8.5-A random number instructions
This adds two new system registers, used to generate random numbers.
This is an optional extension to v8.5-A, and will be controlled by the
"+rng" modifier of the -march= and -mcpu= options.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52481
llvm-svn: 343217
Oliver Stannard [Thu, 27 Sep 2018 13:53:35 +0000 (13:53 +0000)]
[AArch64][v8.5A] Add Armv8.5-A "DC CVADP" instruction
This adds a new variant of the DC system instruction for persistent
memory.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52480
llvm-svn: 343216
Simon Pilgrim [Thu, 27 Sep 2018 13:49:52 +0000 (13:49 +0000)]
The llvm-exegesis output file is a html file not a txt file.
llvm-svn: 343215
Oliver Stannard [Thu, 27 Sep 2018 13:47:40 +0000 (13:47 +0000)]
[AArch64][v8.5A] Add prediction invalidation instructions to AArch64
This adds new system instructions which act as barriers to speculative
execution based on earlier execution within a particular execution
context.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52479
llvm-svn: 343214
Oliver Stannard [Thu, 27 Sep 2018 13:41:14 +0000 (13:41 +0000)]
[ARM][v8.5A] Add speculation barrier to ARM & Thumb instruction sets
This is a new barrier which limits speculative execution of the
instructions following it.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52477
llvm-svn: 343213
Michael Kruse [Thu, 27 Sep 2018 13:39:37 +0000 (13:39 +0000)]
[IslAst] Fix InParallelFor nesting.
IslAst could mark two nested outer loops as "OutermostParallel". It
caused that the code generator tried to OpenMP-parallelize both loops,
which it is not prepared loop.
It was because the recursive AST build algorithm managed a flag
"InParallelFor" to ensure that no nested loop is also marked as
"OutermostParallel". Unfortunatetly the same flag was used by nodes
marked as SIMD, and reset to false after the SIMD node. Since loops can
be marked as SIMD inside "OutermostParallel" loops, the recursive
algorithm again tried to mark loops as "OutermostParellel" although
still nested inside another "OutermostParallel" loop.
The fix exposed another bug: The function "astScheduleDimIsParallel" was
only called when a loop was potentially "OutermostParallel" or
"InnermostParallel", but as a side-effect also determines the minimum
dependence distance. Hence, changing when we need to know whether a loop
is "OutermostParallel" also changed which loop was annotated with
"#pragma minimal dependence distance".
Moreover, some complex condition linked with "InParallelFor" determined
whether a loop should be an "InnermostParallel" loop. It missed some
situations where it would not use mark as such although being inside an
SIMD mark node, and therefore not be annotated using "#pragma simd".
The changes in particular:
1. Split the "InParallelFor" flag into an "InParallelFor" and an
"InSIMD" flag.
2. Unconditionally call "astScheduleDimIsParallel" for its side-effects
and store the result in "InParallel" for later use.
3. Simplify the condition when a loop is "InnermostParallel".
Fixes llvm.org/PR33153 and llvm.org/PR38073.
llvm-svn: 343212
Oliver Stannard [Thu, 27 Sep 2018 13:39:06 +0000 (13:39 +0000)]
[AArch64][v8.5A] Add speculation barrier to AArch64 instruction set
This is a new barrier which limits speculative execution of the
instructions following it.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52476
llvm-svn: 343211
Daniel Cederman [Thu, 27 Sep 2018 13:32:54 +0000 (13:32 +0000)]
[Sparc] Remove the support for builtin setjmp/longjmp
Summary: It is currently broken and for Sparc there is not much benefit
in using a builtin version compared to a library version. Both versions
needs to store the same four values in setjmp and flush the register
windows in longjmp. If the need for a builtin setjmp/longjmp arises there
is an improved implementation available at https://reviews.llvm.org/D50969.
Reviewers: jyknight, joerg, venkatra
Subscribers: fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D51487
llvm-svn: 343210
Oliver Stannard [Thu, 27 Sep 2018 13:32:06 +0000 (13:32 +0000)]
[AArch64][v8.5A] Add FRINT[32,64][Z,X] instructions
These are some new variants of the "Floating-point Round to Integral"
family of instructions, which round to the nearest floating-point value
which fits in a 32- or 64-bit integer.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52475
llvm-svn: 343209
Clement Courbet [Thu, 27 Sep 2018 13:26:37 +0000 (13:26 +0000)]
[llvm-exegesis] Fix PR39096.
Summary: The key is now the resource name, not the resource id.
Reviewers: gchatelet
Subscribers: tschuett, RKSimon, llvm-commits
Differential Revision: https://reviews.llvm.org/D52607
llvm-svn: 343208
Sven van Haastregt [Thu, 27 Sep 2018 13:20:29 +0000 (13:20 +0000)]
[OpenCL] Improve extension-version.cl and to_addr_builtin.cl tests
Add cl_khr_depth_images to extension-version.cl.
Extend to_addr_builtin.cl to additionally test the built-in methods
to_private and to_local, and test assignment with to_global to
incorrect types.
Patch by Alistair Davies.
Differential Revision: https://reviews.llvm.org/D52020
llvm-svn: 343207
Kristof Umann [Thu, 27 Sep 2018 12:46:37 +0000 (12:46 +0000)]
Revert untintentionally commited changes
llvm-svn: 343205
Kristof Umann [Thu, 27 Sep 2018 12:40:16 +0000 (12:40 +0000)]
[Lex] TokenConcatenation now takes const Preprocessor
Differential Revision: https://reviews.llvm.org/D52502
llvm-svn: 343204
Daniel Cederman [Thu, 27 Sep 2018 12:34:53 +0000 (12:34 +0000)]
[Sparc] Add unimp alias
Summary: Use 0 as the default immediate for the UNIMP instruction.
This matches the behavior in gas.
Reviewers: jyknight, venkatra
Subscribers: fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D51526
llvm-svn: 343203
Daniel Cederman [Thu, 27 Sep 2018 12:34:48 +0000 (12:34 +0000)]
[Sparc] Add support for the partial write PSR instruction
Summary:
Partial write %PSR (WRPSR) is a SPARC V8e option that allows WRPSR
instructions to only affect the %PSR.ET field. It is supported by
the GR740 and GR716.
Reviewers: jyknight, venkatra
Subscribers: fedor.sergeev, jrtc27, llvm-commits
Differential Revision: https://reviews.llvm.org/D48644
llvm-svn: 343202
Jonas Toth [Thu, 27 Sep 2018 12:30:44 +0000 (12:30 +0000)]
[clang-tidy] use CHECK-NOTES in tests for bugprone suspicious-enum-usage
Reviewers: alexfh, aaron.ballman, hokein
Subscribers: xazax.hun, cfe-commits
Differential Revision: https://reviews.llvm.org/D52229
llvm-svn: 343201
Simon Pilgrim [Thu, 27 Sep 2018 12:28:47 +0000 (12:28 +0000)]
[X86][Btver2] TZCNT instructions take 2uops not 1
llvm-svn: 343200
Jonas Toth [Thu, 27 Sep 2018 12:22:48 +0000 (12:22 +0000)]
[clang-tidy] use CHECK-NOTES in tests for bugprone-use-after-move
Reviewers: alexfh, aaron.ballman, hokein
Subscribers: xazax.hun, cfe-commits
Differential Revision: https://reviews.llvm.org/D52228
llvm-svn: 343199
Jonas Toth [Thu, 27 Sep 2018 12:17:59 +0000 (12:17 +0000)]
[clang-tidy] use CHECK-NOTES in tests for bugprone-forward-declaration-namespace
Reviewers: aaron.ballman, alexfh, hokein
Subscribers: xazax.hun, cfe-commits
Differential Revision: https://reviews.llvm.org/D52185
llvm-svn: 343198
Kadir Cetinkaya [Thu, 27 Sep 2018 12:12:42 +0000 (12:12 +0000)]
Improve diagnostics range reporting.
Summary:
If we have some range information coming from clang diagnostic, promote
that one even if it doesn't contain diagnostic location inside.
Reviewers: sammccall, ioeric
Reviewed By: ioeric
Subscribers: ilya-biryukov, jkorous, arphaman, cfe-commits
Differential Revision: https://reviews.llvm.org/D52544
llvm-svn: 343197
Peter Smith [Thu, 27 Sep 2018 12:07:47 +0000 (12:07 +0000)]
[COFF] Add missing Requires x86 to fix buildbot
Add REQUIRES: x86 to pdb-debug-f.s as this is causing the Arm and
AArch64 buildbots to fail as they do not have the x86 backend.
Differential Revision: https://reviews.llvm.org/D52606
llvm-svn: 343196
Nemanja Ivanovic [Thu, 27 Sep 2018 11:49:47 +0000 (11:49 +0000)]
[PowerPC] [NFC] Refactor code for printing register operands
We have an unfortunate situation in our back end where we have to keep pairs of
functions synchronized. Needless to say that this is not an ideal situation as
it is very difficult to enforce. Even without bugs, it's annoying to have to do
the same thing in two places.
This patch just refactors the code so that the two pairs of those functions that
pertain to printing register operands are unified:
- stripRegisterPrefix() - this just removes the letter prefixes from registers
for the InstrPrinter and AsmPrinter. This patch provides this as a static
member of PPCRegisterInfo
- Handling of PPCII::UseVSXReg - there are 3 places where we do something
special for instructions with that flag set. Each of those places does its
own checking of this flag and implements code customization. Any changes to
how we print/encode VSX/VMX registers require modifying all 3 places. This
patch unifies this into a static function in PPCInstrInfo that returns the
register number adjusted as needed.
Differential revision: https://reviews.llvm.org/D52467
llvm-svn: 343195
Simon Pilgrim [Thu, 27 Sep 2018 11:40:26 +0000 (11:40 +0000)]
[X86][Btver2] Add uops counter for exegesis reports
llvm-svn: 343194
Luke Cheeseman [Thu, 27 Sep 2018 10:42:14 +0000 (10:42 +0000)]
Update CallFrameString API to account for r343114
- CallFrameString now takes an Arch parameter to account for multiplexing
overlapping CFI directives
llvm-svn: 343193
Luke Cheeseman [Thu, 27 Sep 2018 10:39:20 +0000 (10:39 +0000)]
Reapply changes reverted in r343114, lldb patch to follow shortly
llvm-svn: 343192
Raphael Isemann [Thu, 27 Sep 2018 10:12:54 +0000 (10:12 +0000)]
Refactor ClangUserExpression::GetLanguageForExpr
Summary:
The `ClangUserExpression::GetLanguageForExpr` method is currently a big
source of sadness, as it's name implies that it's an accessor method, but it actually
is also initializing some variables that we need for parsing. This caused that we
currently call this getter just for it's side effects while ignoring it's return value,
which is confusing for the reader.
This patch renames it to `UpdateLanguageForExpr` and merges all calls to the
method into a single call in `ClangUserExpression::PrepareForParsing` (as calling
this method is anyway mandatory for parsing to succeed)
While looking at the code, I also found that we actually have two language
variables in this class hierarchy. The normal `Language` from the UserExpression
class and the `LanguageForExpr` that we implemented in this subclass. Both
don't seem to actually contain the same value, so we probably should look at this
next.
Reviewers: xbolva00
Reviewed By: xbolva00
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D52561
llvm-svn: 343191
Nicola Zaghen [Thu, 27 Sep 2018 10:08:38 +0000 (10:08 +0000)]
[InstCombine] Add new tests in preparation for a combine of icmp (mul nsw/nuw X, C2), C
Proof for the future optimisations are here:
- eq/neq: https://rise4fun.com/Alive/9PBA
- sgt/ugt: https://rise4fun.com/Alive/58yr
- slt/ult: https://rise4fun.com/Alive/VCQ
Differential Revision: https://reviews.llvm.org/D51625
llvm-svn: 343190
Hans Wennborg [Thu, 27 Sep 2018 09:59:27 +0000 (09:59 +0000)]
Revert r342942 "[MachineCopyPropagation] Reimplement CopyTracker in terms of register units"
It seems to have broken several targets, see comments on the llvm-commits thread.
> Change the copy tracker to keep a single map of register units instead
> of 3 maps of registers. This gives a very significant compile time
> performance improvement to the pass. I measured a 30-40% decrease in
> time spent in MCP on x86 and AArch64 and much more significant
> improvements on out of tree targets with more registers.
>
> Differential Revision: https://reviews.llvm.org/D52374
llvm-svn: 343189
Guillaume Chatelet [Thu, 27 Sep 2018 09:23:04 +0000 (09:23 +0000)]
[llvm-exegesis][NFC] moving code around.
Summary: Renaming InstructionBuilder into InstructionTemplate and moving code generation tools from MCInstrDescView to CodeTemplate.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D52592
llvm-svn: 343188
Oliver Stannard [Thu, 27 Sep 2018 09:11:27 +0000 (09:11 +0000)]
[AArch64][v8.5A] Add PSTATE manipulation instructions XAFlag and AXFlag
These new instructions manipluate the NZCV bits, to convert between the
regular Arm floating-point comare format and an alternative format.
Patch by Pablo Barrio!
Differential revision: https://reviews.llvm.org/D52473
llvm-svn: 343187
Simon Atanasyan [Thu, 27 Sep 2018 08:51:18 +0000 (08:51 +0000)]
[mips] Add support MIPS r6 Debian triples
Debian uses different triples for MIPS r6 and paths. Here we use SubArch
to determine whether it is r6, if we found `r6' in CPU section of triple.
These new triples include:
mipsisa32r6-linux-gnu
mipsisa32r6el-linux-gnu
mipsisa64r6-linux-gnuabi64
mipsisa64r6el-linux-gnuabi64
mipsisa64r6-linux-gnuabin32
mipsisa64r6el-linux-gnuabin32
Patch by YunQiang Su.
Differential revision: https://reviews.llvm.org/D50857
llvm-svn: 343185
Martin Storsjo [Thu, 27 Sep 2018 08:24:15 +0000 (08:24 +0000)]
[Sema] Handle __va_start for Windows/ARM64 in the same way as for ARM
This fixes PR39090.
Differential Revision: https://reviews.llvm.org/D52571
llvm-svn: 343184
Vitaly Buka [Thu, 27 Sep 2018 08:15:24 +0000 (08:15 +0000)]
Revert "[DebugInfo] Generate debug information for labels."
This reverts commit r343148.
It crashes on sanitizer-x86_64-linux-autoconf.
llvm-svn: 343183
Simon Atanasyan [Thu, 27 Sep 2018 07:17:00 +0000 (07:17 +0000)]
[compiler-rt][cmake][mips] Use -mabi option to select target architecture
The `--target` option is rejected by GCC starting from version 7.0.
It's shorter and more portable to use `mabi` option to select MIPS ABI
for testing target architecture. Clang supports that starting from r343169.
llvm-svn: 343182
Tatyana Krasnukha [Thu, 27 Sep 2018 07:11:58 +0000 (07:11 +0000)]
Replace pointer to C-array of PropertyDefinition with llvm::ArrayRef
Differential Revision: https://reviews.llvm.org/D52572
llvm-svn: 343181
Jonas Devlieghere [Thu, 27 Sep 2018 06:59:15 +0000 (06:59 +0000)]
[target] Fix typo and give bool a default value
This addresses Stella's review feedback in D51859.
llvm-svn: 343180
Martin Probst [Thu, 27 Sep 2018 06:48:13 +0000 (06:48 +0000)]
clang-format: [JS] conditional types.
Summary:
This change adds some rudimentary support for conditional types.
Specifically it avoids breaking before `extends` and `infer` keywords,
which are subject to Automatic Semicolon Insertion, so breaking before
them creates incorrect syntax.
The actual formatting of the type expression is odd, but there is as of
yet no clear idea on how to format these.
See https://www.typescriptlang.org/docs/handbook/release-notes/typescript-2-8.html#conditional-types.
Reviewers: krasimir
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D52536
llvm-svn: 343179
Fangrui Song [Thu, 27 Sep 2018 06:37:15 +0000 (06:37 +0000)]
[Coverage] Disable Linux/coverage-missing.cc in AddressSanitizer-i386-linux testsuite
sancov.py relies on objdump -d to obtain the number of instrumented PCs.
The i386 %dynamiclib will now include .plt entries that are not recognized by objdump,
"sancov.py: found 0 instrumented PCs in *.so",
causing AddressSanitizer-i386-linux to fail.
Change it back to x86-target-arch after %sancov switches to a more robust approach.
llvm-svn: 343178
Fangrui Song [Thu, 27 Sep 2018 06:10:15 +0000 (06:10 +0000)]
[llvm-exegesis] Remove unused headers and fix naming issues
Reviewers: courbet
Reviewed By: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D52565
llvm-svn: 343177
Simon Atanasyan [Thu, 27 Sep 2018 05:04:50 +0000 (05:04 +0000)]
[driver][mips] Adjust target triple accordingly to provided ABI name
Explicitly selected MIPS ABI using the `-mabi` option implies
corresponding target triple. For 'O32' ABI it's a 32-bit target triple
like `mips-linux-gnu`. For 'N32' and 'N64' ABIs it's a 64-bit target
triple like `mips64-linux-gnu`. This patch adjusts target triple
accordingly these rules like we do for pseudo-target flags '-m64',
'-m32' etc already.
Differential revision: https://reviews.llvm.org/D52290
llvm-svn: 343169
Fangrui Song [Thu, 27 Sep 2018 04:23:24 +0000 (04:23 +0000)]
[clang-tidy] Add dependency to clangAnalysis after rC343160
llvm-svn: 343168
Lang Hames [Thu, 27 Sep 2018 04:19:32 +0000 (04:19 +0000)]
[ORC] Use ExecutionSession's pre-constructed main JITDylib in LLJIT.
As of r342086 ExecutionSession automatically creates a 'main' JITDylib, so
there is no need for LLJIT to create its own.
llvm-svn: 343167
Fangrui Song [Thu, 27 Sep 2018 04:19:29 +0000 (04:19 +0000)]
llvm::sort(C.begin(), C.end()) -> llvm::sort(C)
The convenience wrapper in STLExtras is available since rL342102.
llvm-svn: 343166
Fangrui Song [Thu, 27 Sep 2018 03:48:04 +0000 (03:48 +0000)]
[docs] Remove reference to makellvm which was removed in rL329041
llvm-svn: 343165
Fangrui Song [Thu, 27 Sep 2018 03:35:05 +0000 (03:35 +0000)]
llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
The convenience wrapper in STLExtras is available since rL342102.
llvm-svn: 343164
Fangrui Song [Thu, 27 Sep 2018 02:13:45 +0000 (02:13 +0000)]
llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
Summary: The convenience wrapper in STLExtras is available since rL342102.
Reviewers: dblaikie, javed.absar, JDevlieghere, andreadb
Subscribers: MatzeB, sanjoy, arsenm, dschuff, mehdi_amini, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, javed.absar, gbedwell, jrtc27, mgrang, atanasyan, steven_wu, george.burgess.iv, dexonsmith, kristina, jsji, llvm-commits
Differential Revision: https://reviews.llvm.org/D52573
llvm-svn: 343163
Lang Hames [Thu, 27 Sep 2018 02:09:37 +0000 (02:09 +0000)]
Re-reapply r343129 with more fixes.
Fixes order-of-operand-evaluation bugs in the ThreadSafeModule unit tests.
llvm-svn: 343162
Lang Hames [Thu, 27 Sep 2018 02:09:36 +0000 (02:09 +0000)]
Revert "Re-revert r343129."
This reverts commit
4e2557dbc76704beb8c4cf1191cb786e719db5d3.
llvm-svn: 343161
George Karpenkov [Thu, 27 Sep 2018 01:46:18 +0000 (01:46 +0000)]
[analyzer] [NFC] Move the code for dumping the program point to ProgramPoint
So we can dump them outside of viewing the exploded grpah.
Differential Revision: https://reviews.llvm.org/D52583
llvm-svn: 343160
George Karpenkov [Thu, 27 Sep 2018 01:45:57 +0000 (01:45 +0000)]
[analyzer] [NFC] Heavy refactoring of trackNullOrUndefValue
Differential Revision: https://reviews.llvm.org/D52519
llvm-svn: 343159
George Karpenkov [Thu, 27 Sep 2018 01:10:59 +0000 (01:10 +0000)]
[analyzer] [testing] Pass through an extra argument for specifying extra analyzer options
Differential Revision: https://reviews.llvm.org/D52585
llvm-svn: 343158
Sam Clegg [Thu, 27 Sep 2018 00:46:54 +0000 (00:46 +0000)]
[WebAssembly] Update Config member to match command line option
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D50976
llvm-svn: 343157
Sam Clegg [Thu, 27 Sep 2018 00:42:49 +0000 (00:42 +0000)]
Revert "[WebAssembly] Update docs"
This change reverts rL343155. It broke the builtbot, even though
it works for me locally:
http://lab.llvm.org:8011/builders/lld-sphinx-docs/builds/26336
Must be a sphinx version issue I guess.
llvm-svn: 343156
Sam Clegg [Thu, 27 Sep 2018 00:22:24 +0000 (00:22 +0000)]
[WebAssembly] Update docs
Differential Revision: https://reviews.llvm.org/D52048
llvm-svn: 343155
Yury Delendik [Wed, 26 Sep 2018 23:49:21 +0000 (23:49 +0000)]
[WebAssembly] Fix MRI.hasOneNonDBGUse assert in WebAssemblyRegStackify pass
Summary:
The OneUseDominatesOtherUses in the WebAssemblyRegStackify not properly validates register use using hasOneUse. Since we added/modified DBG_VALUE the assert started catching valid cases.
See also https://reviews.llvm.org/D49034#1247200
Fix verified by running the wasm waterfall.
Reviewed By: dschuff
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D49034
llvm-svn: 343154
Evgeniy Stepanov [Wed, 26 Sep 2018 23:48:13 +0000 (23:48 +0000)]
[sanitizer] AndroidGetApiLevel for static executables.
A version of AndroidGetApiLevel for static executables that is
completely compile-time.
The generic version uses dl_iterate_phdr which, even though it works
in static executables, crashes if called before libc is initialized.
llvm-svn: 343153
Fangrui Song [Wed, 26 Sep 2018 23:47:00 +0000 (23:47 +0000)]
Remove trailing space in rC343150
llvm-svn: 343152
Lang Hames [Wed, 26 Sep 2018 23:32:53 +0000 (23:32 +0000)]
Re-revert r343129.
Apparently the fixes in r343149 did not cover all the issues. Re-reverting
while I investigate.
llvm-svn: 343151
Vitaly Buka [Wed, 26 Sep 2018 22:58:53 +0000 (22:58 +0000)]
Init LookupResult::AmbiguityKind
We don't expect useful value there unless it's "ambiguous".
However we use read it for copying and moving, so we need either init the field
add login to avoid reading invalid values. Such reads trigger ubsan errors.
llvm-svn: 343150
Lang Hames [Wed, 26 Sep 2018 22:34:33 +0000 (22:34 +0000)]
Reapply r343129 with fix.
Explicitly defines ThreadSafeModule's move-assignment operator to move fields in
reverse order. This is required to ensure that the context field outlives the
module field.
llvm-svn: 343149
Hsiangkai Wang [Wed, 26 Sep 2018 22:18:45 +0000 (22:18 +0000)]
[DebugInfo] Generate debug information for labels.
Generate DILabel metadata and call llvm.dbg.label after label
statement to associate the metadata with the label.
After fixing PR37395.
After fixing problems in LiveDebugVariables.
After fixing NULL symbol problems in AddressPool when enabling
split-dwarf-file.
Differential Revision: https://reviews.llvm.org/D45045
llvm-svn: 343148
Fangrui Song [Wed, 26 Sep 2018 22:16:28 +0000 (22:16 +0000)]
llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
Summary: The convenience wrapper in STLExtras is available since rL342102.
Reviewers: rsmith, #clang, dblaikie
Reviewed By: rsmith, #clang
Subscribers: mgrang, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D52576
llvm-svn: 343147
Fangrui Song [Wed, 26 Sep 2018 20:54:42 +0000 (20:54 +0000)]
[ELF] llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)
Summary: The convenience wrapper in STLExtras is available since rL342102.
Reviewers: ruiu, espindola
Subscribers: emaste, arichardson, mgrang, llvm-commits
Differential Revision: https://reviews.llvm.org/D52569
llvm-svn: 343146
Ryan Prichard [Wed, 26 Sep 2018 20:50:39 +0000 (20:50 +0000)]
Allow later -z name=<int> args to override earlier args
Summary:
lld already gives later -z options precedence in getZFlag().
This matches the behavior of ld.bfd and ld.gold, where later options
override earlier ones. (I tested with -z max-page-size and -z stack-size.)
Reviewers: ruiu, espindola, grimar
Reviewed By: ruiu, grimar
Subscribers: grimar, emaste, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D52526
llvm-svn: 343145
Ryan Prichard [Wed, 26 Sep 2018 20:50:38 +0000 (20:50 +0000)]
[AArch64] Fix range check of R_AARCH64_TLSLE_ADD_TPREL_HI12
Summary:
An AArch64 LE relocation is a positive ("variant 1") offset. This
relocation is used to write the upper 12 bits of a 24-bit offset into an
add instruction:
add x0, x0, :tprel_hi12:v1
The comment in the ARM docs for R_AARCH64_TLSLE_ADD_TPREL_HI12 is:
"Set an ADD immediate field to bits [23:12] of X; check 0 <= X < 2^24."
Reviewers: javed.absar, espindola, ruiu, peter.smith, zatrazz
Reviewed By: ruiu
Subscribers: emaste, arichardson, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D52525
llvm-svn: 343144
Jonathan Peyton [Wed, 26 Sep 2018 20:47:25 +0000 (20:47 +0000)]
[OpenMP] Add missing __kmpc_critical_with_hint to dllexports
This patch puts the __kmpc_critical_with_hint function in dllexports
and also replaces some OMP_45_ENABLED to OMP_50_ENABLED
Differential Revision: https://reviews.llvm.org/D52380
llvm-svn: 343143
Jonathan Peyton [Wed, 26 Sep 2018 20:43:23 +0000 (20:43 +0000)]
[OpenMP] Fix balanced affinity so thread's private affinity mask is updated
Balanced affinity only updated the thread's affinity with the operating system.
This change also has the thread's private mask reflect that change as well so
that any API that probes the thread's affinity mask will report the correct
mask value.
Differential Revision: https://reviews.llvm.org/D52379
llvm-svn: 343142
Tatyana Krasnukha [Wed, 26 Sep 2018 20:31:39 +0000 (20:31 +0000)]
Fix ProcessKDP after r343130
llvm-svn: 343141
Sanjay Patel [Wed, 26 Sep 2018 20:30:47 +0000 (20:30 +0000)]
[InstCombine] add tests that show undef propagation failures from D52548; NFC
Differential Revision: https://reviews.llvm.org/D52556
llvm-svn: 343140
Jonathan Peyton [Wed, 26 Sep 2018 20:30:00 +0000 (20:30 +0000)]
[OpenMP] Update ittnotify sources
This patch updates the ittnotify sources to the latest
corresponding with Intel(R) VTune(TM) Amplifier 2018
Differential Revision: https://reviews.llvm.org/D52378
llvm-svn: 343139
Jonathan Peyton [Wed, 26 Sep 2018 20:24:39 +0000 (20:24 +0000)]
[OpenMP] Fix performance issue from 376.kdtree
This change improves the performance of 376.kdtree by giving the compiler an
opportunity to do inlining and other optimizations for the call path,
__kmpc_omp_task_complete_if0()->__kmp_task_finish(), which is one of the hot
paths in the program; some functions in kmp_taskdeps.cpp were moved to the new
header file, kmp_taskdeps.h to achieve this.
Patch by Hansang Bae
Differential Revision: https://reviews.llvm.org/D51889
llvm-svn: 343138
Jonathan Peyton [Wed, 26 Sep 2018 20:19:44 +0000 (20:19 +0000)]
[OpenMP][OMPT] A few improvements
This change includes miscellaneous improvements as follows:
1) Added ompt_get_proc_id() implementation for Windows
2) Added parser and print tool for omp-tool-var, just in case it needs
to be printed (OMP_DISPLAY_ENV)
3) omp_control_tool is exported on Windows
Patch by Hansang Bae
Differential Revision: https://reviews.llvm.org/D50538
llvm-svn: 343137
Martin Storsjo [Wed, 26 Sep 2018 19:49:35 +0000 (19:49 +0000)]
[asan] [windows] Don't use CheckFailed in dynamic runtime thunk mode
Since SVN r342651, CheckFailed isn't exported from asan-dynamic. See
comments in https://reviews.llvm.org/D52279#1246222 for a longer
discussion on this issue.
Differential Revision: https://reviews.llvm.org/D52566
llvm-svn: 343136
Fangrui Song [Wed, 26 Sep 2018 19:48:07 +0000 (19:48 +0000)]
[ELF][test] Use llvm-readelf's short option -r instead of -relocations and remove ignored --wide
Reviewers: ruiu, sfertile, espindola
Reviewed By: ruiu
Subscribers: jsji, emaste, nemanjai, arichardson, kbarton, llvm-commits
Differential Revision: https://reviews.llvm.org/D52124
llvm-svn: 343135
Tatyana Krasnukha [Wed, 26 Sep 2018 19:41:57 +0000 (19:41 +0000)]
Fix OSX build after r343130
llvm-svn: 343134
Lang Hames [Wed, 26 Sep 2018 19:36:30 +0000 (19:36 +0000)]
Revert r343129 "[ORC] Change the field order of ThreadSafeModule to ensure the "
It broke several bots.
llvm-svn: 343133