Jeroen Ketema [Thu, 5 Oct 2017 18:17:40 +0000 (18:17 +0000)]
Add vload_half helpers for ptx
The removes the vload_half unresolved calls from the nvptx libraries.
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 314998
Davide Italiano [Thu, 5 Oct 2017 18:06:37 +0000 (18:06 +0000)]
[PassManager] Run global optimizations after the inliner.
The inliner performs some kind of dead code elimination as it goes,
but there are cases that are not really caught by it. We might
at some point consider teaching the inliner about them, but it
is OK for now to run GlobalOpt + GlobalDCE in tandem as their
benefits generally outweight the cost, making the whole pipeline
faster.
This fixes PR34652.
Differential Revision: https://reviews.llvm.org/D38154
llvm-svn: 314997
Matthew Simpson [Thu, 5 Oct 2017 18:03:30 +0000 (18:03 +0000)]
[SparsePropagation] Move member definitions to header (NFC)
AbstractLatticeFunction and SparseSolver are class templates parameterized by a
lattice value, so we need to move these member functions over to the header.
Differential Revision: https://reviews.llvm.org/D38561
llvm-svn: 314996
Alexey Bataev [Thu, 5 Oct 2017 17:51:39 +0000 (17:51 +0000)]
[OPENMP] Fix mapping|privatization of implicitly captured variables.
If the `defaultmap(tofrom:scalar)` clause is specified, the scalars must
be mapped with 'tofrom' modifiers, otherwise they must be captured as
firstprivates.
llvm-svn: 314995
Petar Jovanovic [Thu, 5 Oct 2017 17:40:32 +0000 (17:40 +0000)]
[mips] implement .set dspr2 directive
Implement .set dspr2 directive with appropriate feature bits. This
directive is a counterpart of -mattr=dspr2 command line option with the
exception that it does not influence elf header flags.
Patch by Milos Stojanovic.
Differential Revision: https://reviews.llvm.org/D38537
llvm-svn: 314994
Matt Arsenault [Thu, 5 Oct 2017 17:38:30 +0000 (17:38 +0000)]
AMDGPU: Set v2i32 any_extend to expand
llvm-svn: 314993
George Karpenkov [Thu, 5 Oct 2017 17:32:06 +0000 (17:32 +0000)]
[Analyzer Tests] Run static analyzer integration tests until the end,
Do not stop at the first failure.
Differential Revision: https://reviews.llvm.org/D38589
llvm-svn: 314992
Krzysztof Parzyszek [Thu, 5 Oct 2017 17:12:49 +0000 (17:12 +0000)]
[RDF] Simplify construction of maximal registers
The old algoritm was not correct, although it worked most of the time.
Avoid the complex reachability analysis and simply calculate the maximal
registers out of the set of all referenced registers.
llvm-svn: 314991
Rong Xu [Thu, 5 Oct 2017 17:05:20 +0000 (17:05 +0000)]
[ProfileData] Fix data racing in merging indexed profiles
There is data racing to the static variable RecordIndex in index profile reader
when merging in multiple threads. Make it a member variable in
IndexedInstrProfReader to fix this.
Differential Revision: https://reviews.llvm.org/D38431
llvm-svn: 314990
Ilya Biryukov [Thu, 5 Oct 2017 17:04:13 +0000 (17:04 +0000)]
[clangd] Added async API to run code completion.
Summary:
ClangdServer now provides async code completion API.
It is still used synchronously by ClangdLSPServer, more work is needed
to allow processing other requests in parallel while completion (or
any other request) is running.
Reviewers: klimek, bkramer, krasimir
Reviewed By: klimek
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D38583
llvm-svn: 314989
Artur Pilipenko [Thu, 5 Oct 2017 16:28:21 +0000 (16:28 +0000)]
[X86] Fix chains update when lowering BUILD_VECTOR to a vector load
The code which lowers BUILD_VECTOR of consecutive loads into a single vector
load doesn't update chains properly. As a result the vector load can be
reordered with the store to the same location.
The current code in EltsFromConsecutiveLoads only updates the chain following
the first load. The fix is to update the chains following all the loads
comprising the vector.
This is a fix for PR10114.
Reviewed By: niravd
Differential Revision: https://reviews.llvm.org/D38547
llvm-svn: 314988
Konstantin Zhuravlyov [Thu, 5 Oct 2017 16:19:18 +0000 (16:19 +0000)]
AMDGPU: Add and set AMDGPU-specific e_flags
Differential Revision: https://reviews.llvm.org/D38556
llvm-svn: 314987
Ayal Zaks [Thu, 5 Oct 2017 15:45:14 +0000 (15:45 +0000)]
[LV] Fix PR34743 - handle casts that sink after interleaved loads
When ignoring a load that participates in an interleaved group, make sure to
move a cast that needs to sink after it.
Testcase derived from reproducer of PR34743.
Differential Revision: https://reviews.llvm.org/D38338
llvm-svn: 314986
Clement Courbet [Thu, 5 Oct 2017 14:42:06 +0000 (14:42 +0000)]
Revert "Re-land "[MergeICmps] Disable mergeicmps if the target does not want to handle memcmp expansion."""
broken test on windows
This reverts commit
c91479518344fd1fc071c5bd5848f6eb83e53dca.
llvm-svn: 314985
Sanjay Patel [Thu, 5 Oct 2017 14:26:15 +0000 (14:26 +0000)]
revert r314698 - [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)
There is a bot failure that appears to be related to this change:
http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost-neon/builds/2117
...so reverting to confirm that and attempting to keep the bot green while investigating.
llvm-svn: 314984
Michael Kruse [Thu, 5 Oct 2017 13:43:00 +0000 (13:43 +0000)]
[ScopBuilder] Introduce -polly-stmt-granularity=scalar-indep option.
The option splits BasicBlocks into minimal statements such that no
additional scalar dependencies are introduced.
The algorithm is based on a union-find structure, and unites sets if
putting them into separate statements would introduce a scalar
dependencies. As a consequence, instructions may be split into separate
statements such their relative order is different than the statements
they are in. This is accounted for instructions whose relative order
matters (e.g. memory accesses).
The algorithm is generic in that heuristic changes can be made
relatively easily. We might relax the order requirement for read-reads
or accesses to different base pointers. Forwardable instructions can be
made to not cause a join.
This implementation gives us a speed-up of 82% in SPEC 2006 456.hmmer
benchmark by allowing loop-distribution in a hot loop such that one of
the loops can be vectorized.
Differential Revision: https://reviews.llvm.org/D38403
llvm-svn: 314983
Javed Absar [Thu, 5 Oct 2017 13:27:43 +0000 (13:27 +0000)]
[TablgeGen] : Tidy up CodeGenSchedule. NFC.
Reviewed by: @MatzeB
Differential Revision: https://reviews.llvm.org/D38534
llvm-svn: 314982
Ayal Zaks [Thu, 5 Oct 2017 12:41:49 +0000 (12:41 +0000)]
[LV] Fix PR34711 - widen instruction ranges when sinking casts
Instead of trying to keep LastWidenRecipe updated after creating each recipe,
have tryToWiden() retrieve the last recipe of the current VPBasicBlock and check
if it's a VPWidenRecipe when attempting to extend its range. This ensures that
such extensions, optimized to maintain the original instruction order, do so
only when the instructions are to maintain their relative order. The latter does
not always hold, e.g., when a cast needs to sink to unravel first order
recurrence (r306884).
Testcase derived from reproducer of PR34711.
Differential Revision: https://reviews.llvm.org/D38339
llvm-svn: 314981
Clement Courbet [Thu, 5 Oct 2017 12:39:57 +0000 (12:39 +0000)]
Re-land "[MergeICmps] Disable mergeicmps if the target does not want to handle memcmp expansion.""
llvm-svn: 314980
Ivan A. Kosarev [Thu, 5 Oct 2017 11:08:17 +0000 (11:08 +0000)]
[CodeGen] Unify generation of scalar and struct-path TBAA tags
This patch makes it possible to produce access tags in a uniform
manner regardless whether the resulting tag will be a scalar or a
struct-path one. getAccessTagInfo() now takes care of the actual
translation of access descriptors to tags and can handle all
kinds of accesses. Facilities that specific to scalar accesses
are eliminated.
Some more details:
* DecorateInstructionWithTBAA() is not responsible for conversion
of types to access tags anymore. Instead, it takes an access
descriptor (TBAAAccessInfo) and generates corresponding access
tag from it.
* getTBAAInfoForVTablePtr() reworked to
getTBAAVTablePtrAccessInfo() that now returns the
virtual-pointer access descriptor and not the virtual-point
type metadata.
* Added function getTBAAMayAliasAccessInfo() that returns the
descriptor for may-alias accesses.
* getTBAAStructTagInfo() renamed to getTBAAAccessTagInfo() as now
it is the only way to generate access tag by a given access
descriptor. It is capable of producing both scalar and
struct-path tags, depending on options and availability of the
base access type. getTBAAScalarTagInfo() and its cache
ScalarTagMetadataCache are eliminated.
* Now that we do not need to care about whether the resulting
access tag should be a scalar or struct-path one,
getTBAAStructTypeInfo() is renamed to getBaseTypeInfo().
* Added function getTBAAAccessInfo() that constructs access
descriptor by a given QualType access type.
This is part of D37826 reworked to be a separate patch to
simplify review.
Differential Revision: https://reviews.llvm.org/D38503
llvm-svn: 314979
Ivan A. Kosarev [Thu, 5 Oct 2017 11:05:43 +0000 (11:05 +0000)]
Revert r314977 "[CodeGen] Unify generation of scalar and struct-path TBAA tags"
D37826 has been mistakenly committed where it should be the patch from D38503.
Differential Revision: https://reviews.llvm.org/D38503
llvm-svn: 314978
Ivan A. Kosarev [Thu, 5 Oct 2017 10:47:51 +0000 (10:47 +0000)]
[CodeGen] Unify generation of scalar and struct-path TBAA tags
This patch makes it possible to produce access tags in a uniform
manner regardless whether the resulting tag will be a scalar or a
struct-path one. getAccessTagInfo() now takes care of the actual
translation of access descriptors to tags and can handle all
kinds of accesses. Facilities that specific to scalar accesses
are eliminated.
Some more details:
* DecorateInstructionWithTBAA() is not responsible for conversion
of types to access tags anymore. Instead, it takes an access
descriptor (TBAAAccessInfo) and generates corresponding access
tag from it.
* getTBAAInfoForVTablePtr() reworked to
getTBAAVTablePtrAccessInfo() that now returns the
virtual-pointer access descriptor and not the virtual-point
type metadata.
* Added function getTBAAMayAliasAccessInfo() that returns the
descriptor for may-alias accesses.
* getTBAAStructTagInfo() renamed to getTBAAAccessTagInfo() as now
it is the only way to generate access tag by a given access
descriptor. It is capable of producing both scalar and
struct-path tags, depending on options and availability of the
base access type. getTBAAScalarTagInfo() and its cache
ScalarTagMetadataCache are eliminated.
* Now that we do not need to care about whether the resulting
access tag should be a scalar or struct-path one,
getTBAAStructTypeInfo() is renamed to getBaseTypeInfo().
* Added function getTBAAAccessInfo() that constructs access
descriptor by a given QualType access type.
This is part of D37826 reworked to be a separate patch to
simplify review.
Differential Revision: https://reviews.llvm.org/D38503
llvm-svn: 314977
Simon Dardis [Thu, 5 Oct 2017 10:27:37 +0000 (10:27 +0000)]
[mips] Place certain 64 bit FPU instructions in their own decoder namespace
Previously, instructions that were defined to use the FGR64 register class
were associated with the Mips64 table which was incorrect.
Reviewers: nitesh.jain, atanasyan
Differential Revision: https://reviews.llvm.org/D38454
llvm-svn: 314976
Artem Dergachev [Thu, 5 Oct 2017 08:43:32 +0000 (08:43 +0000)]
[analyzer] Fix leak false positives on stuff put in C++/ObjC initializer lists.
The analyzer now realizes that C++ std::initializer_list objects and
Objective-C boxed structure/array/dictionary expressions can potentially
maintain a reference to the objects that were put into them. This avoids
false memory leak posivites and a few other issues.
This is a conservative behavior; for now, we do not model what actually happens
to the objects after being passed into such initializer lists.
rdar://problem/
32918288
Differential Revision: https://reviews.llvm.org/D35216
llvm-svn: 314975
Karl-Johan Karlsson [Thu, 5 Oct 2017 08:37:31 +0000 (08:37 +0000)]
[DebugInfo] Insert DEBUG_VALUEs after each register redefinition
Summary:
When reinserting debug values after register allocation, make sure to
insert debug values after each redefinition of debug value register in
the slot index range. The reason for this is that DwarfDebug will end
the range of a debug variable when the physical reg is defined. For
instructions with e.g. tied operands this result in prematurely ended
debug range.
This resolves pr34545
Patch by Karl-Johan Karlsson and Bjorn Pettersson
Reviewers: rnk, aprantl
Reviewed By: rnk
Subscribers: bjope, llvm-commits
Differential Revision: https://reviews.llvm.org/D38229
llvm-svn: 314974
George Rimar [Thu, 5 Oct 2017 08:15:55 +0000 (08:15 +0000)]
[MC] - llvm-mc hangs on non-english characters.
Currently llvm-mc just hangs inside infinite loop
while trying to parse file which has ".section .с" inside,
where section name is non-english character.
Patch fixes the issue.
In this patch I also moved content of non-english-characters.s
to test/MC/AsmParser/Inputs folder so that non-english-characters.s
becomes a single testcase for all invalid inputs containing non-english
symbols. That is convinent because llvm-mc otherwise tries
to parse and tokenize the whole testcase file with tools invocations and
it is harder to isolate the issue.
Differential revision: https://reviews.llvm.org/D38545
llvm-svn: 314973
Clement Courbet [Thu, 5 Oct 2017 08:03:39 +0000 (08:03 +0000)]
Revert "[MergeICmps] Disable mergeicmps if the target does not want to handle memcmp expansion."
Breaks
clang-stage1-cmake-RA-incremental/llvm/test/Transforms/MergeICmps/X86/tuple-four-int8.ll
This reverts commit
3038c459d67f8898ffa295d54a013b280690abfa.
llvm-svn: 314972
Craig Topper [Thu, 5 Oct 2017 07:59:11 +0000 (07:59 +0000)]
[InstCombine] Fix a vector splat handling bug in transformZExtICmp.
We were using an i1 type and then zero extending to a vector. Instead just create the 0/1 directly as a ConstantInt with the correct type. No need to ask ConstantExpr to zero extend for us.
This bug is a bit tricky to hit because it requires us to visit a zext of an icmp that would normally be simplified to true/false, but that icmp hasnt' been visited yet. In the test case this zext and icmp were created by visiting a udiv and due to worklist ordering we got to the zext first.
Fixes PR34841.
llvm-svn: 314971
Clement Courbet [Thu, 5 Oct 2017 07:49:09 +0000 (07:49 +0000)]
[MergeICmps] Disable mergeicmps if the target does not want to handle memcmp expansion.
Summary: This is to avoid e.g. merging two cheap icmps if the target is not going to expand to something nice later.
Reviewers: dberlin, spatel
Subscribers: davide, nemanjai
Differential Revision: https://reviews.llvm.org/D38232
llvm-svn: 314970
Mikael Holmen [Thu, 5 Oct 2017 07:07:09 +0000 (07:07 +0000)]
Minor refactoring regarding Cast::isNoopCast(), NFC
Summary:
FastISel::hasTrivialKill() was the only user of the "IntPtrTy" version of
Cast::isNoopCast(). According to review comments in D37894 we could instead
use the "DataLayout" version of the method, and thus get rid of the
"IntPtrTy" versions of isNoopCast() completely.
With the above done, the remaining isNoopCast() could then be simplified
a bit more.
Reviewers: arsenm
Reviewed By: arsenm
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D38497
llvm-svn: 314969
Dean Michael Berris [Thu, 5 Oct 2017 05:45:51 +0000 (05:45 +0000)]
[XRay][compiler-rt] Write out arg1 payload in naive mode logging
Summary:
This change allows the XRay basic (naive) mode logging implementation to
start writing the payload entries through the arg1 logging handler. This
implementation writes out the records that the llvm-xray tool and the
trace reader library will start processing in D38550.
This introduces a new payload record type which logs the data through
the in-memory buffer. It uses the same size/alignment that the normal
XRay record entries use. We use a new record type to indicate these new
entries, so that the trace reader library in LLVM can start reading
these entries.
Depends on D38550.
Reviewers: pelikan
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38551
llvm-svn: 314968
Dean Michael Berris [Thu, 5 Oct 2017 05:18:17 +0000 (05:18 +0000)]
[XRay][tools] Support arg1 logging entries in the basic logging mode
Summary:
The arg1 logging handler changed in compiler-rt to start writing a
different type for entries encountered when logging the first argument
of XRay-instrumented functions. This change allows the trace loader to
support reading these record types as well as prepare for when the
basic (naive) mode implementation starts writing down the argument
payloads.
Without this change, binaries with arg1 logging support enabled start
writing unreadable logs for any of the XRay tracing tools.
Reviewers: pelikan
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38550
llvm-svn: 314967
Rafael Espindola [Thu, 5 Oct 2017 03:01:05 +0000 (03:01 +0000)]
Remove dead code.
llvm-svn: 314966
Shoaib Meenai [Thu, 5 Oct 2017 02:18:08 +0000 (02:18 +0000)]
[libc++] Clarify names of ABI forcing macros
Make it clear that these are intended only to force a specific ABI when
the autodetection would give the wrong result by renaming the cmake
options and adding separate forcing macros, as suggested by EricWF in
the post-commit review of r314949 and further discussed on IRC.
llvm-svn: 314965
Sean Fertile [Thu, 5 Oct 2017 01:50:48 +0000 (01:50 +0000)]
Enabling new pass manager in LTO (and thinLTO) link step.
Passes 'new-pass-manager' option to the linker plugin when the new pass
manager is enabled.
Patch by Graham Yiu.
Differential Revision: https://reviews.llvm.org/D38517
llvm-svn: 314964
Sean Fertile [Thu, 5 Oct 2017 01:48:42 +0000 (01:48 +0000)]
Enabling new pass manager in LTO (and thinLTO) link step.
Adds the option 'new-pass-manager' to the gold pluggin to enable using the
new pass manager during the lto/thinlto link step.
Patch by Graham Yiu.
Differential Revision: https://reviews.llvm.org/D38517
llvm-svn: 314963
Xinliang David Li [Thu, 5 Oct 2017 01:40:13 +0000 (01:40 +0000)]
Revert r314928 to investigate thinLTO bootstrap failure
llvm-svn: 314961
George Karpenkov [Thu, 5 Oct 2017 01:02:20 +0000 (01:02 +0000)]
[Analyzer Tests] Fix misc bugs in analyzer reference results updater.
llvm-svn: 314960
Jim Ingham [Thu, 5 Oct 2017 01:00:29 +0000 (01:00 +0000)]
Work around a bug in the C++ expression parser.
When the expression parser does name resolution for local
variables in C++ closures it doesn't give the local name
priority over other global symbols of the same name. heap.py
uses "info" which is a fairly common name, and so the commands
in it fail. This is a workaround, just use lldb_info not info.
<rdar://problem/
34026140>
llvm-svn: 314959
Jim Ingham [Thu, 5 Oct 2017 00:49:49 +0000 (00:49 +0000)]
Another silly little thing you can do with Python commands.
Sometimes you want to step along and print a local each time as you go.
You can do that with stop hooks, but that's a little heavy-weight. This
is a sketch of a command that steps and then does "frame variable" on all
its arguments.
llvm-svn: 314958
Richard Smith [Thu, 5 Oct 2017 00:48:18 +0000 (00:48 +0000)]
Add testcase for r314956:
PR33924: Merge block-scope anonymous declarations if there are multiple definitions of the enclosing function.
llvm-svn: 314957
Richard Smith [Thu, 5 Oct 2017 00:47:24 +0000 (00:47 +0000)]
PR33924: Merge block-scope anonymous declarations if there are multiple definitions of the enclosing function.
llvm-svn: 314956
Richard Smith [Thu, 5 Oct 2017 00:43:38 +0000 (00:43 +0000)]
Remove PendingBody mechanism for function and ObjC method deserialization.
In its place, track on the canonical function declaration whether there is a
declaration with a body (and if so, which one). This brings function definition
handling in line with what we do in all other contexts, and is necessary to
allow us to merge declarations within multiple definitions of the same function
(eg, PR33924).
No functionality change intended.
llvm-svn: 314955
Rafael Espindola [Thu, 5 Oct 2017 00:35:47 +0000 (00:35 +0000)]
Refactor duplicated code.
Since VisibleToRegularObj is weaker than LinkerRedefined, this should
have no functionality change.
llvm-svn: 314954
Eugene Zelenko [Thu, 5 Oct 2017 00:33:50 +0000 (00:33 +0000)]
[X86] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 314953
Matt Arsenault [Thu, 5 Oct 2017 00:13:20 +0000 (00:13 +0000)]
AMDGPU: Add comment about clamps
llvm-svn: 314952
Matt Arsenault [Thu, 5 Oct 2017 00:13:17 +0000 (00:13 +0000)]
AMDGPU: Do not fold clamp instructions when sources are different
Patch by hakzsam (Samuel Pitoiset)
llvm-svn: 314951
Shoaib Meenai [Wed, 4 Oct 2017 23:51:57 +0000 (23:51 +0000)]
[libc++] Move cache variable definition. NFC
Move it to where the other ABI cache variables/options are defined.
llvm-svn: 314950
Shoaib Meenai [Wed, 4 Oct 2017 23:44:38 +0000 (23:44 +0000)]
[libc++] Allow users to explicitly specify ABI
libc++'s current heuristic for detecting Itanium vs. Microsoft ABI falls
short in some cases. For example, it will detect windows-itanium targets
as using the Microsoft ABI, since they set `_MSC_VER` (for compatibility
with Microsoft headers). Leave the current heuristic in place by default
but also allow users to explicitly specify the ABI if need be.
llvm-svn: 314949
Evgeniy Stepanov [Wed, 4 Oct 2017 23:35:14 +0000 (23:35 +0000)]
[sanitizer] Move cxx-abi library earlier in link flags.
Summary:
This change moves cxx-abi library in asan/ubsan/dd link command line
ahead of other libraries, such as pthread/rt/dl/c/gcc. Given that
cxx-abi may be the full libstdc++/libc++, it makes sense for it to be
ahead of libc and libgcc, at least.
The real motivation is Android, where in the arm32 NDK toolchain
libstdc++.a is actually a linker script that tries to sneak LLVM's
libunwind ahead of libgcc's. Wrong library order breaks unwinding.
Reviewers: srhines, danalbert
Subscribers: aemerson, kubamracek, mgorny, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D38520
llvm-svn: 314948
Eric Fiselier [Wed, 4 Oct 2017 23:21:18 +0000 (23:21 +0000)]
Fix accidental assignment inside test asserts
llvm-svn: 314947
Shoaib Meenai [Wed, 4 Oct 2017 23:17:12 +0000 (23:17 +0000)]
[libc++] Add site config option for ABI macros
Some ABI macros affect headers, so it's nice to have a site config
option for them. Add a LIBCXX_ABI_DEFINES cmake macro to allow
specifying a list of ABI macros to define in the site config.
The primary design constraint (as discussed with Eric on IRC a while
back) was to not have to repeat the ABI macro names in cmake, which only
leaves a free-form cmake list as an option. A somewhat unfortunate
consequence is that we can't verify that the ABI macros being defined
actually exist, though we can at least perform some basic sanity
checking, since all the ABI macros begin with _LIBCPP_ABI_.
Differential Revision: https://reviews.llvm.org/D36719
llvm-svn: 314946
Craig Topper [Wed, 4 Oct 2017 23:06:13 +0000 (23:06 +0000)]
[InstCombine] Improve support for ashr in foldICmpAndShift
We can support ashr similar to lshr, if we know that none of the shifted in bits are used. In that case SimplifyDemandedBits would normally convert it to lshr. But that conversion doesn't happen if the shift has additional users.
Differential Revision: https://reviews.llvm.org/D38521
llvm-svn: 314945
Matt Arsenault [Wed, 4 Oct 2017 22:59:12 +0000 (22:59 +0000)]
AMDGPU: Fix not accounting for instruction size in bundles
These were counted as 0. Fixes branch limit exceeded errors
in some large programs.
llvm-svn: 314944
Konstantin Zhuravlyov [Wed, 4 Oct 2017 22:44:13 +0000 (22:44 +0000)]
AMDGPU: Correctly set EI_OSABI based on the os
Differential Revision: https://reviews.llvm.org/D38555
llvm-svn: 314943
Adrian Prantl [Wed, 4 Oct 2017 22:26:19 +0000 (22:26 +0000)]
clang-format file.
llvm-svn: 314942
Adrian Prantl [Wed, 4 Oct 2017 22:26:19 +0000 (22:26 +0000)]
delete commented out code.
llvm-svn: 314941
Marshall Clow [Wed, 4 Oct 2017 22:23:03 +0000 (22:23 +0000)]
Initial cut at infastructure for fuzzing support for OSS-fuzz
llvm-svn: 314940
Erich Keane [Wed, 4 Oct 2017 22:16:24 +0000 (22:16 +0000)]
Fix 'section' warning behavior with tentatively-defined values
As reported on cfe-commits, r314262 resulted in tentatively-defined
variables not being excluded for the warning.
Patch By: Elizabeth Andrews
llvm-svn: 314939
Sanjoy Das [Wed, 4 Oct 2017 22:02:27 +0000 (22:02 +0000)]
Do not call Loop::getName on possibly dead loops
This fixes PR34832.
llvm-svn: 314938
Xin Tong [Wed, 4 Oct 2017 21:39:25 +0000 (21:39 +0000)]
[MachineBlockPlacement] Make sure PreferredLoopExit is cleared everytime new loop is processed
Summary: Rotate on exit that actually exits the current loop.
Reviewers: davidxl, danielcdh, iteratee, chandlerc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38563
llvm-svn: 314937
Hans Wennborg [Wed, 4 Oct 2017 21:14:07 +0000 (21:14 +0000)]
Fix a -Wparentheses warning. NFC.
llvm-svn: 314936
Justin Lebar [Wed, 4 Oct 2017 20:47:33 +0000 (20:47 +0000)]
Convert an APInt to int64_t properly in TTI::getGEPCost().
Summary:
If the pointer width is 32 bits and the calculated GEP offset is
negative, we call APInt::getLimitedValue(), which does a
*zero*-extension of the offset. That's wrong -- we should do an sext.
Fixes a bug introduced in rL314362 and found by Evgeny Astigeevich.
Reviewers: efriedma
Subscribers: sanjoy, javed.absar, llvm-commits, eastig
Differential Revision: https://reviews.llvm.org/D38557
llvm-svn: 314935
Marcello Maggioni [Wed, 4 Oct 2017 20:42:46 +0000 (20:42 +0000)]
[LoopDeletion] Move deleteDeadLoop to to LoopUtils. NFC
llvm-svn: 314934
Rafael Espindola [Wed, 4 Oct 2017 20:35:05 +0000 (20:35 +0000)]
Revert "Revert r314810: Use sched_getaffinity instead of std::thread::hardware_concurrency."
This reverts commit r314924.
The required llvm patch was recommitted.
llvm-svn: 314933
Yaxun Liu [Wed, 4 Oct 2017 20:32:17 +0000 (20:32 +0000)]
[OpenCL] Clean up and add missing fields for block struct
Currently block is translated to a structure equivalent to
struct Block {
void *isa;
int flags;
int reserved;
void *invoke;
void *descriptor;
};
Except invoke, which is the pointer to the block invoke function,
all other fields are useless for OpenCL, which clutter the IR and
also waste memory since the block struct is passed to the block
invoke function as argument.
On the other hand, the size and alignment of the block struct is
not stored in the struct, which causes difficulty to implement
__enqueue_kernel as library function, since the library function
needs to know the size and alignment of the argument which needs
to be passed to the kernel.
This patch removes the useless fields from the block struct and adds
size and align fields. The equivalent block struct will become
struct Block {
int size;
int align;
generic void *invoke;
/* custom fields */
};
It also changes the pointer to the invoke function to be
a generic pointer since the address space of a function
may not be private on certain targets.
Differential Revision: https://reviews.llvm.org/D37822
llvm-svn: 314932
Rafael Espindola [Wed, 4 Oct 2017 20:27:01 +0000 (20:27 +0000)]
Bring r314809 back.
But now include a check for CPU_COUNT so we still build on 10 year old
versions of glibc.
Original message:
Use sched_getaffinity instead of std::thread::hardware_concurrency.
The issue with std::thread::hardware_concurrency is that it forwards
to libc and some implementations (like glibc) don't take thread
affinity into consideration.
With this change a llvm program that can execute in only 2 cores will
use 2 threads, even if the machine has 32 cores.
This makes benchmarking a lot easier, but should also help if someone
doesn't want to use all cores for compilation for example.
llvm-svn: 314931
Sanjay Patel [Wed, 4 Oct 2017 20:26:25 +0000 (20:26 +0000)]
[SimplifyCFG] put the optional assumption cache pointer in the options struct; NFCI
This is a follow-up to https://reviews.llvm.org/D38138.
I fixed the capitalization of some functions because we're changing those
lines anyway and that helped verify that we weren't accidentally dropping
any options by using default param values.
llvm-svn: 314930
Leonard Mosescu [Wed, 4 Oct 2017 20:23:56 +0000 (20:23 +0000)]
LLDB cmake fix: define LLDB_CONFIGURATION_xxx based on the build type
Neither LLDB_CONFIGURATION_DEBUG nor LLDB_CONFIGURATION_RELEASE were ever set in the CMake LLDB project.
Also cleaned up a questionable #ifdef in SharingPtr.h, removing all the references to LLDB_CONFIGURATION_BUILD_AND_INTEGRATION in the process.
Differential Revision: https://reviews.llvm.org/D38552
llvm-svn: 314929
Xinliang David Li [Wed, 4 Oct 2017 20:17:55 +0000 (20:17 +0000)]
Recommit r314561 after fixing msan build failure
(trial 2) Incoming val defined by terminator instruction which
also requires bitcasts can not be handled.
llvm-svn: 314928
Guozhi Wei [Wed, 4 Oct 2017 20:14:08 +0000 (20:14 +0000)]
[TargetTransformInfo] Check if function pointer is valid before calling isLoweredToCall
Function isLoweredToCall can only accept non-null function pointer, but a function pointer can be null for indirect function call. So check it before calling isLoweredToCall from getInstructionLatency.
Differential Revision: https://reviews.llvm.org/D38204
llvm-svn: 314927
Sumanth Gundapaneni [Wed, 4 Oct 2017 19:09:29 +0000 (19:09 +0000)]
[Hexagon] Move getHexagonTargetFeatures to Hexagon.cpp (NFC)
Differential Revision: https://reviews.llvm.org/D38548
llvm-svn: 314926
Jeroen Ketema [Wed, 4 Oct 2017 19:07:48 +0000 (19:07 +0000)]
Add vstore_half helpers for ptx
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
llvm-svn: 314925
Rui Ueyama [Wed, 4 Oct 2017 18:39:51 +0000 (18:39 +0000)]
Revert r314810: Use sched_getaffinity instead of std::thread::hardware_concurrency.
This reverts commit r314810 because r314809 was reverted.
llvm-svn: 314924
Jun Bum Lim [Wed, 4 Oct 2017 18:33:52 +0000 (18:33 +0000)]
Recommit : Use the basic cost if a GEP is not used as addressing mode
Recommitting r314517 with the fix for handling ConstantExpr.
Original commit message:
Currently, getGEPCost() returns TCC_FREE whenever a GEP is a legal addressing
mode in the target. However, since it doesn't check its actual users, it will
return FREE even in cases where the GEP cannot be folded away as a part of
actual addressing mode. For example, if an user of the GEP is a call
instruction taking the GEP as a parameter, then the GEP may not be folded in
isel.
llvm-svn: 314923
Daniel Neilson [Wed, 4 Oct 2017 18:19:03 +0000 (18:19 +0000)]
Revert D38481 due to missing cmake check for CPU_COUNT
Summary:
This reverts D38481. The change breaks systems with older versions of glibc. It
injects a use of CPU_COUNT() from sched.h without checking to ensure that the
function exists first.
Reviewers:
Subscribers:
llvm-svn: 314922
Simon Pilgrim [Wed, 4 Oct 2017 18:00:42 +0000 (18:00 +0000)]
[X86][AVX] Improve (i8 bitcast (v8i1 x)) handling for v8i64/v8f64 512-bit vector compare results.
AVX1/AVX2 targets were missing a chance to use vmovmskps for v8f32/v8i32 results for bool vector bitcasts
llvm-svn: 314921
Krzysztof Parzyszek [Wed, 4 Oct 2017 18:00:15 +0000 (18:00 +0000)]
[Hexagon] Add a member Subtarget to HexagonInstrInfo, NFC
llvm-svn: 314920
Hans Wennborg [Wed, 4 Oct 2017 17:54:06 +0000 (17:54 +0000)]
Revert r314886 "[X86] Improvement in CodeGen instruction selection for LEAs (re-applying post required revision changes.)"
It broke the Chromium / SQLite build; see PR34830.
> Summary:
> 1/ Operand folding during complex pattern matching for LEAs has been
> extended, such that it promotes Scale to accommodate similar operand
> appearing in the DAG.
> e.g.
> T1 = A + B
> T2 = T1 + 10
> T3 = T2 + A
> For above DAG rooted at T3, X86AddressMode will no look like
> Base = B , Index = A , Scale = 2 , Disp = 10
>
> 2/ During OptimizeLEAPass down the pipeline factorization is now performed over LEAs
> so that if there is an opportunity then complex LEAs (having 3 operands)
> could be factored out.
> e.g.
> leal 1(%rax,%rcx,1), %rdx
> leal 1(%rax,%rcx,2), %rcx
> will be factored as following
> leal 1(%rax,%rcx,1), %rdx
> leal (%rdx,%rcx) , %edx
>
> 3/ Aggressive operand folding for AM based selection for LEAs is sensitive to loops,
> thus avoiding creation of any complex LEAs within a loop.
>
> Reviewers: lsaba, RKSimon, craig.topper, qcolombet, jmolloy
>
> Reviewed By: lsaba
>
> Subscribers: jmolloy, spatel, igorb, llvm-commits
>
> Differential Revision: https://reviews.llvm.org/D35014
llvm-svn: 314919
Jake Ehrlich [Wed, 4 Oct 2017 17:44:42 +0000 (17:44 +0000)]
[llvm-objcopy] Fix major layout bugs in llvm-objcopy
Somehow a few massive errors slipped though the cracks of testing.
1. The code in Segment::finalize was left over from the old layout
algorithm. In certain situations this would cause very strange issues
with segment layout. For instance in the shift-segments.test case it
would cause the second segment to have the same offset as the first.
2. In debugging this I discovered another issue. Namely section alignment
was not being computed based on Section->Align but instead
Section->Offset which is bizarre and makes no sense. I have no clue how
it worked in the first place. This issue is also fixed
3. Fixing #2 exposed a bug where things were not being written past the end
of the file that technically should have been. This was because in
certain cases (like overlapping-segments) the end of the file wouldn't
always be bumped if the offset could be chosen relative to an existing
segment that already had it's offset chosen. For fully nested segments
this is fine but for overlapping segments this leaves the end of the
file short. So I changed how the offset is bumped when looping though
segments.
Differential Revision: https://reviews.llvm.org/D38436
llvm-svn: 314918
Jakub Kuderski [Wed, 4 Oct 2017 17:32:55 +0000 (17:32 +0000)]
[Dominators] Take fast path when applying <=1 updates
Summary:
This patch teaches `DT.applyUpdates` to take the fast when applying zero or just one update and makes it not run the internal batch updater machinery.
With this patch, it should no longer make sense to have a special check in user's code that checks the update sequence size before applying them, e.g.
```
if (!MyUpdates.empty())
DT.applyUpdates(MyUpdates);
```
or
```
if (MyUpdates.size() == 1)
if (...)
DT.insertEdge(...)
else
DT.deleteEdge(...)
```
Reviewers: dberlin, brzycki, davide, grosser, sanjoy
Reviewed By: dberlin, davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38541
llvm-svn: 314917
Simon Pilgrim [Wed, 4 Oct 2017 17:31:28 +0000 (17:31 +0000)]
[X86][SSE] Add support for lowering v8i16 binary shuffles to PACKSS/PACKUS
Missed in D38472
llvm-svn: 314916
Francis Ricci [Wed, 4 Oct 2017 17:30:28 +0000 (17:30 +0000)]
[test] Fix append_path in the empty case
Summary:
normpath() was being called on an empty string and appended to
the environment variable in the case where the environment variable
was unset. This led to ":." being appended to the path, since
normpath() of an empty string is '.', presumably to represent cwd.
Reviewers: zturner, sqlbyme, modocache
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D38542
llvm-svn: 314915
Craig Topper [Wed, 4 Oct 2017 17:20:12 +0000 (17:20 +0000)]
[X86] Redefine MOVSS/MOVSD instructions to take VR128 regclass as input instead of FR32/FR64
This patch redefines the MOVSS/MOVSD instructions to take VR128 as its second input. This allows the MOVSS/SD->BLEND commute to work without requiring a COPY to be inserted.
This should fix PR33079
Overall this looks to be an improvement in the generated code. I haven't checked the EXPENSIVE_CHECKS build but I'll do that and update with results.
Differential Revision: https://reviews.llvm.org/D38449
llvm-svn: 314914
Jonas Toth [Wed, 4 Oct 2017 16:49:20 +0000 (16:49 +0000)]
[clang-tidy] Emit note for variable declaration that are later deleted
This patch introduces a note for variable declaration that are later deleted.
Adds FIXME notes for possible automatic type-rewriting positions as well.
Reviewed by aaron.ballman
Differential: https://reviews.llvm.org/D38411
llvm-svn: 314913
Balaram Makam [Wed, 4 Oct 2017 16:45:24 +0000 (16:45 +0000)]
"[ARM] Mark flaky test MachineBranchProb.ll unsupported again for ARM/AArch64"
r314857 changed the CFG that resulted in the flaky test MachineBranchProb.ll to
fail the bots again. Marking it as unsupported for ARM/AArch64 again until we
find the cause.
llvm-svn: 314912
Yonghong Song [Wed, 4 Oct 2017 16:11:52 +0000 (16:11 +0000)]
bpf: fix an insn encoding issue for neg insn
Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 314911
Artem Dergachev [Wed, 4 Oct 2017 15:59:40 +0000 (15:59 +0000)]
[analyzer] Fix autodetection of binding types.
In ProgramState::getSVal(Location, Type) API which dereferences a pointer value,
when the optional Type parameter is not supplied and the Location is not typed,
type should have been guessed on a best-effort basis by inspecting the Location
more deeply. However, this never worked; the auto-detected type was instead
a pointer type to the correct type.
Fixed the issue and added various test cases to demonstrate which parts of the
analyzer were affected (uninitialized pointer argument checker, C++ trivial copy
modeling, Google test API modeling checker).
Additionally, autodetected void types are automatically replaced with char,
in order to simplify checker APIs. Which means that if the location is a void
pointer, getSVal() would read the first byte through this pointer
and return its symbolic value.
Fixes pr34305.
Differential Revision: https://reviews.llvm.org/D38358
llvm-svn: 314910
Adam Nemet [Wed, 4 Oct 2017 15:18:11 +0000 (15:18 +0000)]
[OptRemark] Move YAML writing to IR
Before the patch this was in Analysis. Moving it to IR and making it implicit
part of LLVMContext::diagnose allows the full opt-remark facility to be used
outside passes e.g. the pass manager. Jessica is planning to use this to
report function size after each pass. The same could be used for time
reports.
Tested with BUILD_SHARED_LIBS=On.
llvm-svn: 314909
Adam Nemet [Wed, 4 Oct 2017 15:18:07 +0000 (15:18 +0000)]
Also update MachineORE after r314874.
llvm-svn: 314908
Sanjay Patel [Wed, 4 Oct 2017 15:17:25 +0000 (15:17 +0000)]
[InstCombine] add 'exact' variants of all tests; NFC
We can likely remove most of these as redundant in the near future,
but I'm trying to make sure I don't introduce any regressions with D38514.
llvm-svn: 314907
Clement Courbet [Wed, 4 Oct 2017 15:13:52 +0000 (15:13 +0000)]
[NFC] clang-format lib/Transforms/Scalar/MergeICmps.cpp
llvm-svn: 314906
Carlo Bertolli [Wed, 4 Oct 2017 14:12:09 +0000 (14:12 +0000)]
[OpenMP] Initial implementation of teams distribute code generation
https://reviews.llvm.org/D38371
This patch implements codegen for the combined 'teams distribute" OpenMP pragma and adds regression tests for all its clauses.
llvm-svn: 314905
Jonas Hahnfeld [Wed, 4 Oct 2017 13:54:09 +0000 (13:54 +0000)]
[test] Pass in fixed triple for openmp-offload.c
This should fix the test on other architectures.
Related to: https://reviews.llvm.org/D38372
llvm-svn: 314904
Simon Pilgrim [Wed, 4 Oct 2017 13:41:26 +0000 (13:41 +0000)]
[X86][SSE] Early out from ComputeNumSignBitsForTargetNode. NFCI.
Early out from vector shift by immediates that will exceed eltsize - don't bother making an unnecessary ComputeNumSignBits recursive call.
llvm-svn: 314903
Jonas Hahnfeld [Wed, 4 Oct 2017 13:32:59 +0000 (13:32 +0000)]
[OpenMP] Fix passing of -m arguments correctly
The recent fix in D38258 was wrong: getAuxTriple() only returns
non-null values for the CUDA toolchain. That is why the now added
test for PPC and X86 failed.
Differential Revision: https://reviews.llvm.org/D38372
llvm-svn: 314902
Simon Pilgrim [Wed, 4 Oct 2017 13:12:08 +0000 (13:12 +0000)]
[X86][SSE] Add support for lowering unary shuffles to PACKSS/PACKUS
Extension to D38472
llvm-svn: 314901
Michael Kruse [Wed, 4 Oct 2017 12:18:57 +0000 (12:18 +0000)]
[ScopBuilder] Introduce -polly-stmt-granularity option. NFC.
The option is introduced with only one possible value
-polly-stmt-granularity=bb which represents the current behaviour, which
is outlined into the new function buildSequentialBlockStmts().
More options will be added in future commits.
llvm-svn: 314900
George Rimar [Wed, 4 Oct 2017 11:00:30 +0000 (11:00 +0000)]
[gold-plugin] - Fix compilation after LLVM update (r314883). NFC.
llvm-svn: 314899
Dylan McKay [Wed, 4 Oct 2017 10:37:22 +0000 (10:37 +0000)]
[AVR] Implement LPMWRdZ pseudo-instruction's expansion.
FIXME: implementation is mostly copy-pasted from LDWRdPtr, so we should
refactor a bit and unify the two
Patch by Gerdo Erdi.
llvm-svn: 314898