platform/upstream/llvm.git
2 years ago[mlir][sparse] add more zero-preserving unary ops to sparse compiler
Aart Bik [Thu, 5 May 2022 21:02:03 +0000 (14:02 -0700)]
[mlir][sparse] add more zero-preserving unary ops to sparse compiler

Although we now have semi-rings to deal with arbitrary ops,
it is still good to convey zero-preserving semantics of
ops to the sparse compiler.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D125043

2 years ago[flang] Change "unsupported" messages in the runtime to "not yet implemented"
Peter Steinfeld [Thu, 5 May 2022 21:54:57 +0000 (14:54 -0700)]
[flang] Change "unsupported" messages in the runtime to "not yet implemented"

If a programmer is able to compile and link a program that contains types that
are not yet supported by the runtime, it must be because they're not yet
implemented.

This change will make it easier to find unimplemented code in tests.

Differential Revision: https://reviews.llvm.org/D125046

2 years ago[clang-format][NFC] Add a few regression tests
owenca [Thu, 5 May 2022 22:02:34 +0000 (15:02 -0700)]
[clang-format][NFC] Add a few regression tests

2 years ago[mlir] Add a better error message when failing to parse an attribute
River Riddle [Tue, 3 May 2022 19:54:31 +0000 (12:54 -0700)]
[mlir] Add a better error message when failing to parse an attribute

The fallback attribute parse path is parsing a Type attribute, but this results
in a really unintuitive error message: `expected non-function type`, which
doesn't really hint at tall that we were trying to parse an attribute. This
commit fixes this by trying to optionally parse a type, and on failure
emitting an error that we were expecting an attribute.

Differential Revision: https://reviews.llvm.org/D124870

2 years ago[BOLT][DWARF] Add version 5 split dwarf support
Alexander Yermolovich [Thu, 5 May 2022 21:57:14 +0000 (14:57 -0700)]
[BOLT][DWARF] Add version 5 split dwarf support

Added support for DWARF5 Split Dwarf.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D122988

2 years agoReimplement `__builtin_dump_struct` in Sema.
Richard Smith [Thu, 5 May 2022 21:52:57 +0000 (14:52 -0700)]
Reimplement `__builtin_dump_struct` in Sema.

Compared to the old implementation:

* In C++, we only recurse into aggregate classes.
* Unnamed bit-fields are not printed.
* Constant evaluation is supported.
* Proper conversion is done when passing arguments through `...`.
* Additional arguments are supported and are injected prior to the
  format string; this directly supports use with `fprintf`, for example.
* An arbitrary callable can be passed rather than only a function
  pointer. In particular, in C++, a function template or overload set is
  acceptable.
* All text generated by Clang is printed via `%s` rather than directly;
  this avoids issues where Clang's pretty-printing output might itself
  contain a `%` character.
* Fields of types that we don't know how to print are printed with a
  `"*%p"` format and passed by address to the print function.
* No return value is produced.

Reviewed By: aaron.ballman, erichkeane, yihanaa

Differential Revision: https://reviews.llvm.org/D124221

2 years ago[clang-format] Fix another bug in AlignConsecutiveAssignments
owenca [Wed, 4 May 2022 19:25:22 +0000 (12:25 -0700)]
[clang-format] Fix another bug in AlignConsecutiveAssignments

The ShouldShiftBeAdded lambda checks if extra space should be
added before the wrapped part of a braced list. If the first
element of the list is wrapped, no extra space should be added.

Fixes #55161.

Differential Revision: https://reviews.llvm.org/D124956

2 years ago[mlir:ExecutionEngine] Update use of getAddress now that lookup returns ExecutorAddr
River Riddle [Thu, 5 May 2022 21:21:03 +0000 (14:21 -0700)]
[mlir:ExecutionEngine] Update use of getAddress now that lookup returns ExecutorAddr

This was changed in 16dcbb53dc7968a3752661aac731172ebe0faf64

2 years agoDecr return pc mid-stack when picking UnwindPlan row
Jason Molenda [Thu, 5 May 2022 21:13:23 +0000 (14:13 -0700)]
Decr return pc mid-stack when picking UnwindPlan row

When picking the UnwindPlan row to use to backtrace,
off of the zeroth frame, decrement the return pc so
we're in the address range of the call instruction.
If this is a noretrun function call, the instruction
at the "return address" is likely an entirely different
basic block with possibly very different unwind rules,
and this can cause the backtrace to be incorrect.

Differential Revision: https://reviews.llvm.org/D124957
rdar://84651805

2 years ago[GlobalISel] Re-generate some tests.
Amara Emerson [Thu, 5 May 2022 21:05:15 +0000 (14:05 -0700)]
[GlobalISel] Re-generate some tests.

2 years ago[ORC] Return ExecutorAddrs rather than JITEvaluatedSymbols from LLJIT::lookup.
Lang Hames [Thu, 5 May 2022 20:24:39 +0000 (13:24 -0700)]
[ORC] Return ExecutorAddrs rather than JITEvaluatedSymbols from LLJIT::lookup.

Clients don't care about linkage, and ExecutorAddr is much more ergonomic.

2 years ago[sanitizer] Correct GetTls for x32
H.J. Lu [Thu, 5 May 2022 16:49:05 +0000 (09:49 -0700)]
[sanitizer] Correct GetTls for x32

Since x32 pointer size is 4 bytes, the self pointer offset in TCB:

struct
{
  void *tcb;
  dtv_t *dtv;
  void *self;
  ...

should be 8, not 16.

Fixes https://github.com/llvm/llvm-project/issues/55288

Differential Revision: https://reviews.llvm.org/D125025

2 years ago[mlir] Fix the names of exported functions
Stella Stamenova [Thu, 5 May 2022 20:46:15 +0000 (13:46 -0700)]
[mlir] Fix the names of exported functions

The names of the functions that are supposed to be exported do not match the implementations. This is due in part to https://github.com/llvm/llvm-project/commit/cac7aabbd8236bef2909bfc0dbba17644f7aaade.

This change makes the implementations and declarations match and adds a couple missing declarations.

The new names follow the pattern of the existing `verify` functions where the prefix is maintained as `_mlir_ciface_` but the suffix follows the new naming convention.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D124891

2 years ago[clang][dataflow] Centralize expression skipping logic
Eric Li [Wed, 4 May 2022 21:08:43 +0000 (21:08 +0000)]
[clang][dataflow] Centralize expression skipping logic

A follow-up to 62b2a47 to centralize the logic that skips expressions
that the CFG does not emit. This allows client code to avoid
sprinkling this logic everywhere.

Add redirects in the transfer function to similarly skip such
expressions by forwarding the visit to the sub-expression.

Differential Revision: https://reviews.llvm.org/D124965

2 years ago[libcxx] [test] Narrow down an XFAIL for clang-cl configurations
Martin Storsjö [Thu, 5 May 2022 07:04:54 +0000 (07:04 +0000)]
[libcxx] [test] Narrow down an XFAIL for clang-cl configurations

This test only fails on x86_64 clang-cl, not for i386.

(The root cause is still not explored, thus the FIXME is still
relevant.)

Differential Revision: https://reviews.llvm.org/D124994

2 years ago[libcxx] [test] Extend the UNSUPPORTED lines in strong_order_long_double.verify.cpp...
Martin Storsjö [Wed, 4 May 2022 19:05:50 +0000 (22:05 +0300)]
[libcxx] [test] Extend the UNSUPPORTED lines in strong_order_long_double.verify.cpp for non-x86_64 Windows

Differential Revision: https://reviews.llvm.org/D124992

2 years ago[libcxxabi] Use the right calling convention for exception destructors on i386 Windows
Martin Storsjö [Wed, 4 May 2022 12:50:24 +0000 (15:50 +0300)]
[libcxxabi] Use the right calling convention for exception destructors on i386 Windows

On Windows on i386, C++ member functions use a different calling
convention (`__thiscall`) than the default one for regular functions
(`__cdecl`). (On Windows on architectures other than i386, both calling
convention attributes are no-ops.)

This matches how libstdc++ declares these types.

This fixes the std/thread/futures/futures.{shared,unique}_future/dtor.pass.cpp
tests on i386 mingw.

Differential Revision: https://reviews.llvm.org/D124990

2 years ago[libcxx] [test] Fix max_size.pass.cpp for other Windows architectures
Martin Storsjö [Wed, 4 May 2022 11:39:21 +0000 (14:39 +0300)]
[libcxx] [test] Fix max_size.pass.cpp for other Windows architectures

All current Windows architectures (i386, x86_64, arm, arm64) get
the full_size() behaviour here. x86_64 (the only one tested in CI
currently) is handled by the first ifdef at the top, but handle
Windows in general on all other architectures later.

Differential Revision: https://reviews.llvm.org/D124989

2 years ago[SelectionDAGISel] Add back a comment to MergeInputChains handling. NFC
Craig Topper [Thu, 5 May 2022 19:57:17 +0000 (12:57 -0700)]
[SelectionDAGISel] Add back a comment to MergeInputChains handling. NFC

This comment used to exist, but was lost in a refactor over 10 years
ago, but still seems relevant and improves readability.

2 years ago[ORC] Add an ExecutorAddr::toPtr overload for function types.
Lang Hames [Thu, 5 May 2022 16:20:52 +0000 (09:20 -0700)]
[ORC] Add an ExecutorAddr::toPtr overload for function types.

In the common case of converting an ExecutorAddr to a function pointer type,
this eliminates the need for the '(*)' boilerplate to explicitly specify a
function pointer. E.g.:

auto *F = A.toPtr<int(*)()>();

can now be written as

auto *F = A.toPtr<int()>();

2 years ago[X86] Add some test coverage for Issue #55271
Simon Pilgrim [Thu, 5 May 2022 19:06:09 +0000 (20:06 +0100)]
[X86] Add some test coverage for Issue #55271

We needed something that would delay the creation of the undef until after the rem-by-constant expansion, so I used a SSE shift of undef by zero which will expand to undef.

2 years ago[clang][ASTImporter][NFC]: Move clang::ImportError into own header.
phyBrackets [Mon, 2 May 2022 15:52:32 +0000 (21:22 +0530)]
[clang][ASTImporter][NFC]: Move clang::ImportError into own header.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D124774

2 years ago[BOLT] Report per-section hotness in bolt-heatmap.
Rahman Lavaee [Thu, 5 May 2022 18:37:15 +0000 (11:37 -0700)]
[BOLT] Report per-section hotness in bolt-heatmap.

This patch adds a new feature to bolt heatmap to print the hotness of each section in terms of the percentage of samples within that section.

Sample output generated for the clang binary:

Section Name, Begin Address, End Address, Percentage Hotness
.text, 0x1a7b9b0, 0x20a2cc0, 1.4709
.init, 0x20a2cc0, 0x20a2ce1, 0.0001
.fini, 0x20a2ce4, 0x20a2cf2, 0.0000
.text.unlikely, 0x20a2d00, 0x431990c, 0.3061
.text.hot, 0x4319910, 0x4bc6927, 97.2197
.text.startup, 0x4bc6930, 0x4c10c89, 0.0058
.plt, 0x4c10c90, 0x4c12010, 0.9974

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D124412

2 years agoPedantically warn about // comments in gnu89 mode
Aaron Ballman [Thu, 5 May 2022 18:33:55 +0000 (14:33 -0400)]
Pedantically warn about // comments in gnu89 mode

GCC warns with a pedantic warning when -std=gnu89, but Clang would only
diagnose in -std=c89 mode. Clang now matches the GCC behavior in both
modes.

Fixes #18427

2 years agoFix debugserver translation check
Alexandre Perez [Mon, 2 May 2022 21:16:45 +0000 (14:16 -0700)]
Fix debugserver translation check

Currently, debugserver has a test to check if it was launched in
translation. The intent was to cover the case where an x86_64
debugserver attempts to control an arm64/arm64e process, returning
an error. However, this check also covers the case where users
are attaching to an x86_64 process, exiting out before attempting
to hand off control to the translated debugserver at
`/Library/Apple/usr/libexec/oah/debugserver`.

This diff delays the debugserver translation check until after
determining whether to hand off control to
`/Library/Apple/usr/libexec/oah/debugserver`. Only when the
process is not translated and thus has not been handed off do we
check if the debugserver is translated, erroring out in that case.

Reviewed By: jasonmolenda

Differential Revision: https://reviews.llvm.org/D124814

2 years ago[VPlan] Remove dead code to create VPWidenPHIRecipes (NFCI).
Florian Hahn [Thu, 5 May 2022 18:29:02 +0000 (19:29 +0100)]
[VPlan] Remove dead code to create VPWidenPHIRecipes (NFCI).

After introducing VPWidenPointerInductionRecipe, VPWidenPHIRecipes
should not be created at this point. Turn check into an assert.

2 years agoDWARFVerifier: Verify CU/TU index overlap issues
David Blaikie [Thu, 5 May 2022 18:09:34 +0000 (18:09 +0000)]
DWARFVerifier: Verify CU/TU index overlap issues

Discovered in a large object that would need a 64 bit index (but the
cu/tu index format doesn't include a 64 bit offset/length mode in
DWARF64 - a spec bug) but instead binutils dwp overflowed the offsets
causing overlapping regions.

2 years ago[X86SchedSandyBridge] update cost of COPY to 1 cycle from 0
Nick Desaulniers [Thu, 5 May 2022 18:06:09 +0000 (11:06 -0700)]
[X86SchedSandyBridge] update cost of COPY to 1 cycle from 0

To match the cost of other scheduling models. This is expected to
schedule mov instructions around INLINEASM less frequently for the
default machineschedule (pre-RA scheduling).

Suggested by Craig Topper.

Link: https://github.com/llvm/llvm-project/issues/41914
Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D122350

2 years agoRevert "[InstCombine] Remove side effect of replaced constrained intrinsics"
Serge Pavlov [Thu, 5 May 2022 18:05:05 +0000 (01:05 +0700)]
Revert "[InstCombine] Remove side effect of replaced constrained intrinsics"

This reverts commit 83914ee96fc2d828e1cfb8913f5d156d39150e2c.
The change caused discussion: https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20220502/1034841.html

2 years ago[libc++] Avoid a Microsoft SAL macro.
Peter Kasting [Thu, 5 May 2022 17:52:12 +0000 (19:52 +0200)]
[libc++] Avoid a Microsoft SAL macro.

Bug: https://github.com/llvm/llvm-project/issues/55195

Reviewed By: #libc, Mordante

Differential Revision: https://reviews.llvm.org/D124695

2 years ago[x86][scheduler] Add MIR test for 41914
Nick Desaulniers [Thu, 5 May 2022 17:59:49 +0000 (10:59 -0700)]
[x86][scheduler] Add MIR test for 41914

Generated via:
    $ clang -fno-omit-frame-pointer -m32 -mregparm=3 -O2 crash.c -emit-llvm -S
    $ llc -print-before=machine-scheduler -mcpu=sandybridge crash.mir

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D122348

2 years ago[flang][driver] Add missing parentheses in an assert
Andrzej Warzynski [Thu, 5 May 2022 17:58:08 +0000 (17:58 +0000)]
[flang][driver] Add missing parentheses in an assert

The assert in https://reviews.llvm.org/D124665 was missing parentheses,
which triggered a warning in GCC (verified with GCC 11). As `-Werror` is
on by default in FLang, that triggered build errors, see e.g. [1].

The fix is rather straightforward, so I am sending this without a
review.

[1] https://lab.llvm.org/buildbot/#/builders/160/builds/7016

Differential Revision: https://reviews.llvm.org/D125027

2 years agoNo longer accept scoped enumerations in C
Aaron Ballman [Thu, 5 May 2022 17:53:03 +0000 (13:53 -0400)]
No longer accept scoped enumerations in C

We had a think-o that would allow a user to declare a scoped
enumeration in C language modes "as a C++11 extension". This is a
think-o because there's no way for the user to spell the name of the
enumerators; C does not have '::' for a fully-qualified name. See
commit d0d87b597259a2b74ae5c2825a081c7e336cb1d0 for details on why this
is unintentional for C.

Fixes #42372

2 years ago[AMDGPU] Split FeatureAtomicFaddInsts
Joe Nash [Thu, 14 Apr 2022 13:29:25 +0000 (09:29 -0400)]
[AMDGPU] Split FeatureAtomicFaddInsts

FeatureAtomicFaddInsts is replaced with three more granular features.
Contributors:
Petar Avramovic <Petar.Avramovic@amd.com>

Patch 3/N for upstreaming of AMDGPU gfx11 architecture

Depends on D124537

Reviewed By: foad, #amdgpu, arsenm

Differential Revision: https://reviews.llvm.org/D124538

2 years ago[BOLT][CMAKE] Check build target architecture for runtime libs
Amir Ayupov [Thu, 5 May 2022 17:38:31 +0000 (10:38 -0700)]
[BOLT][CMAKE] Check build target architecture for runtime libs

Account for cross-compilation build scenarios (X86 to ARM, Linux
to Windows, etc).

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D124712

2 years ago[mlir][nvvm] Fix support for tf32 data type in mma.sync
Christopher Bate [Wed, 4 May 2022 20:12:07 +0000 (14:12 -0600)]
[mlir][nvvm] Fix support for tf32 data type in mma.sync

The NVVM dialect test coverage for all possible type/shape combinations
in the `nvvm.mma.sync` op is mostly complete. However, there were tests
missing for TF32 datatype support. This change adds tests for the one
relevant shape/type combination. This uncovered a small bug in the op
verifier, which this change also fixes.

Differential Revision: https://reviews.llvm.org/D124975

2 years ago[clangd] Fix inlayhints crash, don't assume functions have FunctionTypeLocs
Sam McCall [Thu, 5 May 2022 16:50:44 +0000 (18:50 +0200)]
[clangd] Fix inlayhints crash, don't assume functions have FunctionTypeLocs

Fixes https://github.com/clangd/clangd/issues/1140

2 years ago[InstCombine] fix typo in test name; NFC
Sanjay Patel [Thu, 5 May 2022 16:47:11 +0000 (12:47 -0400)]
[InstCombine] fix typo in test name; NFC

2 years ago[InstCombine] add scalable vector test for logical select; NFC
Sanjay Patel [Thu, 5 May 2022 16:41:32 +0000 (12:41 -0400)]
[InstCombine] add scalable vector test for logical select; NFC

D124997 shows that the code is not ready to handle scalable vectors,
so add some more coverage for a potential crashing case.

2 years ago[SelectionDAG] Constant fold (sext_inreg undef, VT) to 0 instead of undef.
Craig Topper [Thu, 5 May 2022 16:40:10 +0000 (09:40 -0700)]
[SelectionDAG] Constant fold (sext_inreg undef, VT) to 0 instead of undef.

The result of sign_extend_inreg needs to have as many sign bits
as requested by the VT argument. The easiest way to guarantee this
is to fold it to 0.

SystemZ test was modified to avoid using undef.

Fixes https://github.com/llvm/llvm-project/issues/55178

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D124696

2 years ago[flang] Fix triple in a couple of driver tests
Andrzej Warzynski [Thu, 5 May 2022 16:35:59 +0000 (16:35 +0000)]
[flang] Fix triple in a couple of driver tests

In https://reviews.llvm.org/D124667, I added tests that check the
generated assembly. I verified the assembly on AArch64 and X86_64, but
the PPC Flang buildbot [1] started failing (i.e. the assembly was not
generic enough).

In order to fix this, I'm changing these tests to be only run on
AAarch64 - that's the architecture that most of public Flang buildbots
use.

I'm hoping that this is straightforward enough and am merging it without
a review.

[1] https://lab.llvm.org/buildbot/#/builders/21/builds/40256

2 years ago[DAGCombiner] Fold (sext/zext undef) -> 0 and aext(undef) -> undef.
Craig Topper [Thu, 5 May 2022 07:19:10 +0000 (00:19 -0700)]
[DAGCombiner] Fold (sext/zext undef) -> 0 and aext(undef) -> undef.

Differential Revision: https://reviews.llvm.org/D124988

2 years ago[DAGCombiner] Fold (max/min X, X) -> X.
Craig Topper [Thu, 5 May 2022 06:38:24 +0000 (23:38 -0700)]
[DAGCombiner] Fold (max/min X, X) -> X.

Differential Revision: https://reviews.llvm.org/D124951

2 years ago[RISCV] Add integer min/max intrinsic tests. NFC
Craig Topper [Thu, 5 May 2022 06:37:00 +0000 (23:37 -0700)]
[RISCV] Add integer min/max intrinsic tests. NFC

Add basic tests and some tests for same operands and all undef
operands inspired by PR55271.

i32 is umin/umax is using signext to match RISC-V ABI. i8/i16 are
using signext/zeroext to match the operation.

Differential Revision: https://reviews.llvm.org/D124948

2 years ago[OpenMP] libomp: Add itt notifications to sync dependent tasks.
AndreyChurbanov [Thu, 5 May 2022 16:27:48 +0000 (11:27 -0500)]
[OpenMP] libomp: Add itt notifications to sync dependent tasks.

Intel Inspector uses itt notifications to analyze code execution, and it
reports race conditions in dependent tasks.
This patch fixes the issue notifying Inspector on tasks dependency
synchronizations.

Differential Revision: https://reviews.llvm.org/D123042

2 years ago[AArch64][GlobalISel] Add undef combines to postlegalizer combiner.
Amara Emerson [Thu, 5 May 2022 16:09:51 +0000 (09:09 -0700)]
[AArch64][GlobalISel] Add undef combines to postlegalizer combiner.

2 years agoSilence a false positive about an unevaluated expr w/side effects
Aaron Ballman [Thu, 5 May 2022 16:10:06 +0000 (12:10 -0400)]
Silence a false positive about an unevaluated expr w/side effects

If the operand to `sizeof` is an expression of VLA type, the operand is
still evaluated, so we should not issue a diagnostic about ignoring the
side effects in this case, as they're not actually ignored.

Fixes #48010

2 years ago[clang] Fix Clang release notes
Ilya Biryukov [Thu, 5 May 2022 16:09:23 +0000 (16:09 +0000)]
[clang] Fix Clang release notes

I have forgotten a space by mistake in the previous commit.

2 years ago[OpenMP] libomp: cleanup - remove duplicate check
AndreyChurbanov [Thu, 5 May 2022 16:00:12 +0000 (11:00 -0500)]
[OpenMP] libomp: cleanup - remove duplicate check

The identical check remains 20 lines above in the code.

Differential Revision: https://reviews.llvm.org/D123046

2 years ago[OpenMP] libomp: cleanup dead code
AndreyChurbanov [Thu, 5 May 2022 15:55:52 +0000 (10:55 -0500)]
[OpenMP] libomp: cleanup dead code

Differential Revision: https://reviews.llvm.org/D123047

2 years ago[Driver] Remove -fno-concept-satisfaction-caching
Ilya Biryukov [Thu, 5 May 2022 15:52:04 +0000 (15:52 +0000)]
[Driver] Remove -fno-concept-satisfaction-caching

The flag was added when the C++20 draft did not allow for concept
caching. The final C++20 standard permits the caching, so flag is
redundant. See http://wg21.link/p2104r0.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D125014

2 years agoFix "the the" typo in documentation and user facing strings
Brian Tracy [Thu, 5 May 2022 15:49:23 +0000 (17:49 +0200)]
Fix "the the" typo in documentation and user facing strings

There are many more instances of this pattern, but I chose to limit this change to .rst files (docs), anything in libcxx/include, and string literals. These have the highest chance of being seen by end users.

Reviewed By: #libc, Mordante, martong, ldionne

Differential Revision: https://reviews.llvm.org/D124708

2 years ago[analyzer] Canonicalize SymIntExpr so the RHS is positive when possible
Tomasz Kamiński [Thu, 5 May 2022 15:48:49 +0000 (17:48 +0200)]
[analyzer] Canonicalize SymIntExpr so the RHS is positive when possible

This PR changes the `SymIntExpr` so the expression that uses a
negative value as `RHS`, for example: `x +/- (-N)`, is modeled as
`x -/+ N` instead.

This avoids producing a very large `RHS` when the symbol is cased to
an unsigned number, and as consequence makes the value more robust in
presence of casts.

Note that this change is not applied if `N` is the lowest negative
value for which negation would not be representable.

Reviewed By: steakhal

Patch By: tomasz-kaminski-sonarsource!

Differential Revision: https://reviews.llvm.org/D124658

2 years ago[clang-tidy] Make header-guard check a little looser on comment whitespace
Sam McCall [Wed, 4 May 2022 19:37:24 +0000 (21:37 +0200)]
[clang-tidy] Make header-guard check a little looser on comment whitespace

Currently it rejects "//  FOO_BAR_H" as an endif comment due to the extra space.
A user complained that this is too picky, which seems fair enough.

Differential Revision: https://reviews.llvm.org/D124955

2 years ago[libc++] Add a few _LIBCPP_ASSERTs in __tree
Louis Dionne [Tue, 26 Apr 2022 21:02:40 +0000 (15:02 -0600)]
[libc++] Add a few _LIBCPP_ASSERTs in __tree

Several helper functions specify preconditions as comments, but we never
check them. I ran across a bug report (without a reproducer) in this code,
and I thought that having these assertions in place would make it easier
to troubleshoot.

Differential Revision: https://reviews.llvm.org/D124477

2 years ago[flang][driver] Add support for consuming LLVM IR/BC files
Andrzej Warzynski [Fri, 22 Apr 2022 09:07:31 +0000 (09:07 +0000)]
[flang][driver] Add support for consuming LLVM IR/BC files

This change makes sure that Flang's driver recognises LLVM IR and BC as
supported file formats. To this end, `isFortran` is extended and renamed
as `isSupportedByFlang` (the latter better reflects the new
functionality).

New tests are added to verify that the target triple is correctly
overridden by the frontend driver's default value or the value specified
with `-triple`. Strictly speaking, this is not a functionality that's
new in this patch (it was added in D124664). This patch simply enables
us to write such tests and hence I'm including them here.

Differential Revision: https://reviews.llvm.org/D124667

2 years ago[Sema] Replace invalid FIXME about memory leak. NFC
Ilya Biryukov [Thu, 5 May 2022 15:02:36 +0000 (15:02 +0000)]
[Sema] Replace invalid FIXME about memory leak. NFC

Added in my previous patch by mistake.

2 years ago[MachinePipeliner] Fix unscheduled instruction
Thomas Preud'homme [Tue, 5 Apr 2022 21:34:40 +0000 (22:34 +0100)]
[MachinePipeliner] Fix unscheduled instruction

Prior to ordering instructions to be scheduled, the machine pipeliner
update recurrence node sets in groupRemainingNodes() by adding in a
given node set any node on the dependency path from a node set with
higher priority to the given node set. The function computePath() that
determine what constitutes a path follows artificial dependencies.

However, when ordering the nodes in the resulting node sets,
computeNodeOrder() calls ignoreDependence when looking at dependencies
which ignores artificial dependencies. This can cause a node not to be
scheduled which then causes wrong code generation and in the case of a
debug build will lead to an assert failure in generatePhis() in
ModuloScheduler.cpp.

This commit adds calls to ignoreDependence() in computePath() to not add
any node in groupRemainingNodes() that would not be ordered by
computeNodeOrder().

Reviewed By: sgundapa

Differential Revision: https://reviews.llvm.org/D124267

2 years ago[PowerPC] Add extra v2i64 splat load tests. NFC
David Green [Thu, 5 May 2022 14:56:55 +0000 (15:56 +0100)]
[PowerPC] Add extra v2i64 splat load tests. NFC

In service of D123801, this add some tests targetting a v2i64 splat of a
load, and regenerates vsx_shuffle_le.ll for easier updating.

2 years ago[Driver] Make "upgrade" of -include to include-pch optional; disable in clangd
Sam McCall [Wed, 4 May 2022 23:15:28 +0000 (01:15 +0200)]
[Driver] Make "upgrade" of -include to include-pch optional; disable in clangd

If clang is passed "-include foo.h", it will rewrite to "-include-pch foo.h.pch"
before passing it to cc1, if foo.h.pch exists.

Existence is checked, but validity is not. This is probably a reasonable
assumption for the compiler itself, but not for clang-based tools where the
actual compiler may be a different version of clang, or even GCC.
In the end, we lose our -include, we gain a -include-pch that can't be used,
and the file often fails to parse.

I would like to turn this off for all non-clang invocations (i.e.
createInvocationFromCommandLine), but we have explicit tests of this behavior
for libclang and I can't work out the implications of changing it.

Instead this patch:
 - makes it optional in the driver, default on (no change)
 - makes it optional in createInvocationFromCommandLine, default on (no change)
 - changes driver to do IO through the VFS so it can be tested
 - tests the option
 - turns the option off in clangd where the problem was reported

Subsequent patches should make libclang opt in explicitly and flip the default
for all other tools. It's probably also time to extract an options struct
for createInvocationFromCommandLine.

Fixes https://github.com/clangd/clangd/issues/856
Fixes https://github.com/clangd/vscode-clangd/issues/324

Differential Revision: https://reviews.llvm.org/D124970

2 years ago[riscv] Use X0 for destination of VSETVLI instruction if result unused
Philip Reames [Thu, 5 May 2022 14:35:09 +0000 (07:35 -0700)]
[riscv] Use X0 for destination of VSETVLI instruction if result unused

If the GPR destination register of a VSETVLI instruction is unused, we can replace it with X0. This discards the result, and thus reduces register pressure.

Since after the core insertion/lowering algorithm has run, many user written VSETVLIs will have their GPR result unused (as VTYPE/VLEN is now explicitly read instead), this kicks in for most tests which involve a vsetvli intrinsic for fixed length vectorization. (vscale vectorization generally uses the GPR result to know how far to e.g. advance pointers in a loop and these uses are not removed.)  When inserting VSETVLIs to lower psuedos, we prefer the X0 form anyways.

Differential Revision: https://reviews.llvm.org/D124961

2 years ago[ARM][AArch64] Add some extra shuffle conversion test coverage. NFC
David Green [Thu, 5 May 2022 14:27:44 +0000 (15:27 +0100)]
[ARM][AArch64] Add some extra shuffle conversion test coverage. NFC

This adds a big endian run line for the AArch64 TRN tests and
regenerated the check lines, along with adding an extra MVE VMOVN case
and regenerating vector-DAGCombine.ll for easier updating.

2 years ago[flang][nfc] Use a message class for "not yet implemented" messages
Peter Steinfeld [Thu, 5 May 2022 01:30:22 +0000 (18:30 -0700)]
[flang][nfc] Use a message class for "not yet implemented" messages

Following a previous suggestion from Peter Klausler.

Differential Revision: https://reviews.llvm.org/D124972

2 years ago[IR] Simplify code. NFCI.
Benjamin Kramer [Thu, 5 May 2022 14:05:11 +0000 (16:05 +0200)]
[IR] Simplify code. NFCI.

2 years ago[flang][driver] Re-organise the code-gen actions (nfc)
Andrzej Warzynski [Fri, 22 Apr 2022 09:07:31 +0000 (09:07 +0000)]
[flang][driver] Re-organise the code-gen actions (nfc)

All frontend actions that generate code  (MLIR, LLVM IR/BC,
Assembly/Object Code) are re-factored as essentially one action,
`CodeGenAction`, with minor specialisations. To facilate all this,
`CodeGenAction` is extended to hold `TargetMachine` and backend action
type (MLIR vs LLVM IR vs LLVM BC vs Assembly vs Object Code).

`CodeGenAction` is no longer a pure abstract class and the
corresponding `ExecuteAction` is implemented so that it covers all use
cases. All this allows a much better code re-use.

Key functionality is extracted into some helpful hooks:
  * `SetUpTargetMachine`
  * `GetOutputStream`
  * `EmitObjectCodeHelper`
  * `EmitBCHelper`
I hope that this clarifies the overall structure. I suspect that we may
need to revisit this again as the functionality grows in complexity.

Differential Revision: https://reviews.llvm.org/D124665

2 years agoIn MSVC compatibility mode, handle unqualified templated base class initialization
Fred Tingaud [Thu, 5 May 2022 13:03:12 +0000 (15:03 +0200)]
In MSVC compatibility mode, handle unqualified templated base class initialization

Before C++20, MSVC was supporting not mentioning the template argument of the base class when initializing a class inheriting a templated base class.
So the following code compiled correctly:
```
template <class T>
class Base {
};

template <class T>
class Derived : public Base<T> {
public:
  Derived() : Base() {}
};

void test() {
    Derived<int> d;
}
```
See https://godbolt.org/z/Pxxe7nccx for a conformance view.

This patch adds support for such construct when in MSVC compatibility mode.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D124666

2 years ago[ConstantFold] Use getFltSemantics instead of manually checking the type
Benjamin Kramer [Thu, 5 May 2022 13:50:33 +0000 (15:50 +0200)]
[ConstantFold] Use getFltSemantics instead of manually checking the type

Simplifies the code and makes fpext/fptrunc constant folding not crash
when the result is bf16.

2 years ago[ThreadSanitizer] Add fallback DebugLocation for instrumentation calls
Marco Elver [Thu, 5 May 2022 13:21:35 +0000 (15:21 +0200)]
[ThreadSanitizer] Add fallback DebugLocation for instrumentation calls

When building with debug info enabled, some load/store instructions do
not have a DebugLocation attached. When using the default IRBuilder, it
attempts to copy the DebugLocation from the insertion-point instruction.
When there's no DebugLocation, no attempt is made to add one.

This is problematic for inserted calls, where the enclosing function has
debug info but the call ends up without a DebugLocation in e.g. LTO
builds that verify that both the enclosing function and calls to
inlinable functions have debug info attached.

This issue was noticed in Linux kernel KCSAN builds with LTO and debug
info enabled:

  | ...
  | inlinable function call in a function with debug info must have a !dbg location
  |   call void @__tsan_read8(i8* %432)
  | ...

To fix, ensure that all calls to the runtime have a DebugLocation
attached, where the possibility exists that the insertion-point might
not have any DebugLocation attached to it.

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D124937

2 years ago[Frontend] give createInvocationFromCommandLine an options struct
Sam McCall [Thu, 5 May 2022 00:15:24 +0000 (02:15 +0200)]
[Frontend] give createInvocationFromCommandLine an options struct

It's accumulating way too many optional params (see D124970)

While here, improve the name and the documentation.

Differential Revision: https://reviews.llvm.org/D124971

2 years ago[SLP]Further improvement of the cost model for scalars used in buildvectors.
Alexey Bataev [Tue, 14 Dec 2021 18:02:06 +0000 (10:02 -0800)]
[SLP]Further improvement of the cost model for scalars used in buildvectors.

Further improvement of the cost model for the scalars used in
buildvectors sequences. The main functionality is outlined into
a separate function.
The cost is calculated in the following way:
1. If the Base vector is not undef vector, resizing the very first mask to
have common VF and perform action for 2 input vectors (including non-undef
Base). Other shuffle masks are combined with the resulting after the 1 stage and processed as a shuffle of 2 elements.
2. If the Base is undef vector and have only 1 shuffle mask, perform the
action only for 1 vector with the given mask, if it is not the identity
mask.
3. If > 2 masks are used, perform serie of shuffle actions for 2 vectors,
combing the masks properly between the steps.

The original implementation misses the very first analysis for the Base
vector, so the cost might too optimistic in some cases. But it improves
the cost for the insertelements which are part of the current SLP graph.

Part of D107966.

Differential Revision: https://reviews.llvm.org/D115750

2 years ago[XCOFF][AIX] Use unique section names for LSDA and EH info sections with -ffunction...
Xing Xue [Thu, 5 May 2022 13:01:36 +0000 (09:01 -0400)]
[XCOFF][AIX] Use unique section names for LSDA and EH info sections with -ffunction-sections

Summary:
When -ffunction-sections is on, this patch makes the compiler to generate unique LSDA and EH info sections for functions on AIX by appending the function name to the section name as a suffix. This will allow the AIX linker to garbage-collect unused function.

Reviewed by: MaskRay, hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D124855

2 years ago[AArch64] Add -aarch64-insert-extract-base-cost
Peter Waller [Tue, 3 May 2022 08:36:07 +0000 (08:36 +0000)]
[AArch64] Add -aarch64-insert-extract-base-cost

The new flag -aarch64-insert-extract-base-cost can be used to
set the value of AArch64Subtarget::getVectorInsertExtractBaseCost(),
for the purposes of experimentation.

Differential Revision: https://reviews.llvm.org/D124835

2 years ago[AMDGPU] Combine DPP mov even if old reg def is in different BB
Jay Foad [Thu, 21 Apr 2022 11:01:59 +0000 (12:01 +0100)]
[AMDGPU] Combine DPP mov even if old reg def is in different BB

Given a DPP mov like this:

  %2:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
  ...
  %3:vgpr_32 = V_MOV_B32_dpp %2, %1, 1, 1, 1, 0, implicit $exec

this patch just removes a check that %2 (the "old reg") was defined in
the same BB as the DPP mov instruction. GCNDPPCombine requires that the
MIR is in SSA form so I don't understand why the BB matters.

This lets the optimization work in more real world cases when the
definition of %2 gets hoisted out of a loop.

Differential Revision: https://reviews.llvm.org/D124182

2 years agosanitizer_common: Define FP_XSTATE_MAGIC1 for old glibc
Tobias Burnus [Thu, 5 May 2022 09:30:10 +0000 (10:30 +0100)]
sanitizer_common: Define FP_XSTATE_MAGIC1 for old glibc

D116208 (commit 1298273e8206a8fc2) added FP_XSTATE_MAGIC1.
However, when building with glibc < 2.16 for backward-dependency
compatibility, it is not defined - and the build breaks.

Note: The define comes from Linux's asm/sigcontext.h but the
file uses signal.h which includes glibc's bits/sigcontext.h - which
is synced from the kernel's file but lags behind.

Solution: For backward compatility with ancient systems, define
FP_XSTATE_MAGIC1 if undefined.

//For the old systems, we were building with Linux kernel 3.19 but to support really old glibc systems, we build with a sysroot of glibc 2.12. While our kernel (and the users' kernels) have FP_XSTATE_MAGIC1, glibc 2.12 is too old. – With this patch, building the sanitizer libs works again. This showed up for us today as GCC mainline/13 has now synced the sanitizer libs.//

Reviewed By: #sanitizers, vitalybuka

Differential Revision: https://reviews.llvm.org/D124927

2 years ago[analyzer] Get direct binding for specific punned case
einvbri [Sun, 24 Apr 2022 19:05:11 +0000 (14:05 -0500)]
[analyzer] Get direct binding for specific punned case

Region store was not able to see through this case to the actual
initialized value of STRUCT ff. This change addresses this case by
getting the direct binding. This was found and debugged in a downstream
compiler, with debug guidance from @steakhal. A positive and negative
test case is added.

The specific case where this issue was exposed.

  typedef struct {
    int a:1;
    int b[2];
  } STRUCT;

  int main() {
    STRUCT ff = {0};
    STRUCT* pff = &ff;
    int a = ((int)pff + 1);
    return a;
  }

Reviewed By: steakhal, martong

Differential Revision: https://reviews.llvm.org/D124349

2 years ago[LICM] Add test to exercise assertion from D123473.
Florian Hahn [Thu, 5 May 2022 09:49:51 +0000 (10:49 +0100)]
[LICM] Add test to exercise assertion from D123473.

Add a test case that triggers an assertion with earlier versions of
D123473.

2 years agoRegAllocGreedy: Common up part of the priority calculation. NFC.
Jay Foad [Thu, 5 May 2022 09:35:20 +0000 (10:35 +0100)]
RegAllocGreedy: Common up part of the priority calculation. NFC.

2 years ago[DAGCombine] Fold (X & ~Y) | Y with truncated not
Nikita Popov [Wed, 4 May 2022 15:35:18 +0000 (17:35 +0200)]
[DAGCombine] Fold (X & ~Y) | Y with truncated not

This extends the (X & ~Y) | Y to X | Y fold to also work if ~Y is
a truncated not (when taking into account the mask X). This is
done by exporting the infrastructure added in D124856 and reusing
it here.

I've retained the old value of AllowUndefs=false, though probably
this can be switched to true with extra test coverage.

Differential Revision: https://reviews.llvm.org/D124930

2 years ago[SimpleLoopUnswitch] Add freeze if branch execs for partial unswitching.
Florian Hahn [Thu, 5 May 2022 08:44:07 +0000 (09:44 +0100)]
[SimpleLoopUnswitch] Add freeze if branch execs for partial unswitching.

We cannot skip the freezing the condition if the unswitched branch
executes, if the condition is a chain of ANDs/ORs. For example, if if we
have an AND %c1, %c2 with  %c1 == undef and %c2 == 0, there would be no
branch on undef in the original code, but a branch on undef if we
unswitch %c1.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D124603

2 years ago[flang] use 1-based dim in transformational runtime error msg
Jean Perier [Thu, 5 May 2022 08:32:40 +0000 (10:32 +0200)]
[flang] use 1-based dim in transformational runtime error msg

Flang transformational runtime was previously reporting conformity
issues in a zero based fashion to describe which dimension is non
conformant. This may confuse Fortran user, especially when the message
is about a dimension other than the first one.

Differential Revision: https://reviews.llvm.org/D124941

2 years ago[clang] Add static_cast to fix Bazel build.
Adrian Kuegel [Thu, 5 May 2022 07:57:45 +0000 (09:57 +0200)]
[clang] Add static_cast to fix Bazel build.

Differential Revision: https://reviews.llvm.org/D124995

2 years ago[mlir][scf][bufferize] Update verifyAnalysis error message
Matthias Springer [Thu, 5 May 2022 07:49:56 +0000 (16:49 +0900)]
[mlir][scf][bufferize] Update verifyAnalysis error message

The previous error message was technically incorrect. We do not compare equivalence of YieldOp operands and ForOp operands.

Differential Revision: https://reviews.llvm.org/D124934

2 years ago[mlir][scf][bufferize][NFC] Split ForOp bufferization into smaller functions
Matthias Springer [Thu, 5 May 2022 07:49:37 +0000 (16:49 +0900)]
[mlir][scf][bufferize][NFC] Split ForOp bufferization into smaller functions

This is in preparation of WhileOp bufferization, which reuses these functions.

Differential Revision: https://reviews.llvm.org/D124933

2 years ago[mlir][scf][bufferize][NFC] Simplify verifyAnalysis implementation
Matthias Springer [Thu, 5 May 2022 07:49:18 +0000 (16:49 +0900)]
[mlir][scf][bufferize][NFC] Simplify verifyAnalysis implementation

Differential Revision: https://reviews.llvm.org/D124928

2 years ago[SCEV] Fold umin_seq to umin using implied poison reasoning
Nikita Popov [Wed, 4 May 2022 10:43:31 +0000 (12:43 +0200)]
[SCEV] Fold umin_seq to umin using implied poison reasoning

Similar to how we convert logical and/or to bitwise and/or, we should
also convert umin_seq to umin based on implied poison reasoning. In
%x umin_seq %y, if %y being poison implies %x being poison, then we
don't need the sequential evaluation: Having %y contribute towards
the result will never make the result more poisonous. An important
corollary of this is that if %y is never poison, we also don't need
the sequential evaluation.

This avoids some of the regressions in D124910.

Differential Revision: https://reviews.llvm.org/D124921

2 years ago[lldb] Fix ppc64 detection in lldb
serge-sans-paille [Mon, 2 May 2022 10:19:48 +0000 (12:19 +0200)]
[lldb] Fix ppc64 detection in lldb

Currently, ppc64le and ppc64 (defaulting to big endian) have the same
descriptor, thus the linear scan always return ppc64le. Handle that through
subtype.

This is a recommit of f114f009486816ed4b3bf984f0fbbb8fc80914f6 with a new test
setup that doesn't involves (unsupported) corefiles.

Differential Revision: https://reviews.llvm.org/D124760

2 years ago[NFC] [Pipelines] Hoist CoroCleanup as Module Pass
Chuanqi Xu [Thu, 5 May 2022 07:15:09 +0000 (15:15 +0800)]
[NFC] [Pipelines] Hoist CoroCleanup as Module Pass

This is similar to previous patch https://reviews.llvm.org/D123925. It
could also reduce the time we call declaresCoroCleanupIntrinsics. And it
is helpful for further changes.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D124362

2 years ago[Pipelines] Hoist CoroCleanup to avoid blocking optimizations
Chuanqi Xu [Thu, 21 Apr 2022 09:35:56 +0000 (17:35 +0800)]
[Pipelines] Hoist CoroCleanup to avoid blocking optimizations

CoroCleanup is designed to lowering all the remaining coroutine
intrinsics. It is required to run after CoroSplit only. However, the
position of CoroCleanup now is far too late. The downside here is that
the unlowered coroutine instrincs might blocking other optimizations
too. So it should be a pure win to hoist the position of CoroCleanup.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D124360

2 years ago[RISCV][Clang] add more tests for clang driver. (NFC)
Zakk Chen [Thu, 5 May 2022 01:26:03 +0000 (18:26 -0700)]
[RISCV][Clang] add more tests for clang driver. (NFC)

Test experimental arch, Zfh, Zfmin and Zve arch.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D124611

2 years ago[InstCombine] Remove side effect of replaced constrained intrinsics
Serge Pavlov [Thu, 5 May 2022 05:02:42 +0000 (12:02 +0700)]
[InstCombine] Remove side effect of replaced constrained intrinsics

If a constrained intrinsic call was replaced by some value, it was not
removed in some cases. The dangling instruction resulted in useless
instructions executed in runtime. It happened because constrained
intrinsics usually have side effect, it is used to model the interaction
with floating-point environment. In some cases it is correct behavior
but often the side effect is actually absent or can be ignored.

This change adds specific treatment of constrained intrinsics so that
their side effect can be removed if it actually absents.

Differential Revision: https://reviews.llvm.org/D118426

2 years ago[AMDGPU] Use d16 flag for image.sample instructions
Mariusz Sikora [Mon, 25 Apr 2022 11:57:27 +0000 (12:57 +0100)]
[AMDGPU] Use d16 flag for image.sample instructions

Image.sample instruction can be forced to return half type instead of
float when d16 flag is enabled.

This patch adds new pattern in InstCombine to detect if output of
image.sample is used later only by fptrunc which converts the type
from float to half. If pattern is detected then fptrunc and image.sample
are combined to single image.sample which is returning half type.
Later in Lowering part d16 flag is added to image sample intrinsic.

Differential Revision: https://reviews.llvm.org/D124232

2 years ago[AIX][PGO] Enable linux style PGO on AIX
Wael Yehia [Tue, 3 May 2022 14:27:15 +0000 (10:27 -0400)]
[AIX][PGO] Enable linux style PGO on AIX

This patch switches the PGO implementation on AIX from using the runtime
registration-based section tracking to the __start_SECNAME/__stop_SECNAME
based. In order to enable the recognition of __start_SECNAME/__stop_SECNAME
symbols in the AIX linker, the -bdbg:namedsects:ss needs to be used.

Reviewed By: jsji, MaskRay, davidxl

Differential Revision: https://reviews.llvm.org/D124857

2 years ago[clang][dataflow] Add flowConditionIsTautology function
Eric Li [Wed, 4 May 2022 17:15:00 +0000 (17:15 +0000)]
[clang][dataflow] Add flowConditionIsTautology function

Provide a way for users to check if a flow condition is
unconditionally true.

Differential Revision: https://reviews.llvm.org/D124943

2 years ago[AVR] Always expand STDSPQRr & STDWSPQRr
Patryk Wychowaniec [Thu, 5 May 2022 03:07:41 +0000 (03:07 +0000)]
[AVR] Always expand STDSPQRr & STDWSPQRr

Currently, STDSPQRr and STDWSPQRr are expanded only during
AVRFrameLowering - this means that if any of those instructions happen
to appear _outside_ of the typical FrameSetup / FrameDestroy
context, they wouldn't get substituted, eventually leading to a crash:

```
LLVM ERROR: Not supported instr: <MCInst XXX <MCOperand Reg:1>
<MCOperand Imm:15> <MCOperand Reg:53>>
```

This commit fixes this issue by moving expansion of those two opcodes
into AVRExpandPseudo.

This bug was originally discovered due to the Rust compiler_builtins
library. Its 0.1.37 release contained a 128-bit software
division/remainder routine that exercised this buggy branch in the code.

Reviewed By: benshi001

Differential Revision: https://reviews.llvm.org/D123528

2 years ago[RISCV][NFC] Use true_mask replace riscv_vmset_vl in defined patterns.
Lian Wang [Fri, 29 Apr 2022 08:37:45 +0000 (08:37 +0000)]
[RISCV][NFC] Use true_mask replace riscv_vmset_vl in defined patterns.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D124660

2 years ago[X86] Add `void` to void function. NFC
Phoebe Wang [Thu, 5 May 2022 02:58:23 +0000 (10:58 +0800)]
[X86] Add `void` to void function. NFC

2 years ago[X86][AMX] Replace PXOR instruction with SET0 in AMX pre config.
Luo, Yuanke [Wed, 4 May 2022 04:39:45 +0000 (12:39 +0800)]
[X86][AMX] Replace PXOR instruction with SET0 in AMX pre config.

To generate zero value, the PXOR instruction need 3 operands that is
tied to the same vreg. If is not good in SSA form and with undef value
two address instruction pass may convert
`%0:vr128 = PXORrr undef %0, undef %0`
to `%1:vr128 = PXORrr undef %1:vr128(tied-def 0), undef %0:vr128`.
It is not expected.
It can be simplified to SET0 instruction which only take 1 destination
operand. It should be more friendly to two address instruction pass and
register allocation pass.
`%0:vr128 = V_SET0`
Also add AVX1 code path so that it is consistant to other code.

Differential Revision: https://reviews.llvm.org/D124903

2 years ago[Disassembler][AVR] Remove unused static functions
Ben Shi [Thu, 5 May 2022 02:18:09 +0000 (02:18 +0000)]
[Disassembler][AVR] Remove unused static functions

The unused static functions cause failures on some build machines.

2 years ago[X86] Call initializeX86PreTileConfigPass from LLVMInitializeX86Target.
Craig Topper [Thu, 5 May 2022 01:51:25 +0000 (18:51 -0700)]
[X86] Call initializeX86PreTileConfigPass from LLVMInitializeX86Target.

Without this, the pass doesn't show up in print-before/after-all.

Differential Revision: https://reviews.llvm.org/D124973

2 years ago[SelectionDAG] Use llvm::any_of to simplify a loop. NFC
Craig Topper [Thu, 5 May 2022 01:29:15 +0000 (18:29 -0700)]
[SelectionDAG] Use llvm::any_of to simplify a loop. NFC