Simon Moll [Mon, 21 Dec 2020 09:59:22 +0000 (10:59 +0100)]
[VP][NFC] ISD::VP_Sub -> ISD::VP_SUB
Jan Svoboda [Fri, 18 Dec 2020 14:24:39 +0000 (15:24 +0100)]
[clang] Use enum for LangOptions::SYCLVersion instead of unsigned
`LangOptions::SYCLVersion` can only have two values. This patch introduces an enum that allows us to reduce the member size from 32 bits to 1 bit.
Consequently, this also makes marshalling of this option fit into our model for enums: D84674.
Reviewed By: bader
Differential Revision: https://reviews.llvm.org/D93540
Jan Svoboda [Fri, 18 Dec 2020 12:55:48 +0000 (13:55 +0100)]
[clang][cli] Let denormalizer decide how to render the option based on the option class
Before this patch, you needed to use `AutoNormalizeEnumJoined` whenever you wanted to **de**normalize joined enum.
Besides the naming confusion, this means the fact the option is joined is specified in two places: in the normalization multiclass and in the `Joined<["-"], ...>` multiclass.
This patch makes this work automatically, taking into account the `OptionClass` of options.
Also, the enum denormalizer now just looks up the spelling of the present enum case in a table and forwards it to the string denormalizer.
I also added more tests that exercise this.
Reviewed By: dexonsmith
Original patch by Daniel Grumberg.
Differential Revision: https://reviews.llvm.org/D84189
Jan Svoboda [Fri, 18 Dec 2020 15:14:18 +0000 (16:14 +0100)]
[clang][cli] Streamline MarshallingInfoFlag description
This replaces the existing `MarshallingInfoFlag<...>, IsNegative` with simpler `MarshallingInfoNegativeFlag`.
Reviewed By: dexonsmith
Original patch by Daniel Grumberg.
Differential Revision: https://reviews.llvm.org/D84675
David Sherwood [Mon, 21 Dec 2020 09:05:01 +0000 (09:05 +0000)]
[NFC][InstructionCost] Remove isValid() asserts in SLPVectorizer.cpp
An earlier patch introduced asserts that the InstructionCost is
valid because at that time the ReuseShuffleCost variable was an
unsigned. However, now that the variable is an InstructionCost
instance the asserts can be removed.
See this thread for context:
http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
See this patch for the introduction of the type:
https://reviews.llvm.org/D91174
George Mitenkov [Mon, 21 Dec 2020 08:19:32 +0000 (11:19 +0300)]
[MLIR][SPIRVToLLVM] Updated documentation on entry points and not supported ops
This patch addresses two issues:
1. Not supported ops are updated to pick up the changes in the
SPIR-V dialect.
2. Conversion on `spv.ExecutionMode` is updated.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D91881
Fangrui Song [Mon, 21 Dec 2020 07:45:48 +0000 (23:45 -0800)]
[AsmPrinter] Replace a reachable report_fatal_error with MCContext::reportError
Fangrui Song [Mon, 21 Dec 2020 07:23:12 +0000 (23:23 -0800)]
MCContext::reportError: don't call report_fatal_error
Errors from MCAssembler, MCObjectStreamer and *ObjectWriter typically cause a crash:
```
% cat c.c
int bar;
extern int foo __attribute__((alias("bar")));
% clang -c -fcommon c.c
fatal error: error in backend: Common symbol 'bar' cannot be used in assignment expr
PLEASE submit a bug report to ...
Stack dump:
...
```
`LLVMTargetMachine::addPassesToEmitFile` constructs `MachineModuleInfoWrapperPass`
which creates a MCContext without SourceMgr. `MCContext::reportError` calls
`report_fatal_error` which gets captured by Clang `LLVMErrorHandler` and gets translated
to the output above.
Since `MCContext::reportError` errors indicate user errors, such a crashing style error
is inappropriate. So this patch changes `report_fatal_error` to `SourceMgr().PrintMessage`.
```
% clang -c -fcommon c.c
<unknown>:0: error: Common symbol 'bar' cannot be used in assignment expr
```
Ideally we should at least recover the original filename (the line information
is generally lost). That requires general improvement to MC diagnostics,
because currently in many cases SMLoc information is lost.
Pushpinder Singh [Thu, 29 Oct 2020 06:34:06 +0000 (02:34 -0400)]
[FastRA] Fix handling of bundled MIs
Fast register allocator skips bundled MIs, as the main assignment
loop uses MachineBasicBlock::iterator (= MachineInstrBundleIterator)
This was causing SIInsertWaitcnts to crash which expects all
instructions to have registers assigned.
This patch makes sure to set everything inside bundle to the same
assignments done on BUNDLE header.
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D90369
Monk Chiang [Mon, 21 Dec 2020 05:51:57 +0000 (21:51 -0800)]
[RISCV] Define the remaining vector fixed-point arithmetic intrinsics.
This patch base on D93366, and define vector fixed-point intrinsics.
1. vaaddu/vaadd/vasubu/vasub
2. vsmul
3. vssrl/vssra
4. vnclipu/vnclip
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: ShihPo Hung <shihpo.hung@sifive.com>
Differential Revision: https://reviews.llvm.org/D93508
Jian Cai [Sun, 20 Dec 2020 22:55:20 +0000 (14:55 -0800)]
[AsmParser] make .ascii support spaces as separators
Currently the integrated assembler only allows commas as the separator
between string arguments in .ascii. This patch adds support to using
space as separators and make IAS consistent with GNU assembler.
Link: https://github.com/ClangBuiltLinux/linux/issues/1196
Reviewed By: nickdesaulniers, jrtc27
Differential Revision: https://reviews.llvm.org/D91460
Esme-Yi [Mon, 21 Dec 2020 06:16:50 +0000 (06:16 +0000)]
[PowerPC][NFC] Added assertion of shift exponent is too large for 'uint64_t'.
Fangrui Song [Mon, 21 Dec 2020 05:26:36 +0000 (21:26 -0800)]
[MC][ELF] Remove unneeded MCSymbol::setExternal calls
ELF code uses symbol bindings and does not call isExternal().
Esme-Yi [Mon, 21 Dec 2020 05:21:07 +0000 (05:21 +0000)]
[PowerPC] Materialize i64 constants by enumerated patterns.
Summary: Some constants can be handled with less instructions than our current results. And it seems our original approach is not very easy to extend. Therefore this patch proposes to materialize all 64-bit constants by enumerated patterns.
I traversed almost all constants to verified the functionality of these pattens. A traversed comparison of the number of instructions used by the original method and the new method has also been completed, where no degradation was caused by this patch. This patch also passed Bootstrap test and SPEC test.
Improvements of this patch are shown in llvm/test/CodeGen/PowerPC/constants-i64.ll
Reviewed By: steven.zhang, stefanp
Differential Revision: https://reviews.llvm.org/D92089
Fangrui Song [Mon, 21 Dec 2020 05:18:22 +0000 (21:18 -0800)]
[MC][ELF] Drop MCSymbol::isExternal call sites
ELF uses symbol bindings and MCSymbol::isExternal is not really useful.
The function is no longer used in ELF code now.
Fangrui Song [Mon, 21 Dec 2020 05:04:12 +0000 (21:04 -0800)]
[MC] Report locations for .symver errors
Fangrui Song [Mon, 21 Dec 2020 04:06:02 +0000 (20:06 -0800)]
[llvm-reduce][test] Make remove-alias.ll CHECK patterns more specific after D90302
`CHECK-FINAL-NOT: global` can match the input filename (e.g. clang-cmake-aarch64-global-isel)
and fail spuriously.
Fangrui Song [Mon, 21 Dec 2020 04:01:20 +0000 (20:01 -0800)]
[lld-macho] Fix memcpy ub after D93267
Fangrui Song [Mon, 21 Dec 2020 02:37:14 +0000 (18:37 -0800)]
[MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets
This relands D64327 with a more specific workaround for R_386_GOTOFF
(gold<2.34 bug https://sourceware.org/bugzilla/show_bug.cgi?id=16794)
.debug_info has quite a few .debug_str relocations (R_386_32/R_ARM_ABS32).
The original workaround was too general and introduced too many .L symbols
used just as relocation targets.
From the original review:
... it reduced the size of a big ARM-32 debug image by 33%. It contained ~68M
of relocations symbols out of total ~71M symbols (96% of symbols table was
generated for relocations with symbol).
Ben Shi [Mon, 21 Dec 2020 02:20:36 +0000 (10:20 +0800)]
[RISCV][NFC] Add tests for multiplication with constant
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D93589
Kazu Hirata [Mon, 21 Dec 2020 01:43:22 +0000 (17:43 -0800)]
[Target] Use llvm::erase_if (NFC)
Arthur Eubanks [Mon, 21 Dec 2020 01:13:15 +0000 (17:13 -0800)]
[test] Fix new-pass-manager-opt-bisect.c
Requires x86 target to be registered.
Chen Zheng [Thu, 5 Nov 2020 14:32:25 +0000 (09:32 -0500)]
[PowerPC] add has side effect for SAT bit clobber intrinsics/instructions
This patch does two things:
1: fix the typo that intrinsic mfvscr should be with no readmem property
2: since VSCR is not modeled yet, add has side effect for SAT bit clobber
intrinsics/instructions.
Reviewed By: steven.zhang
Differential Revision: https://reviews.llvm.org/D90807
Chen Zheng [Thu, 3 Dec 2020 09:53:23 +0000 (04:53 -0500)]
[MachineLICM] delete dead flag if the duplicated def outside of loop is dead.
Fixup dead flags for CSE-ed instructions.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D92557
Arthur Eubanks [Sun, 20 Dec 2020 23:39:59 +0000 (15:39 -0800)]
[test] Fix reg-usage.ll under NPM
The -O2 isn't used in the test.
Shilei Tian [Sun, 20 Dec 2020 23:39:19 +0000 (18:39 -0500)]
[OpenMP] Fixed the issue that CMake variables for OpenMP were not passed through when building OpenMP with LLVM_ENABLE_RUNTIMES
Currently when building OpenMP along with LLVM, CMake variables for OpenMP (prefix with `LIBOMP` and `LIBOMPTARGET`) will not be passed through because by default it uses the prefix of the runtime name, aka `OPENMP` in this case. This patch fixed this issue.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D93603
Fangrui Song [Sun, 20 Dec 2020 22:17:00 +0000 (14:17 -0800)]
[MC] Reject byte alignment if larger than or equal to 2**32
This is consistent with the resolution to power-of-2 alignments.
Otherwise, emitCodeAlignment and emitValueToAlignment cannot handle alignments
larger than 2**32 and will trigger assertion failure (PR35218).
Note: GNU as as of 2.35 will use 1 for such a large byte `.align`
Samuel Eubanks [Sun, 20 Dec 2020 21:47:46 +0000 (13:47 -0800)]
Make NPM OptBisectInstrumentation use global singleton OptBisect
Currently there is an issue where the legacy pass manager uses a different OptBisect counter than the new pass manager.
This fix makes the npm OptBisectInstrumentation use the global OptBisect.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D92897
David Green [Sun, 20 Dec 2020 21:20:39 +0000 (21:20 +0000)]
[ARM] Extra vecreduce tests with smaller than legal types. NFC
Nikita Popov [Sun, 20 Dec 2020 20:56:23 +0000 (21:56 +0100)]
[BasicAA] Add test for byval argument (NFC)
Jez Ng [Fri, 18 Dec 2020 22:58:07 +0000 (17:58 -0500)]
[lld-macho] Have order files support filtering by archive member paths
Also remove iteration over ArchiveFile symbols in buildInputSectionPriorities --
that was rendered unnecessary after D92539, which included ObjFiles from
ArchiveFiles inside the `inputFiles` vector.
Reviewed By: #lld-macho, smeenai
Differential Revision: https://reviews.llvm.org/D93569
Jez Ng [Fri, 18 Dec 2020 17:47:15 +0000 (12:47 -0500)]
[lld-macho] Support Obj-C symbols in order files
Obj-C symbols may have spaces and colons, which our previous order file
parser would be confused by. The order file format has made the very unfortunate
choice of using colons for its delimiters, which means that we have to use
heuristics to determine if a given colon is part of a symbol or not...
Reviewed By: #lld-macho, thakis
Differential Revision: https://reviews.llvm.org/D93567
Jez Ng [Fri, 18 Dec 2020 16:19:21 +0000 (11:19 -0500)]
[lld-macho][nfc] Use split-file in order file test
Makes it much easier to edit / maintain.
Reviewed By: #lld-macho, smeenai
Differential Revision: https://reviews.llvm.org/D93566
Fangrui Song [Sun, 20 Dec 2020 18:39:59 +0000 (10:39 -0800)]
[Object] Fix LFFile<ELFT>::getEntry on sizeof(size_t)==4 platforms
This should fix:
Failed Tests (2):
LLVM-Unit :: Object/./ObjectTests/ELFObjectFileTest.InvalidSymbolTest
LLVM :: tools/llvm-readobj/ELF/relocation-errors.test
Kazu Hirata [Sun, 20 Dec 2020 17:57:04 +0000 (09:57 -0800)]
[PGO] Remove dead member variable InstrumentFuncEntry (NFC)
This patch removes InstrumentFuncEntry as it is dead.
The constructor of FuncPGOInstrumentation passes InstrumentFuncEntry
to MST, but it doesn't make a local copy as a member variable.
Kazu Hirata [Sun, 20 Dec 2020 17:19:35 +0000 (09:19 -0800)]
[Analysis, IR, CodeGen] Use llvm::erase_if (NFC)
Nikita Popov [Sun, 20 Dec 2020 16:52:31 +0000 (17:52 +0100)]
[MemLoc] Fix debug print for LocationSize
ShihPo Hung [Sun, 20 Dec 2020 12:56:07 +0000 (04:56 -0800)]
[RISCV] Define vslideup/vslidedown intrinsics
Differential Revision: https://reviews.llvm.org/D93286
Simon Pilgrim [Sun, 20 Dec 2020 11:21:08 +0000 (11:21 +0000)]
Fix MSVC "not all control paths return a value" warnings. NFCI.
Add missing llvm_unreachable()'s after each all-enums switch statement.
Chris Warner [Sun, 20 Dec 2020 11:11:27 +0000 (11:11 +0000)]
[clang-tidy] cppcoreguidelines-pro-type-member-init: suppress warning for default member funcs
Modify the cppcoreguidelines-pro-type-member-init checker to ignore warnings from the move and copy-constructors when they are compiler defined with `= default` outside of the type declaration.
Reported as [LLVM bug 36819](https://bugs.llvm.org/show_bug.cgi?id=36819)
Reviewed By: malcolm.parsons
Differential Revision: https://reviews.llvm.org/D93333
Michał Górny [Sun, 20 Dec 2020 10:32:19 +0000 (11:32 +0100)]
[lldb] [test] Update test status for NetBSD
Hsiangkai Wang [Sat, 19 Dec 2020 15:34:07 +0000 (23:34 +0800)]
[RISCV] Define vector vfwmul intrinsics.
Define vector vfwmul intrinsics and lower them to V instructions.
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Differential Revision: https://reviews.llvm.org/D93584
Hsiangkai Wang [Sat, 19 Dec 2020 15:12:18 +0000 (23:12 +0800)]
[RISCV] Define vector vfwadd/vfwsub intrinsics.
Define vector vfwadd/vfwsub intrinsics and lower them to V
instructions.
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Differential Revision: https://reviews.llvm.org/D93583
Hsiangkai Wang [Sat, 19 Dec 2020 14:01:41 +0000 (22:01 +0800)]
[RISCV] Define vector vfsgnj/vfsgnjn/vfsgnjx intrinsics.
Define vector vfsgnj/vfsgnjn/vfsgnjx intrinsics and lower them to V
instructions.
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Differential Revision: https://reviews.llvm.org/D93581
Hsiangkai Wang [Sat, 19 Dec 2020 13:46:29 +0000 (21:46 +0800)]
[RISCV] Define vector vfmul/vfdiv/vfrdiv intrinsics.
Define vector vfmul/vfdiv/vfrdiv intrinsics and lower them to V instructions.
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>
Differential Revision: https://reviews.llvm.org/D93580
Pavel Labath [Fri, 18 Dec 2020 20:52:56 +0000 (21:52 +0100)]
[lldb/test] Enable reverse-connect on windows too
It works, and it should be more stable than forward connections.
Gnimuc [Sun, 20 Dec 2020 05:01:04 +0000 (05:01 +0000)]
[mlir][CAPI] Add the missing <stdbool.h> in Support.h
This was likely an oversight in https://reviews.llvm.org/D92292
Reviewed By: stellaraccident
Differential Revision: https://reviews.llvm.org/D93588
Reid Kleckner [Sun, 20 Dec 2020 01:45:49 +0000 (17:45 -0800)]
Fix left shift overflow UB in PPC backend on LLP64 platforms
Andrew Litteken [Thu, 27 Aug 2020 20:16:37 +0000 (15:16 -0500)]
[IROutliner] Deduplicating functions that only require inputs.
Extracted regions can have both inputs and outputs. In addition, the
CodeExtractor removes inputs that are only used in llvm.assumes, and
sunken allocas (values are used entirely in the extracted region as
denoted by lifetime intrinsics). We also cannot combine sections that
have different constants in the same structural location, and these
constants will have to elevated to argument. This patch deduplicates
extracted functions that only have inputs and non of the special cases.
We test that correctly deduplicate in:
test/Transforms/IROutliner/outlining-same-globals.ll
test/Transforms/IROutliner/outlining-same-constants.ll
test/Transforms/IROutliner/outlining-different-structure.ll
Reviewers: jroelofs, paquette
Differential Revision: https://reviews.llvm.org/D86978
Andrew Litteken [Sat, 19 Dec 2020 23:33:49 +0000 (17:33 -0600)]
Revert "[IROutliner] Deduplicating functions that only require inputs."
Missing reviewers and differential revision in commit message.
This reverts commit
5cdc4f57e50bbe0d211c109517c17defe78e0b73.
Andrew Litteken [Thu, 27 Aug 2020 20:16:37 +0000 (15:16 -0500)]
[IROutliner] Deduplicating functions that only require inputs.
Extracted regions can have both inputs and outputs. In addition, the
CodeExtractor removes inputs that are only used in llvm.assumes, and
sunken allocas (values are used entirely in the extracted region as
denoted by lifetime intrinsics). We also cannot combine sections that
have different constants in the same structural location, and these
constants will have to elevated to argument. This patch deduplicates
extracted functions that only have inputs and non of the special cases.
We test that correctly deduplicate in:
test/Transforms/IROutliner/outlining-same-globals.ll
test/Transforms/IROutliner/outlining-same-constants.ll
test/Transforms/IROutliner/outlining-different-structure.ll
Craig Topper [Sat, 19 Dec 2020 22:25:16 +0000 (14:25 -0800)]
[TableGen][ARM][X86] Detect combining IntrReadMem and IntrWriteMem.
These properties aren't additive. They are closer to ReadOnly and
WriteOnly. The default is ReadWrite. ReadMem cancels the write property and
WriteMem cancels the read property. Combining them leaves neither.
This patch checks that when we process WriteMem, the Mod flag is
still set. And for ReadMem we check that the Ref flag set still set.
I've updated 2 target intrinsics that were combining these properties.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D93571
Greg McGary [Mon, 7 Dec 2020 06:33:38 +0000 (22:33 -0800)]
Handle overflow beyond the 127 common encodings limit
The common encodings table holds only 127 entries. The encodings index for compact entries is 8 bits wide, and indexes 127..255 are stored locally to each second-level page. Prior to this diff, lld would `fatal()` if encodings overflowed the 127 limit.
This diff populates a per-second-level-page encodings table as needed. When the per-page encodings table hits its limit, we must terminate the page. If such early termination would consume fewer entries than a regular (non-compact) encoding page, then we prefer the regular format.
Caveat: one reason the common-encoding table might overflow is because of DWARF debug-info references, which are not yet implemented and will come with a later diff.
Differential Revision: https://reviews.llvm.org/D93267
Roman Lebedev [Sat, 19 Dec 2020 19:23:35 +0000 (22:23 +0300)]
[SimplifyCFG] Teach FoldBranchToCommonDest() to preserve DomTree, part 1
... for conditional branch case
Roman Lebedev [Sat, 19 Dec 2020 17:51:48 +0000 (20:51 +0300)]
[SimplifyCFG] Teach TryToMergeLandingPad() to preserve DomTree
Roman Lebedev [Sat, 19 Dec 2020 17:07:26 +0000 (20:07 +0300)]
[SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to preserve DomTree, part 2
... for the custom case returning void.
Roman Lebedev [Sat, 19 Dec 2020 16:12:30 +0000 (19:12 +0300)]
[SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to preserve DomTree, part 1
... for the general case of returning a value.
Roman Lebedev [Sat, 19 Dec 2020 16:10:27 +0000 (19:10 +0300)]
[NFCI][SimplifyCFG] SimplifyCondBranchToTwoReturns(): pull out BI->getParent() into a variable
Roman Lebedev [Sat, 19 Dec 2020 15:09:10 +0000 (18:09 +0300)]
[SimplifyCFG] simplifySingleResume(): FoldReturnIntoUncondBranch() already knows how to preserve DomTree
... so just ensure that we pass DomTreeUpdater it into it.
Apparently, there were no dedicated tests just for that functionality,
so i'm adding one here.
Roman Lebedev [Sat, 19 Dec 2020 13:52:54 +0000 (16:52 +0300)]
[SimplifyCFG] Teach simplifySingleResume() to preserve DomTree
Roman Lebedev [Sat, 19 Dec 2020 13:18:04 +0000 (16:18 +0300)]
[SimplifyCFG] Teach simplifyCommonResume() to preserve DomTree
Roman Lebedev [Sat, 19 Dec 2020 12:38:30 +0000 (15:38 +0300)]
[SimplifyCFG] Teach removeEmptyCleanup() to preserve DomTree
Roman Lebedev [Sat, 19 Dec 2020 09:48:32 +0000 (12:48 +0300)]
[SimplifyCFG] Teach FoldTwoEntryPHINode() to preserve DomTree
Still boring, simply drop all edges to successors of DomBlock,
and add an edge to to BB instead.
Roman Lebedev [Sat, 19 Dec 2020 08:47:56 +0000 (11:47 +0300)]
[NFCI][SimlifyCFG] simplifyOnce(): also perform DomTree validation
And that exposes that a number of tests don't *actually* manage to
maintain DomTree validity, which is inline with my observations.
Once again, SimlifyCFG pass currently does not require/preserve DomTree
by default, so this is effectively NFC.
Andrew Litteken [Thu, 3 Sep 2020 17:20:47 +0000 (12:20 -0500)]
[IRSim][IROutliner] Limit to extracting regions that only require
inputs.
Extracted regions can have both inputs and outputs. In addition, the
CodeExtractor removes inputs that are only used in llvm.assumes, and
sunken allocas (values are used entirely in the extracted region as
denoted by lifetime intrinsics). We also cannot combine sections that
have different constants in the same structural location, and these
constants will have to elevated to argument. This patch limits the
extracted regions to those that only require inputs, and do not have any
other special cases.
We test that we do not outline the wrong constants in:
test/Transforms/IROutliner/outliner-different-constants.ll
test/Transforms/IROutliner/outliner-different-globals.ll
test/Transforms/IROutliner/outliner-constant-vs-registers.ll
We test that correctly outline in:
test/Transforms/IROutliner/outlining-same-globals.ll
test/Transforms/IROutliner/outlining-same-constants.ll
test/Transforms/IROutliner/outlining-different-structure.ll
Reviewers: paquette, plofti
Differential Revision: https://reviews.llvm.org/D86977
Craig Topper [Fri, 18 Dec 2020 08:54:45 +0000 (00:54 -0800)]
[X86] Teach assembler to accept vmsave/vmload/vmrun/invlpga/skinit with or without the fixed register operands
These instructions read their inputs from fixed registers rather
than using a modrm byte. We shouldn't require the user to list them
when parsing assembly. This matches the GNU assembler.
This patch adds InstAliases so we can accept either form. It also
changes the printing code to use the form without registers. This
will change the behavior of llvm-objdump, but should be consistent
with binutils objdump. This also matches what we already do in LLVM for
clzero and monitorx which also used fixed registers.
I need to add and improve tests before this can be commited. The
disassembler tests exist, but weren't checking the fixed register
so they pass before and after this change.
Fixes https://github.com/ClangBuiltLinux/linux/issues/1216
Differential Revision: https://reviews.llvm.org/D93524
Kazu Hirata [Sat, 19 Dec 2020 18:57:35 +0000 (10:57 -0800)]
[Analysis] Remove dead function getInstTypePair (NFC)
The last use of getInstTypePair with two parameters was removed on on
Jan 9, 2015 in commit
33d7f9de332701294f6528ae7151bc40ba008737. It
seems to be unused since then.
Kazu Hirata [Sat, 19 Dec 2020 18:43:18 +0000 (10:43 -0800)]
[Target, Transforms] Use contains (NFC)
Juneyoung Lee [Sat, 19 Dec 2020 16:03:19 +0000 (01:03 +0900)]
apply update_test_checks.py to a few files in llvm/test/Transforms/InstCombine
Mark de Wever [Sat, 19 Dec 2020 15:16:54 +0000 (16:16 +0100)]
[NFC][libc++] Fixes swapped comments.
Zakk Chen [Thu, 17 Dec 2020 17:30:03 +0000 (09:30 -0800)]
[RISCV] Define vlxe/vsxe/vsuxe intrinsics.
Define vlxe/vsxe intrinsics and lower to vlxei<EEW>/vsxei<EEW>
instructions.
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen@sifive.com>
Differential Revision: https://reviews.llvm.org/D93471
Kristof Beyls [Sun, 13 Dec 2020 18:56:48 +0000 (18:56 +0000)]
[ARM] Add clang command line support for -mharden-sls=
The command line syntax is identical to the -mharden-sls= command line
syntax for AArch64 targets.
Differential Revision: https://reviews.llvm.org/D93221
Kristof Beyls [Thu, 26 Nov 2020 13:45:37 +0000 (13:45 +0000)]
[ARM] harden-sls-blr: avoid r12 and lr in indirect calls.
As a linker is allowed to clobber r12 on function calls, the code
transformation that hardens indirect calls is not correct in case a
linker does so. Similarly, the transformation is not correct when
register lr is used.
This patch makes sure that r12 or lr are not used for indirect calls
when harden-sls-blr is enabled.
Differential Revision: https://reviews.llvm.org/D92469
Kristof Beyls [Fri, 20 Nov 2020 16:11:17 +0000 (16:11 +0000)]
[ARM] Harden indirect calls against SLS
To make sure that no barrier gets placed on the architectural execution
path, each indirect call calling the function in register rN, it gets
transformed to a direct call to __llvm_slsblr_thunk_mode_rN. mode is
either arm or thumb, depending on the mode of where the indirect call
happens.
The llvm_slsblr_thunk_mode_rN thunk contains:
bx rN
<speculation barrier>
Therefore, the indirect call gets split into 2; one direct call and one
indirect jump.
This transformation results in not inserting a speculation barrier on
the architectural execution path.
The mitigation is off by default and can be enabled by the
harden-sls-blr subtarget feature.
As a linker is allowed to clobber r12 on function calls, the
above code transformation is not correct in case a linker does so.
Similarly, the transformation is not correct when register lr is used.
Avoiding r12/lr being used is done in a follow-on patch to make
reviewing this code easier.
Differential Revision: https://reviews.llvm.org/D92468
Kristof Beyls [Thu, 19 Nov 2020 13:58:26 +0000 (13:58 +0000)]
[ARM] Implement harden-sls-retbr for Thumb mode
The only non-trivial consideration in this patch is that the formation
of TBB/TBH instructions, which is done in the constant island pass, does
not understand the speculation barriers inserted by the SLSHardening
pass. As such, when harden-sls-retbr is enabled for a function, the
formation of TBB/TBH instructions in the constant island pass is
disabled.
Differential Revision: https://reviews.llvm.org/D92396
LLVM GN Syncbot [Sat, 19 Dec 2020 12:25:56 +0000 (12:25 +0000)]
[gn build] Port
195f44278c4
Kristof Beyls [Wed, 28 Oct 2020 21:04:11 +0000 (21:04 +0000)]
[ARM] Implement harden-sls-retbr for ARM mode
Some processors may speculatively execute the instructions immediately
following indirect control flow, such as returns, indirect jumps and
indirect function calls.
To avoid a potential miss-speculatively executed gadget after these
instructions leaking secrets through side channels, this pass places a
speculation barrier immediately after every indirect control flow where
control flow doesn't return to the next instruction, such as returns and
indirect jumps, but not indirect function calls.
Hardening of indirect function calls will be done in a later,
independent patch.
This patch is implementing the same functionality as the AArch64 counter
part implemented in https://reviews.llvm.org/D81400.
For AArch64, returns and indirect jumps only occur on RET and BR
instructions and hence the function attribute to control the hardening
is called "harden-sls-retbr" there. On AArch32, there is a much wider
variety of instructions that can trigger an indirect unconditional
control flow change. I've decided to stick with the name
"harden-sls-retbr" as introduced for the corresponding AArch64
mitigation.
This patch implements this for ARM mode. A future patch will extend this
to also support Thumb mode.
The inserted barriers are never on the correct, architectural execution
path, and therefore performance overhead of this is expected to be low.
To ensure these barriers are never on an architecturally executed path,
when the harden-sls-retbr function attribute is present, indirect
control flow is never conditionalized/predicated.
On targets that implement that Armv8.0-SB Speculation Barrier extension,
a single SB instruction is emitted that acts as a speculation barrier.
On other targets, a DSB SYS followed by a ISB is emitted to act as a
speculation barrier.
These speculation barriers are implemented as pseudo instructions to
avoid later passes to analyze them and potentially remove them.
The mitigation is off by default and can be enabled by the
harden-sls-retbr subtarget feature.
Differential Revision: https://reviews.llvm.org/D92395
Kazu Hirata [Sat, 19 Dec 2020 03:08:17 +0000 (19:08 -0800)]
[Analysis, CodeGen, IR] Use contains (NFC)
Jonas Devlieghere [Sat, 19 Dec 2020 02:40:12 +0000 (18:40 -0800)]
[lldb] Simplify the is_finalized logic in process and make it thread safe.
This is a speculative fix when looking at the finalization code in
Process. It tackles the following issues:
- Adds synchronization to prevent races between threads.
- Marks the process as finalized/invalid as soon as Finalize is called
rather than at the end.
- Simplifies the code by using only a single instance variable to track
finalization.
Differential revision: https://reviews.llvm.org/D93479
Tim Keith [Sat, 19 Dec 2020 01:43:51 +0000 (17:43 -0800)]
[flang] Fix bug in IMPLICIT NONE(EXTERNAL)
We were only checking the restrictions of IMPLICIT NONE(EXTERNAL) when a
procedure name is first encountered. But it can also happen with an
existing symbol, e.g. if an external function's return type is declared
before is it called. This change adds a check in that branch too.
Differential Revision: https://reviews.llvm.org/D93552
Jacques Pienaar [Sat, 19 Dec 2020 01:26:15 +0000 (17:26 -0800)]
[FileCheck] Add a literal check directive modifier
Introduce CHECK modifiers that change the behavior of the CHECK
directive. Also add a LITERAL modifier for cases where matching could
end requiring escaping strings interpreted as regex where only
literal/fixed string matching is desired (making the CHECK's more
difficult to write/fragile and difficult to interpret).
Sam McCall [Sat, 19 Dec 2020 01:23:39 +0000 (02:23 +0100)]
[clangd] Fix windows path handling in .clang-tidy parsing
Aditya Kumar [Fri, 18 Dec 2020 16:57:38 +0000 (08:57 -0800)]
[HotColdSplit] Reflect full cost of parameters in split penalty
Make the penalty for splitting a region more accurately reflect the cost
of materializing all of the inputs/outputs to/from the region.
This almost entirely eliminates code growth within functions which
undergo splitting in key internal frameworks, and reduces the size of
those frameworks between 2.6% to 3%.
rdar://
49167240
Patch by: Vedant Kumar(@vsk)
Reviewers: hiraditya,rjf,t.p.northover
Reviewed By: hiraditya,rjf
Differential Revision: https://reviews.llvm.org/D59715
Sam McCall [Sat, 19 Dec 2020 00:55:26 +0000 (01:55 +0100)]
[clangd] Don't cancel requests based on "updates" with same content
There's an unfortunate collision between two features:
- we implicitly cancel certain requests when the file changes, to avoid
the queue getting clogged building old revisions to service stale requests
- we "reparse-if-needed" by synthesizing a file change, e.g. on didSave
We could explicitly mark these synthetic requests to avoid this, but
looking for changes in file content clutters our APIs less and is
arguably the correct thing to do in any case.
Fixes https://github.com/clangd/clangd/issues/620
Akira Hatanaka [Sat, 19 Dec 2020 00:59:06 +0000 (16:59 -0800)]
[ObjC][ARC] Fix a bug where the inline-asm retain/claim RV marker wasn't
inserted when the original call had a 'returned' argument
The code is testing whether the instruction BBI points to is the call
that is paired up with the retainRV/claimRV call, but it doesn't work
when the call has a 'returned' argument since GetArgRCIdentityRoot looks
through 'returned' arguments.
rdar://
72485383
Kazushi (Jam) Marukawa [Fri, 18 Dec 2020 16:01:24 +0000 (01:01 +0900)]
[VE] Support copy of vector mask registers
Support VM and VMP registers in copyPhysReg() function. Also add
regression tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D93547
Sam McCall [Fri, 18 Dec 2020 17:39:20 +0000 (18:39 +0100)]
[clangd] Make our printing policies for Hover more consistent, especially tags
Different cases were using a bunch of different variants of the printing policy.
Each of these had something going for it, but the result was inconsistent.
Goals:
- single printing policy used (almost) everywhere
- avoid unidiomatic tags like `class vector<class X>`
- be informative and easy to understand
For tags, the solution I wound up with is: we print only the outer tag and only
in the simplest cases where this elaboration won't cause confusion.
For example:
- class X
- enum Foo
- vector<int>
- X*
This seems to strike a nice balance of providing plenty of info/context in common
cases while never being confusing.
Differential Revision: https://reviews.llvm.org/D93553
Harald van Dijk [Fri, 18 Dec 2020 23:38:38 +0000 (23:38 +0000)]
[X86] Avoid generating invalid R_X86_64_GOTPCRELX relocations
We need to make sure not to emit R_X86_64_GOTPCRELX relocations for
instructions that use a REX prefix. If a REX prefix is present, we need to
instead use a R_X86_64_REX_GOTPCRELX relocation. The existing logic for
CALL64m, JMP64m, etc. already handles this by checking the HasREX parameter
and using it to determine which relocation type to use. Do this for all
instructions that can use relaxed relocations.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D93561
Richard Smith [Fri, 18 Dec 2020 22:13:45 +0000 (14:13 -0800)]
[www] Remove '$Date$' marker from cxx_dr_status.
This doesn't actually work (any more?), and instead renders as a literal
$Date$ on the website.
Fraser Cormack [Fri, 18 Dec 2020 21:49:14 +0000 (21:49 +0000)]
[RISCV] Address clang-tidy warnings in RISCVTargetMachine. NFC.
Sanjay Patel [Fri, 18 Dec 2020 21:44:04 +0000 (16:44 -0500)]
[SLP] fix typo; NFC
Richard Smith [Fri, 18 Dec 2020 21:25:18 +0000 (13:25 -0800)]
Fix memory leak complicated non-type template arguments.
Richard Smith [Fri, 18 Dec 2020 21:18:47 +0000 (13:18 -0800)]
[c++2b] Add tests for feature test macros.
Richard Smith [Fri, 18 Dec 2020 21:11:01 +0000 (13:11 -0800)]
Add tests for the absence of feature test macros for features we don't
support yet.
Richard Smith [Fri, 18 Dec 2020 21:10:05 +0000 (13:10 -0800)]
[c++20] Mark class type NTTPs as done and start defining the feature test macro.
Fraser Cormack [Fri, 18 Dec 2020 12:51:48 +0000 (12:51 +0000)]
[RISCV] Assume no-op addrspacecasts by default
To support OpenCL, which typically uses SPIR as an IR, non-zero address
spaces must be accounted for. This patch makes the RISC-V target assume
no-op address space casts across the board, which effectively removes
the need to support addrspacecast instructions in the backend.
For a RISC-V implementation with different configurations or specialized
address spaces where casts aren't no-ops, the function can be adjusted
as required.
Reviewed By: jrtc27
Differential Revision: https://reviews.llvm.org/D93536
Chih-Ping Chen [Fri, 18 Dec 2020 21:01:37 +0000 (16:01 -0500)]
Rename files with same (case insensitive) name
Patch by: Aditya Kumar.
Differential Revision: https://reviews.llvm.org/D93559
Craig Topper [Fri, 18 Dec 2020 20:08:27 +0000 (12:08 -0800)]
[RISCV] Add intrinsics for vsetvli instruction
This patch adds two IR intrinsics for vsetvli instruction. One to set the vector length to a user specified value and one to set it to vlmax. The vlmax uses the X0 source register encoding.
Clang builtins will follow in a separate patch
Differential Revision: https://reviews.llvm.org/D92973
Fangrui Song [Fri, 18 Dec 2020 20:08:16 +0000 (12:08 -0800)]
[TableGen] Fix D90844 introduced non-determinism due to iteration over a std::map over allocated object pointers
993eaf2d69d8beb97e4695cbd919b927ed1cfe86 (D90844) is still wrong.
The allocated const Record* pointers do not have an order guarantee
so switching from DenseMap to std::map does not help.
ProcModelMapTy = std::map<const Record*, unsigned>
Sort the values instead.
Nikita Popov [Fri, 18 Dec 2020 19:49:56 +0000 (20:49 +0100)]
[InstCombine] Regenerate test checks (NFC)