Alexey Bataev [Tue, 16 Oct 2018 00:09:06 +0000 (00:09 +0000)]
[OPENMP][NVPTX]Increment iterator only when it is used, NFC.
llvm-svn: 344574
Craig Topper [Mon, 15 Oct 2018 23:34:58 +0000 (23:34 +0000)]
[X86] Remove some isel patterns that shouldn't be possible.
These included a bitcast of a load from v4f32 to v2f64, but DAG combine should have already changed the type of the load to remove the cast.
llvm-svn: 344573
Lang Hames [Mon, 15 Oct 2018 22:56:10 +0000 (22:56 +0000)]
[ORC] Rename ORC layers to make the "new" ORC layers the default.
This commit adds a 'Legacy' prefix to old ORC layers and utilities, and removes
the '2' suffix from the new ORC layers. If you wish to continue using the old
ORC layers you will need to add a 'Legacy' prefix to your classes. If you were
already using the new ORC layers you will need to drop the '2' suffix.
The legacy layers will remain in-tree until the new layers reach feature
parity with them. This will involve adding support for removing code from the
new layers, and ensuring that performance is comperable.
llvm-svn: 344572
Simon Atanasyan [Mon, 15 Oct 2018 22:43:23 +0000 (22:43 +0000)]
[mips] Fix handling of GNUABIN32 environment in a target triple
The `GNUABIN32` environment in a target triple implies using the N32
ABI. This patch adds support for this environment and switches on N32
ABI if necessary.
Patch by Patch by YunQiang Su.
Differential revision: https://reviews.llvm.org/D51464
llvm-svn: 344570
Nicolai Haehnle [Mon, 15 Oct 2018 22:37:46 +0000 (22:37 +0000)]
StructurizeCFG,AMDGPU: Test case of a redundant phi and codegen consequences
Change-Id: I9681f9e41ca30f82576f3d1f965c3a550a34b171
llvm-svn: 344569
Chris Bieneman [Mon, 15 Oct 2018 22:36:59 +0000 (22:36 +0000)]
[CMake] Fix a missing LLVM_ENABLE_IDE from r344555
This is just one place I missed swapping CMAKE_CONFIGURATION_TYPES with LLVM_ENABLE_IDE.
llvm-svn: 344568
Lang Hames [Mon, 15 Oct 2018 22:36:22 +0000 (22:36 +0000)]
[ORC] Rename MultiThreadedSimpleCompiler to ConcurrentIRCompiler.
The new name is a better fit: This class does not actually spawn any new
threads for compilation, it is just safe to call from multiple threads
concurrently.
The "Simple" part of the name did not convey much either, so it was
dropped.
llvm-svn: 344567
Lang Hames [Mon, 15 Oct 2018 22:27:03 +0000 (22:27 +0000)]
Change a TerminatorInst* to an Instruction* in HotColdSplitting.cpp.
r344558 added an assignment to a TerminatorInst* from
BasicBlock::getTerminatorInst(), but BasicBlock::getTerminatorInst() returns an
Instruction* rather than a TerminatorInst* since r344504 so this fails to
compile.
Changing the variable to an Instruction* should get the bots building again.
llvm-svn: 344566
Lang Hames [Mon, 15 Oct 2018 22:27:02 +0000 (22:27 +0000)]
[ORC] Switch to DenseMap/DenseSet for ORC symbol map/set types.
llvm-svn: 344565
Erik Pilkington [Mon, 15 Oct 2018 22:03:53 +0000 (22:03 +0000)]
NFC: Fix a -Wsign-conversion warning
llvm-svn: 344564
Craig Topper [Mon, 15 Oct 2018 21:51:32 +0000 (21:51 +0000)]
[X86] Fix a bad bitcast in the load form of vXi16 uniform shift patterns for EVEX encoded instructions.
llvm-svn: 344563
Craig Topper [Mon, 15 Oct 2018 21:51:29 +0000 (21:51 +0000)]
[X86] Add test cases showing failure to fold load into vpsrlw when EVEX encoded instructions are used.
There's a bad bitcast being used in the isel patterns for the vXi16 shift instructions.
llvm-svn: 344562
Craig Topper [Mon, 15 Oct 2018 21:51:26 +0000 (21:51 +0000)]
[X86] Disable the peephole pass on avx2-intrinsics-x86.ll and avx512bw-intrinsics.ll to ensure any load folding tests are testing isel not load folding tables.
llvm-svn: 344561
Craig Topper [Mon, 15 Oct 2018 21:51:22 +0000 (21:51 +0000)]
[X86] Regenerate avx2-intrinsics-x86.ll to compress the 32 vs 64 bit mode checks.
llvm-svn: 344560
Sanjay Patel [Mon, 15 Oct 2018 21:43:53 +0000 (21:43 +0000)]
[InstCombine] add tests for bitwise logic --> select; NFC
llvm-svn: 344559
Sebastian Pop [Mon, 15 Oct 2018 21:43:11 +0000 (21:43 +0000)]
[hot-cold-split] fix static analysis of cold regions
Make the code of blockEndsInUnreachable to match the function
blockEndsInUnreachable in CodeGen/BranchFolding.cpp. I also have
added a note to make sure the code of this function will not be
modified unless the back-end version is also modified.
An early return before outlining has been added to avoid
outlining the full function body when the first block in the
function is marked cold.
The static analysis of cold code has been amended to avoid
marking the whole function as cold by back-propagation
because the back-propagation would mark blocks with return
statements as cold.
The patch adds debug statements to help discover these problems.
Differential Revision: https://reviews.llvm.org/D52904
llvm-svn: 344558
Adrian Prantl [Mon, 15 Oct 2018 21:35:45 +0000 (21:35 +0000)]
Convert code to use early exits in prepraration for future changes. (NFC)
llvm-svn: 344557
Petr Hosek [Mon, 15 Oct 2018 21:30:32 +0000 (21:30 +0000)]
[Driver] Support direct split DWARF emission for Fuchsia
This enables the driver support for direct split DWARF emission for
Fuchsia in addition to Linux.
Differential Revision: https://reviews.llvm.org/D53248
llvm-svn: 344556
Chris Bieneman [Mon, 15 Oct 2018 21:20:02 +0000 (21:20 +0000)]
[CMake] Use LLVM_ENABLE_IDE instead of CMAKE_CONFIGURATION_TYPES
There are several places where we use CMAKE_CONFIGURATION_TYPES to determine if we are using an IDE generator and in turn decide not to generate some of the convenience targets (like all the install-* and check-llvm-* targets). This decision is made because IDEs don't always deal well with the thousands of targets LLVM can generate.
This approach does not work for Visual Studio 15's new CMake integration. Because VS15 uses a Ninja generator, it isn't a multi-configuration build, and generating all these extra targets mucks up the UI and adds little value.
With this change we still don't generate these targets by default for Visual Studio and Xcode generators, and LLVM_ENABLE_IDE becomes a switch that can be enabled on the VS15 CMake builds, to improve the IDE experience.
This is a re-land of r340435, with a few minor fix-ups. The issues causing the revert were addressed in r344218, r344219, and r344553.
llvm-svn: 344555
Simon Pilgrim [Mon, 15 Oct 2018 21:15:58 +0000 (21:15 +0000)]
[AARCH64] Improve vector popcnt lowering with ADDLP
AARCH64 equivalent to D53257 - uses widening pairwise adds on vXi8 CTPOP to support i16/i32/i64 vectors.
This is a blocker for generic vector CTPOP expansion (P32655) - this will remove the aarch64 diff from D53258.
Differential Revision: https://reviews.llvm.org/D53259
llvm-svn: 344554
Chris Bieneman [Mon, 15 Oct 2018 21:14:19 +0000 (21:14 +0000)]
[CMake] Change the default value of LLVM_ENABLE_IDE
There really aren't any generator behaviors that we need to take `CMAKE_EXTRA_GENERATOR` into account for. Where we need to take different behaviors for IDEs is mostly in enabling or disabling certain build system features that are optional but trip up the IDE UIs. Like the generation of lots of utility targets.
By changing the LLVM_ENABLE_IDE default to only being on for multi-configuration generators, we allow gating where it will impact the UI presentation, while also supporting optionally disabling the generation if your tooling workflow encounters problems. Presently being able to manually disable extra target generation is useful for Visual Studio 2017's CMake integration where the IDE has trouble displaying and working with the large number of optional targets.
llvm-svn: 344553
Konstantin Zhuravlyov [Mon, 15 Oct 2018 20:37:47 +0000 (20:37 +0000)]
AMDGPU: Generate .amdgcn_target for object code v3
Differential Revision: https://reviews.llvm.org/D53221
llvm-svn: 344552
Sean Fertile [Mon, 15 Oct 2018 20:20:28 +0000 (20:20 +0000)]
Revert "[PPC64] Add split - stack support."
This reverts commit https://reviews.llvm.org/rL344544, which causes failures on
a undefined behaviour sanitizer bot -->
lld/ELF/Arch/PPC64.cpp:849:35: runtime error: left shift of negative value -1
llvm-svn: 344551
Jordan Rupprecht [Mon, 15 Oct 2018 20:15:58 +0000 (20:15 +0000)]
[llvm-objcopy] NFC: update TODO test comment
llvm-svn: 344550
Leonard Chan [Mon, 15 Oct 2018 20:00:03 +0000 (20:00 +0000)]
[Fixed Point Arithmetic] Fix for clang-tools-extra warning
Fix for warnings generated on unhandled enum value `STK_FixedPoint`.
Differential Revision: https://reviews.llvm.org/D53299
llvm-svn: 344549
Leonard Chan [Mon, 15 Oct 2018 19:59:52 +0000 (19:59 +0000)]
added fix
llvm-svn: 344548
Stella Stamenova [Mon, 15 Oct 2018 19:51:21 +0000 (19:51 +0000)]
[lldbsuite] Make the names of test classes unique
Summary:
If the names are not unique, the tests overwrite each other's results and logs. This also causes failures on platforms where the files are locked for writing.
The names of the class/test pairs *have to* always be unique. The easiest way to achieve that is to name each class differently (usually the same as the file name).
Reviewers: jasonmolenda, asmith
Subscribers: clayborg, nemanjai, kbarton, lldb-commits
Differential Revision: https://reviews.llvm.org/D53297
llvm-svn: 344547
Marshall Clow [Mon, 15 Oct 2018 19:46:03 +0000 (19:46 +0000)]
Mark a couple of test cases as 'C++17-only' pending the resolution of PR#39232
llvm-svn: 344546
Vedant Kumar [Mon, 15 Oct 2018 19:22:20 +0000 (19:22 +0000)]
[CodeExtractor] Erase debug intrinsics in outlined thunks (fix PR22900)
Variable updates within the outlined function are invisible to
debuggers. This could be improved by defining a DISubprogram for the
new function. For the moment, simply erase the debug intrinsics instead.
This fixes verifier failures about function-local metadata being used in
the wrong function, seen while testing the hot/cold splitting pass.
rdar://
45142482
Differential Revision: https://reviews.llvm.org/D53267
llvm-svn: 344545
Sean Fertile [Mon, 15 Oct 2018 19:05:57 +0000 (19:05 +0000)]
[PPC64] Add split - stack support.
This support is slightly different then the X86_64 implementation in that calls
to __morestack don't need to get rewritten to calls to __moresatck_non_split
when a split-stack caller calls a non-split-stack callee. Instead the size of
the stack frame requested by the caller is adjusted prior to the call to
__morestack. The size the stack-frame will be adjusted by is tune-able through a
new --split-stack-adjust-size option.
Differential Revision: https://reviews.llvm.org/D52099
llvm-svn: 344544
Stella Stamenova [Mon, 15 Oct 2018 18:51:28 +0000 (18:51 +0000)]
[lldbsuite] Disable Test128BitsInteger on Windows
Summary: This test is failing on Windows because lldb does not support JIT on Windows.
Reviewers: davide, asmith
Reviewed By: davide
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D53226
llvm-svn: 344543
Lang Hames [Mon, 15 Oct 2018 18:34:36 +0000 (18:34 +0000)]
[ADT] Fix a bug in DenseSet's initializer_list constructor.
Without this fix, DenseSet crashes with an assertion if constructed with an
initializer_list whose length is not a power of two.
llvm-svn: 344542
Sanjay Patel [Mon, 15 Oct 2018 18:05:34 +0000 (18:05 +0000)]
[SelectionDAG] allow FP binops in SimplifyDemandedVectorElts
This is intended to make the backend on par with functionality that was
added to the IR version of SimplifyDemandedVectorElts in:
rL343727
...and the original motivation is that we need to improve demanded-vector-elements
in several ways to avoid problems that would be exposed in D51553.
Differential Revision: https://reviews.llvm.org/D52912
llvm-svn: 344541
Artem Dergachev [Mon, 15 Oct 2018 18:01:34 +0000 (18:01 +0000)]
[analyzer] Add doxygen comments for the new CXXAllocatorCall APIs.
Forgot to squeeze this into r344539.
llvm-svn: 344540
Artem Dergachev [Mon, 15 Oct 2018 17:53:18 +0000 (17:53 +0000)]
[analyzer] Teach CallEvent about C++17 aligned operator new().
In C++17, when class C has large alignment value, a special case of
overload resolution rule kicks in for expression new C that causes the aligned
version of operator new() to be called. The aligned new has two arguments:
size and alignment. However, the new-expression has only one "argument":
the construct-expression for C(). This causes a false positive in
core.CallAndMessage's check for matching number of arguments and number
of parameters.
Update CXXAllocatorCall, which is a CallEvent sub-class for operator new calls
within new-expressions, so that the number of arguments always matched
the number of parameters.
rdar://problem/
44738501
Differential Revision: https://reviews.llvm.org/D52957
llvm-svn: 344539
Artem Dergachev [Mon, 15 Oct 2018 17:47:56 +0000 (17:47 +0000)]
[analyzer] NFC: RetainCountChecker: Don't dump() symbols into program point tags.
We don't need a separate node for every symbol, because whenever the first
symbol leaks, a bug is emitted, the analysis is sinked, and the checker
callback immediately returns due to State variable turning into null,
so we never get to see the second leaking symbol.
Additionally, we are no longer able to break normal analysis while experimenting
with debug dumps.
Differential Revision: https://reviews.llvm.org/D52804
llvm-svn: 344538
Artem Dergachev [Mon, 15 Oct 2018 17:43:23 +0000 (17:43 +0000)]
[python] [tests] Disable python binding tests under LLVM_USE_SANITIZER=Address
They don't work yet.
Patch by Dan Liew!
rdar://problem/
45242886
Differential Revision: https://reviews.llvm.org/D53239
llvm-svn: 344537
Nick Desaulniers [Mon, 15 Oct 2018 17:39:00 +0000 (17:39 +0000)]
Revert 344389 "Revert r344375 "[Driver] check for exit code from SIGPIPE""
Summary:
Add preprocessor guards for UNIX.
This reverts commit r344389.
Reviewers: rnk, majnemer, jfb
Reviewed By: rnk
Subscribers: cfe-commits, pirama, srhines
Differential Revision: https://reviews.llvm.org/D53210
llvm-svn: 344536
Marshall Clow [Mon, 15 Oct 2018 17:33:20 +0000 (17:33 +0000)]
Wrap up the new chrono literals in an #ifdef so that old versions of clang don't complain. I'm looking at you, clang 5.0.1
llvm-svn: 344535
Sanjay Patel [Mon, 15 Oct 2018 16:54:07 +0000 (16:54 +0000)]
[DAGCombiner] allow undef elts in vector fmul matching
llvm-svn: 344534
Sam McCall [Mon, 15 Oct 2018 16:47:45 +0000 (16:47 +0000)]
[clangd] Revert include path change in Dexp. NFC
llvm-svn: 344533
Sanjay Patel [Mon, 15 Oct 2018 16:47:01 +0000 (16:47 +0000)]
[DAGCombiner] refactor folds for fadd (fmul X, -2.0), Y; NFCI
The transform doesn't work if the vector constant has undef elements.
llvm-svn: 344532
Sanjay Patel [Mon, 15 Oct 2018 16:44:00 +0000 (16:44 +0000)]
[AArch64] add tests for fmul x, -2.0 with undef elts; NFC
Also, add tests with commuted operands. There was no coverage for that case.
llvm-svn: 344531
Leonard Chan [Mon, 15 Oct 2018 16:07:02 +0000 (16:07 +0000)]
[Fixed Point Arithmetic] FixedPointCast
This patch is a part of https://reviews.llvm.org/D48456 in an attempt to
split them up. This contains the code for casting between fixed point types
and other fixed point types.
The method for converting between fixed point types is based off the convert()
method in APFixedPoint.
Differential Revision: https://reviews.llvm.org/D50616
llvm-svn: 344530
Marshall Clow [Mon, 15 Oct 2018 16:06:37 +0000 (16:06 +0000)]
Implement the first part of the calendar support for C++20. This is still incomplete; there will be more patches coming. Reviewed as D51762
llvm-svn: 344529
Sanjay Patel [Mon, 15 Oct 2018 15:56:39 +0000 (15:56 +0000)]
[DAGCombiner] allow undef elts in vector fma matching
llvm-svn: 344528
Sanjay Patel [Mon, 15 Oct 2018 15:47:37 +0000 (15:47 +0000)]
[x86] add tests for fma with undef elts; NFC
llvm-svn: 344527
Sean Fertile [Mon, 15 Oct 2018 15:43:00 +0000 (15:43 +0000)]
Revert "[CodeGenCXX] Treat 'this' as noalias in constructors"
This reverts commit https://reviews.llvm.org/rL344150 which causes
MachineOutliner related failures on the ppc64le multistage buildbot.
llvm-svn: 344526
Sanjay Patel [Mon, 15 Oct 2018 15:38:38 +0000 (15:38 +0000)]
[DAGCombiner] allow undef elts in vector fma matching
llvm-svn: 344525
Fedor Sergeev [Mon, 15 Oct 2018 15:36:08 +0000 (15:36 +0000)]
Revert "[NewPM] teach -passes= to emit meaningful error messages"
This reverts r344519 due to failures in pipeline-parsing test.
llvm-svn: 344524
Sanjay Patel [Mon, 15 Oct 2018 15:28:44 +0000 (15:28 +0000)]
[x86] add tests for fma with undef elts; NFC
llvm-svn: 344523
Lang Hames [Mon, 15 Oct 2018 15:26:47 +0000 (15:26 +0000)]
[ADT] Adds equality operators for DenseMap and DenseSet, and an initializer_list
constructor for DenseMap (DenseSet already had an initializer_list constructor).
These changes make it easier to migrate existing code that uses std::map and
std::set (which support initializer_list construction and equality comparison)
to DenseMap and DenseSet.
llvm-svn: 344522
Haojian Wu [Mon, 15 Oct 2018 15:12:40 +0000 (15:12 +0000)]
[clangd] Add createIndex in dexp
Summary:
This would allow easily injecting our internal customization.
Also updates the stale "symbol-collection-file" flag.
Reviewers: sammccall
Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D53292
llvm-svn: 344521
Sam McCall [Mon, 15 Oct 2018 15:04:03 +0000 (15:04 +0000)]
[clangd] Use SyncAPI in more places in tests. NFC
llvm-svn: 344520
Fedor Sergeev [Mon, 15 Oct 2018 15:00:18 +0000 (15:00 +0000)]
[NewPM] teach -passes= to emit meaningful error messages
Summary:
All the PassBuilder::parse interfaces now return descriptive StringError
instead of a plain bool. It allows to make -passes/aa-pipeline parsing
errors context-specific and thus less confusing.
TODO: ideally we should also make suggestions for misspelled pass names,
but that requires some extensions to PassBuilder.
Reviewed By: philip.pfaffe, chandlerc
Differential Revision: https://reviews.llvm.org/D53246
llvm-svn: 344519
Sid Manning [Mon, 15 Oct 2018 14:44:52 +0000 (14:44 +0000)]
[ELF][HEXAGON] Let input determine e_flag.
Differential Revision: https://reviews.llvm.org/D53204
llvm-svn: 344518
Aleksandar Beserminji [Mon, 15 Oct 2018 14:39:12 +0000 (14:39 +0000)]
[mips][micromips] Fix overlaping FDEs error
When compiling static executable for micromips, CFI symbols
are incorrectly labeled as MICROMIPS, which cause
".eh_frame_hdr refers to overlapping FDEs." error.
This patch does not label CFI symbols as MICROMIPS, and FDEs do not
overlap anymore. This patch also exposes another bug, which is fixed
here: https://reviews.llvm.org/D52985
Differential Revision: https://reviews.llvm.org/D52987
llvm-svn: 344516
Aleksandar Beserminji [Mon, 15 Oct 2018 14:36:48 +0000 (14:36 +0000)]
[mips][micromips] Revert "Fix overlaping FDEs error"
This reverts r344511.
llvm-svn: 344515
George Rimar [Mon, 15 Oct 2018 14:21:43 +0000 (14:21 +0000)]
[LLD][ELF] - Check options before processing the -v/-version options.
This is https://bugs.llvm.org/show_bug.cgi?id=39289.
Currently both gold and bfd report errors about invalid options values
even with -v/-versions. But LLD does not.
This makes complicated to check the options available when LLD is used.
Patch makes LLD behavior to be consistent with GNU linkers.
Differential revision: https://reviews.llvm.org/D53278
llvm-svn: 344514
Sam McCall [Mon, 15 Oct 2018 13:34:10 +0000 (13:34 +0000)]
[clangd] Minimal implementation of automatic static index (not enabled).
Summary:
See tinyurl.com/clangd-automatic-index for design and goals.
Lots of limitations to keep this patch smallish, TODOs everywhere:
- no serialization to disk
- no changes to dynamic index, which now has a much simpler job
- no partitioning of symbols by file to avoid duplication of header symbols
- no reindexing of edited files
- only a single worker thread
- compilation database is slurped synchronously (doesn't scale)
- uses memindex, rebuilds after every file (should be dex, periodically)
It's not hooked up to ClangdServer/ClangdLSPServer yet: the layering
isn't clear (it should really be in ClangdServer, but ClangdLSPServer
has all the CDB interactions).
Reviewers: ioeric
Subscribers: mgorny, ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, jfb, cfe-commits
Differential Revision: https://reviews.llvm.org/D53032
llvm-svn: 344513
Simon Pilgrim [Mon, 15 Oct 2018 13:20:41 +0000 (13:20 +0000)]
[ARM][NEON] Improve vector popcnt lowering with PADDL (PR39281)
As I suggested on PR39281, this patch uses PADDL pairwise addition to widen from the vXi8 CTPOP result to the target vector type.
This is a blocker for moving more x86 code to generic vector CTPOP expansion (P32655 + D53258) - ARM's vXi64 CTPOP currently expands, which would generate a vXi64 MUL but ARM's custom lowering expands the general MUL case and vectors aren't well handled in LegalizeDAG - improving the CTPOP lowering was a lot easier than fixing the MUL lowering for this one case......
Differential Revision: https://reviews.llvm.org/D53257
llvm-svn: 344512
Aleksandar Beserminji [Mon, 15 Oct 2018 12:59:17 +0000 (12:59 +0000)]
[mips][micromips] Fix overlaping FDEs error
When compiling static executable for micromips, CFI symbols
are incorrectly labeled as MICROMIPS, which cause
".eh_frame_hdr refers to overlapping FDEs." error.
This patch does not label CFI symbols as MICROMIPS, and FDEs do not
overlap anymore. This patch also exposes another bug, which is fixed
here: https://reviews.llvm.org/D52985
Differential Revision: https://reviews.llvm.org/D52987
llvm-svn: 344511
Haojian Wu [Mon, 15 Oct 2018 12:39:45 +0000 (12:39 +0000)]
[clangd] Remove an unused include header, NFC.
llvm-svn: 344510
Eric Liu [Mon, 15 Oct 2018 12:37:23 +0000 (12:37 +0000)]
[CodeComplete] Make sure keyword 'template' is added even when code pattern is disabled.
Reviewers: sammccall, hokein
Subscribers: arphaman, cfe-commits
Differential Revision: https://reviews.llvm.org/D53284
llvm-svn: 344509
Haojian Wu [Mon, 15 Oct 2018 12:32:49 +0000 (12:32 +0000)]
[clangd] dump xrefs information in dexp tool.
Reviewers: sammccall
Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D53019
llvm-svn: 344508
Haojian Wu [Mon, 15 Oct 2018 11:46:26 +0000 (11:46 +0000)]
[clangd] Fix some references missing in dynamic index.
Summary:
Previously, SymbolCollector postfilters all references at the end to
find all references of interesting symbols.
It was incorrect when indxing main AST where we don't see locations
of symbol declarations and definitions in the main AST (as those are in
preamble AST).
The fix is to do earily check during collecting references.
Reviewers: sammccall
Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D53273
llvm-svn: 344507
Nicolai Haehnle [Mon, 15 Oct 2018 11:37:04 +0000 (11:37 +0000)]
AMDGPU: Test showing a scalar buffer load deficiency
Change-Id: I5b64a565f22a8482aa0712488d85e45163ac3d12
llvm-svn: 344506
Fedor Sergeev [Mon, 15 Oct 2018 10:46:35 +0000 (10:46 +0000)]
[NewPM] implement SCC printing for -print-before-all/-print-after-all
Removing deficiency of initial implementation of -print-before-all/-after-all
- it was effectively skipping IR printing for all the SCC passes.
Now LazyCallGraph:SCC gets its IR printed.
Reviewed By: skatkov
Differential Revision: https://reviews.llvm.org/D53270
llvm-svn: 344505
Chandler Carruth [Mon, 15 Oct 2018 10:42:50 +0000 (10:42 +0000)]
[TI removal] Make `getTerminator()` return a generic `Instruction`.
This removes the primary remaining API producing `TerminatorInst` which
will reduce the rate at which code is introduced trying to use it and
generally make it much easier to remove the remaining APIs across the
codebase.
Also clean up some of the stragglers that the previous mechanical update
of variables missed.
Users of LLVM and out-of-tree code generally will need to update any
explicit variable types to handle this. Replacing `TerminatorInst` with
`Instruction` (or `auto`) almost always works. Most of these edits were
made in prior commits using the perl one-liner:
```
perl -i -ple 's/TerminatorInst(\b.* = .*getTerminator\(\))/Instruction\1/g'
```
This also my break some rare use cases where people overload for both
`Instruction` and `TerminatorInst`, but these should be easily fixed by
removing the `TerminatorInst` overload.
llvm-svn: 344504
Chandler Carruth [Mon, 15 Oct 2018 10:10:54 +0000 (10:10 +0000)]
[TI removal] Rework `InstVisitor` to support visiting instructions that
are terminators without relying on the specific `TerminatorInst` type.
This required cleaning up two users of `InstVisitor`s usage of
`TerminatorInst` as well.
llvm-svn: 344503
Chandler Carruth [Mon, 15 Oct 2018 10:04:59 +0000 (10:04 +0000)]
[TI removal] Make variables declared as `TerminatorInst` and initialized
by `getTerminator()` calls instead be declared as `Instruction`.
This is the biggest remaining chunk of the usage of `getTerminator()`
that insists on the narrow type and so is an easy batch of updates.
Several files saw more extensive updates where this would cascade to
requiring API updates within the file to use `Instruction` instead of
`TerminatorInst`. All of these were trivial in nature (pervasively using
`Instruction` instead just worked).
llvm-svn: 344502
Chandler Carruth [Mon, 15 Oct 2018 10:00:15 +0000 (10:00 +0000)]
[TI removal] Remove `TerminatorInst` from GVN.h and GVN.cpp.
This is the last interesting usage in all of LLVM's headers. The
remaining usages in headers are the core typesystem bits (Core.h,
instruction types, and InstVisitor) and as the return of
`BasicBlock::getTerminator`. The latter is the big remaining API point
that I'll remove after mass updates to user code.
llvm-svn: 344501
Chandler Carruth [Mon, 15 Oct 2018 09:47:26 +0000 (09:47 +0000)]
[TI removal] Remove `TerminatorInst` from SparsePropagation.h and
related code.
This is simple as we just need to replace the type and move to the
concept of visiting a "terminator" rather than a specific instruction
subclass.
llvm-svn: 344500
Chandler Carruth [Mon, 15 Oct 2018 09:34:31 +0000 (09:34 +0000)]
[TI removal] Remove a dead forward declaration of TerminatorInst. NFC.
llvm-svn: 344499
Chandler Carruth [Mon, 15 Oct 2018 09:34:05 +0000 (09:34 +0000)]
[TI removal] Remove `TerminatorInst` from BasicBlockUtils.h
This requires updating a number of .cpp files to adapt to the new API.
I've just systematically updated all uses of `TerminatorInst` within
these files te `Instruction` so thta I won't have to touch them again in
the future.
llvm-svn: 344498
Chandler Carruth [Mon, 15 Oct 2018 09:33:40 +0000 (09:33 +0000)]
[TI removal] Just use Instruction in the CFG printer code. NFC.
llvm-svn: 344497
Guillaume Chatelet [Mon, 15 Oct 2018 09:21:21 +0000 (09:21 +0000)]
[llvm-exegesis] Fix missing std::move.
llvm-svn: 344496
Chandler Carruth [Mon, 15 Oct 2018 09:17:38 +0000 (09:17 +0000)]
[TI removal] Remove a unnecessary use of `TerminatorInst` from an IR
header. NFC.
Part of the removal of `TerminatorInst` from the type hierarchy.
llvm-svn: 344495
Chandler Carruth [Mon, 15 Oct 2018 09:17:09 +0000 (09:17 +0000)]
[TI removal] Remove TerminatorInst as an input parameter from all public
LLVM APIs. There weren't very many.
We still have the instruction visitor, and APIs with TerminatorInst as
a return type or an output parameter.
llvm-svn: 344494
Guillaume Chatelet [Mon, 15 Oct 2018 09:09:19 +0000 (09:09 +0000)]
[llvm-exegesis][NFC] Return many CodeTemplates instead of one.
Summary: This is part one of the change where I simply changed the signature of the functions. More work need to be done to actually produce more than one CodeTemplate per instruction.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53209
llvm-svn: 344493
Bjorn Pettersson [Mon, 15 Oct 2018 08:36:03 +0000 (08:36 +0000)]
[TwoAddressInstructionPass] Replace subregister uses when processing tied operands
Summary:
TwoAddressInstruction pass typically rewrites
%1:short = foo %0.sub_lo:long
as
%1:short = COPY %0.sub_lo:long
%1:short = foo %1:short
when having tied operands.
If there are extra un-tied operands that uses the same reg and
subreg, such as the second and third inputs to fie here:
%1:short = fie %0.sub_lo:long, %0.sub_hi:long, %0.sub_lo:long
then there was a bug which replaced the register %0 also for
the un-tied operand, but without changing the subregister indices.
So we used to get:
%1:short = COPY %0.sub_lo:long
%1:short = fie %1, %1.sub_hi:short, %1.sub_lo:short
With this fix we instead get:
%1:short = COPY %0.sub_lo:long
%1:short = fie %1, %0.sub_hi:long, %1
Reviewers: arsenm, JesperAntonsson, kparzysz, MatzeB
Reviewed By: MatzeB
Subscribers: bjope, kparzysz, wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D36224
llvm-svn: 344492
Craig Topper [Mon, 15 Oct 2018 05:31:24 +0000 (05:31 +0000)]
[X86] Autogenerate checks. NFC
llvm-svn: 344490
Lang Hames [Mon, 15 Oct 2018 05:07:54 +0000 (05:07 +0000)]
[ORC] Simplify naming for JITDylib definition generators.
Renames:
JITDylib's setFallbackDefinitionGenerator method to setGenerator.
DynamicLibraryFallbackGenerator class to DynamicLibrarySearchGenerator.
ReexportsFallbackDefinitionGenerator to ReexportsGenerator.
llvm-svn: 344489
Dean Michael Berris [Mon, 15 Oct 2018 02:57:06 +0000 (02:57 +0000)]
[XRay][compiler-rt] FDR Mode Controller
Summary:
This change implements a controller for abstracting away the details of
what happens when tracing with FDR mode. This controller type allows us
to test in isolation the various cases where we're encountering function
entry, exit, and other kinds of events we are handling when FDR mode is
enabled.
This change introduces a number of testing facilities we've needed to
better support expressing the conditions we need for the unit tests. We
leave some TODOs for moving those utilities into the LLVM project,
sitting in the `Testing` library, to make matching conditions on XRay
`Trace` instances through googlemock more manageable and declarative.
We don't wire in the controller right away, to allow us to incrementally
update the implementation(s) as we increase testing coverage of the
controller type. There's a need to re-think the way we're managing
buffers in a multi-threaded environment, which is more invasive than
this implementation.
This step in the process allows us to encode our assumptions in the
implementation of the controller, and then evolve the buffer queue
implementation to support generational buffer management to ensure we
can continue to support the cases we're already supporting with the
controller.
Reviewers: mboerger, eizan
Subscribers: mgorny, llvm-commits, jfb
Differential Revision: https://reviews.llvm.org/D52588
llvm-svn: 344488
Craig Topper [Mon, 15 Oct 2018 01:51:58 +0000 (01:51 +0000)]
[X86] Move promotion of vector and/or/xor from legalization to DAG combine
Summary:
I've noticed that the bitcasts we introduce for these make computeKnownBits and computeNumSignBits not work well in LegalizeVectorOps. LegalizeVectorOps legalizes bottom up while LegalizeDAG legalizes top down. The bottom up strategy for LegalizeVectorOps means operands are legalized before their uses. So we promote and/or/xor before we legalize the operands that use them making computeKnownBits/computeNumSignBits in places like LowerTruncate suboptimal. I looked at changing LegalizeVectorOps to be top down as well, but that was more disruptive and caused some regressions. I also looked at just moving promotion of binops to LegalizeDAG, but that had a few issues one around matching AND,ANDN,OR into VSELECT because I had to create ANDN as vXi64, but the other nodes hadn't legalized yet, I didn't look too hard at fixing that.
This patch seems to produce better results overall than my other attempts. We now form broadcasts of constants better in some cases. For at least some of them the AND was being introduced in LegalizeDAG, promoted to vXi64, and the BUILD_VECTOR was also legalized there. I think we got bad ordering of that. Now the promotion is out of the legalizer so we handle this better.
In the longer term I think we really should evaluate whether we should be doing this promotion at all. It's really there to reduce isel pattern count, but I'm wondering if we'd be better served just eating the pattern cost or doing C++ based isel for vector and/or/xor in X86ISelDAGToDAG. The masked and/or/xor will definitely be difficult in patterns if a bitcast gets between the vselect and the and/or/xor node. That becomes a lot of permutations to cover.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53107
llvm-svn: 344487
Craig Topper [Mon, 15 Oct 2018 01:51:53 +0000 (01:51 +0000)]
[X86] Add 128 MOVDDUP to the constant pool printing in X86AsmPrinter::EmitInstruction.
We use this instruction to broadcast a single 64-bit value to a v2i64/v2f64 vector.
llvm-svn: 344486
Craig Topper [Mon, 15 Oct 2018 01:51:50 +0000 (01:51 +0000)]
[X86] Autogenerate complete checks. NFC
llvm-svn: 344485
Simon Pilgrim [Sun, 14 Oct 2018 20:14:33 +0000 (20:14 +0000)]
[InstCombine] Add PR27343 test cases
llvm-svn: 344484
Ayal Zaks [Sun, 14 Oct 2018 17:53:02 +0000 (17:53 +0000)]
[LV] Fix comments reported when not vectorizing single iteration loops; NFC
Landing this as a separate part of https://reviews.llvm.org/D50480, being a
seemingly unrelated change ([LV] Vectorizing loops of arbitrary trip count
without remainder under opt for size).
llvm-svn: 344483
Sid Manning [Sun, 14 Oct 2018 17:51:36 +0000 (17:51 +0000)]
[Hexagon] Update tests account for non-hardcoded linker name.
Tests should not assume the linker's name, CLANG_DEFAULT_LINKER could
change it.
Differential Revision: https://reviews.llvm.org/D53219
llvm-svn: 344482
Simon Pilgrim [Sun, 14 Oct 2018 17:34:20 +0000 (17:34 +0000)]
[X86][AVX] Enable lowerVectorShuffleAsLanePermuteAndPermute v16i16/v32i8 shuffle lowering
Extends D53148 from v4f64 now that we have test coverage for v16i16/v32i8 shuffles.
llvm-svn: 344481
Jonathan Metzman [Sun, 14 Oct 2018 17:07:40 +0000 (17:07 +0000)]
[libfuzzer][Windows] Silence linker warning in unittest
Summary:
Silence warning when linking unittest binary by not passing
-lstdc++ to the linker since it is ignored.
Reviewers: morehouse
Reviewed By: morehouse
Subscribers: mgorny
Differential Revision: https://reviews.llvm.org/D53225
llvm-svn: 344480
Simon Pilgrim [Sun, 14 Oct 2018 16:49:04 +0000 (16:49 +0000)]
[ARM] Regenerate cttz tests
Improve codegen view as part of PR32655
llvm-svn: 344479
Lang Hames [Sun, 14 Oct 2018 16:09:59 +0000 (16:09 +0000)]
[ORC] Remove XXLayer::add methods that default to using the main JITDylib.
They're not currently used and may complicate upcoming changes to add's
signature and behavior.
llvm-svn: 344478
Simon Pilgrim [Sun, 14 Oct 2018 15:56:28 +0000 (15:56 +0000)]
[LegalizeDAG] Don't bother with final MUL+SRL stage for byte CTPOP.
The final stage of CTPOP expansion (v = (v * 0x01010101...) >> (Len - 8)) is completely pointless for the byte (Len = 8) case as it reduces to (v = (v * 0x01...) >> 0), but annoyingly this doesn't always get optimized away.
Found while investigating generic vector CTPOP expansion (PR32655).
llvm-svn: 344477
Sanjay Patel [Sun, 14 Oct 2018 15:25:06 +0000 (15:25 +0000)]
[InstCombine] combine a shuffle and an extract subvector shuffle
This is part of the missing IR-level folding noted in D52912.
This should be ok as a canonicalization because the new shuffle mask can't
be any more complicated than the existing shuffle mask. If there's some
target where the shorter vector shuffle is not legal, it should just end up
expanding to something like the pair of shuffles that we're starting with here.
Differential Revision: https://reviews.llvm.org/D53037
llvm-svn: 344476
Dorit Nuzman [Sun, 14 Oct 2018 08:50:06 +0000 (08:50 +0000)]
recommit 344472 after fixing build failure on ARM and PPC.
llvm-svn: 344475
Vadim Chugunov [Sun, 14 Oct 2018 07:24:56 +0000 (07:24 +0000)]
Fix double import of _lldb module.
Fix llvm.org/pr39054:
- Register _lldb as a built-in module during initialization of script interpreter,
- Reverse the order of imports in __init__.py: first try to import by absolute name, which will find the built-in module in the context of lldb (and other hosts that embed liblldb), then try relative import, in case the module is being imported from Python interpreter.
This works for SWIG>=3.0.11; before that, SWIG did not support custom module import code.
Differential revision: https://reviews.llvm.org/D52404
llvm-svn: 344474
Dorit Nuzman [Sun, 14 Oct 2018 07:21:20 +0000 (07:21 +0000)]
revert 344472 due to failures.
llvm-svn: 344473
Dorit Nuzman [Sun, 14 Oct 2018 07:06:16 +0000 (07:06 +0000)]
[IAI,LV] Add support for vectorizing predicated strided accesses using masked
interleave-group
The vectorizer currently does not attempt to create interleave-groups that
contain predicated loads/stores; predicated strided accesses can currently be
vectorized only using masked gather/scatter or scalarization. This patch makes
predicated loads/stores candidates for forming interleave-groups during the
Loop-Vectorizer's analysis, and adds the proper support for masked-interleave-
groups to the Loop-Vectorizer's planning and transformation stages. The patch
also extends the TTI API to allow querying the cost of masked interleave groups
(which each target can control); Targets that support masked vector loads/
stores may choose to enable this feature and allow vectorizing predicated
strided loads/stores using masked wide loads/stores and shuffles.
Reviewers: Ayal, hsaito, dcaballe, fhahn, javed.absar
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D53011
llvm-svn: 344472