platform/kernel/linux-starfive.git
4 years agoMerge tag 'amd-drm-next-5.8-2020-04-24' of git://people.freedesktop.org/~agd5f/linux...
Dave Airlie [Thu, 30 Apr 2020 01:08:54 +0000 (11:08 +1000)]
Merge tag 'amd-drm-next-5.8-2020-04-24' of git://people.freedesktop.org/~agd5f/linux into drm-next

amd-drm-next-5.8-2020-04-24:

amdgpu:
- Documentation improvements
- Enable FRU chip access on boards that support it
- RAS updates
- SR-IOV updates
- Powerplay locking fixes for older SMU versions
- VCN DPG (dynamic powergating) cleanup
- VCN 2.5 DPG enablement
- Rework GPU scheduler handling
- Improve scheduler priority handling
- Add SPM (streaming performance monitor) golden settings for navi
- GFX10 clockgating fixes
- DC ABM (automatic backlight modulation) fixes
- DC cursor and plane fixes
- DC watermark fixes
- DC clock handling fixes
- DC color management fixes
- GPU reset fixes
- Clean up MMIO access macros
- EEPROM access fixes
- Misc code cleanups

amdkfd:
- Misc code cleanups

radeon:
- Clean up safe reg list generation
- Misc code cleanups

From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200424190827.4542-1-alexander.deucher@amd.com
4 years agoMerge tag 'drm-misc-next-2020-04-23' of git://anongit.freedesktop.org/drm/drm-misc...
Dave Airlie [Fri, 24 Apr 2020 03:12:08 +0000 (13:12 +1000)]
Merge tag 'drm-misc-next-2020-04-23' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for 5.8:

UAPI Changes:

Cross-subsystem Changes:

 * MAINTAINERS: adapt several filenames to changes in panel code
 * arch/arm, fbdev: Use GPIO descriptors in sa11x0
 * dma-buf: Fix typo in documentation

Core Changes:

 * drm: Don't free framebuffer in drm_gem_fb_init()
 * drm: Document struct drm_device.dev_private being deprecated
 * drm: Merged topic/phy-compliance-202004-08

Driver Changes:

 * drm/adv7511: Add support for HDMI SPDIF and additional sampling rates
 * drm/ast: Allocate CRTC state of correct size
 * drm/panel: convert many driver bindings to DT schema; add port/ports property
          to bindings
 * drm/rockchip: Convert rk3066 bindings to YAML; spelling fixes
 * fbdev/arcfb: Call request_irq(), free_irq() at appropriate places
 * fbdev/controlfb: Support COMPILE_TEST; cleanups
 * fbdev/imxfb: Fix unbalanced enables/disables
 * fbdev/s1d13xxxfb: Call unregister_framebuffer()
 * fbdev/ssd1307fb: Use atomic PWM API, device properties and probe_new();
                    cleanups
 * fbdev/vesafb: Call release_region()
 * cleanups of includes, unused types/variables/fields, and fallthrough

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20200423083425.GA15883@linux-uq9g
4 years agodrm/amdgpu: retire legacy vega10 sos version check
Hawking Zhang [Mon, 20 Apr 2020 10:04:54 +0000 (18:04 +0800)]
drm/amdgpu: retire legacy vega10 sos version check

retired those early sos version used in vega10 bring up
phase

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: switch to helper function to init sos ucode
Hawking Zhang [Mon, 20 Apr 2020 10:01:33 +0000 (18:01 +0800)]
drm/amdgpu: switch to helper function to init sos ucode

call common helper function to init sos ucode, instead
of duplicate codes per ip version

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: add helper function to init sos ucode
Hawking Zhang [Mon, 20 Apr 2020 09:47:53 +0000 (17:47 +0800)]
drm/amdgpu: add helper function to init sos ucode

driver already had psp_firmware_header struture to
deal with different layout of sos ucode. the sos
micorcode initialization could be common one.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: switch to helper function to init asd ucode
Hawking Zhang [Mon, 20 Apr 2020 09:35:20 +0000 (17:35 +0800)]
drm/amdgpu: switch to helper function to init asd ucode

call common helper function to initialize asd ucode

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: add helper function to init asd ucode
Hawking Zhang [Mon, 20 Apr 2020 09:15:07 +0000 (17:15 +0800)]
drm/amdgpu: add helper function to init asd ucode

asd is unified ucode across asic. it is not necessary
to keep its software structure to be ip specific one

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: retire unused check_fw_loading status
Hawking Zhang [Mon, 20 Apr 2020 08:26:15 +0000 (16:26 +0800)]
drm/amdgpu: retire unused check_fw_loading status

The driver can't access UCODE_DATA/ADDR registers on production boards.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: remove unnecessary tOS version check
Hawking Zhang [Mon, 20 Apr 2020 07:57:26 +0000 (15:57 +0800)]
drm/amdgpu: remove unnecessary tOS version check

tOS version is available through debugfs interface

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: retire support_vmr_ring interface
Hawking Zhang [Mon, 20 Apr 2020 08:01:11 +0000 (16:01 +0800)]
drm/amdgpu: retire support_vmr_ring interface

vmr ring is dedicated for sriov vf (i.e.guest driver
in sriov), which is general communication interface
between driver and psp fw accross all ip version.
it is not correct to make it as ip specific callback.
it is even worse to check specific tOS version per IP
version (like psp_v11/v12).

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: shrink critical section in amdgpu_amdkfd_gpuvm_free_memory_of_gpu
Bernard Zhao [Tue, 21 Apr 2020 06:48:18 +0000 (23:48 -0700)]
drm/amdgpu: shrink critical section in amdgpu_amdkfd_gpuvm_free_memory_of_gpu

Reduce the mem->lock`s protected code area, no need to protect pr_debug.
This also simplifies error handling.

Signed-off-by: Bernard Zhao <bernard@vivo.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Init data to avoid oops while reading pp_num_states.
limingyu [Wed, 22 Apr 2020 09:01:19 +0000 (17:01 +0800)]
drm/amdgpu: Init data to avoid oops while reading pp_num_states.

For chip like CHIP_OLAND with si enabled(amdgpu.si_support=1),
the amdgpu will expose pp_num_states to the /sys directory.
In this moment, read the pp_num_states file will excute the
amdgpu_get_pp_num_states func. In our case, the data hasn't
been initialized, so the kernel will access some ilegal
address, trigger the segmentfault and system will reboot soon:

    uos@uos-PC:~$ cat /sys/devices/pci0000\:00/0000\:00\:00.0/0000\:01\:00
    .0/pp_num_states

    Message from syslogd@uos-PC at Apr 22 09:26:20 ...
     kernel:[   82.154129] Internal error: Oops: 96000004 [#1] SMP

This patch aims to fix this problem, avoid that reading file
triggers the kernel sementfault.

Signed-off-by: limingyu <limingyu@uniontech.com>
Signed-off-by: zhoubinbin <zhoubinbin@uniontech.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: remove set but not used variable 'priority'
YueHaibing [Tue, 21 Apr 2020 02:41:25 +0000 (10:41 +0800)]
drm/amdgpu: remove set but not used variable 'priority'

drivers/gpu/drm/amd/amdgpu/amdgpu_job.c: In function amdgpu_job_submit:
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c:148:26: warning: variable priority set but not used [-Wunused-but-set-variable]

commit 33abcb1f5a17 ("drm/amdgpu: set compute queue priority at mqd_init")
left behind this, remove it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm: amdgpu: fix kernel-doc struct warning
Randy Dunlap [Mon, 20 Apr 2020 01:50:15 +0000 (18:50 -0700)]
drm: amdgpu: fix kernel-doc struct warning

Fix a kernel-doc warning of missing struct field desription:

../drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:92: warning: Function parameter or member 'vm' not described in 'amdgpu_vm_eviction_lock'

Fixes: a269e44989f3 ("drm/amdgpu: Avoid reclaim fs while eviction lock")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Cc: Felix Kuehling <Felix.Kuehling@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: David (ChunMing) Zhou <David1.Zhou@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm: amd/display: fix Kconfig help text
Randy Dunlap [Tue, 21 Apr 2020 23:34:00 +0000 (16:34 -0700)]
drm: amd/display: fix Kconfig help text

Fix help text: indent one tab + 2 spaces; end a sentence with a
period; and collapse short lines of text to one line.

Fixes: 23c61b4599c4 ("drm/amd: Fix Kconfig indentation")
Fixes: 4562236b3bc0 ("drm/amd/dc: Add dc display driver (v2)")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: request reg_val_offs each kiq read reg
Yintian Tao [Wed, 22 Apr 2020 11:58:22 +0000 (19:58 +0800)]
drm/amdgpu: request reg_val_offs each kiq read reg

According to the current kiq read register method,
there will be race condition when using KIQ to read
register if multiple clients want to read at same time
just like the expample below:
1. client-A start to read REG-0 throguh KIQ
2. client-A poll the seqno-0
3. client-B start to read REG-1 through KIQ
4. client-B poll the seqno-1
5. the kiq complete these two read operation
6. client-A to read the register at the wb buffer and
   get REG-1 value

Therefore, use amdgpu_device_wb_get() to request reg_val_offs
for each kiq read register.

v2: fix the error remove
v3: fix the print typo
v4: remove unused variables

Signed-off-by: Yintian Tao <yttao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: change how we update mmRLC_SPM_MC_CNTL
Christian König [Tue, 21 Apr 2020 14:20:26 +0000 (16:20 +0200)]
drm/amdgpu: change how we update mmRLC_SPM_MC_CNTL

In pp_one_vf mode avoid the extra overhead and read/write the
registers without the KIQ.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Acked-by: Yintian Tao <yintian.tao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: set error query ready after all IPs late init
Dennis Li [Wed, 22 Apr 2020 04:22:54 +0000 (12:22 +0800)]
drm/amdgpu: set error query ready after all IPs late init

If set error query ready in amdgpu_ras_late_init, which will
cause some IP blocks aren't initialized, but their error query
is ready.

Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: code cleanup around gpu reset
Evan Quan [Thu, 16 Apr 2020 04:39:04 +0000 (12:39 +0800)]
drm/amdgpu: code cleanup around gpu reset

Make code more readable.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: optimize the gpu reset for XGMI setup V2
Evan Quan [Thu, 16 Apr 2020 04:27:28 +0000 (12:27 +0800)]
drm/amdgpu: optimize the gpu reset for XGMI setup V2

This is basically just some code cosmetic. The current design
for XGMI setup gput reset is to operate on current device(adev)
first and then on other devices from the hive(by another 'for' loop).
But actually we can do some sort to the device list(to put current
device 1st position) and handle all the devices in a single 'for'
loop.

V2: added missing hive->hive_lock protection

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: correct cancel_delayed_work_sync on gpu reset
Evan Quan [Thu, 16 Apr 2020 04:20:38 +0000 (12:20 +0800)]
drm/amdgpu: correct cancel_delayed_work_sync on gpu reset

As for XGMI setup, it should be performed on other devices
from the hive also.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: correct fbdev suspend on gpu reset
Evan Quan [Thu, 16 Apr 2020 04:15:31 +0000 (12:15 +0800)]
drm/amdgpu: correct fbdev suspend on gpu reset

As for XGMI setup, it needs to be performed on
all the devices from the same hive.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: cleanup coding style in amdkfd a bit
Bernard Zhao [Wed, 22 Apr 2020 01:46:18 +0000 (18:46 -0700)]
drm/amdgpu: cleanup coding style in amdkfd a bit

Make the code a bit more readable by using a common
error handling pattern.

Signed-off-by: Bernard Zhao <bernard@vivo.com>
Reviewed-by: Christian König <christian.koenig@amd.com>.
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: clean up unused variable about ring lru
Kevin Wang [Mon, 20 Apr 2020 15:08:14 +0000 (23:08 +0800)]
drm/amdgpu: clean up unused variable about ring lru

clean up unused variable:
1. ring_lru_list
2. ring_lru_list_lock

related-commit:
drm/amdgpu: remove ring lru handling

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: replace DRM prefix with PCI device info for gfx/mmhub
Dennis Li [Sat, 18 Apr 2020 04:08:20 +0000 (12:08 +0800)]
drm/amdgpu: replace DRM prefix with PCI device info for gfx/mmhub

Prefix RAS message printing in gfx/mmhub with PCI device info,
which assists the debug in multiple GPU case.

Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: limit smu support to Arcturus for onevf
Jiansong Chen [Mon, 20 Apr 2020 07:36:53 +0000 (15:36 +0800)]
drm/amd/powerplay: limit smu support to Arcturus for onevf

Under onevf mode the smu support to other chips is not well
verified yet.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: disble vblank when unloading sriov driver
Jiawei [Fri, 17 Apr 2020 11:06:52 +0000 (19:06 +0800)]
drm/amdgpu: disble vblank when unloading sriov driver

disble vblank in dce_vitual_crtc_commit(), which is skipped
under sriov before

Reviewed-by: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Jiawei <Jiawei.Gu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Print CU information by default during initialization
Yong Zhao [Fri, 17 Apr 2020 20:11:48 +0000 (16:11 -0400)]
drm/amdgpu: Print CU information by default during initialization

This is convenient for multiple teams to obtain the information. Also,
add device info by using dev_info().

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Dennis Li <Dennis.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: update smu12_driver_if.h to align with pmfw
Prike Liang [Fri, 3 Apr 2020 06:47:53 +0000 (14:47 +0800)]
drm/amd/powerplay: update smu12_driver_if.h to align with pmfw

Update the smu12_driver_if.h header to follow the pmfw release.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/powerplay:avoid to show invalid DPM table info
Yuxian Dai [Wed, 15 Apr 2020 11:03:52 +0000 (19:03 +0800)]
drm/amdgpu/powerplay:avoid to show invalid DPM table info

for different ASIC support different the number of DPM levels,
we should avoid to show the invalid level value.
v1 -> v2:
follow the suggestion,clarifiy the description for this
change

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Yuxian Dai <Yuxian.Dai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Adjust the SDMA doorbell info printing
Yong Zhao [Fri, 17 Apr 2020 20:16:57 +0000 (16:16 -0400)]
drm/amdgpu: Adjust the SDMA doorbell info printing

Turn off the printing by default because it is not very useful, while
adding more details.

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdkfd: Adjust three kfd dmesg printings during initialization
Yong Zhao [Fri, 17 Apr 2020 20:06:59 +0000 (16:06 -0400)]
drm/amdkfd: Adjust three kfd dmesg printings during initialization

Delete two printings which are not very useful, and change one from
pr_info() to pr_debug().

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: fix bug in the logic for panel power control
Anthony Koo [Fri, 17 Apr 2020 22:26:47 +0000 (18:26 -0400)]
drm/amd/display: fix bug in the logic for panel power control

[Why]
there's a bug in the new logic for panel power control.  the check is
wrong, and will skip panel power control under the wrong conditions.

[How]
fix to check for NULL panel_cntl

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Ashley Thomas <Ashley.Thomas2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Convert memory from cpu to fw endianness correctly
Wyatt Wood [Fri, 17 Apr 2020 18:10:23 +0000 (14:10 -0400)]
drm/amd/display: Convert memory from cpu to fw endianness correctly

[Why]
Current code does not guarantee the correct endianness of memory being
copied to fw, specifically in the case where cpu isn't little endian.

[How]
Windows and Diags are always little endian, so we define a macro that
does nothing. Linux already defines this macro and will do the correct
endianness conversion.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Fix green screen issue after suspend
Rodrigo Siqueira [Wed, 22 Apr 2020 21:43:26 +0000 (17:43 -0400)]
drm/amd/display: Fix green screen issue after suspend

[why]
We have seen a green screen after resume from suspend in a Raven system
connected with two displays (HDMI and DP) on X based system. We noticed
that this issue is related to bad DCC metadata from user space which may
generate hangs and consequently an underflow on HUBP. After taking a
deep look at the code path we realized that after resume we try to
restore the commit with the DCC enabled framebuffer but the framebuffer
is no longer valid.

[how]
This problem was only reported on Raven based system and after suspend,
for this reason, this commit adds a new parameter on
fill_plane_dcc_attributes() to give the option of disabling DCC
programmatically. In summary, for disabling DCC we first verify if is a
Raven system and if it is in suspend; if both conditions are true we
disable DCC temporarily, otherwise, it is enabled.

Co-developed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Adjust refactored dm for color management only
Stylon Wang [Thu, 9 Apr 2020 14:37:47 +0000 (22:37 +0800)]
drm/amd/display: Adjust refactored dm for color management only

[Why]
Commit cdde482caabf2adad47d23f0d1e235db2c4f2b7d is causing regression
from changing the order of call sequence.

[How]
Keep the call sequence and take in extra dm state only if plane-level
color management is enabled.

Fixes: cdde482caabf2a ("drm/amd/display: Refactor color management to take dm plane state")
Signed-off-by: Stylon Wang <stylon.wang@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: access ABM from stream resource.
Yongqiang Sun [Thu, 9 Apr 2020 00:40:02 +0000 (20:40 -0400)]
drm/amd/display: access ABM from stream resource.

[Why]
Since ABM resource is mapped to stream res, all the ABM access should
via stream res.

[How]
Get ABM instance from stream res instead of resource pool.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: blank dp stream before re-train the link
Xiaodong Yan [Thu, 9 Apr 2020 09:37:40 +0000 (17:37 +0800)]
drm/amd/display: blank dp stream before re-train the link

[Why]
When link loss happened, monitor can not light up if only re-train the
link.

[How]
Blank all the DP streams on this link before re-train the link, and then
unblank the stream

Signed-off-by: Xiaodong Yan <Xiaodong.Yan@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: DispalyPort: Write OUI only if panel supports it
Aurabindo Pillai [Tue, 7 Apr 2020 14:22:27 +0000 (10:22 -0400)]
drm/amd/display: DispalyPort: Write OUI only if panel supports it

[why]
Organizational Unit Identifier register is optional, and its
presence is published via Down Stream Port Count register.
Writing this register when not available will result in errors

[how]
Read this register and continue writing OUI only if the panel
has the support advertised.

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: change from panel to panel cntl
Anthony Koo [Wed, 8 Apr 2020 17:31:50 +0000 (13:31 -0400)]
drm/amd/display: change from panel to panel cntl

[Why]
it doesn't represent panel specifically, it's more like the control
logic for the panel

[How]
change from panel to panel cntl to make it a bit more clear

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Add HW rotation cursor changes to dcn10
Jaehyun Chung [Wed, 8 Apr 2020 19:02:58 +0000 (15:02 -0400)]
drm/amd/display: Add HW rotation cursor changes to dcn10

[Why]
HW rotation was enabled in DAL3 but hubp cursor calculations for HW roation
were only added to dcn20.

[How]
Add hubp cursor position calculation changes to dcn10.

Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Factor in immediate flip support into DLG calculations
Nicholas Kazlauskas [Tue, 7 Apr 2020 16:10:41 +0000 (12:10 -0400)]
drm/amd/display: Factor in immediate flip support into DLG calculations

[Why]
We expect to be able to perform immediate flipping without having to
recalculate and update all the watermarks.

There are certain usecases today (1080p @ 90deg, 2160p @ 90deg) such
that we get a urgency value of 0 for frac_urg_bw_flip because we're
explicitly passing in a value of "false" for requiring immediate
flip support into the DLG calculation.

[How]
Always pass in true into the calculation. With this we get a correct
non-zero value for frac_urg_bw_flip.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: fix virtual signal dsc setup
Dmytro Laktyushkin [Tue, 7 Apr 2020 16:01:07 +0000 (12:01 -0400)]
drm/amd/display: fix virtual signal dsc setup

This prevents dpcd access on virtual links.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: destroy panel on link destruct
Anthony Koo [Wed, 8 Apr 2020 13:30:21 +0000 (09:30 -0400)]
drm/amd/display: destroy panel on link destruct

[Why]
without destroy it is causing a memory leak

[How]
destroy panel on link destruct

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Wyatt Wood <Wyatt.Wood@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: dmcu wait loop calculation is incorrect in RV
Paul Hsieh [Tue, 7 Apr 2020 09:18:47 +0000 (17:18 +0800)]
drm/amd/display: dmcu wait loop calculation is incorrect in RV

[Why]
Driver already get display clock from SMU base on MHz, but driver read
again and mutiple 1000 cause wait loop value is overflow.

[How]
remove coding error

Signed-off-by: Paul Hsieh <paul.hsieh@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: move panel power seq to new panel struct
Anthony Koo [Sat, 28 Mar 2020 05:44:14 +0000 (01:44 -0400)]
drm/amd/display: move panel power seq to new panel struct

[Why]
panel power sequencer is currently just sitting in hwseq but it really
it tied to internal panels

[How]
make a new panel struct to contain power sequencer code

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: make all backlight calls link based
Anthony Koo [Fri, 27 Mar 2020 22:23:16 +0000 (18:23 -0400)]
drm/amd/display: make all backlight calls link based

[Why]
Backlight adjustment is tied to a specific display.  So make the calls
target a link rather than making it a global state.

[How]
make all backlight calls link based

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Cap certain DML values for Low Pix Clk on DCN2.1
Sung Lee [Wed, 25 Mar 2020 18:44:25 +0000 (14:44 -0400)]
drm/amd/display: Cap certain DML values for Low Pix Clk on DCN2.1

[WHY]
In certain conditions with low pixel clock, some values in DML may go
past the max due to margining for latency hiding. This causes assertions
to get hit.

[HOW]
If the pixel clock is low and some values are high, cap it to the max.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Various fixes for PSR on DMCUB
Wyatt Wood [Sun, 5 Apr 2020 17:48:56 +0000 (13:48 -0400)]
drm/amd/display: Various fixes for PSR on DMCUB

[Why]
- Driver does not recognize new definitions of psr states.
- Internal tool is required for checking if psr is active.

[How]
- Parse psr state correctly so that driver will recognize psr state.
- Add visual confirmation that psr is active using existing mechanisms.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: 3.2.81
Aric Cyr [Mon, 6 Apr 2020 04:22:52 +0000 (00:22 -0400)]
drm/amd/display: 3.2.81

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Update MPCC if requested
Aric Cyr [Sun, 5 Apr 2020 19:35:16 +0000 (15:35 -0400)]
drm/amd/display: Update MPCC if requested

Don't skip MPCC tree updates if requested.

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Fix HDR visual confirm
Aric Cyr [Fri, 3 Apr 2020 20:33:56 +0000 (16:33 -0400)]
drm/amd/display: Fix HDR visual confirm

Some cases were incorrectly reporting the wrong visual confirm, even
though they were working as expected.

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Use the correct input TF for video formats
Nicholas Kazlauskas [Tue, 31 Mar 2020 20:50:12 +0000 (16:50 -0400)]
drm/amd/display: Use the correct input TF for video formats

[Why]
Color blending for NV12 formats is incorrect because we're using the
predefined SRGB degamma.

[How]
Calculate the correct input transfer function for degamma from the color
module depending on what the actual surface format is.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Zhan Liu <Zhan.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Change infopacket type programming
Haiyi Zhou [Fri, 3 Apr 2020 14:00:58 +0000 (10:00 -0400)]
drm/amd/display: Change infopacket type programming

[Why]
Certain displays may experience blanking if infopacket max range does
not equal nominal refresh rate.

[How]
Add additional infopacket versions to program range to full or forced
range in freesync states.
This does not change the vrr logic.

Signed-off-by: Haiyi Zhou <haiyi.zhou@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Avoid NULL pointer in set_backlight when ABM is NULL
Nicholas Kazlauskas [Thu, 2 Apr 2020 19:59:44 +0000 (15:59 -0400)]
drm/amd/display: Avoid NULL pointer in set_backlight when ABM is NULL

[Why]
On ASIC without ABM support (most dGPU) we run into a null pointer
dereference when attempting to set the backlight level.

[How]
This function requires ABM, so fix up the condition to only allow
DMCU to be optional.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Wyatt Wood <Wyatt.Wood@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: fix stream setting for diags on silicon
Dmytro Laktyushkin [Thu, 2 Apr 2020 13:31:45 +0000 (09:31 -0400)]
drm/amd/display: fix stream setting for diags on silicon

We need to set up stream even with virtual displays when running
diags.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Cast int to float before division
Sung Lee [Mon, 30 Mar 2020 21:16:23 +0000 (17:16 -0400)]
drm/amd/display: Cast int to float before division

[Why]:
Some inputs to dml_ceil have it dividied by int which causes a
truncation. This loss of precision means the ceil function becomes
redundant and does not round up.

[How]:
Cast parameter to float before division.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Set meta_chunk_value to 0 in DML if DCC disabled in DCN2.1
Sung Lee [Mon, 30 Mar 2020 21:19:01 +0000 (17:19 -0400)]
drm/amd/display: Set meta_chunk_value to 0 in DML if DCC disabled in DCN2.1

[WHY]:
Calculating refcyc_per_meta_chunk_vblank_l when DCC is disabled may lead
to a large number causing an assert to get hit. In VBA, this value is 0
when DCC is disabled.

[HOW]:
Set value to 0 to avoid hitting the assert.

Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: add optc get crc support for timings with ODM/DSC
Wenjing Liu [Tue, 31 Mar 2020 16:32:53 +0000 (12:32 -0400)]
drm/amd/display: add optc get crc support for timings with ODM/DSC

[why]
Optc needs to know if timing is enabled with ODM or DSC before computing
crc.  Otherwise value computed will be inaccurate. Before this change,
the CRC computed without ODM is not equal to the CRC computed with ODM
for the same timing. This is unexpected as we are driving the same
timing despite of the underlaying hardware setup to achieve it. This is
caused by missing hardware programming sequence to support it.

[how]
Add the new programming sequence based on hardware guide.

Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Workaround to disable YCbCr
Jinze Xu [Wed, 25 Mar 2020 08:14:35 +0000 (16:14 +0800)]
drm/amd/display: Workaround to disable YCbCr

[Why]
Some mst dock can't translate DP to HDMI properly.

[How]
Bypass YCbCr timings on specific MST device.

Signed-off-by: Jinze Xu <jinze.xu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Check ramp != NULL before applying lut1d for degamma
Nicholas Kazlauskas [Tue, 31 Mar 2020 20:45:31 +0000 (16:45 -0400)]
drm/amd/display: Check ramp != NULL before applying lut1d for degamma

[Why]
A NULL ramp is a valid configuration for passing into
mod_color_calculate_degamma_params but we'll hit a NULL pointer if we do
so.

We need this in order to get the right transfer function to do degamma
on NV12 formats where we aren't supplied with a custom user degamma.

[How]
Add the NULL check.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Zhan Liu <Zhan.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Unify psr feature flags
Wyatt Wood [Tue, 31 Mar 2020 13:31:16 +0000 (09:31 -0400)]
drm/amd/display: Unify psr feature flags

[Why]
As it stands, psr has feature flags in dm, stream, and link. Most are
not defined well enough, and different dm layers have different uses for
these same flags.

[How]
We define a new structure called psr_settings in dc_link that will hold
the following psr feature flags:

psr_feature_enable - psr is supported
psr_allow_active - psr is currently active
psr_version - internal psr version supported
psr_frame_capture_indication_req
psr_sdp_transmit_line_num_deadline
The last two flags were moved out of the power module
for the purposes of consolidating psr flags.
Their use is already well-defined.

Psr caps reported by sink will also be stored in dc_link,
in dpcd_caps.psr_caps.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Support plane-level gamut remap in DM
Stylon Wang [Thu, 26 Mar 2020 15:19:44 +0000 (23:19 +0800)]
drm/amd/display: Support plane-level gamut remap in DM

[Why]
Plane-level gamut remap is not enabled in DM, which is necessary to
support CTM as a plane-level property.

[How]
Enable gamut remap in DM.

Signed-off-by: Stylon Wang <stylon.wang@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Add SetBacklight call to abm on dmcub
Wyatt Wood [Mon, 30 Mar 2020 13:04:05 +0000 (09:04 -0400)]
drm/amd/display: Add SetBacklight call to abm on dmcub

[Why]
Set backlight calls to firmware are are being prevented by dmcu == null
check. Dmcu is expected to be null in this case.

[How]
Only prevent call if dmcu and abm are null.  Also rename variable
'use_smooth_brightness' to 'fw_set_brightness' as it's more appropriate.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Remove byte swapping for dmcub abm config table
Wyatt Wood [Mon, 30 Mar 2020 13:58:29 +0000 (09:58 -0400)]
drm/amd/display: Remove byte swapping for dmcub abm config table

[Why]
Since x86 and dmcub are both little endian, byte swapping isn't
necessary. Dmcu requires byte swapping as it is big endian.

[How]
Add flag to function definitions to determine if byte swapping is
necessary.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Force watermark value propagation
Joshua Aberback [Mon, 30 Mar 2020 19:49:02 +0000 (15:49 -0400)]
drm/amd/display: Force watermark value propagation

[Why]
The HUBBUB watermark registers are in an area that cannot be power
gated, but the HUBP copies of the watermark values are in areas that can
be power gated. When we power on a pipe, it will not automatically take
the HUBBUB values, we need to force propagation by writing to a
watermark register.

[How]
 - new HUBBUB function to re-write current value in a WM register
 - touch WM register after enabling the plane in program_pipe

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Move enable fractional pwm call
Wyatt Wood [Mon, 30 Mar 2020 13:08:04 +0000 (09:08 -0400)]
drm/amd/display: Move enable fractional pwm call

[Why]
Dmcu init fw call has some logic to initialize abm values.  Since this
doesn't exist on dmcub, must find a proper place for it in the abm
sequence.

[How]
Move enable fractional pwm call.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Add user backlight level reg write
Wyatt Wood [Mon, 30 Mar 2020 13:11:09 +0000 (09:11 -0400)]
drm/amd/display: Add user backlight level reg write

[Why]
Porting abm from dmcu to dmcub missed one register write.

[How]
Add this register write in the SetBacklightLevel sequence.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Correct updating logic of dcn21's pipe VM flags
Dale Zhao [Fri, 27 Mar 2020 12:11:55 +0000 (20:11 +0800)]
drm/amd/display: Correct updating logic of dcn21's pipe VM flags

[Why]:
Renoir's pipe VM flags are not correctly updated if pipe strategy has
changed during some scenarios. It will result in watermarks mistakenly
calculation, thus underflow and garbage appear.

[How]:
Correctly update pipe VM flags to pipes which have been populated.

Signed-off-by: Dale Zhao <dale.zhao@amd.com>
Signed-off-by: Sung Lee <sung.lee@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Remove aconnector condition check for dpcd read
Zhan Liu [Thu, 16 Apr 2020 18:20:56 +0000 (14:20 -0400)]
drm/amd/display: Remove aconnector condition check for dpcd read

[Why]
Aconnector is not necessary to be NULL in order to read dpcd
successfully.

Actually if we rely on checking aconnector here, we won't be able
to turn off all displays before doing display detection. That will
cause some MST hubs not able to light up.

[How]
Remove aconnector check when turning off all displays at
hardware initialization stage.

Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Joseph Gravenor <joseph.gravenor@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/dc: remove unused variable 'video_optimized_pixel_rates'
YueHaibing [Fri, 17 Apr 2020 10:12:47 +0000 (18:12 +0800)]
drm/amd/dc: remove unused variable 'video_optimized_pixel_rates'

drivers/gpu/drm/amd/amdgpu/../display/dc/dce/dce_clock_source.c:1017:50:
 warning: ‘video_optimized_pixel_rates’ defined but not used [-Wunused-const-variable=]
 static const struct pixel_rate_range_table_entry video_optimized_pixel_rates[] = {
                                                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~

commit d8cd587d2bfd ("drm/amd/display: removing MODULO change for dcn2")
left behind this unused vairable, remove it.

Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: remove defined but not used variables
Jason Yan [Fri, 17 Apr 2020 07:32:19 +0000 (15:32 +0800)]
drm/amd/powerplay: remove defined but not used variables

Fix the following gcc warning:

drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_powertune.c:710:46:
warning: ‘PSMGCEDCThresholdConfig_vega10’ defined but not used
[-Wunused-const-variable=]
 static const struct vega10_didt_config_reg
PSMGCEDCThresholdConfig_vega10[] =
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/vega10_powertune.c:654:46:
warning: ‘PSMSEEDCThresholdConfig_Vega10’ defined but not used
[-Wunused-const-variable=]
 static const struct vega10_didt_config_reg
PSMSEEDCThresholdConfig_Vega10[] =
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix race between pstate and remote buffer map
Jonathan Kim [Tue, 17 Mar 2020 19:43:41 +0000 (15:43 -0400)]
drm/amdgpu: fix race between pstate and remote buffer map

Vega20 arbitrates pstate at hive level and not device level. Last peer to
remote buffer unmap could drop P-State while another process is still
remote buffer mapped.

With this fix, P-States still needs to be disabled for now as SMU bug
was discovered on synchronous P2P transfers.  This should be fixed in the
next FW update.

Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/display: give aux i2c buses more meaningful names
Alex Deucher [Thu, 16 Apr 2020 18:44:52 +0000 (14:44 -0400)]
drm/amdgpu/display: give aux i2c buses more meaningful names

Mirror what we do for i2c display buses.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/display: fix aux registration (v2)
Alex Deucher [Thu, 16 Apr 2020 18:20:58 +0000 (14:20 -0400)]
drm/amdgpu/display: fix aux registration (v2)

We were registering the aux device in the MST late_register
rather than the regular one.

v2: handle eDP as well

Fixes: 405a1f9090d1ac ("drm/amdgpu/display: split dp connector registration (v4)")
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1100
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
4 years agodrm/amdgpu: Correctly initialize thermal controller for GPUs with Powerplay table...
Sandeep Raghuraman [Thu, 16 Apr 2020 20:07:45 +0000 (01:37 +0530)]
drm/amdgpu: Correctly initialize thermal controller for GPUs with Powerplay table v0 (e.g Hawaii)

Initialize thermal controller fields in the PowerPlay table for Hawaii
GPUs, so that fan speeds are reported.

Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoRevert "drm/amdgpu: Disable gfx off if VCN is busy"
James Zhu [Sat, 11 Apr 2020 12:41:52 +0000 (08:41 -0400)]
Revert "drm/amdgpu: Disable gfx off if VCN is busy"

This reverts commit 3fded222f4bf7f4c56ef4854872a39a4de08f7a8
This is work around for vcn1 only. Currently vcn1 has separate
begin_use and idle work handle.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Tested-by: changzhu <Changfeng.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix kernel page fault issue by ras recovery on sGPU
Guchun Chen [Thu, 16 Apr 2020 15:41:07 +0000 (23:41 +0800)]
drm/amdgpu: fix kernel page fault issue by ras recovery on sGPU

When running ras uncorrectable error injection and triggering GPU
reset on sGPU, below issue is observed. It's caused by the list
uninitialized when accessing.

[   80.047227] BUG: unable to handle page fault for address: ffffffffc0f4f750
[   80.047300] #PF: supervisor write access in kernel mode
[   80.047351] #PF: error_code(0x0003) - permissions violation
[   80.047404] PGD 12c20e067 P4D 12c20e067 PUD 12c210067 PMD 41c4ee067 PTE 404316061
[   80.047477] Oops: 0003 [#1] SMP PTI
[   80.047516] CPU: 7 PID: 377 Comm: kworker/7:2 Tainted: G           OE     5.4.0-rc7-guchchen #1
[   80.047594] Hardware name: System manufacturer System Product Name/TUF Z370-PLUS GAMING II, BIOS 0411 09/21/2018
[   80.047888] Workqueue: events amdgpu_ras_do_recovery [amdgpu]

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: John Clements <John.Clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Disable FRU read on Arcturus
Kent Russell [Thu, 16 Apr 2020 12:22:28 +0000 (08:22 -0400)]
drm/amdgpu: Disable FRU read on Arcturus

Update the list with supported Arcturus chips, but disable for now until
final list is confirmed.

Ideally we can poll atombios for FRU support, instead of maintaining
this list of chips, but this will enable serial number reading for
supported ASICs for the time-being.

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: fix resume failed as smu table initialize early exit
Prike Liang [Wed, 15 Apr 2020 13:43:41 +0000 (21:43 +0800)]
drm/amd/powerplay: fix resume failed as smu table initialize early exit

When the amdgpu in the suspend/resume loop need notify the dpm disabled,
otherwise the smu table will be uninitialize and result in resume failed.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Tested-by: Mengbing Wang <Mengbing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/gmc: Fix spelling mistake.
Rajneesh Bhardwaj [Sun, 5 Apr 2020 19:22:07 +0000 (15:22 -0400)]
drm/amdgpu/gmc: Fix spelling mistake.

Fixes a minor typo in the file.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: cache smu fw version info
John Clements [Wed, 15 Apr 2020 02:57:33 +0000 (10:57 +0800)]
drm/amdgpu: cache smu fw version info

reduce cmd submission to smu by caching version info

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoRevert "drm/amdgpu: use the BAR if possible in amdgpu_device_vram_access v2"
Kent Russell [Mon, 13 Apr 2020 18:15:44 +0000 (14:15 -0400)]
Revert "drm/amdgpu: use the BAR if possible in amdgpu_device_vram_access v2"

This reverts commit c12b84d6e0d70f1185e6daddfd12afb671791b6e.

The original patch causes a RAS event and subsequent kernel hard-hang
when running the KFDMemoryTest.PtraceAccessInvisibleVram on VG20 and
Arcturus

dmesg output at hang time:
[drm] RAS event of type ERREVENT_ATHUB_INTERRUPT detected!
amdgpu 0000:67:00.0: GPU reset begin!
Evicting PASID 0x8000 queues
Started evicting pasid 0x8000
qcm fence wait loop timeout expired
The cp might be in an unrecoverable state due to an unsuccessful queues preemption
Failed to evict process queues
Failed to suspend process 0x8000
Finished evicting pasid 0x8000
Started restoring pasid 0x8000
Finished restoring pasid 0x8000
[drm] UVD VCPU state may lost due to RAS ERREVENT_ATHUB_INTERRUPT
amdgpu: [powerplay] Failed to send message 0x26, response 0x0
amdgpu: [powerplay] Failed to set soft min gfxclk !
amdgpu: [powerplay] Failed to upload DPM Bootup Levels!
amdgpu: [powerplay] Failed to send message 0x7, response 0x0
amdgpu: [powerplay] [DisableAllSMUFeatures] Failed to disable all smu features!
amdgpu: [powerplay] [DisableDpmTasks] Failed to disable all smu features!
amdgpu: [powerplay] [PowerOffAsic] Failed to disable DPM!
[drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <powerplay> failed -5

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/gfx9: add gfxoff quirk
Alex Deucher [Thu, 9 Apr 2020 13:40:01 +0000 (09:40 -0400)]
drm/amdgpu/gfx9: add gfxoff quirk

Fix screen corruption with firefox.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=207171
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: set mp1 state before reload
John Clements [Tue, 14 Apr 2020 07:22:29 +0000 (15:22 +0800)]
drm/amdgpu: set mp1 state before reload

Set MP1 state to prepare for unload before reloading SMU FW

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: update psp fw loading sequence
John Clements [Tue, 14 Apr 2020 07:21:35 +0000 (15:21 +0800)]
drm/amdgpu: update psp fw loading sequence

Added dedicated function to check if particular fw should be skipped from loading.

Added dedicated function for SMU FW loading via PSP

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: update Arcturus smu-driver if header
Evan Quan [Mon, 13 Apr 2020 10:49:50 +0000 (18:49 +0800)]
drm/amd/powerplay: update Arcturus smu-driver if header

To fit the latest PMFW.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: properly set the dpm_enabled state
Evan Quan [Tue, 7 Apr 2020 06:37:42 +0000 (14:37 +0800)]
drm/amd/powerplay: properly set the dpm_enabled state

On the ASIC powered down(in baco or system suspend),
the dpm_enabled will be set as false. Then all access
(e.g. df state setting issued on RAS error event) to
SMU will be blocked.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: correct i2c eeprom init/fini sequence
Evan Quan [Mon, 13 Apr 2020 05:26:22 +0000 (13:26 +0800)]
drm/amd/powerplay: correct i2c eeprom init/fini sequence

As data transfer may starts immediately after i2c eeprom init
completed. Thus i2c eeprom should be initialized after SMU
ready. And i2c data transfer should be prohibited when SMU
down. That is the i2c eeprom fini sequence needs to be
updated also.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: bump the NAVI10 smu-driver if version
Evan Quan [Fri, 6 Mar 2020 10:08:41 +0000 (18:08 +0800)]
drm/amd/powerplay: bump the NAVI10 smu-driver if version

To fit the latest SMC firmware 42.53 and eliminate the
warning on driver loading.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: revise the way to retrieve the board parameters
Evan Quan [Fri, 6 Mar 2020 09:54:44 +0000 (17:54 +0800)]
drm/amd/powerplay: revise the way to retrieve the board parameters

It can support different NV1x ASIC better. And this can guard
no member got missing.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix the hw hang during perform system reboot and reset
Prike Liang [Mon, 13 Apr 2020 13:41:14 +0000 (21:41 +0800)]
drm/amdgpu: fix the hw hang during perform system reboot and reset

The system reboot failed as some IP blocks enter power gate before perform
hw resource destory. Meanwhile use unify interface to set device CGPG to ungate
state can simplify the amdgpu poweroff or reset ungate guard.

Fixes: 487eca11a321ef ("drm/amdgpu: fix gfx hang during suspend with video playback (v2)")
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Tested-by: Mengbing Wang <Mengbing.Wang@amd.com>
Tested-by: Paul Menzel <pmenzel@molgen.mpg.de>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: remove redundant assignment to variable dp_ref_clk_khz
Colin Ian King [Fri, 10 Apr 2020 11:46:13 +0000 (12:46 +0100)]
drm/amd/display: remove redundant assignment to variable dp_ref_clk_khz

The variable dp_ref_clk_khz is being initialized with a value that is
never read and it is being updated later with a new value.  The
initialization is redundant and can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agoMerge tag 'drm-misc-next-2020-04-14' of git://anongit.freedesktop.org/drm/drm-misc...
Dave Airlie [Wed, 22 Apr 2020 00:40:34 +0000 (10:40 +1000)]
Merge tag 'drm-misc-next-2020-04-14' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for 5.8:

UAPI Changes:

  - drm: error out with EBUSY when device has existing master
  - drm: rework SET_MASTER and DROP_MASTER perm handling

Cross-subsystem Changes:

  - mm: export two symbols from slub/slob
  - fbdev: savage: fix -Wextra build warning
  - video: omap2: Use scnprintf() for avoiding potential buffer overflow

Core Changes:

  - Remove drm_pci.h
  - drm_pci_{alloc/free)() are now legacy
  - Introduce managed DRM resourcesA
  - Allow drivers to subclass struct drm_framebuffer
  - Introduce struct drm_afbc_framebuffer and helpers
  - fbdev: remove return value from generic fbdev setup
  - Introduce simple-encoder helper
  - vram-helpers: set fence on plane
  - dp_mst: ACT timeout improvements
  - dp_mst: Remove drm_dp_mst_has_audio()
  - TTM: ttm_trace_dma_{map/unmap}() cleanups
  - dma-buf: add flag for PCIP2P support
  - EDID: Various improvements
  - Encoder: cleanup semantics of possible_clones and possible_crtcs
  - VBLANK documentation updates
  - Writeback documentation updates

Driver Changes:

  - Convert several drivers to i2c_new_client_device()
  - Drop explicit drm_mode_config_cleanup() calls from drivers
  - Auto-release device structures with drmm_add_final_kfree()
  - Init bfdev console after registering DRM device
  - Make various .debugfs functions return 0 unconditionally; ignore errors
  - video: Use scnprintf() to avoid buffer overflows
  - Convert drivers to simple encoders

  - drm/amdgpu: note that we can handle peer2peer DMA-buf
  - drm/amdgpu: add support for exporting VRAM using DMA-buf v3
  - drm/kirin: Revert change to register connectors
  - drm/lima: Add optional devfreq and cooling device support
  - drm/lima: Various improvements wrt. task handling
  - drm/panel: nt39016: Support multiple modes and 50Hz
  - drm/panel: Support Leadtek LTK050H3146W
  - drm/rockchip: Add support for afbc
  - drm/virtio: Various cleanups
  - drm/hisilicon/hibmc: Enforce 128-byte stride alignment
  - drm/qxl: Fix notify port address of cursor ring buffer
  - drm/sun4i: Improvements to format handling
  - drm/bridge: dw-hdmi: Various improvements

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20200414090738.GA16827@linux-uq9g
4 years agoMerge tag 'drm-intel-next-2020-04-17' of git://anongit.freedesktop.org/drm/drm-intel...
Dave Airlie [Tue, 21 Apr 2020 21:03:56 +0000 (07:03 +1000)]
Merge tag 'drm-intel-next-2020-04-17' of git://anongit.freedesktop.org/drm/drm-intel into drm-next

UAPI Changes:

- drm/i915/perf: introduce global sseu pinning
  Allow userspace to request at perf/OA open full SSEU configuration
  on the system to be able to benchmark 3D workloads, at the cost of not
  being able to run media workloads. (Lionel)

  Userspace changes: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4021

- drm/i915/perf: add new open param to configure polling of OA buffer
  Let application choose how often the OA buffer should be checked on
  the CPU side for data availability for choosig between CPU overhead
  and realtime nature of data.

  Userspace changes: https://patchwork.freedesktop.org/series/74655/

  (i915 perf recorder is a tool to capture i915 perf data for viewing
  in GPUVis.)

- drm/i915/perf: remove generated code
  Removal of the machine generated perf/OA test configurations from i915.
  Used by Mesa v17.1-18.0, and shortly replaced by userspace supplied OA
  configurations. Removal of configs causes affected Mesa versions to
  fall back to earlier kernel behaviour (potentially missing metrics).
  (Lionel)

Cross-subsystem Changes:

- Backmerge of drm-next

- Includes tag 'topic/phy-compliance-2020-04-08' from
  git://anongit.freedesktop.org/drm/drm-misc

Driver Changes:

- Fix for GitLab issue #27: Support 5k tiled dual DP display on SKL (Ville)
- Fix https://github.com/thesofproject/linux/issues/1719: Broken audio after
  S3 resume on JSL platforms. (Kai)
- Add new Tigerlake PCI IDs (Swathi D.)
- Add missing Tigerlake W/As (Matt R.)
- Extended Wa_2006604312 to EHL (Matt A)
- Add DPCD link_rate quirk for Apple 15" MBP 2017 (v3) (Mario)
- Make Wa_14010229206 apply to all Tigerlake steppings (Swathi d)
- Extend hotplug detect retry on TypeC connectors to 5 seconds (Imre)
- Yield the timeslice if caught waiting on a user semaphore (Chris)
- Limit the residual W/A batch to Haswell due to instability on IVB/BYT (Chris)
- TBT AUX should use TC power well ops on Tigerlake (Matt R)
- Update PMINTRMSK holding fw to make it effective for RPS (Francisco, Chris)
- Add YUV444 packed format support for skl+ (Stanislav)
- Invalidate OA TLB when closing perf stream to avoid corruption (Umesh)
- HDCP: fix Ri prime check done during link check (Oliver)
- Rearm heartbeat on sysfs interval change (Chris)
- Fix crtc nv12 etc. plane bitmasks for DPMS off (Ville)
- Treat idling as a RPS downclock event (Chris)
- Leave rps->cur_freq on unpark (Chris)
- Ignore short pulse when EDP panel powered off (Anshuman)
- Keep the engine awake until the next jiffie, to avoid ping-pong on
  moderate load (Chris)
- Select the deepest available parking mode for rc6 on IVB (Chris)
- Optimizations to direct submission execlist path (Chris)
- Avoid NULL pointer dereference at intel_read_infoframe() (Chris)
- Fix mode private_flags comparison at atomic_check (Uma, Ville)
- Use forced codec wake on all gen9+ platforms (Kai)
- Schedule oa_config after modifying the contexts (Chris, Lionel)
- Explicitly reset both reg and context runtime on GPU reset (Chris)
- Don't enable DDI IO power on a TypeC port in TBT mode (Imre)
- Fixes to TGL, ICL and EHL vswing tables (Jose)
- Fill all the unused space in the GGTT (Chris, imre)
- Ignore readonly failures when updating relocs (Chris)
- Attempt to find free space earlier for non-pinned VMAs (Chris)
- Only wait for GPU activity before unbinding a GGTT fence (Chris)
- Avoid data loss on small userspace perf OA polling (Ashutosh)
- Watch out for unevictable nodes during eviction (Matt A)
- Reinforce the barrier after GTT updates for Ironlake (Chris)

- Convert various parts of driver to use drm_device based logging (Wambui, Jani)
- Avoid dereferencing already closed context for engine (Chris)
- Enable non-contiguous pipe fusing (Anshuman)
- Add HW readout of Gamma LUT on ICL (Swati S.)
- Use explicit flag to mark unreachable intel_context (Chris)
- Cancel a hung context if already closed (Chris)
- Add DP VSC/HDR SDP data structures and write routines (Gwan-gyeong)
- Report context-is-closed prior to pinning at execbuf (Chris)
- Mark timeline->cacheline as destroyed after rcu grace period (Chris)
- Avoid live-lock with i915_vma_parked() (Chris)
- Avoid gem_context->mutex for simple vma lookup (Chris)
- Rely on direct submission to the queue (Chris)
- Configure DSI transcoder to operate in TE GATE command mode (Vandita)
- Add DI vblank calculation for command mode (Vandita)
- Disable periodic command mode if programmed by GOP (Vandita)
- Use private flags to indicate TE in cmd mode (Vandita)
- Make fences a nice-to-have for FBC on GEN9+ (Jose)
- Fix work queuing issue with mixed virtual engine/physical engine
  submissions (Chris)
- Drop final few uses of drm_i915_private.engine (Chris)
- Return early after MISSING_CASE for write_dp_sdp (Chris)
- Include port sync state in the state dump (Ville)
- ELSP workaround switching back to a completed context (Chris)
- Include priority info in trace_ports (Chris)
- Allow for different modes of interruptible i915_active_wait (Chris)
- Split eb_vma into its own allocation (Chris)
- Don't read perf head/tail pointers outside critical section (Lionel)
- Pause CS flow before execlists reset (Chris)
- Make fence revocation unequivocal (Chris)
- Drop cached obj->bind_count (Chris)
- Peek at the next submission for error interrupts (Chris)
- Utilize rcu iteration of context engines (Chris)
- Keep a per-engine request pool for power management ops (Chris)
- Refactor port sync code into normal modeset flow (Ville)
- Check current i915_vma.pin_count status first on unbind (Chris)
- Free request pool from virtual engines (Chris)
- Flush all the reloc_gpu batch (Chris)
- Make exclusive awaits on i915_active optional and allow async waits (Chris)
- Wait until the context is finally retired before releasing engines (Chris)

- Prefer '%ps' for printing function symbol names (Chris)
- Allow setting generic data pointer on intel GT debugfs (Andi)
- Constify DP link computation code more (Ville)
- Simplify MST master transcoder computation (Ville)
- Move TRANS_DDI_FUNC_CTL2 programming where it belongs (Ville)
- Move icl_get_trans_port_sync_config() into the DDI code (Ville)
- Add definitions for VRR registers and bits (Aditya)
- Refactor hardware fence code (Chris)
- Start passing latency as parameter to WM calculation (Stanislav)
- Kernel selftest and debug tracing improvements (Matt A, Chris, Mika)
- Fixes to CI found corner cases and lockdep splats (Chris)
- Overall fixes and refactoring to GEM code (Chris)
- Overall fixes and refactoring to display code (Ville)
- GuC/HuC code improvements (Daniele, Michal Wa)
- Static code checker fixes (Nathan, Ville, Colin, Chris)
- Fix spelling mistake (Chen)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200417111548.GA15033@jlahtine-desk.ger.corp.intel.com
4 years agodma-buf: Couple of documentation typo fixes
Gal Pressman [Mon, 20 Apr 2020 07:41:15 +0000 (10:41 +0300)]
dma-buf: Couple of documentation typo fixes

Fix a couple of typos: "as" -> "has" and "int" -> "in".

Signed-off-by: Gal Pressman <galpress@amazon.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20200420074115.23931-1-galpress@amazon.com
4 years agodrm/gma500: Remove dead code
Souptick Joarder [Mon, 20 Apr 2020 18:12:17 +0000 (23:42 +0530)]
drm/gma500: Remove dead code

These are dead code since 3.7. If there is no plan to use them further,
these can be removed forever.

Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com>
Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1587406337-32317-1-git-send-email-jrdr.linux@gmail.com
4 years agodrm/gma500: remove unused variable 'hdmi_ids'
YueHaibing [Fri, 17 Apr 2020 10:10:32 +0000 (18:10 +0800)]
drm/gma500: remove unused variable 'hdmi_ids'

drivers/gpu/drm/gma500/oaktrail_hdmi.c:676:35: warning: ‘hdmi_ids’ defined but not used [-Wunused-const-variable=]
 static const struct pci_device_id hdmi_ids[] = {
                                   ^~~~~~~~

It is never used, remove it.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20200417101032.8140-1-yuehaibing@huawei.com
4 years agodrm: Fix misspellings of "Analog Devices"
Geert Uytterhoeven [Thu, 16 Apr 2020 10:30:55 +0000 (12:30 +0200)]
drm: Fix misspellings of "Analog Devices"

According to https://www.analog.com/, the company name is spelled
"Analog Devices".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/msgid/20200416103058.15269-4-geert+renesas@glider.be
4 years agodrm/ast: Allocate initial CRTC state of the correct size
Thomas Zimmermann [Thu, 30 Jan 2020 09:40:12 +0000 (10:40 +0100)]
drm/ast: Allocate initial CRTC state of the correct size

The ast driver inherits from DRM's CRTC state, but still uses the atomic
helper for struct drm_crtc_funcs.reset, drm_atomic_helper_crtc_reset().

The helper only allocates enough memory for the core CRTC state. That
results in an out-ouf-bounds access when duplicating the initial CRTC
state. Simplified backtrace shown below:

[   21.469321] ==================================================================
[   21.469434] BUG: KASAN: slab-out-of-bounds in ast_crtc_atomic_duplicate_state+0x84/0x100 [ast]
[   21.469445] Read of size 8 at addr ffff888036c1c5f8 by task systemd-udevd/382
[   21.469451]
[   21.469464] CPU: 2 PID: 382 Comm: systemd-udevd Tainted: G            E     5.5.0-rc6-1-default+ #214
[   21.469473] Hardware name: Sun Microsystems SUN FIRE X2270 M2/SUN FIRE X2270 M2, BIOS 2.05    07/01/2010
[   21.469480] Call Trace:
[   21.469501]  dump_stack+0xb8/0x110
[   21.469528]  print_address_description.constprop.0+0x1b/0x1e0
[   21.469557]  ? ast_crtc_atomic_duplicate_state+0x84/0x100 [ast]
[   21.469581]  ? ast_crtc_atomic_duplicate_state+0x84/0x100 [ast]
[   21.469597]  __kasan_report.cold+0x1a/0x35
[   21.469640]  ? ast_crtc_atomic_duplicate_state+0x84/0x100 [ast]
[   21.469665]  kasan_report+0xe/0x20
[   21.469693]  ast_crtc_atomic_duplicate_state+0x84/0x100 [ast]
[   21.469733]  drm_atomic_get_crtc_state+0xbf/0x1c0
[   21.469768]  __drm_atomic_helper_set_config+0x81/0x5a0
[   21.469803]  ? drm_atomic_plane_check+0x690/0x690
[   21.469843]  ? drm_client_rotation+0xae/0x240
[   21.469876]  drm_client_modeset_commit_atomic+0x230/0x390
[   21.469888]  ? __mutex_lock+0x8f0/0xbe0
[   21.469929]  ? drm_client_firmware_config.isra.0+0xa60/0xa60
[   21.469948]  ? drm_client_modeset_commit_force+0x28/0x230
[   21.470031]  ? memset+0x20/0x40
[   21.470078]  drm_client_modeset_commit_force+0x90/0x230
[   21.470110]  drm_fb_helper_restore_fbdev_mode_unlocked+0x5f/0xc0
[   21.470132]  drm_fb_helper_set_par+0x59/0x70
[   21.470155]  fbcon_init+0x61d/0xad0
[   21.470185]  ? drm_fb_helper_restore_fbdev_mode_unlocked+0xc0/0xc0
[   21.470232]  visual_init+0x187/0x240
[   21.470266]  do_bind_con_driver+0x2e3/0x460
[   21.470321]  do_take_over_console+0x20a/0x290
[   21.470371]  do_fbcon_takeover+0x85/0x100
[   21.470402]  register_framebuffer+0x2fd/0x490
[   21.470425]  ? kzalloc.constprop.0+0x10/0x10
[   21.470503]  __drm_fb_helper_initial_config_and_unlock+0xf2/0x140
[   21.470533]  drm_fbdev_client_hotplug+0x162/0x250
[   21.470563]  drm_fbdev_generic_setup+0xd2/0x155
[   21.470602]  ast_driver_load+0x688/0x850 [ast]
<...>
[   21.472625] ==================================================================

Allocating enough memory for struct ast_crtc_state in a custom ast CRTC
reset handler fixes the problem.

v2:
* implement according to drm_atomic_helper_crtc_reset()
* update state with __drm_atomic_helper_crtc_reset()

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Fixes: 83be6a3ceb11 ("drm/ast: Introduce struct ast_crtc_state")
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Dave Airlie <airlied@redhat.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Noralf Trønnes" <noralf@tronnes.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200130094012.32140-1-tzimmermann@suse.de