Alyssa Rosenzweig [Wed, 28 Jul 2021 16:04:20 +0000 (12:04 -0400)]
pan/bi: Expose unit tested scheduler predicates
I want to move the tests to their own executable to integrate better
with meson.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12109>
Alyssa Rosenzweig [Wed, 28 Jul 2021 15:59:19 +0000 (11:59 -0400)]
pan/bi: Remove dated ASSERTED properties
This was used when we were only unit testing. Now that we have an actual
scheduler, it's pure noise.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12109>
Alyssa Rosenzweig [Wed, 28 Jul 2021 15:58:57 +0000 (11:58 -0400)]
pan/bi: Inline away bi_must_last
Totally trivial.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12109>
Dylan Baker [Tue, 27 Jul 2021 19:01:36 +0000 (12:01 -0700)]
freedreno/ir3: Add build id to the disassembler test
This is required (at least for me on x86) to get the tool to pass it's
own test, otherwise it fails the build_id assertion.
Fixes:
1462b00391711ff86350e802c1a3e5075a3a1632
("freedreno/ir3: Add a unit test for our disassembler.")
Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12084>
Mike Blumenkrantz [Tue, 15 Jun 2021 20:18:47 +0000 (16:18 -0400)]
zink: never use staging buffer for unsynchronized buffer maps
this is ultra broken, do not attempt
Fixes:
6bfbce0447b ("zink: rework buffer mapping")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12111>
Jesse Natalie [Wed, 21 Jul 2021 17:30:26 +0000 (10:30 -0700)]
mesa/main: Check for fbo attachments when importing EGL images to textures
Fixes an assert when binding an fbo with a texture bound to one of its attachments,
if the texture was updated with an EGL image after it was bound.
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11998>
Ian Romanick [Mon, 28 Jun 2021 18:51:10 +0000 (11:51 -0700)]
iris: Split iris_upload_shader in two
Now the part that uploads the shader and the part that finishes the
creation of the shader are separated. Each now has a more reasonable
number of parameters.
Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Fri, 4 Jun 2021 21:17:42 +0000 (14:17 -0700)]
iris: Enable threaded shader compilation
There are a couple minor things that can be improved:
1. Eliminate (or reduce) the dynamic allocation of the
threaded_compile_job.
2. For apps like shader-db, improve the case where nr_threads=0. Right
now this adds thread switching and mutex overhead.
3. Other performance improvements? iris_uncompiled_shader::variants has
some special properties that make it ripe for replacement with a
lockless list. Without gathering some data, it's hard to guess what
impact that could have.
v2: Fix whitespace and formatting issues. Noticed by Ken.
s/threaded_compile_job/iris_threaded_compile_job/g. Suggested by Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Tue, 4 May 2021 18:17:30 +0000 (11:17 -0700)]
iris: add sync_compile option
This can be useful to simplify debugging compiler issues.
Similar to
9445a4ab439 ("radeonsi: add radeonsi_sync_compile option").
v2: Actually query the driconf to set screen->driconf.sync_compile.
Noticed by Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Thu, 3 Jun 2021 19:06:49 +0000 (12:06 -0700)]
iris: Don't pass the shader key to iris_compile_[shader stage]
Use the copy of the key embedded in the compiled shader.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Wed, 2 Jun 2021 21:30:08 +0000 (14:30 -0700)]
iris: Add the variant to the list as early as possible
I tried to find a way to break this into some smaller commits, but
everything is very intertwined. :(
When searching the variants list in the iris_uncompiled_shader, add the
new variant if it is not found. This will be necessary for threaded
shader compilation. This conceptually simple change had a bunch of
fallout.
Much of this was at least conceptually borrowed from radeonsi.
- Other threads might find a variant in the list before the variant has
been compiled. To accomdate this, add a fence. Each thread will wait
on the fence in the variant when searching the list.
- A variant in the list may fail compilation. To accomodate this, add a
flag. All paths will examine iris_compiled_shader::compilation_failed
before trying to use the variant.
- The race condition between multiple threads trying to create the same
variant at the same time is handled *before* both thread spend the
effort to compile the shader. The means that iris_upload_shader
cannot change shaders on the caller, so it does not need to return
anything.
v2: Change "found" parameter of find_or_add_variant to "added." This
inverts the values returned, and it probably makes uses of the returned
value more easily understood. Always set the value in the called
function. Suggested by Ken.
v3: Move shader->compilation_failed check to avoid shader != NULL test.
Rearrange some logic and add a comment in iris_update_compiled_tcs.
Suggested by Ken. Don't call find_or_add_variant in
iris_create_shader_state. See
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229#note_1000843
for more details. Noticed by Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Wed, 2 Jun 2021 19:26:35 +0000 (12:26 -0700)]
iris: Allocate shader variant in caller of iris_upload_shader
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Wed, 2 Jun 2021 18:18:35 +0000 (11:18 -0700)]
iris: Extract allocation bits from iris_upload_shader to iris_create_shader_variant
The added assertion in iris_create_shader_variant helped catch a bug in
the next commit.
v2: Drop (unnecessary) initialization of shader->assembly.res when
moving to iris_create_shader_variant. Suggested by Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Tue, 25 May 2021 19:41:14 +0000 (12:41 -0700)]
iris: Ref count the uncompiled shaders
I tried /just/ ref counting the uncompiled shaders, but that is not
sufficient. At the very least, it's a problem for blorp shaders that
only have variants (and no uncompiled shader).
This is in prepartion for using the live shader cache.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Wed, 2 Jun 2021 02:07:24 +0000 (19:07 -0700)]
iris: Merge iris_create_[shader stage]_state funcs into iris_create_shader_state
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Wed, 19 May 2021 17:52:06 +0000 (10:52 -0700)]
iris: Unify iris_create_[shader stage]_state functions
v2: Merge old iris_create_shader_state into the new function.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Wed, 19 May 2021 17:29:50 +0000 (10:29 -0700)]
iris: Unify iris_delete_[shader stage]_state functions
This is in prepartion for using the live shader cache.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Wed, 2 Jun 2021 17:32:36 +0000 (10:32 -0700)]
iris: Fix return type of iris_compile_*
Trivial.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Wed, 19 May 2021 17:38:35 +0000 (10:38 -0700)]
iris: Add a comment for iris_uncompiled_shader::nir
This would have saved me a few minutes searching around.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Ian Romanick [Mon, 7 Jun 2021 19:04:03 +0000 (12:04 -0700)]
util/queue: Don't crash in util_queue_destroy when init failed
This simplifies the error exit paths for drivers that use these queues.
v2: Move allocation of queue->jobs after initializing the mutxes and
condition variables. Noticed by Ken.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
Mike Blumenkrantz [Tue, 20 Jul 2021 16:23:35 +0000 (12:23 -0400)]
st/texture: refactor get_src_format() to be more useful
take more params in order to enable better reuse
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11982>
Mike Blumenkrantz [Thu, 22 Apr 2021 20:10:32 +0000 (16:10 -0400)]
mesa/st: add format-finding capabilities to pbo get_dst_format()
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11982>
Mike Blumenkrantz [Thu, 22 Apr 2021 20:09:19 +0000 (16:09 -0400)]
mesa/st: enable calling st_choose_format() purely for translation
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11982>
Mike Blumenkrantz [Thu, 22 Apr 2021 20:00:58 +0000 (16:00 -0400)]
mesa/st: break up st_choose_matching_format()
having a function that just returns the equivalent format is handy
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11982>
Mike Blumenkrantz [Mon, 19 Apr 2021 17:03:06 +0000 (13:03 -0400)]
mesa/st: break up st_GetTexSubImage
this makes the function more readable and enables a lot of the code
to be reused for other purposes
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11982>
Connor Abbott [Wed, 28 Jul 2021 14:35:48 +0000 (16:35 +0200)]
ir3: Preserve gl_ViewportIndex in the binning shader
Fixes dEQP-VK.draw.shader_viewport_index.* with TU_DEBUG=forcebin.
Fixes:
efff7342204 ("turnip: multiViewport and VK_EXT_shader_viewport_index_layer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12104>
Alyssa Rosenzweig [Tue, 27 Jul 2021 20:44:09 +0000 (16:44 -0400)]
gallium/tests: Fix warning calculating absdiff
With clang building tests:
../src/gallium/tests/trivial/compute.c:1215:29: warning: taking the absolute value of unsigned type 'unsigned int' has no effect [-Wabsolute-value]
if (abs(((uint32_t *)x)[j] -
^
../src/gallium/tests/trivial/compute.c:1215:29: note: remove the call to 'abs' since unsigned values cannot be negative
if (abs(((uint32_t *)x)[j] -
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12087>
Lionel Landwerlin [Sat, 17 Jul 2021 14:38:42 +0000 (17:38 +0300)]
loader/dri3: create linear buffer with scanout support
If we have a different GPU dealing with display, we fallback to
exchanging linear buffers with the compositor. We should specify in
creating the linear buffer that this could be used for display.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4706
Cc: mesa-stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11942>
Danylo Piliaiev [Fri, 23 Jul 2021 13:50:27 +0000 (16:50 +0300)]
tu: delay decision of forcing sysmem due to subpass self-dependencies
DXVK always inserts vertex stage subpass self-dependency for every
subpass regardless of whether there actually would be a barrier.
This effectively disabled gmem rendering with DXVK.
Thus we delay the decision to disable gmem rendering until we
see a barrier with vertex stages.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12038>
Tomeu Vizoso [Wed, 14 Apr 2021 13:16:14 +0000 (15:16 +0200)]
docs/ci: Update http cache config to let Authorization headers pass through
When downloading traces from a restricted repository, the Authorization
header will be set. Previous to this change, the http proxy would drop
it.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6441>
Antonio Caggiano [Wed, 10 Feb 2021 18:07:32 +0000 (19:07 +0100)]
ci/freedreno: Test with non-redistributable traces
Add a job to test with traces that we cannot redistribute, listed in a
separate file. Since those traces might not be accessible by everyone,
this job is created only when the pipeline is triggered by `marge-bot`.
This job is optional because otherwise it could be blocking a merge
request of someone who cannot really debug the issue due to lack of
access to these traces.
The documentation available under `docs/ci` goes into more details
explaining the rationale behind optional traces.
Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6441>
Zhu Yuliang [Wed, 28 Jul 2021 03:27:27 +0000 (11:27 +0800)]
gallium/vl: don't leak fd in vl_dri3_screen_create
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12092>
Pierre-Eric Pelloux-Prayer [Fri, 16 Jul 2021 09:45:56 +0000 (11:45 +0200)]
radeonsi: preserve derivatives after discards for ARB shaders
Contrary to the GLSL spec, the ARB fp spec doesn't explicitely
states that derivatives are undefined after discards.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5018
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11972>
Pierre-Eric Pelloux-Prayer [Fri, 16 Jul 2021 09:42:42 +0000 (11:42 +0200)]
mesa: move gl_program::is_arb_asm to shader_info
This will be used from radeonsi in the next commit.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11972>
Erik Faye-Lund [Tue, 13 Jul 2021 09:26:01 +0000 (11:26 +0200)]
lavapipe: do not assert on more than 32 samplers
We can have more than 32 samplers, but the code below will assert in that
case. The return value is not used for samplers, so let's just return
zero early and be done with it.
Fixes:
c18ff60087e ("lavapipe: emit correct textures_used for texture-arrays")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11845>
Chia-I Wu [Thu, 22 Jul 2021 23:52:47 +0000 (16:52 -0700)]
vulkan/wsi/x11: do not inherit last_present_mode
Under XWayland, the first present after a window resize is sometimes
completed with COPY (seems to happen when the previous present with the
old size is pending; not really sure). The following presents are
completed with FLIP.
When a swapchain is created with an old swapchain, and
old_chain->last_present_mode is FLIP, chain->last_present_mode is set to
FLIP as well. This causes the new swapchain to be marked
VK_SUBOPTIMAL_KHR, which is sticky, if the first present is completed
with COPY.
Instead of inheriting, treat each swapchain as independent. We will
miss the case where an old swapchain is flipping but a new swapchain is
copying. But swapchain reallocation normally happens in response to
present engine state change. If the newly allocated swapchain is
copying, another reallocation is unlikely to fix that.
Fixes:
61309c2a727 ("vulkan/wsi/x11: Return VK_SUBOPTIMAL_KHR for X11")
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12030>
Mike Blumenkrantz [Mon, 17 May 2021 12:44:02 +0000 (08:44 -0400)]
zink: rework buffer mapping
this collects a bunch of changes which need to be made but which can't
be split up incrementally without breaking things:
* move map offset to zink_transfer::offset for consistent handling
* fix stream uploader map rules to only apply for discard cases so
the stream uploader doesn't explode
* fix the staging buffer map rules to apply to any non-staging readback
* stop making huge staging buffers for readback
* break out the DONTBLOCK case since this is only coming from qbo readback
* add explicit read-only sync for maps to stall on writes
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12090>
Mike Blumenkrantz [Mon, 17 May 2021 18:40:19 +0000 (14:40 -0400)]
zink: use MAP_ONCE for qbo readback
this implies that the buffer can be unmapped
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12090>
Alyssa Rosenzweig [Tue, 27 Jul 2021 23:28:46 +0000 (19:28 -0400)]
pan/va: Allow floating-point swizzles on ATEST
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Tue, 27 Jul 2021 00:35:51 +0000 (20:35 -0400)]
pan/bi: Align staging registers on Valhall
This handles the following from the Valhall specification (that I wrote):
If multiple subsequent staging registers are accessed, the base must
be aligned to 2. However, even if 4 registers are accessed, it is
not necessary to align to 4, only to 2. This restriction allows the
hardware to use a 64-bit data path without handling unaligned
access, which is more efficient. This restriction does not apply if
only a single register is accessed.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 26 Jul 2021 22:22:03 +0000 (18:22 -0400)]
pan/bi: Clarify the logic of bi_reconverge_branches
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 26 Jul 2021 22:13:32 +0000 (18:13 -0400)]
pan/bi: Clean up and export bi_reconverge_branches
Decides when we need "branch reconvergence" (canonical term), the
logical opposite of "back-to-back execution" (non-canonical term, this
is old code in Bifrost terms). So invert the return value, rename, and
export so we can use it when packing Valhall instructions.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 26 Jul 2021 22:05:00 +0000 (18:05 -0400)]
pan/bi: Add branch_offset immediate
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 26 Jul 2021 21:44:57 +0000 (17:44 -0400)]
pan/bi: Garbage collect stuff in bi_layout.c
Predates clause scheduling.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Tue, 27 Jul 2021 20:45:17 +0000 (16:45 -0400)]
pan/bi: Fix UBO push with nir_opt_shrink_vectors
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 26 Jul 2021 16:15:15 +0000 (12:15 -0400)]
pan/bi: Add constant folding unit test
I just played with the implementation, let's ensure I didn't break it.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 26 Jul 2021 16:15:41 +0000 (12:15 -0400)]
pan/bi: Refactor constant folding for testability
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 26 Jul 2021 15:14:33 +0000 (11:14 -0400)]
pan/bi: Use bi_apply_swizzle in constant folding
Much more legible now.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 26 Jul 2021 15:14:05 +0000 (11:14 -0400)]
pan/bi: Add helper to swizzle a constant
Instead of open-coding special cases in multiple places, just keep a
canonical version that handles every case.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Fri, 23 Jul 2021 18:34:22 +0000 (14:34 -0400)]
pan/bi: Add strip_index helper
Needed to correctly lower sources to moves, used in the FAU lowering.
Technically, the issue is already present on Bifrost, but it's hidden
because Bifrost packing doesn't validate the absense of unsupported
modifiers. Valhall packing adds more safety, which caught this issue.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Fri, 23 Jul 2021 16:52:57 +0000 (12:52 -0400)]
pan/bi: Rename CLPER_V7 back to CLPER
v6 is really the oddball here. CLPER on v9 supports a superset of v7.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Fri, 23 Jul 2021 16:41:52 +0000 (12:41 -0400)]
pan/bi: Rename NOP.i32 to NOP
Simpler and matches the syntax of Valhall I've picked out.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Fri, 23 Jul 2021 16:03:11 +0000 (12:03 -0400)]
pan/bi: Fix typo in FAU enum
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Thu, 22 Jul 2021 22:45:21 +0000 (18:45 -0400)]
pan/bi: Model Valhall special values as FAU
Not sure if this is "really" FAU but it's convenient to treat it as
such.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Thu, 22 Jul 2021 17:53:10 +0000 (13:53 -0400)]
pan/bi: Model RSCALE for Valhall
Faster than FMA_RSCALE. We'll want to optimize this (e.g. for exp2).
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Thu, 22 Jul 2021 00:14:14 +0000 (20:14 -0400)]
pan/bi: Model *ADD_IMM instructions in IR
Needed for Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Wed, 21 Jul 2021 18:17:06 +0000 (14:17 -0400)]
pan/bi: Remove unused BIR_FAU_HI
Redundant with offset.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Wed, 21 Jul 2021 16:25:53 +0000 (12:25 -0400)]
pan/bi: Add discard flag to bi_index
Needed to model Valhall instructions. Should also be useful to RA if we
ever get around to doing something SSA based.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Wed, 21 Jul 2021 14:55:47 +0000 (10:55 -0400)]
pan/bi: DCE after bifrost_nir_lower_algebraic_late
Needed for sat_signed to fuse, since we run modifier prop before backend
DCE.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Wed, 21 Jul 2021 15:52:05 +0000 (11:52 -0400)]
pan/bi: Constify BIR manipulation
For use in Valhall packing.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Wed, 21 Jul 2021 14:54:53 +0000 (10:54 -0400)]
pan/bi: Remove redundant check in clamp fusing
Already checked above.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Fri, 23 Jul 2021 20:33:41 +0000 (16:33 -0400)]
pan/bi: Add instruction unit test macro
Checks for instruction equality.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Thu, 22 Jul 2021 15:58:32 +0000 (11:58 -0400)]
pan/bi: Add instruction equality helper
Useful for unit testing.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Wed, 21 Jul 2021 14:54:10 +0000 (10:54 -0400)]
pan/bi: Add helpers for unit testing
At some point I should stop reinventing GTest but, look, writing tests
at all is big for me, one thing at a time, ok? 😋
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Tue, 20 Jul 2021 00:00:38 +0000 (20:00 -0400)]
pan/bi: Output binaries from standalone compiler
Useful for shader replacement.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 19 Jul 2021 18:20:48 +0000 (14:20 -0400)]
pan/bi: Only call clause code on Bifrost
Valhall will have its own simpler code path.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 19 Jul 2021 18:20:34 +0000 (14:20 -0400)]
pan/bi: Add quirks for Mali G78
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 19 Jul 2021 17:41:49 +0000 (13:41 -0400)]
pan/bi: Do more mesa/st stuff in standalone compiler
From freedreno.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 19 Jul 2021 17:41:32 +0000 (13:41 -0400)]
pan/bi: Zero initialize shader_info
Fixes the following assert with the standalone compiler
bifrost_compiler: ../src/panfrost/bifrost/bi_opt_push_ubo.c:134: bi_opt_push_ubo: Assertion `ctx->info->push.count == 0' failed.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 19 Jul 2021 17:35:17 +0000 (13:35 -0400)]
pan/bi: Parse file names in standalone compiler
Would like to compile compute shaders too.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Mon, 19 Jul 2021 17:21:28 +0000 (13:21 -0400)]
pan/bi: Remove unused option
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Alyssa Rosenzweig [Sat, 17 Jul 2021 00:10:18 +0000 (20:10 -0400)]
pan/bi: Remove unused pointer from bi_instr
Yikes.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12026>
Mike Blumenkrantz [Tue, 25 May 2021 20:57:50 +0000 (16:57 -0400)]
zink: use dynamic line stipple
save those pipeline bits!
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12011>
Mike Blumenkrantz [Tue, 27 Jul 2021 22:01:19 +0000 (18:01 -0400)]
ci: add another zink job with timelines disabled
this codepath needs to be maintained for *vague handwaving*
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12089>
Mike Blumenkrantz [Tue, 27 Jul 2021 21:58:59 +0000 (17:58 -0400)]
zink: add env var to disable timelines
for ci use only
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12089>
Mike Blumenkrantz [Mon, 5 Apr 2021 16:02:39 +0000 (12:02 -0400)]
zink: export PIPE_CAP_TGSI_BALLOT
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11990>
Mike Blumenkrantz [Wed, 21 Jul 2021 15:09:52 +0000 (11:09 -0400)]
zink: remove VK_EXT_shader_subgroup_ballot from device info
restrict this to 1.2 only
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11990>
Mike Blumenkrantz [Mon, 5 Apr 2021 16:02:08 +0000 (12:02 -0400)]
zink: implement compiler handling for subgroup ballot builtins/intrinsics
these are all lowered and unremarkable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11990>
Mike Blumenkrantz [Mon, 5 Apr 2021 16:00:56 +0000 (12:00 -0400)]
zink: lower subgroup ballot instructions
this handles rewrites of ballot-related instructions/builtins to spirv
vec4 types from the native GLSL U64 type
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11990>
Mike Blumenkrantz [Fri, 21 May 2021 20:54:46 +0000 (16:54 -0400)]
zink: change descriptor flushing to assert
there should never be flushing due to pool depletion; instead, trigger an
oom flush and stall to replenish the pool after the draw/compute
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12012>
Philipp Zabel [Thu, 22 Jul 2021 10:47:15 +0000 (12:47 +0200)]
etnaviv: fix gbm_bo_get_handle_for_plane for multiplanar images
Implement resource_get_param for PIPE_RESOURCE_PARAM_NPLANES and fix
resource_get_handle to walk to the correct linked resource for
multiplanar images, allowing gbm_bo_get_handle_for_plane to be called
with plane > 0.
This fixes an assert that is triggered when a wayland client tries
to send weston an NV12 dmabuf, for example:
weston: .../mesa/src/gbm/backends/dri/gbm_dri.c:752: gbm_dri_bo_get_handle_for_plane: Assertion `plane == 0' failed.
Fixes:
788f6dc85781 ('Revert "gallium/dri: fix dri2_from_planar for multiplanar images"')
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12037>
Rohan Garg [Fri, 2 Jul 2021 09:56:58 +0000 (11:56 +0200)]
virgl: Enable caching for sampler views and render targets
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11241>
Rohan Garg [Tue, 8 Jun 2021 09:46:57 +0000 (11:46 +0200)]
Revert "Revert "virgl: Cache depth and stencil buffers""
This reverts commit
a8e75bb73c6f8ce94c4f598a2f4763b12188991c.
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11241>
Rohan Garg [Tue, 8 Jun 2021 09:43:35 +0000 (11:43 +0200)]
virgl: Add more meta data to cached resources
By expanding the meta data about resources in the cache we can match more
resources such as 3D textures, samplers and render targets.
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11241>
Alyssa Rosenzweig [Fri, 16 Jul 2021 15:48:46 +0000 (11:48 -0400)]
pan/va: Integrate the tests into meson test
This way we will get testing in CI. Invoke as
meson test --suite=panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
Alyssa Rosenzweig [Fri, 16 Jul 2021 17:22:27 +0000 (13:22 -0400)]
pan/va: Add disassembler test harness
Uses the same set of cases. This is a standalone C program because the
easy way of hooking into the disassembler from Python with subprocesses
was slow. This seems cleaner anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
Alyssa Rosenzweig [Tue, 27 Jul 2021 19:26:07 +0000 (15:26 -0400)]
pan/va: Add assembler test harness
Integration regression testing. Nothing fancy.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
Alyssa Rosenzweig [Fri, 16 Jul 2021 15:08:31 +0000 (11:08 -0400)]
pan/va: Add negative test cases for the assembler
These are lines of assembly that look valid but are not, and should
raise a parser error but not otherwise crash the assembler or produce
invalid code.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
Alyssa Rosenzweig [Fri, 16 Jul 2021 15:07:03 +0000 (11:07 -0400)]
pan/va: Add dis/assembler test cases
These are valid pairs of hexdumped assembled instructions and the
corresponding disassembly, to be used to regression test both the
assembler and the disassembler.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
Alyssa Rosenzweig [Fri, 16 Jul 2021 14:59:27 +0000 (10:59 -0400)]
pan/va: Add disassembler generator
When we bring up the Valhall compiler in Mesa, we will like to have a
disassembler in native code, so we shouldn't write our disassembler in
Python. Instead, we write a disassembler generator in Python with mako
templates, which will produce a va_disasm_instr entrypoint from the
architecture defined in ISA.xml and valhall.py.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
Alyssa Rosenzweig [Wed, 21 Jul 2021 23:54:02 +0000 (19:54 -0400)]
pan/va: Check for FAU conflicts in the assembler
Logic described in the "Uniform/constant restrictions" section of the
Valhall specification. (You know, my Valhall specification. Is there
another one?)
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
Alyssa Rosenzweig [Fri, 16 Jul 2021 14:52:43 +0000 (10:52 -0400)]
pan/va: Add Valhall assembler
This Python script acts as a standalone assembler. It takes Valhall
instructions with Mesa-flavour syntax, parses them, errors out if there
are syntax errors, and writes out an assembled binary if there are not.
It also is available as a programmatic interface for automated testing.
While this attempts to handle syntax errors, it does not check
semantics. It will happily compile programs that fault, provided each
instruction locally 'looks' plausible.
The code itself is quite small, despite supporting most of the known
ISA, because the syntax is regular and the heavylifting is done by
ISA.xml and valhall.py.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
Alyssa Rosenzweig [Fri, 23 Jul 2021 21:19:21 +0000 (17:19 -0400)]
pan/va: Assert no instructions are duplicated
Caught a bug in the published PDF. Whoops!
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
Alyssa Rosenzweig [Fri, 16 Jul 2021 14:49:35 +0000 (10:49 -0400)]
pan/va: Add ISA.xml parser and support code
This Python module parses the ISA.xml file added in the previous
commits, extracts all the useful information, and combines it with
extra annotations. In total, it provides a programmatic way to interface
with the Valhall instruction set.
from valhall import instructions, enums
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
Alyssa Rosenzweig [Fri, 16 Jul 2021 14:40:58 +0000 (10:40 -0400)]
pan/va: Add initial ISA.xml for Valhall
This handwritten file is the product of over a hundred hours of
reverse-engineering and represents the sum of what I've learned about
the Valhall architecture. It will be used in the next commits as the
backbone of a Valhall toolchain.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12025>
suijingfeng [Mon, 19 Jul 2021 15:06:48 +0000 (23:06 +0800)]
llvmpipe: correct the debug information printed with GALLIVM_PERF=nopt
GALLIVM_PERF_NO_OPT is "belond" to GALLIVM_PERF environment variable,
not GALLIVM_DEBUG. when GALLIVM_PERF=nopt is passed to llvmpipe,
"-sroa -early-cse -simplifycfg -reassociate -constprop -instcombine -gvn"
should not be printed. Those llvm optimation techniques should only be
printed when the default(-O2) optimation is enabled.
$ GALLIVM_PERF=nopt GALLIVM_DEBUG=dumpbc glmark2
Before apply this patch:
Invoke as "opt -sroa -early-cse -simplifycfg -reassociate -mem2reg -constprop -instcombine -gvn ir_setup_variant_0.bc | llc -O2 [-mcpu=<-mcpu option>] [-mattr=<-mattr option(s)>]"
After apply this patch:
Invoke as "opt -mem2reg ir_fs304_variant0.bc | llc -O0 [-mcpu=<-mcpu option>] [-mattr=<-mattr option(s)>]"
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: suijingfeng <suijingfeng@loongson.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11994>
Lepton Wu [Sat, 24 Jul 2021 04:27:00 +0000 (21:27 -0700)]
gallium: Reset {d,r}Priv in dri_unbind_context
The code in dri_make_current just checks the value of the pointers
to decide to update texture_stamp or not. This is buggy since a new
allocated drawable could share the same address with the previous
released drawable. Fix the stale pointer issue by always resetting
these pointers to NULL in dri_unbind_context.
v2:
Move the reset codes to the end of the function.
Signed-off-by: Lepton Wu <lepton@chromium.org>
Cc: mesa-stable
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12050>
Jason Ekstrand [Thu, 22 Jul 2021 16:17:28 +0000 (11:17 -0500)]
anv/android: Rework our handling of AHardwareBuffer imports
The current code we have for this is a bit of a mess, likely due to
trying too hard to put it in anv_android.c. The external_format bit in
anv_image, for instance, really means "quit creation early" which is
something we want to do for AHardwareBuffer imports regardless of
whether or not they use a native format. It gets set both by declaring
an AHardwareBuffer external handle type and by VkExternalFormatANDROID.
However, VkExternalFormatANDROID is only allowed for AHardwareBuffer
imports. If we ever did get an external format outside the context of
an AHardwareBuffer import, we would end up with a useless partially
created image.
When we detect an AHardwareBuffer import, we punt off to a function in
anv_android.c that does nothing interesting but call anv_create_image
with AUX disabled and external_format = true. The aux disable here is
useless because the actual isl_surf layout is done by resolve_ahw_image
which also sets ISL_SURF_USAGE_DISABLE_AUX_BIT. As far as external
formats go, anv_image_from_external() sets it regardless of whether or
not there is actually an external format.
This commit replaces anv_image::external_format with anv_image::from_ahb
which is the thing we actually want to track for this. We delete
anv_image_from_external and a bunch of the external_format handling
because it's all useless. The end result is massively simpler and,
while it appears to blur the boundary between Android code and the rest
of the driver, it makes the whole flow more obvious.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12040>
Connor Abbott [Mon, 26 Jul 2021 14:01:03 +0000 (16:01 +0200)]
tu: Triage some CTS failures
These should be fixed by the linked VK-GL-CTS change. I couldn't
reproduce the other renderpass failure on a650 though.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12065>
Tomeu Vizoso [Fri, 9 Jul 2021 14:11:50 +0000 (16:11 +0200)]
panvk: Implement vkCmdClearAttachments
For now it only supports one RT and color attachments.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12019>