Raun Krisch [Wed, 20 Oct 2021 15:48:45 +0000 (10:48 -0500)]
Merge pull request #247 from bashbaug/intel-enum-block
reserve SPIR-V enum block for Intel extensions
Ben Ashbaugh [Wed, 13 Oct 2021 00:04:12 +0000 (17:04 -0700)]
reserve SPIR-V enum block for Intel extensions
John Kessenich [Fri, 8 Oct 2021 04:22:39 +0000 (11:22 +0700)]
Merge pull request #245 from pmistryNV/nonconstoffset
Define a new Image operand bit mask for non constant offsets
Pankaj Mistry [Wed, 6 Oct 2021 00:16:39 +0000 (17:16 -0700)]
Define a new Image operand bit mask for non constant offsets
For details refer to https://gitlab.khronos.org/spirv/SPIR-V/-/issues/639
As part of the commit following changes have been introduced:
1. Added a separate section in spirv xml to reserve vendor specific bit masks.
2. Added a new image operand bit mask to support non constant offsets in textureGatherOffsets as defined in GL_NV_gpu_shader5
Raun Krisch [Wed, 6 Oct 2021 15:56:18 +0000 (10:56 -0500)]
Merge pull request #242 from egdaniel/patch-3
Register Magic Num for Skia SkSL SPIR-V Generator
egdaniel [Fri, 1 Oct 2021 13:34:50 +0000 (09:34 -0400)]
Register Magic Num for Skia SkSL SPIR-V Generator
Raun Krisch [Wed, 22 Sep 2021 16:07:46 +0000 (11:07 -0500)]
Merge pull request #240 from gnl21/fast-math
Remove 'Kernel' capability from fast-math flags
Graeme Leese [Thu, 16 Sep 2021 09:44:39 +0000 (10:44 +0100)]
Remove 'Kernel' capability from fast-math flags
The use of these flags (the FPFastMath decoration) is already protected
by the capability, so it isn't needed to protect the individual values
as well.
David Neto [Fri, 10 Sep 2021 22:31:24 +0000 (18:31 -0400)]
Merge pull request #237 from BedrockDotPng/patch-2
Update CMakeLists.txt
BedrockDotPng [Thu, 9 Sep 2021 14:54:44 +0000 (18:54 +0400)]
Update CMakeLists.txt
Fixed CMake file for Shaderc to properly compile.
John Kessenich [Wed, 8 Sep 2021 15:49:42 +0000 (22:49 +0700)]
Merge pull request #209 from kloczek/master
Add spirv-headers pkgconfig file
Raun Krisch [Mon, 30 Aug 2021 19:54:50 +0000 (14:54 -0500)]
Merge pull request #236 from greg-lunarg/db7
Add nonsemantic.shader.debuginfo to Bazel
Greg Fischer [Sat, 28 Aug 2021 00:32:59 +0000 (18:32 -0600)]
Add nonsemantic.shader.debuginfo to Bazel
Raun Krisch [Wed, 18 Aug 2021 03:33:54 +0000 (22:33 -0500)]
Merge pull request #231 from MarijnS95/duplicate-grammar
spirv.core.grammar: Remove duplicate OpArbitraryFloatPowNINTEL declaration
Marijn Suijten [Wed, 28 Jul 2021 07:32:03 +0000 (09:32 +0200)]
spirv.core.grammar: Remove duplicate OpArbitraryFloatPowNINTEL declaration
An identical declaration of `OpArbitraryFloatPowNINTEL` exists just
above, with the exact same opcode and operands.
Raun Krisch [Wed, 11 Aug 2021 16:26:16 +0000 (11:26 -0500)]
Merge pull request #226 from clayengine/master
Clay is an internal framework of Tellusim Technologies Inc.
Raun Krisch [Wed, 11 Aug 2021 16:23:51 +0000 (11:23 -0500)]
Merge pull request #233 from NikitaRudenkoIntel/opt
Fix minor details in SPV_INTEL_optnone extension
Raun Krisch [Wed, 11 Aug 2021 16:21:12 +0000 (11:21 -0500)]
Merge pull request #235 from alelenv/rt_motion
Add support for SPV_NV_ray_tracing_motion_blur.
alelenv [Tue, 10 Aug 2021 18:01:14 +0000 (11:01 -0700)]
Add support for SPV_NV_ray_tracing_motion_blur.
Nikita Rudenko [Wed, 28 Jul 2021 16:32:21 +0000 (19:32 +0300)]
Fix minor details in SPV_INTEL_optnone extension
Spec: https://github.com/intel/llvm/pull/3198
Nikita Rudenko [Wed, 28 Jul 2021 13:46:47 +0000 (19:46 +0600)]
Implement SPV_INTEL_optnone extension (#230)
Spec: https://github.com/intel/llvm/pull/3198
Raun Krisch [Wed, 21 Jul 2021 16:18:46 +0000 (11:18 -0500)]
Merge pull request #229 from gnl21/gnl-local-size-hint-id
Correct grammar for LocalSizeHintId
Graeme Leese [Tue, 20 Jul 2021 09:18:36 +0000 (10:18 +0100)]
Correct grammar for LocalSizeHintId
It is described in the spec as being the "same as LocalSizeHint mode,
but using <id> operands instead of literals", but the grammar had a
single <id> operand instead of the 3 literals for LocalSizeHint.
Raun Krisch [Wed, 14 Jul 2021 16:15:34 +0000 (11:15 -0500)]
Merge pull request #227 from kpet/fix-integer-dot-product-grammar
Fix grammar for PackedVectorFormat
Raun Krisch [Wed, 14 Jul 2021 16:13:53 +0000 (11:13 -0500)]
Merge pull request #228 from mmerecki/fix_version_of_QuantizationModes_and_OverflowModes
Add missing capabilities to QuantizationModes and OverflowModes enumerants
Mariusz Merecki [Fri, 9 Jul 2021 10:25:19 +0000 (12:25 +0200)]
Add missing capabilities and '"version" : "None"' to QuantizationModes and OverflowModes enumerants
Kevin Petit [Wed, 7 Jul 2021 18:42:53 +0000 (19:42 +0100)]
Fix grammar for PackedVectorFormat
PackedVectorFormat4x8BitKHR should be enabled by the SPV_KHR_integer_dot_product
extension that first introduced it and not the DotProductInput4x8BitPackedKHR
as per the extension specification.
See http://htmlpreview.github.io/?https://github.com/KhronosGroup/SPIRV-Registry/blob/master/extensions/KHR/SPV_KHR_integer_dot_product.html
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Raun Krisch [Wed, 30 Jun 2021 15:52:20 +0000 (10:52 -0500)]
Merge pull request #222 from kpet/github-actions
Add CI using Github actions and update README
Raun Krisch [Wed, 30 Jun 2021 15:49:20 +0000 (10:49 -0500)]
Merge pull request #223 from WyvernWang/master
reserve value range for huawei
Raun Krisch [Wed, 30 Jun 2021 15:47:38 +0000 (10:47 -0500)]
Merge pull request #224 from Fznamznon/upstream-debug-module-ext
Upstream SPV_INTEL_debug_module extension
Raun Krisch [Wed, 30 Jun 2021 15:45:12 +0000 (10:45 -0500)]
Merge pull request #225 from bashbaug/SPV_KHR_bit_instructions
add support for SPV_KHR_bit_instructions
Alexander Zapryagaev [Tue, 29 Jun 2021 06:38:52 +0000 (23:38 -0700)]
Clay is an internal framework of Tellusim Technologies Inc.
Mariya Podchishchaeva [Fri, 25 Jun 2021 10:44:25 +0000 (13:44 +0300)]
Upstream SPV_INTEL_debug_module
Spec https://github.com/intel/llvm/pull/3976
WyvernWang [Thu, 24 Jun 2021 12:26:05 +0000 (20:26 +0800)]
reserve value range
Ben Ashbaugh [Wed, 23 Jun 2021 22:54:12 +0000 (15:54 -0700)]
add support for SPV_KHR_bit_instructions
Kevin Petit [Wed, 23 Jun 2021 16:36:33 +0000 (17:36 +0100)]
Add CI using Github actions and update README
- Run on Linux, macOS and Windows
- Check that the headers install works
- Check the example can be built
- Check the header generation tool can be built
- Generate headers and check they match the committed files
- Mention the requirement to install the header generation tool in README
Change-Id: I8385b3931064ad677d7aa49b2514cea9b4602168
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Raun Krisch [Wed, 23 Jun 2021 15:51:49 +0000 (10:51 -0500)]
Merge pull request #219 from cmarcelo/SPV_EXT_shader_atomic_float16_add
Add header changes for SPV_EXT_shader_atomic_float16_add
Raun Krisch [Wed, 23 Jun 2021 15:45:17 +0000 (10:45 -0500)]
Merge pull request #220 from kpet/spv-khr-integer-dot-product
Support SPV_KHR_integer_dot_product
David Neto [Fri, 22 May 2020 05:47:01 +0000 (01:47 -0400)]
Support SPV_KHR_integer_dot_product
Signed-off-by: David Neto <dneto@google.com>
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Change-Id: Icd243bb9c2a6f8a40713db215a6ca5946ea7abb3
Jason Ekstrand [Tue, 12 Jan 2021 18:28:25 +0000 (12:28 -0600)]
Add header changes for SPV_EXT_shader_atomic_float16_add
John Kessenich [Wed, 16 Jun 2021 15:43:41 +0000 (22:43 +0700)]
Merge pull request #218 from KhronosGroup/fix-ordering
Fix two ordering problems and rebuild headers.
John Kessenich [Wed, 16 Jun 2021 08:41:50 +0000 (15:41 +0700)]
Fix two ordering problems.
Raun Krisch [Wed, 9 Jun 2021 16:34:39 +0000 (09:34 -0700)]
Merge pull request #216 from mkinsner/mkinsner/allocate_vendor_extension_enum_range
Allocate additional Intel vendor extension enum blocks
Raun Krisch [Wed, 9 Jun 2021 16:32:40 +0000 (09:32 -0700)]
Merge pull request #213 from alan-baker/SPV_KHR_subgroup_uniform_control_flow
Support SPV_KHR_subgroup_uniform_control_flow
Raun Krisch [Wed, 9 Jun 2021 16:32:12 +0000 (09:32 -0700)]
Merge pull request #217 from StuartDBrady/add-C++-for-OpenCL-lang
Add CPP_for_OpenCL to grammar
Raun Krisch [Wed, 9 Jun 2021 16:31:41 +0000 (09:31 -0700)]
Merge pull request #177 from MrSidims/private/MrSidims/AP
Upstream ac_fixed and hls_float Intel extensions
Stuart Brady [Mon, 7 Jun 2021 12:25:56 +0000 (13:25 +0100)]
Add CPP_for_OpenCL to grammar
Michael Kinsner [Tue, 8 Jun 2021 19:30:58 +0000 (16:30 -0300)]
Allocate additional Intel vendor extension enum blocks
David Neto [Tue, 8 Jun 2021 16:26:29 +0000 (12:26 -0400)]
Merge pull request #215 from dneto0/warnings
buildHeaders: Add override decoration
David Neto [Tue, 8 Jun 2021 16:21:49 +0000 (12:21 -0400)]
buildHeaders: Add override decoration
Fixes warnings in AppleClang
David Neto [Tue, 8 Jun 2021 16:22:44 +0000 (12:22 -0400)]
Merge pull request #214 from dneto0/cmake-3.0-in-build-headers
Update to CMake 3.0
David Neto [Tue, 8 Jun 2021 16:00:20 +0000 (12:00 -0400)]
Update to CMake 3.0
This matches the CMakeLists.txt file in the project root.
David Neto [Thu, 21 May 2020 21:44:07 +0000 (17:44 -0400)]
Support SPV_KHR_subgroup_uniform_control_flow
Artem Gindinson [Thu, 3 Jun 2021 13:53:32 +0000 (16:53 +0300)]
Update arbitrary float cast interfaces
Signed-off-by: Artem Gindinson <artem.gindinson@intel.com>
David Neto [Wed, 2 Jun 2021 17:06:15 +0000 (13:06 -0400)]
Merge pull request #212 from alan-baker/fix-xml
Fix xml entry for SpvGenTwo generator
Alan Baker [Wed, 2 Jun 2021 17:02:02 +0000 (13:02 -0400)]
Fix xml entry for SpvGenTwo generator
Raun Krisch [Wed, 2 Jun 2021 15:44:03 +0000 (10:44 -0500)]
Merge pull request #210 from rAzoR8/spvgentwo
Add SpvGenTwo tools to vendor IDs
Fabian Wahlster [Sun, 30 May 2021 16:33:34 +0000 (19:33 +0300)]
Add SpvGenTwo to vendor IDs
John Kessenich [Wed, 26 May 2021 15:43:19 +0000 (22:43 +0700)]
Merge pull request #208 from mkinsner/mkinsner/tripcount_loop_control_bit
Reserve loop control bit for upcoming trip count (min,max,avg) control
Tomasz Kłoczko [Thu, 20 May 2021 08:45:33 +0000 (09:45 +0100)]
Rename spirv-headers.pc to SPIRV-Headers.pc
Tomasz Kłoczko [Wed, 19 May 2021 17:23:31 +0000 (18:23 +0100)]
removed excesive space in configure_file() line
Tomasz Kłoczko [Wed, 19 May 2021 17:20:11 +0000 (18:20 +0100)]
Fixed substituted string with paths and version
Use `@CMAKE_INSTALL_PREFIX@`, `${prefix}/@CMAKE_INSTALL_INCLUDEDIR@` and
`@CMAKE_PROJECT_VERSION@`.
Tomasz Kłoczko [Tue, 18 May 2021 12:55:35 +0000 (13:55 +0100)]
Add spirv-headers pkgconfig file
With installed pkgconfig file other projects build processes can
detest availability of the spirv-headers and require some minimum
version of the spirv-headers to be present in build environment.
Signed-off-by: Tomasz Kłoczko <kloczek@github.com>
Nikita Rudenko [Fri, 14 May 2021 15:13:36 +0000 (21:13 +0600)]
Fix OpTypeBufferSurfaceINTEL token description (#207)
Fix OpTypeBufferSurfaceINTEL token description
Michael Kinsner [Wed, 12 May 2021 13:43:59 +0000 (10:43 -0300)]
Reserve loop control bit for upcoming trip count (min,max,avg) control
Raun Krisch [Thu, 29 Apr 2021 19:46:09 +0000 (14:46 -0500)]
Merge pull request #206 from NikitaRudenkoIntel/sc
Add VectorComputeINTEL as enabling capability for Private StorageClass
Nikita Rudenko [Fri, 23 Apr 2021 13:40:26 +0000 (16:40 +0300)]
Add VectorComputeINTEL as enabling capability for Private StorageClass
According to spec: https://github.com/intel/llvm/pull/1612
Raun Krisch [Wed, 14 Apr 2021 15:40:19 +0000 (10:40 -0500)]
Merge pull request #204 from DataBeaver/master
Add generator ID for MSP shader compiler
Mikko Rasa [Fri, 9 Apr 2021 10:12:03 +0000 (13:12 +0300)]
Add generator ID for MSP shader compiler
John Kessenich [Wed, 31 Mar 2021 15:43:44 +0000 (22:43 +0700)]
Merge pull request #201 from baldurk/spv-khr-non-semantic-info
Add NonSemantic.Vulkan.DebugInfo.100 JSON/header
John Kessenich [Wed, 31 Mar 2021 15:41:26 +0000 (22:41 +0700)]
Merge pull request #202 from mkinsner/mkinsner/mem_operand_allocation_section
Add xml section for memory operand bit allocation tracking
Dmitry Sidorov [Thu, 5 Nov 2020 14:16:44 +0000 (17:16 +0300)]
Upstream AP Intel extensions
SPV_INTEL_arbitrary_precision_floating_point and
SPV_INTEL_arbitrary_precision_fixed_point extensions are
being upstreamed.
Specs:
https://github.com/intel/llvm/blob/
2f6e965e686354fbb25f9c177a667a646de302eb/sycl/doc/extensions/SPIRV/SPV_INTEL_arbitrary_precision_fixed_point.asciidoc
https://github.com/intel/llvm/blob/
bd86b218f749ea0e20ddc18c42db491faf54014a/sycl/doc/extensions/SPIRV/SPV_INTEL_arbitrary_precision_floating_point.asciidoc
Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Michael Kinsner [Thu, 25 Mar 2021 18:53:48 +0000 (15:53 -0300)]
Add xml section for memory operand bit allocation tracking, and reserve two bits for an upcoming Intel extension
baldurk [Wed, 24 Mar 2021 16:54:32 +0000 (16:54 +0000)]
Add NonSemantic.Vulkan.DebugInfo.100 JSON/header
Raun Krisch [Wed, 10 Mar 2021 16:49:56 +0000 (10:49 -0600)]
Merge pull request #178 from orbea/datadir
cmake: Install cmake files to CMAKE_INSTALL_DATADIR
Raun Krisch [Fri, 5 Mar 2021 16:31:29 +0000 (10:31 -0600)]
Merge pull request #200 from dneto0/public-spv-khr-linkonce-odr-spv-khr-expect-assume
Support SPV_KHR_linkonce_odr and SPV_KHR_expect_assume
David Neto [Fri, 3 Jul 2020 19:53:15 +0000 (15:53 -0400)]
Support SPV_KHR_expect_assume
David Neto [Fri, 3 Jul 2020 18:35:07 +0000 (14:35 -0400)]
Support SPV_KHR_linkonce_odr
Raun Krisch [Wed, 3 Mar 2021 16:54:46 +0000 (10:54 -0600)]
Merge pull request #198 from alan-baker/read-clock-scope
Change operand name in OpReadClockKHR to match extension
Raun Krisch [Wed, 3 Mar 2021 16:49:56 +0000 (10:49 -0600)]
Merge pull request #195 from kvark/patch-1
Add Naga as SPIR-V generation tool
Alan Baker [Mon, 1 Mar 2021 14:00:33 +0000 (09:00 -0500)]
Change operand name in OpReadClockKHR to match extension
* The grammar was not updated when revision 3 of SPV_KHR_shader_clock
was published
* That revision renamed the *Execution* operand to *Scope*
John Kessenich [Fri, 19 Feb 2021 15:11:04 +0000 (22:11 +0700)]
Merge pull request #193 from bashbaug/DebugInfoFlags-None
add None as a possible value for DebugInfoFlags
Dzmitry Malyshau [Sun, 14 Feb 2021 04:32:27 +0000 (23:32 -0500)]
Add Naga as SPIR-V generation tool
John Kessenich [Wed, 10 Feb 2021 12:35:29 +0000 (05:35 -0700)]
Merge pull request #187 from bashbaug/function_control_bit_16
add function control bitfield reservation section
John Kessenich [Wed, 10 Feb 2021 12:28:03 +0000 (05:28 -0700)]
Merge pull request #190 from dneto0/check-enumerant-ordering
Header generator: Check enumerant ordering
John Kessenich [Wed, 10 Feb 2021 12:24:21 +0000 (05:24 -0700)]
Merge pull request #189 from jekstrand/SPV_EXT_shader_atomic_float_min_max
Add header changes for SPV_EXT_shader_atomic_float_min_max
Jason Ekstrand [Wed, 19 Aug 2020 22:03:06 +0000 (17:03 -0500)]
Add header changes for SPV_EXT_shader_atomic_float_min_max
Jason Ekstrand [Wed, 27 Jan 2021 22:56:58 +0000 (16:56 -0600)]
Re-run buildSpvHeaders to fix indentation
David Neto [Wed, 20 Jan 2021 02:20:44 +0000 (21:20 -0500)]
Header generator: Check enumerant ordering
In the grammar, enforce ordering rules:
- Instructions must appear in order of their opcode
- Non-instructions: each successive enumerant within a single kind must
appear in order
- Reorder enumerants Subgroup*MaskKHR enums to satisfy the rule.
Ben Ashbaugh [Wed, 27 Jan 2021 16:50:30 +0000 (08:50 -0800)]
add generated headers
John Kessenich [Wed, 27 Jan 2021 16:43:46 +0000 (09:43 -0700)]
Merge pull request #192 from cmarcelo/SPV_KHR_workgroup_memory_explicit_layout
Add SPV_KHR_workgroup_memory_explicit_layout
Ben Ashbaugh [Wed, 27 Jan 2021 16:03:49 +0000 (08:03 -0800)]
add None as a possible value for DebugInfoFlags
Caio Marcelo de Oliveira Filho [Mon, 25 Jan 2021 13:57:46 +0000 (05:57 -0800)]
Add SPV_KHR_workgroup_memory_explicit_layout
John Kessenich [Fri, 22 Jan 2021 20:34:02 +0000 (13:34 -0700)]
Merge pull request #191 from dneto0/reorder-enums-in-spec
Push FPDenormMode, FPOperationMode to the end
David Neto [Wed, 20 Jan 2021 21:54:17 +0000 (16:54 -0500)]
Push FPDenormMode, FPOperationMode to the end
This is a cosmetic change for the benefit of generating the SPIR-V spec.
It reorders the "FP Denorm Mode" and "FP Operation Mode" so they are
the last sections in chapter 3 before the instruction listing.
They become 3.37 and 3.38. The idea is to preserve the section numbering
for earlier sections. For example, keep 3.31 as the Capability section.
John Kessenich [Wed, 20 Jan 2021 16:44:51 +0000 (09:44 -0700)]
Merge pull request #176 from MrSidims/private/MrSidims/OtherExtensions
Upstream several Intel extensions
Dmitry Sidorov [Wed, 20 Jan 2021 11:36:25 +0000 (14:36 +0300)]
Apply suggestions to Intel extensions PR
Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Dmitry Sidorov [Wed, 16 Dec 2020 16:35:01 +0000 (19:35 +0300)]
Update generated files
Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Dmitry Sidorov [Wed, 16 Dec 2020 16:34:22 +0000 (19:34 +0300)]
Add SPV_INTEL_long_constant_composite extension
Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>
Dmitry Sidorov [Wed, 16 Dec 2020 15:47:50 +0000 (18:47 +0300)]
Add SPV_INTEL_loop_fuse extension
Signed-off-by: Dmitry Sidorov <dmitry.sidorov@intel.com>