Eric Engestrom [Fri, 4 Nov 2022 14:26:19 +0000 (14:26 +0000)]
docs/releasing: add convenient command to rebase everything since last release
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19536>
Eric Engestrom [Fri, 4 Nov 2022 14:22:59 +0000 (14:22 +0000)]
docs/releasing: checkout the staging branch at the end of its creation process
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19536>
Eric Engestrom [Fri, 4 Nov 2022 15:52:53 +0000 (15:52 +0000)]
docs/releasing: update branchpoint instructions to be friendlier to our Marge-bot-based workflow
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19536>
Eric Engestrom [Fri, 4 Nov 2022 14:21:08 +0000 (14:21 +0000)]
docs/releasing: fix instructions to create a branch from a tag
Not sure if it used to work, but it doesn't anymore.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19536>
Eric Engestrom [Fri, 4 Nov 2022 14:19:41 +0000 (14:19 +0000)]
docs/releasing: add VERSION variable to avoid typos when copy/pasting
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19536>
Caio Oliveira [Mon, 14 Nov 2022 00:19:48 +0000 (16:19 -0800)]
intel/compiler: Fix missing tie-breaker in brw_nir_analyze_ubo_ranges() ordering code
Per Ken suggestion, use ascending order for the start offset.
Fixes: 6d28c6e52cf ("i965: Select ranges of UBO data to be uploaded as push constants.")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19731>
Caio Oliveira [Mon, 14 Nov 2022 06:30:25 +0000 (22:30 -0800)]
intel/compiler: Fix dynarray usage in intel_clc
The code builds up the dynamic array of objects (spirv_objs) and
collect pointers to each of them into another dynamic
array (spirv_ptr_objs).
If the growth of the first array cause a reallocation, it is
possible that the previous pointers end up invalid.
Fixes: 77e929a5273 ("intel/clc: allow multiple CL files to be compiled together")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19730>
Konstantin Seurer [Sat, 12 Nov 2022 23:07:35 +0000 (00:07 +0100)]
radv/rt: Get rid of null index AABB intersection handling
If the intersection shader is VK_SHADER_UNUSED_KHR (which is only allowed for a zero shader group) then no further processing of the intersection candidate occurs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19705>
Gert Wollny [Mon, 14 Nov 2022 14:57:27 +0000 (15:57 +0100)]
r600/sfn: Call lower_flrp from driver code
gallium-nine seems to ignore the shader options and emits the
instruction despite "options::lower_flrp32 = true"
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19729>
Gert Wollny [Mon, 14 Nov 2022 14:29:57 +0000 (15:29 +0100)]
r600/sfn: use only one undef in tex lowering
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19729>
Gert Wollny [Fri, 28 Oct 2022 21:45:24 +0000 (23:45 +0200)]
r600/sfn: Use a bitfield for some register properties
Also simplify some use of these flags.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19729>
Gert Wollny [Fri, 28 Oct 2022 16:48:14 +0000 (18:48 +0200)]
r600/sfn: handle possible inline const as array base for scratch loads
Replace some asserts with unreachable too.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19729>
Gert Wollny [Fri, 28 Oct 2022 16:42:34 +0000 (18:42 +0200)]
r600/sfn: Simlify check for zero and one
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19729>
Gert Wollny [Wed, 9 Nov 2022 17:48:21 +0000 (18:48 +0100)]
r600/sfn: implement finalize_nir
Move shader key independent lowering and some optimizations
to finalize_nir.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19708>
Alejandro Piñeiro [Sat, 12 Nov 2022 00:51:00 +0000 (01:51 +0100)]
v3dv/bo: reset bo and then call gem close
After 'v3dv: fix debug dump on BO free' we changed the order, and this
lead to the following test
dEQP-VK.api.object_management.multithreaded_per_thread_resources.device_memory_small
v2: Expanded comment just before the reset, explaining that we need to
do the reset before we free the BO from the kernel (Iago)
Raising this assertion:
deqp-vk: ../src/broadcom/vulkan/v3dv_bo.c:281: v3dv_bo_alloc: Assertion `bo && bo->handle == 0' failed.
Fixes: 2c44597181e2 ('v3dv: fix debug dump on BO free')
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19693>
Eric Engestrom [Mon, 14 Nov 2022 09:55:28 +0000 (09:55 +0000)]
Revert "ci/broadcom: v3dv-rpi4-vk:arm64 flakes too often"
This reverts commit
cb02cf464c16961a8922e0180eeba38fea16ac85.
There are 3 reported flakes over a period of a month, and we have been
unable to reproduce it even once. It clearly doesn't happen often enough
to warrant disabling our vulkan CI, so let's restore it while we
continue to try to reproduce the issue on our side.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19720>
Erik Faye-Lund [Fri, 11 Nov 2022 09:35:40 +0000 (10:35 +0100)]
zink: remove descriptor-mode selection infrastructure
We only support lazy descriptors these days, so having the
infrastructure around to support automatic selection of that one mode is
kinda silly.
And it's not like setting an environment variable that is never read is
going to cause any issues, so we don't even need this to avoid breaking
existing setups.
Let's just rip it out. We can reintroduce it again on the off-chance
that someone has a new clever descriptor mode they want to experiment
with.
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19670>
Samuel Pitoiset [Thu, 10 Nov 2022 06:56:16 +0000 (06:56 +0000)]
radv: enable lowering of subgroup shuffle in NIR on GFX11+
VGPR allocation changed on GFX11 and this might have changed how
shared VGPRs work, so it's probably more secure to lower in NIR.
Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19679>
Filip Gawin [Sun, 13 Nov 2022 22:53:15 +0000 (23:53 +0100)]
r300: enable channel merging on r300/r400 VS
(VS doesn't have limitations like FS)
total instructions in shared programs: 27439 -> 26928 (-1.86%)
instructions in affected programs: 6219 -> 5708 (-8.22%)
helped: 157
HURT: 0
helped stats (abs) min: 1 max: 13 x̄: 3.25 x̃: 3
helped stats (rel) min: 1.03% max: 66.67% x̄: 17.66% x̃: 11.11%
95% mean confidence interval for instructions value: -3.58 -2.93
95% mean confidence interval for instructions %-change: -20.12% -15.20%
Instructions are helped.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19711>
Pavel Ondračka [Tue, 25 Oct 2022 19:41:48 +0000 (21:41 +0200)]
r300: better register allocator for vertex shaders
This is a port of the fp pair regalloc. It is however much simpler as
contrary to the fp, we don't have to care about texturing, we can use
any swizzle we want and we don't have to track the inputs. Using the
register class machinery might actually be a slight overkill right now,
however the infrastructure will hopefully come in handy if someone
decides to implement the vp pair scheduling eventually.
Shader-db stats:
RV530:
total temps in shared programs: 18594 -> 17000 (-8.57%)
temps in affected programs: 5753 -> 4159 (-27.71%)
helped: 665
HURT: 0
RV370:
total temps in shared programs: 13555 -> 12181 (-10.14%)
temps in affected programs: 5116 -> 3742 (-26.86%)
helped: 633
HURT: 0
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5972
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Fri, 11 Nov 2022 09:20:38 +0000 (10:20 +0100)]
r300: another fix for reader detection in the presence of loops
This helps in some cases where we fail to detect that the write mask
is still alive after the loop and thus fail to detect some readers.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Mon, 31 Oct 2022 09:08:38 +0000 (10:08 +0100)]
r300: properly account for per-channel negates when reswizzling
Vertex shaders can have a per-channel negate so we need to properly
update the negate mask when rewriting swizzles.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Mon, 31 Oct 2022 08:03:44 +0000 (09:03 +0100)]
r300: don't skip source rewrite if RC_FILE_NONE in rc_for_all_reads_src
This function is used by rc_variable_change_dst when rewriting variables
and even though we don't need to rewrite the index for RC_FILE_NONE, we
still need to properly reswizzle.
All other users of the function are properly checking for RC_FILE_NONE
later.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Wed, 26 Oct 2022 19:29:14 +0000 (21:29 +0200)]
r300: generalize rc_init_regalloc_state
It can now be used to init rc_regalloc_state for both vertex and
fragment shaders.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Wed, 26 Oct 2022 15:54:27 +0000 (17:54 +0200)]
r300: add array with conflict values for the vp register classes
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Wed, 26 Oct 2022 15:30:35 +0000 (17:30 +0200)]
r300: add new register class list for vertex shaders
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Thu, 27 Oct 2022 19:31:40 +0000 (21:31 +0200)]
r300: add FP suffix to the current class list
We will add a new one for vp in a next commit
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Thu, 27 Oct 2022 19:26:03 +0000 (21:26 +0200)]
r300: increase maximum number of writemask combinations
We can have up to 6 in vertex shaders.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Sat, 29 Oct 2022 20:05:38 +0000 (22:05 +0200)]
r300: move building of the interference graph to a separate function
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Tue, 25 Oct 2022 19:15:55 +0000 (21:15 +0200)]
r300: generalize rc_find_class
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Tue, 25 Oct 2022 19:43:54 +0000 (21:43 +0200)]
r300: move some functions out of radeon_pair_regalloc
To prepare for a future sharing in vertex shader register allocator.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Pavel Ondračka [Thu, 27 Oct 2022 19:57:11 +0000 (21:57 +0200)]
r300: save pointer to register class list in the regalloc state
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Tested-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19618>
Timothy Arceri [Thu, 10 Nov 2022 11:13:46 +0000 (22:13 +1100)]
nir: add another common ffract -> ffloor pattern
shader-db results (BDW):
total instructions in shared programs:
17527053 ->
17526931 (<.01%)
instructions in affected programs: 5116 -> 4994 (-2.38%)
helped: 25
HURT: 0
helped stats (abs) min: 2 max: 15 x̄: 4.88 x̃: 3
helped stats (rel) min: 0.25% max: 5.34% x̄: 3.39% x̃: 3.90%
95% mean confidence interval for instructions value: -6.19 -3.57
95% mean confidence interval for instructions %-change: -3.98% -2.81%
Instructions are helped.
total cycles in shared programs:
856680230 ->
856682009 (<.01%)
cycles in affected programs:
6583780 ->
6585559 (0.03%)
helped: 117
HURT: 77
helped stats (abs) min: 1 max: 854 x̄: 68.56 x̃: 16
helped stats (rel) min: <.01% max: 35.34% x̄: 2.12% x̃: 0.76%
HURT stats (abs) min: 1 max: 2188 x̄: 127.27 x̃: 18
HURT stats (rel) min: 0.01% max: 22.66% x̄: 1.86% x̃: 0.67%
95% mean confidence interval for cycles value: -30.07 48.41
95% mean confidence interval for cycles %-change: -1.28% 0.19%
Inconclusive result (value mean confidence interval includes 0).
LOST: 3
GAINED: 1
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19666>
Jason Ekstrand [Tue, 8 Nov 2022 16:43:37 +0000 (10:43 -0600)]
vulkan: Unconditionally add barriers for missing external subpass deps
This is a very scorched-earth approach which doesn't take into account
whether or not there are any explicitly provided dependencies. We could
take a finer-grained approach in theory but it's unlikely to matter in
practice since you usually stall in Begin/EndRenderPass anyway.
Fixes: 1d726940d288 ("vulkan: Add a common CmdBegin/EndRederPass implementation")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6203
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7650
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19599>
Jason Ekstrand [Tue, 8 Nov 2022 16:23:02 +0000 (10:23 -0600)]
vulkan: Handle VK_SUBPASS_EXTERNAL at the end of a subpass
Fixes: 1d726940d288 ("vulkan: Add a common CmdBegin/EndRederPass implementation")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19599>
Gert Wollny [Sun, 13 Nov 2022 10:28:16 +0000 (11:28 +0100)]
r600/sfn: Fix f2u32 and remove backend lowring of f2u64 and f2i64
The two conversion ops are now handled in nir_lower_int64,
but the fixup for the input to f2u32 has to be handled there
and not in f2u64.
Fixes: 29da9856826fa6a4b5117c43c78b4301a49bc6dd
nir/lower_int64: Enable lowering of 64-bit float to 64-bit integer conversions.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19707>
Gert Wollny [Sun, 13 Nov 2022 11:09:20 +0000 (12:09 +0100)]
r600/sfn: Fix source modifiers for ffract64
Fixes: 79ca456b4837b3bc21cf9ef3c03c505c4b4909f6
r600/sfn: rewrite NIR backend
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19707>
Caio Oliveira [Tue, 8 Nov 2022 18:40:00 +0000 (10:40 -0800)]
spirv: Make vtn_fail and friends trap in debug mode
The SPIR-V parser catches its failures and failed assertions, clean up
and return a failure to the caller. This is a good default behavior, but
when debugging sometimes is useful to hook the debugger right in the
failed assertion.
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19663>
Lionel Landwerlin [Fri, 11 Nov 2022 09:31:46 +0000 (11:31 +0200)]
anv: bump pool bucket max allocation size
Age of Empire IV generates a shader of ~2.3Mb on DG2 which is above
the limit we currently have.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19669>
Simon Ser [Tue, 8 Nov 2022 14:26:03 +0000 (15:26 +0100)]
vulkan/wsi/wayland: fix unaligned load of dev_t
Fixes the following UBSan error:
../src/vulkan/wsi/wsi_common_wayland.c:654:27: runtime error: load of misaligned address 0x6110000666b4 for type 'dev_t' (aka 'unsigned long'), which requires 8 byte alignment
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19595>
Eric Engestrom [Thu, 10 Nov 2022 19:16:02 +0000 (19:16 +0000)]
llvmpipe: drop cache stats code
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Chris Healy <healych@amazon.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19644>
Eric Engestrom [Thu, 10 Nov 2022 11:36:46 +0000 (11:36 +0000)]
disk_cache: add env var to show stats
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Tested-by: Chris Healy <healych@amazon.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19644>
Yiwei Zhang [Fri, 11 Nov 2022 16:25:33 +0000 (08:25 -0800)]
venus: handle VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT
This change adds some docs for the query size, and has been tested with
dEQP-VK.transform_feedback.primitives_generated_query.* on supported
implementations.
Fixes: 8f7b5bf34b4 ("venus: add VK_EXT_primitives_generated_query support")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19684>
Jami Kettunen [Mon, 30 Aug 2021 21:15:58 +0000 (00:15 +0300)]
freedreno/pm4: Use unsigned instead of uint to fix musl build
Fixes the following error I noticed when building against aarch64 with
musl libc:
In file included from ../src/freedreno/decode/crashdec.h:38,
from ../src/freedreno/decode/crashdec.c:40:
../src/freedreno/common/freedreno_pm4.h:104:15: error: unknown type name 'uint'
104 | static inline uint
| ^~~~
../src/freedreno/common/freedreno_pm4.h:105:25: error: unknown type name 'uint'; did you mean 'int'?
105 | pm4_calc_odd_parity_bit(uint val)
| ^~~~
| int
Signed-off-by: Jami Kettunen <jami.kettunen@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19665>
Eric Engestrom [Fri, 11 Nov 2022 13:49:45 +0000 (13:49 +0000)]
ci: avoid triggering vc4 & v3d tests on v3dv-only MRs
There are a lot of vulkan-only MRs, so we can save a lot of CI resources
by not running GL tests as well.
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19680>
Lucas Stach [Mon, 7 Nov 2022 13:22:21 +0000 (14:22 +0100)]
etnaviv: fix late Z with MSAA active
On RA_WRITE_DEPTH GPUs the RA stage needs to be told that MSAA is active
when the PE Z/S stage is needed. Not sure what it does exactly, but this
fixes broken late Z on those GPUs when performing MSAA rendering.
Cc: 22.3 mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19571>
Lucas Stach [Mon, 7 Nov 2022 13:03:58 +0000 (14:03 +0100)]
etnaviv: update headers from rnndb
Update to etna_viv commit
6939cfeba30c.
Cc: 22.3 mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19571>
Konstantin Seurer [Wed, 20 Jul 2022 17:23:11 +0000 (19:23 +0200)]
radv: Use a lds stack for ray queries when possible
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17663>
Konstantin Seurer [Wed, 20 Jul 2022 17:19:16 +0000 (19:19 +0200)]
radv: Always create ray query vars as shader temp
Avoid the whole "is this function or shader scope" code and fix some
memory leaks in the process.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17663>
Konstantin Seurer [Mon, 31 Oct 2022 17:07:45 +0000 (18:07 +0100)]
radv: Add a field for the max shared memory size
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17663>
Caio Oliveira [Tue, 8 Nov 2022 18:40:00 +0000 (10:40 -0800)]
spirv: Add MESA_SPIRV_DEBUG environment variable processing
This is similar to what NIR_DEBUG uses.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19603>
David Heidelberg [Mon, 7 Nov 2022 18:15:18 +0000 (19:15 +0100)]
ci: remove duplicate entries from Fedora build
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19583>
Matt Coster [Mon, 5 Sep 2022 14:47:31 +0000 (15:47 +0100)]
pvr: Use common pipeline & dynamic state frameworks
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19342>
Matt Coster [Fri, 11 Nov 2022 10:55:55 +0000 (10:55 +0000)]
pvr: Use PVRX(TA_PASSTYPE) for pvr_fragment_shader_state.pass_type
Replaces the current uint32_t value.
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19342>
Matt Coster [Fri, 28 Oct 2022 16:13:43 +0000 (17:13 +0100)]
pvr: Store format aspects on render pass attachments
This expands the existing has_stencil field on struct
pvr_render_pass_attachment to be a complete set of VkImageApsectFlags.
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19342>
Matt Coster [Fri, 30 Sep 2022 09:13:31 +0000 (10:13 +0100)]
pvr: Remove scissor_accum dynamic state
This state is only required for an as-yet-unimplemented optimization.
If that optimization is ever implemented in the future, these
structures can be added back.
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19342>
Matt Coster [Thu, 27 Oct 2022 12:38:55 +0000 (13:38 +0100)]
pvr: VDMCTRL_INDEX_LIST[5-9] are not needed
An investigation turned up no need for these values on the currently
supported hardware configurations, so remove this comment for now.
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19673>
Georg Lehmann [Sat, 10 Sep 2022 09:35:56 +0000 (11:35 +0200)]
aco: Don't create useless exec movs while creating v_cmpx.
In a lot of situations the previous exec value was already copied from the
same registers that exec should be saved to. In that case we don't have to
insert an extra copy to save exec.
This breaks ssa but this pass is going out of ssa anyway.
Foz-DB Navi21:
Totals from 16129 (11.96% of 134913) affected shaders:
CodeSize:
128184044 ->
128054468 (-0.10%)
Instrs:
23902694 ->
23870325 (-0.14%)
Latency:
387124324 ->
387095955 (-0.01%); split: -0.01%, +0.00%
InvThroughput:
79949118 ->
79945859 (-0.00%); split: -0.01%, +0.00%
Copies:
1620768 ->
1588752 (-1.98%); split: -1.99%, +0.01%
Foz-DB Vega10:
Totals from 15546 (11.51% of 135041) affected shaders:
CodeSize:
120322524 ->
120200568 (-0.10%)
Instrs:
23448344 ->
23417855 (-0.13%)
Latency:
414018749 ->
413639289 (-0.09%); split: -0.09%, +0.00%
InvThroughput:
183819363 ->
183726539 (-0.05%); split: -0.05%, +0.00%
Copies:
2194937 ->
2164448 (-1.39%)
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18528>
Georg Lehmann [Fri, 11 Nov 2022 15:13:56 +0000 (16:13 +0100)]
aco: Make vcmpx definition handling clearer.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18528>
Lionel Landwerlin [Thu, 10 Nov 2022 14:32:50 +0000 (16:32 +0200)]
intel/fs: use nir_opt_ray_query_ranges
Results on DG2 q2rtx shaders:
Totals from 6 (12.24% of 49) affected shaders:
Instrs: 88927 -> 54088 (-39.18%)
Cycles:
4115088 ->
2536902 (-38.35%)
Send messages: 2639 -> 1609 (-39.03%)
Spill count: 1321 -> 613 (-53.60%)
Fill count: 3130 -> 1104 (-64.73%)
Scratch Memory Size: 22528 -> 18432 (-18.18%)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16593>
Konstantin Seurer [Wed, 18 May 2022 18:15:06 +0000 (20:15 +0200)]
radv: Use nir_opt_ray_query_ranges
Quake II RTX:
Totals from 6 (12.24% of 49) affected shaders:
VGPRs: 584 -> 568 (-2.74%)
CodeSize: 152408 -> 152224 (-0.12%); split: -0.21%, +0.09%
Scratch: 252928 -> 116736 (-53.85%)
MaxWaves: 58 -> 60 (+3.45%)
Instrs: 28914 -> 28874 (-0.14%); split: -0.21%, +0.08%
Latency: 443165 -> 442141 (-0.23%)
InvThroughput: 97155 -> 94797 (-2.43%)
SClause: 719 -> 720 (+0.14%)
Copies: 4560 -> 4498 (-1.36%); split: -1.40%, +0.04%
PreVGPRs: 544 -> 535 (-1.65%)
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16593>
Konstantin Seurer [Thu, 18 Aug 2022 18:18:39 +0000 (20:18 +0200)]
nir: Add a pass for combining ray queries
We can determice scopes/ranges of the use of ray queries and use this information to combine ray queries.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16593>
Konstantin Seurer [Wed, 18 May 2022 18:06:31 +0000 (20:06 +0200)]
nir: Add and use nir_intrinsic_is_ray_query helper
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16593>
Konstantin Seurer [Sat, 16 Jul 2022 11:33:41 +0000 (13:33 +0200)]
nir: Remove gather_info after removing dead vars
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16593>
Timothy Arceri [Thu, 10 Nov 2022 10:24:48 +0000 (21:24 +1100)]
nir: fix typo in lower_double options handling
Seems the intention was to check that both flags were not enabled
instead we were checking that the floor flag was both set and not
set so the result would always be false.
Fixes: 3749a6ecd282 ("nir: honor lower_double options for ffloor and ffract")
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19642>
Mark Collins [Thu, 20 Oct 2022 18:35:57 +0000 (18:35 +0000)]
freedreno/cffdec: Add NOP debug messages
We want to encode special messages into the CS that can be printed
by cffdec, these messages have identifiers that describe their
usage (message, scope begin and scope end) which allow for an
improved trace navigation experience due to the additional
information.
Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18271>
Mark Collins [Thu, 20 Oct 2022 18:28:33 +0000 (18:28 +0000)]
tu: Implement utrace CS marker support
Adds support for emitting utrace markers into the CS, this allows
for useful debug information that can be decoded from a recorded
command stream.
Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18271>
Mark Collins [Thu, 20 Oct 2022 18:26:47 +0000 (18:26 +0000)]
common/utrace: Add CS logging support
Viewing CS traces retrieved from the driver is common practice to
determine driver bugs but there is no way to determine what
function a certain part of the CS was emitted by. This is crucial
information to determine what function is responsible for emitting
broken CS packets and to help with navigation of the CS trace.
Signed-off-by: Mark Collins <mark@igalia.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Ack-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18271>
Mark Collins [Thu, 20 Oct 2022 12:16:39 +0000 (12:16 +0000)]
common/utrace: Prefix all environment variables with `MESA_`
To be more consistent with other environment variables and ensure
better scoping, all environment variables in utrace have now been
prefixed with `MESA_`.
Signed-off-by: Mark Collins <mark@igalia.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Ack-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18271>
Mark Collins [Thu, 20 Oct 2022 12:13:51 +0000 (12:13 +0000)]
common/utrace: Rename `u_trace_context_actively_tracing` to `u_trace_should_process`
Signed-off-by: Mark Collins <mark@igalia.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Ack-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18271>
Mark Collins [Wed, 19 Oct 2022 11:29:36 +0000 (19:29 +0800)]
common/utrace: Refactor and combine all envvars into `GPU_TRACES`
All environment variables involved in utrace usage were very
fragmented and convoluted to decode the meaning of, this commit has
simplified them down into easier to understand flags which directly
indicate the resulting behavior (such as `perfetto` enabling queued
logs rather than needing to set a `queued` flag) while combining
them into a single envvar `GPU_TRACES` and updating existing
terminology in utrace to match up with the new options.
Signed-off-by: Mark Collins <mark@igalia.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Ack-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18271>
Mark Collins [Fri, 16 Sep 2022 14:18:42 +0000 (14:18 +0000)]
tu: Move utrace arguments to `start` from `end`
All arguments in Turnip code are fit to be moved to the start
event where they fit better as any sequential logging should print
the arguments with the scope start as it makes more sense than
printing arguments with the end of a scope.
Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18271>
Mark Collins [Fri, 16 Sep 2022 14:06:52 +0000 (14:06 +0000)]
tu/perfetto: Handle tracepoint args from start and end
Perfetto's tracing backend was designed to only handle arguments
at the end event, we want to cover arguments both at the start
and end of the trace.
Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18271>
Iago Toral Quiroga [Fri, 11 Nov 2022 11:58:10 +0000 (12:58 +0100)]
v3dv: ignore imported BOs when tracking BO memory usage
Imported BOs are not allocated by the device so we don't
update BO stats when they are imported. Therefore, we should
not be updating them when they are freed either.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19675>
Jose Fonseca [Wed, 9 Nov 2022 09:22:06 +0000 (09:22 +0000)]
draw: Prevent index buffer overflow.
This prevents segfaults running wgf11draw DrawMethod=DrawIndexed tests
cases.
This change is not, however, sufficient to pass all tests. That is,
there must remain code paths where indices read beyond the end of the
index buffer do not return zero index.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19648>
Iago Toral Quiroga [Fri, 11 Nov 2022 10:36:29 +0000 (11:36 +0100)]
v3dv: fix debug dump on BO free
We were resetting the BO struct right before dumping its data. Fix
this by moving the reset later.
Fixes: 44fa8304d45 ('v3dv: add a refcount mechanism to BOs')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19672>
Matt Coster [Wed, 3 Aug 2022 08:52:17 +0000 (09:52 +0100)]
pvr: Implement new firmware stream interface
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19530>
Matt Coster [Tue, 5 Jul 2022 09:09:12 +0000 (10:09 +0100)]
pvr: Set all compute sub-command registers in the same place
This moves the first group of registers from
pvr_sub_cmd_compute_job_init() to just before the second group in
pvr_compute_job_ws_submit_info_init().
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19530>
noasakurajin [Tue, 8 Nov 2022 09:16:22 +0000 (09:16 +0000)]
disable zinks shader cache when the needed functions do not exist
Fixes: 4e14da056d6 ("zink: Enable mesa/st frontend shader caching.")
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19592>
Tapani Pälli [Thu, 10 Nov 2022 16:27:14 +0000 (18:27 +0200)]
anv: remove dg2 condition for Wa_22011440098
We need same workaround for MTL.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
Tapani Pälli [Thu, 10 Nov 2022 16:25:15 +0000 (18:25 +0200)]
iris: remove dg2 condition for Wa_22011440098
We need same workaround for MTL.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
Tapani Pälli [Thu, 10 Nov 2022 16:23:21 +0000 (18:23 +0200)]
anv: setup stage bitmask for Wa_22011440098
Fixes: 40b66a44998 ("anv, iris: Add Wa_22011440098 for DG2")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
Tapani Pälli [Thu, 10 Nov 2022 16:22:12 +0000 (18:22 +0200)]
iris: setup stage bitmask for Wa_22011440098
Fixes: 40b66a44998 ("anv, iris: Add Wa_22011440098 for DG2")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19636>
Lionel Landwerlin [Mon, 24 Oct 2022 11:12:28 +0000 (14:12 +0300)]
anv: split internal surface states from descriptors
On Intel HW we use the same mechanism for internal operations surfaces
as well as application surfaces (VkDescriptor).
This change splits the surface pool in 2, one part dedicated to
internal allocations, the other to application VkDescriptors.
To do so, the STATE_BASE_ADDRESS::SurfaceStateBaseAddress points to a
4Gb area, with the following layout :
- 1Gb of binding table pool
- 2Gb of internal surface states
- 1Gb of bindless surface states
That way any entry from the binding table can refer to both internal &
bindless surface states but none of the driver allocations interfere
with the allocation of the application.
Based off a change from Sviatoslav Peleshko.
v2: Allocate image view null surface state from bindless heap (Sviatoslav)
Removed debug stuff (Sviatoslav)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7110
Cc: mesa-stable
Tested-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19275>
Gert Wollny [Thu, 10 Nov 2022 12:06:08 +0000 (13:06 +0100)]
nir/algeraic_opt: use double options too for lowering ftrunc@64
ftrunc@64 also might need lowering on fp64 only, especially now
that it might be introduced by nir_lower_int64.
Fixes: 29da9856826fa6a4b5117c43c78b4301a49bc6dd
nir/lower_int64: Enable lowering of 64-bit float to 64-bit integer conversions.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19657>
Samuel Pitoiset [Wed, 19 Oct 2022 13:55:00 +0000 (15:55 +0200)]
radv: advertise extendedDynamicState3ProvokingVertexMode with NGG
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19168>
Samuel Pitoiset [Wed, 19 Oct 2022 13:57:52 +0000 (15:57 +0200)]
radv: add support for dynamic provoking vertex mode with NGG
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19168>
Samuel Pitoiset [Wed, 19 Oct 2022 13:45:21 +0000 (15:45 +0200)]
radv: add lowering support for load_provoking_vtx_in_prim_amd when dynamic
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19168>
Samuel Pitoiset [Wed, 19 Oct 2022 13:44:54 +0000 (15:44 +0200)]
radv: declare shader arguments/locations for provoking vertex
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19168>
Samuel Pitoiset [Wed, 19 Oct 2022 12:25:55 +0000 (14:25 +0200)]
radv: add radv_pipeline_key::dynamic_provoking_vtx_mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19168>
Samuel Pitoiset [Thu, 10 Nov 2022 14:24:24 +0000 (15:24 +0100)]
radv: re-emit NGG culling settings when conservative rast mode is dynamic
Found by inspection.
Fixes: fbed3aed4aa ("radv: add support for dynamic conservative rasterization mode")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19651>
Luis Felipe Strano Moraes [Thu, 10 Nov 2022 23:57:05 +0000 (15:57 -0800)]
meson: only enable intel-clc for x86_64 builds
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19662>
Yonggang Luo [Sun, 6 Nov 2022 14:35:30 +0000 (22:35 +0800)]
util: Replace the usage of boolean with c11 bool in u_cpu_detect.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19649>
Yonggang Luo [Mon, 7 Nov 2022 05:46:48 +0000 (13:46 +0800)]
microsoft: Fixes error: unknown type name ‘boolean’ in nir_to_dxil.c
error message:
../../src/microsoft/compiler/nir_to_dxil.c:1711:8: error: unknown type name ‘boolean’
1711 | static boolean
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19649>
Yonggang Luo [Mon, 7 Nov 2022 05:34:30 +0000 (13:34 +0800)]
util: Replace usage of boolean with c11 bool in src/util/format/* and src/util/tests/format/*
This is done by find and replace:
boolean -> bool
TRUE -> true
FALSE -> false
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19649>
Yonggang Luo [Wed, 9 Nov 2022 09:43:16 +0000 (17:43 +0800)]
util: Replace the usage of boolean with c11 bool in u_debug_symbol.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19649>
Yonggang Luo [Sun, 6 Nov 2022 13:23:22 +0000 (21:23 +0800)]
util: Replace the usage of boolean with c11 bool in u_debug_memory.c
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19649>
Yonggang Luo [Thu, 10 Nov 2022 08:31:11 +0000 (16:31 +0800)]
util: Replace all usage of __FUNCTION__ with __func__ in src/util/*
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19646>
Yonggang Luo [Thu, 10 Nov 2022 08:26:09 +0000 (16:26 +0800)]
util: Remove va_copy fixup because of c11 is required
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19646>
Yonggang Luo [Thu, 10 Nov 2022 08:24:16 +0000 (16:24 +0800)]
util: Replace TAB with space in compiler.h
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19646>