Samuel Pitoiset [Tue, 20 Sep 2022 06:37:10 +0000 (08:37 +0200)]
radv: acquire pstate on-demand when capturing with RGP
AMDGPU pstate is per-device, not per Vulkan logical devices. The same
AMDGPU device is shared accross logical devices because the driver
creates only one winsys per fd. The kernel only allows one context
at a time per AMDGPU device, otherwise it returns -EBUSY.
Fixes this by acquiring pstate on-demand to avoid this multiple
logical device problem.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17712>
Samuel Pitoiset [Tue, 20 Sep 2022 06:24:07 +0000 (08:24 +0200)]
radv: rename radv_thread_trace_set_pstate() to radv_device_set_pstate()
Setting pstate is used for RGP captures and performance counters, so
this name is more generic. Also make it non static.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17712>
Marcin Ślusarz [Thu, 8 Sep 2022 13:27:53 +0000 (15:27 +0200)]
intel/compiler: add support for 8/16 bits task payload loads
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>
Marcin Ślusarz [Thu, 8 Sep 2022 13:01:10 +0000 (15:01 +0200)]
intel/compiler: refactor brw_nir_lower_mem_access_bit_sizes
Change dup_mem_intrinsic return type.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>
Marcin Ślusarz [Wed, 7 Sep 2022 10:44:38 +0000 (12:44 +0200)]
intel/compiler/task: use shared memory for small task payload loads & stores
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>
Marcin Ślusarz [Wed, 7 Sep 2022 10:43:10 +0000 (12:43 +0200)]
nir/lower_task_shader: lower small stores & loads to shared when requested
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>
Danylo Piliaiev [Tue, 20 Sep 2022 17:20:00 +0000 (20:20 +0300)]
turnip: Implement VK_EXT_mutable_descriptor_type
Trivial promotion from VALVE, just rename enums and types.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18710>
Tapani Pälli [Tue, 20 Sep 2022 10:11:26 +0000 (13:11 +0300)]
anv: remove primitive_topology from 3DPRIMITIVE calls
Field is ignored on BDW+, 3DSTATE_VF_TOPOLOGY is used to set topology.
We still want to preserve topology information in state because
of other upcoming changes that require it.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18698>
Tapani Pälli [Tue, 20 Sep 2022 07:59:25 +0000 (10:59 +0300)]
intel/common: clamp sample location coordinate range
Applications may use out-of-range values, driver is responsible for
clamping to implementation-dependent sample location coordinate
range.
Without clamp we hit assert when packing 3DSTATE_SAMPLE_PATTERN if
application attempts to use bigger value than 0.9375.
util_bitpack_ufixed: Assertion `min <= v && v <= max' failed.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18696>
Jason Ekstrand [Mon, 19 Sep 2022 21:56:14 +0000 (16:56 -0500)]
vulkan: Add a helper for gathering pipeline robustness
This is useful for implementing VK_EXT_pipeline_robustness because it
automatically gathers all the bits from everywhere for you.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18690>
Jason Ekstrand [Mon, 19 Sep 2022 21:55:55 +0000 (16:55 -0500)]
vulkan: Record more enabled robustness features
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18690>
Emma Anholt [Sat, 5 Feb 2022 04:02:33 +0000 (20:02 -0800)]
turnip: Add TU_DEBUG=bos to print stats of BOs live at submit time.
I keep needing to hack this in to debug BO leaks, so let's just add it as
an option to use in general.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18679>
Emma Anholt [Mon, 19 Sep 2022 17:30:21 +0000 (10:30 -0700)]
turnip: Fix leak of autotune fence BOs.
If we're reusing the submission data, then reinitializing its CS would
leak its old BO.
Fixes: #7281. glmark2 -b texture goes from 277fps to 1268.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18679>
José Roberto de Souza [Fri, 2 Sep 2022 13:43:47 +0000 (06:43 -0700)]
anv: Nuke cmd_parser_version
This was only necessary for gen7 platforms that no longer support by
anv.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18601>
José Roberto de Souza [Wed, 14 Sep 2022 15:39:39 +0000 (08:39 -0700)]
vulkan_hasvk: Nuke dead code around I915_ENGINE_CLASS_COMPUTE
GPUs supported by this driver don't have I915_ENGINE_CLASS_COMPUTE,
so we can drop all this code.
v2:
- keeping anv_override_engine_counts()
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18601>
Mike Blumenkrantz [Tue, 20 Sep 2022 19:16:34 +0000 (15:16 -0400)]
ci: add nouveau flakes
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/
28669371
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18712>
Mike Blumenkrantz [Tue, 20 Sep 2022 19:19:36 +0000 (15:19 -0400)]
ci: add a panfrost flake
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/
28669388
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18714>
Mike Blumenkrantz [Thu, 15 Sep 2022 01:44:14 +0000 (21:44 -0400)]
anv: force inline more pipe flush functions
yields increased ~33% draw throughput
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637>
Lionel Landwerlin [Mon, 19 Sep 2022 20:55:20 +0000 (23:55 +0300)]
anv: combine flushes in Draw/DrawIndexed/DrawIndirectByteCountEXT
Based off a patch from zmike
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637>
Lionel Landwerlin [Mon, 19 Sep 2022 20:28:58 +0000 (23:28 +0300)]
anv: don't export gfx state flushing helper
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637>
Lionel Landwerlin [Mon, 19 Sep 2022 20:27:20 +0000 (23:27 +0300)]
anv: don't export flush_compute_state
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18637>
Iván Briano [Tue, 13 Sep 2022 19:28:42 +0000 (12:28 -0700)]
anv: populate rt shader groups if they were found in the cache
If the pipeline does not use libraries and the shaders are all found in
the cache, we end up with empty groups and crash at pipeline emit time.
Fixes a bunch of tests under
dEQP-VK.pipeline.monolithic.shader_module_identifier.\*.ray_tracing\*
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18582>
Yonggang Luo [Mon, 19 Sep 2022 18:04:51 +0000 (02:04 +0800)]
aco: Convert to use u8 literal for Unicode character to fixes msvc warning
Warning:
aco_register_allocation.cpp(383): warning C4819: The file contains a character that cannot be represented in the current code page (0). Save the file in Unicode format to prevent data loss
This warning was treated as error with compiling with msvc
u8 is belongs to c11 standard so it's safe to use it
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18682>
Yonggang Luo [Thu, 8 Sep 2022 18:53:44 +0000 (02:53 +0800)]
radv: Remove the redundant #include <gelf.h> and #include <libelf.h> in ac_binary.c
It's not access these two header in the source code
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18682>
Marcin Ślusarz [Fri, 3 Jun 2022 13:39:45 +0000 (15:39 +0200)]
intel/compiler: use nir_lower_task_shader pass
This implements task payload atomics in ANV.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16852>
Marcin Ślusarz [Tue, 20 Sep 2022 13:11:30 +0000 (15:11 +0200)]
intel/compiler: print shader after successful brw_nir_lower_shading_rate_output
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18702>
Marcin Ślusarz [Tue, 20 Sep 2022 13:02:22 +0000 (15:02 +0200)]
intel/compiler: remove second shading rate lowering for mesh
It's already called in brw_postprocess_nir and calling it the second time
actually breaks shading rate.
Initially, when I added this call here in
9acb30c8c40, I was testing it
on an internal tree, which didn't have brw_nir_lower_shading_rate_output call
in brw_postprocess_nir.
Fixes:
9acb30c8c40 ("intel/compiler: implement primitive shading rate for mesh")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18702>
Emma Anholt [Thu, 15 Sep 2022 21:19:33 +0000 (14:19 -0700)]
ci: Update kernel to drm-next-2022-08-12-1
This brings in new msm UAPI that we'd like to be testing in turnip.
Unfortunately, a530 became flaky across dEQP and piglit. It seems that a
GPU hang from a test that we expect to hang will cause a followup
hangcheck affecting innocent tests. For example:
22-09-19 18:53:22 R SERIAL> [ 348.839188] msm_mdp 901000.mdp: [drm:a5xx_irq] *ERROR* gpu fault ring 0 fence ff55 status
C10001C3 rb 084a/084a ib1
000000000105A000/0000 ib2
000000000105B000/0000
22-09-19 18:53:22 R SERIAL> [ 348.839272] msm_mdp 901000.mdp: [drm:recover_worker] *ERROR* A530: hangcheck recover!
22-09-19 18:53:22 R SERIAL> [ 348.852698] msm_mdp 901000.mdp: [drm:recover_worker] *ERROR* A530: offending task: shader_run:sq0 (/piglit/bin/shader_runner tests/spec/glsl-1.30/execution/clipping/vs-clip-distance-enables.shader_test -auto -fbo)
22-09-19 18:53:22 R SERIAL> [ 348.868680] msm_mdp 901000.mdp: [drm:a5xx_irq] *ERROR* gpu fault ring 0 fence ff55 status
C10001C3 rb 084a/084a ib1
000000000105A000/0000 ib2
000000000105B000/0000
22-09-19 18:53:22 R SERIAL> [ 348.879586] msm_mdp 901000.mdp: [drm:recover_worker] *ERROR* A530: hangcheck recover!
[...]
22-09-19 18:53:23 R SERIAL> ERROR - Test spec@glsl-1.10@execution@algebraic@glsl-algebraic-logicand-false: Fail: See "//results/piglit.spec@glsl-1.10@execution@algebraic@glsl-algebraic-logicand-false.log"
As a result, I've moved a530 to test-manual-mr until it can be stabilized
again. This updated kernel also brings in a couple of regression fixes
for nouveau gk20a and gm20b.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18624>
Michel Dänzer [Tue, 20 Sep 2022 12:25:47 +0000 (14:25 +0200)]
lavapipe: Fix float32_atomic_min_max spelling
Fixes build with LLVM >= 15.
Fixes:
31695f81c925 ("lavapipe: export VK_KHR_shader_atomic_float")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18701>
Michel Dänzer [Tue, 20 Sep 2022 12:24:51 +0000 (14:24 +0200)]
gallivm: Fix LLVMAtomicRMWBinOpFMax spelling
Fixes build with LLVM >= 15.
Fixes:
203920d4c693 ("gallivm: add atomic 32-bit float support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18701>
Emma Anholt [Sun, 18 Sep 2022 20:55:19 +0000 (13:55 -0700)]
ci/nouveau: Update gm20b xfails.
Similar set of skips as gk20a, so we can find any remaining flakes given
the firehose of SSBOs and geom/tess flakes.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18674>
Emma Anholt [Sat, 17 Sep 2022 04:40:46 +0000 (21:40 -0700)]
ci/nouveau: fix up Jetson Nano
The updated board has a stabilized GPU and now I just need to decide if
I'm building a farm of them or not. The new firmware flash needs a
reminder to the kernel of how to do NFS (no v2, thanks). Also, the full
run is long and we need the TEST_PHASE_TIMEOUT variable to go past 20
minutes now.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18674>
Emma Anholt [Sun, 18 Sep 2022 18:10:40 +0000 (11:10 -0700)]
ci/nouveau: Rearrange job setup variables.
Now there's "generic stuff for nouveau with bare metal", "the two board
types and how to use them", and "the specific jobs for those boards."
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18674>
Emma Anholt [Sun, 18 Sep 2022 18:05:01 +0000 (11:05 -0700)]
ci/nouveau: Drop BM_POE_TIMEOUT.
Unused since
5f09b1ebe988 ("ci/bare-metal: Add test phase timeouts to all
boards.").
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18674>
Michael Skorokhodov [Fri, 6 May 2022 09:28:21 +0000 (12:28 +0300)]
egl: Return EGL_BAD_MATCH for invalid share_list
From the eglspec.1.5: "An EGL_BAD_MATCH is generated if [...]
share context was created on a different display than
the one referenced by config."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6414
Signed-off-by: Mykhailo Skorokhodov<mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16368>
Friedrich Vock [Mon, 19 Sep 2022 17:42:37 +0000 (19:42 +0200)]
radv: Correct accel struct header size
The size was changed when adding metadata but not updated here.
Fixes:
07eceb4f ("radv: Add metadata to acceleration structures")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18680>
Pavel Ondračka [Mon, 19 Sep 2022 12:34:28 +0000 (14:34 +0200)]
r300: reduce CPU overhead in IF transformation pass
Right now there is a call to rc_get_variables, which performs a global
analysis of the whole shader, for every IF encountered. As a result,
shaders with a lot of IFs are compiled very slowly. The patological
cases are shaders using relative adressing, where the lowered array
access can result in tens of IFs.
This patch restructures the pass to call the rc_get_variables just once
at the beginning and later reuse the gathered info. We can do this,
because even though we transform the shader in the meantime (like for
example adding extra MOVs) the transformations are not siginificant
enough to influence the relevant variable info we are using.
This reduces CPU time for my shader-db by more than a half. I also
checked that the generated code for all shaders in shader-db is
identical.
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18678>
Samuel Pitoiset [Tue, 13 Sep 2022 12:54:46 +0000 (14:54 +0200)]
radv,aco: do not compact MRTs if the pipeline uses a PS epilog
We can't detect color attachment without exports when compiling a PS
epilog, so we can't compact MRTs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18514>
Iago Toral Quiroga [Tue, 20 Sep 2022 08:48:19 +0000 (10:48 +0200)]
v3dv: fix VK_EXT_texel_buffer_alignment
This extension was promoted to Vulkan 1.3 so we should be setting its
properties directly in the VkPhysicalDeviceVulkan13Properties struct
which the common mesa code will use to populate outgoing properties.
Apparently, only the properties struct was promoted and not the features
struct.
Reviewed-by: Eric Engestrom <eric@igalia.com>
Tested-by: Eric Engestrom <eric@igalia.com>
Fixes:
ee62a4c751c ('v3dv: implement VK_EXT_texel_buffer_alignment')
Fixes: dEQP-VK.api.info.get_physical_device_properties2.properties.basic
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18697>
Rhys Perry [Mon, 12 Sep 2022 11:11:09 +0000 (12:11 +0100)]
aco: DCE ra_ctx::defs_done
This was used to distinguish definitions fixed before and during RA, but
it seems it isn't used anymore.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18547>
Samuel Pitoiset [Fri, 9 Sep 2022 09:35:55 +0000 (11:35 +0200)]
radv: allow to build the main FS in a graphics pipeline library
Corner cases like implicit gl_PrimitiveID are currently broken and
will be fixed later, but the general case should work.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18516>
Samuel Pitoiset [Thu, 1 Sep 2022 08:16:11 +0000 (10:16 +0200)]
radv: do not link shaders when the next stage is unknown
With GPL, it's possible to build the pre-rasterization stages separately
from the fragment stage. Implicit IO (like gl_PrimitiveID) between the
last pre-rast stage and the FS will be addressed later.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18516>
Marcin Ślusarz [Mon, 19 Sep 2022 10:55:19 +0000 (12:55 +0200)]
nir, anv, hasvk, radv: pull uses_wide_subgroup_intrinsics into shader_info
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18504>
Marcin Ślusarz [Mon, 19 Sep 2022 10:41:09 +0000 (12:41 +0200)]
anv: small cleanup of anv_graphics_pipeline_compile
Extract variables for things that are computed multiple times.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18504>
Marcin Ślusarz [Wed, 31 Aug 2022 12:28:04 +0000 (14:28 +0200)]
anv: add support for anv_assume_full_subgroups to task & mesh stages
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18504>
Marcin Ślusarz [Wed, 31 Aug 2022 12:26:58 +0000 (14:26 +0200)]
nir: add uses_wide_subgroup_intrinsics to task/mesh shader_info
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18504>
Samuel Pitoiset [Thu, 15 Sep 2022 12:58:51 +0000 (14:58 +0200)]
radv,aco: lower barycentric_at_sample in NIR
fossils-db (NAVI21):
Totals from 158 (0.12% of 134913) affected shaders:
CodeSize: 569456 -> 568824 (-0.11%)
Only Control seems affected.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18615>
Samuel Pitoiset [Thu, 15 Sep 2022 12:56:28 +0000 (14:56 +0200)]
radv: run nir_opt_cse before lowering FS intrinsics
Otherwise, there might be redundant barycentric_at_sample intrinsics
that will be lowered and this will increase code size.
No fossils-db changes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18615>
Samuel Pitoiset [Thu, 15 Sep 2022 12:55:59 +0000 (14:55 +0200)]
radv: add nir_intrinsic_load_sample_positions_amd in the ABI
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18615>
Samuel Pitoiset [Thu, 15 Sep 2022 12:55:10 +0000 (14:55 +0200)]
nir: add nir_intrinsic_load_sample_positions_amd
This will be used to lower barycentric_at_sample in NIR for RADV.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18615>
Bas Nieuwenhuizen [Tue, 20 Sep 2022 00:37:39 +0000 (02:37 +0200)]
ac/surface: Fix some warnings.
../mesa/src/amd/common/ac_surface.c:2324:48: warning: implicit conversion from enumeration type 'AddrResourceType' (aka 'enum _AddrResourceType') to different enumeration type 'enum gfx9_resource_type' [-Wenum-conversion]
surf->u.gfx9.resource_type = AddrSurfInfoIn.resourceType;
~ ~~~~~~~~~~~~~~~^~~~~~~~~~~~
../mesa/src/amd/common/ac_surface.c:3046:38: warning: implicit conversion from enumeration type 'const enum gfx9_resource_type' to different enumeration type 'AddrResourceType' (aka 'enum _AddrResourceType') [-Wenum-conversion]
input.resourceType = surf->u.gfx9.resource_type;
~ ~~~~~~~~~~~~~^~~~~~~~~~~~~
../mesa/src/amd/common/ac_surface.c:3069:38: warning: implicit conversion from enumeration type 'const enum gfx9_resource_type' to different enumeration type 'AddrResourceType' (aka 'enum _AddrResourceType') [-Wenum-conversion]
input.resourceType = surf->u.gfx9.resource_type;
The enums are compatible so lets just add some casts.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18694>
Yonggang Luo [Mon, 19 Sep 2022 18:44:30 +0000 (02:44 +0800)]
clover: Fixes use of designated initializers requires in c++ that doesn't support by MSVC
../src/gallium/frontends/clover/nir/invocation.cpp(400): error C7555: use of designated initializers requires at least '/std:c++20'
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18683>
Iago Toral Quiroga [Fri, 16 Sep 2022 09:44:25 +0000 (11:44 +0200)]
v3dv: optimize ldunif load into unifa write
If we emit a ldunif to load the ubo/ssbo base address and
then we are immediately moving it to the unifa register we
can have the ldunif write directly to unifa and avoid the mov
in between, which won't be done by copy propagation because that
only works with temp registers.
Also, since we can't read from unifa we must be careful to disallow
reuse of the ldunif result for a future ldunif of the same base address.
We do that by only reusing ldunif results from temp registers.
total instructions in shared programs:
12468943 ->
12455139 (-0.11%)
instructions in affected programs: 1661233 -> 1647429 (-0.83%)
helped: 8307
HURT: 3994
total uniforms in shared programs: 3704532 -> 3704522 (<.01%)
uniforms in affected programs: 339 -> 329 (-2.95%)
helped: 7
HURT: 0
total max-temps in shared programs: 2148158 -> 2148290 (<.01%)
max-temps in affected programs: 9320 -> 9452 (1.42%)
helped: 175
HURT: 295
total spills in shared programs: 2202 -> 2202 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0
total fills in shared programs: 3059 -> 3057 (-0.07%)
fills in affected programs: 27 -> 25 (-7.41%)
helped: 1
HURT: 0
total sfu-stalls in shared programs: 21167 -> 21056 (-0.52%)
sfu-stalls in affected programs: 497 -> 386 (-22.33%)
helped: 209
HURT: 127
total inst-and-stalls in shared programs:
12490110 ->
12476195 (-0.11%)
inst-and-stalls in affected programs: 1662875 -> 1648960 (-0.84%)
helped: 8312
HURT: 3987
total nops in shared programs: 316563 -> 313553 (-0.95%)
nops in affected programs: 24269 -> 21259 (-12.40%)
helped: 2158
HURT: 1006
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18667>
Iago Toral Quiroga [Fri, 16 Sep 2022 09:42:50 +0000 (11:42 +0200)]
broadcom/compiler: check signal writes to magic regs when updating scoreboard
We have only been checking magic writes from ADD and MUL ports, but signals
can potentially write to magic registers too.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18667>
Iago Toral Quiroga [Mon, 19 Sep 2022 06:54:04 +0000 (08:54 +0200)]
broadcom/compiler: detect unifa write from signal
It is possible for some signals to write to unifa directly. We will
enable this from ldunif shortly so we should check for it here.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18667>
Vinson Lee [Sun, 18 Sep 2022 22:39:37 +0000 (15:39 -0700)]
radv: Use count_tes_user_sgprs return value.
Fix defect reported by Coverity Scan.
Useless call (USELESS_CALL)
side_effect_free: Calling count_tes_user_sgprs(key) is only useful for
its return value, which is ignored.
Fixes:
8253ec3855a ("radv: add shader arguments for dynamic patch control points")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18659>
Qiang Yu [Fri, 29 Jul 2022 03:23:22 +0000 (11:23 +0800)]
radeonsi: print out remove_streamout shader key
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17456>
Qiang Yu [Thu, 30 Jun 2022 09:50:47 +0000 (17:50 +0800)]
radeonsi: implement nir_intrinsic_load_streamout_buffer_amd
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17456>
Qiang Yu [Thu, 30 Jun 2022 09:28:46 +0000 (17:28 +0800)]
radeonsi: implement nir_intrinsic_load_num_vertices_per_primitive_amd
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17456>
Marek Olšák [Mon, 12 Sep 2022 16:48:28 +0000 (12:48 -0400)]
radeonsi: set VS_OUT_MISC_SIDE_BUS_ENA=1 for clip distance exports on gfx10.3
This should improve performance of clip distances.
Reviewed-by: Pierre-eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18639>
Tapani Pälli [Mon, 19 Sep 2022 12:52:38 +0000 (15:52 +0300)]
anv: remove vk_sample_locations_state from emit_multisample
State for sample locations is not used within this function.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18669>
Ruijing Dong [Fri, 16 Sep 2022 00:57:52 +0000 (20:57 -0400)]
frontends/va: enable sao in hevc encoding
enable sao feature from config attribute. by default
from vcn2, hevc encoding enables sao.
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18626>
Rob Clark [Sun, 18 Sep 2022 18:42:11 +0000 (11:42 -0700)]
freedreno/a6xx: Simplify fd6_build_user_consts()
Get rid of the table indirects. Cuts in half the time spent in this fxn
in drawoverhead test 31 ("many uniforms / 1 changemany uniforms / 1
change")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Rob Clark [Sun, 18 Sep 2022 18:34:33 +0000 (11:34 -0700)]
freedreno/a6xx: Move user const upload to bind
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Rob Clark [Sun, 18 Sep 2022 18:17:17 +0000 (11:17 -0700)]
freedreno: Drop unused arg
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Rob Clark [Sun, 18 Sep 2022 17:28:36 +0000 (10:28 -0700)]
freedreno/a6xx: Pre-calculate user const state size
We can do this when we construct the program state object, rather than
at draw time.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Rob Clark [Sun, 18 Sep 2022 17:07:34 +0000 (10:07 -0700)]
freedreno/a6xx: Skip IBO state when unused
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Rob Clark [Sat, 17 Sep 2022 20:05:18 +0000 (13:05 -0700)]
freedreno/drm: Simplify emit_reloc_common
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Rob Clark [Thu, 4 Aug 2022 22:58:15 +0000 (15:58 -0700)]
freedreno/a6xx: Drop "hardpin" support
The upstream kernel supported everything needed to stop doing
kernel-side relocs before the first things with a6xx were fully
supported in upstream kernel. Take advantage to drop some extra
overhead in OUT_RELOC() and equiv in the pack macros.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Rob Clark [Thu, 4 Aug 2022 22:41:53 +0000 (15:41 -0700)]
freedreno/drm: Add fd_ringbuffer_attach_bo()
Which does only the bo bookkeeping and skips all the extra legacy reloc
related overhead.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Rob Clark [Thu, 4 Aug 2022 22:29:33 +0000 (15:29 -0700)]
freedreno/drm: Inline fd_bo_get_iova()
The struct body was originally hidden to avoid it being part of the ABI
between libdrm_freedreno and mesa. But that is no longer a problem.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Rob Clark [Fri, 5 Aug 2022 16:40:31 +0000 (09:40 -0700)]
freedreno/ir3: GC unused macro
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Rob Clark [Sat, 17 Sep 2022 17:45:38 +0000 (10:45 -0700)]
freedreno: Update github wiki links
The github wiki isn't really maintained anymore. Update references to
point to the gitlab wiki instead.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18646>
Bas Nieuwenhuizen [Sun, 11 Sep 2022 21:31:58 +0000 (23:31 +0200)]
radv: Add scratch stack to reduce LDS stack in RT traversal.
The current stack size is a significant limiter for occupancy, and
hence we need smaller stacks in LDS.
Rhys earlier had a patch that just put the N entries closest to the
root in LDS and the rest in scratch. However, this is not ideal for
performance as most of the activity is happening away from the root,
near the leaves. Of course we can't just switch it around, as the
leaf activity likely isn't happening all the way at the end of the
stack.
So what we do is make the LDS stack kinda a ringbuffer by always
accessing it using the stack index modulo the buffer size (always
a power of two so we can efficiently mask). If we then do not have
free space in this buffer we evict the entries closest to the root
to scratch and if we hit the "bottom" of the LDS space we load from
scratch.
Some rough perf numbers for indication with Q2RTX:
| evicting | LDS entries | perf |
|----------|-------------|------|
| no | 76 | 55% |
| no | 32 | 100% |
| no | 24 | 105% |
| yes | 32 | 95% |
| yes | 16 | 100% |
| yes | 8 | 90% |
| yes | 4 | 75% |
(For the case with 4 entries we need to do some extra accounting as
a full batch may not be available to evict)
So an obvious choice is to use a stack of 16 entries.
One might wonder if Q2RTX perf is mainly good due to BVHs with very
little geometry and hence low depth, so I also did some profiling
with control. This is done with RGP instruction timing, so this is
instructions executed not weighted for enabled masks, i.e. divergence
effects included.
| game | LDS entries | scratch action | fraction of iterations |
|---------|-------------|----------------|------------------------|
| Control | 8 | store | 10.3% |
| Control | 8 | load | 34.8% |
| Control | 16 | store | 0.58% |
| Control | 16 | load | 2.62% |
| Q2RTX | 16 | store | 1.00% |
| Q2RTX | 16 | load | 3.07% |
So Q2RTX doesn't seem like an unreasonably good case for this
algorithm.
On the implementation side, we can always place the scratch stack at
address 0 by just reserving the scratch space, and in the case of fixed
callstack size moving that up. In the dynamic case the dynamic stack
base already takes any reserved scratch space into account.
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18541>
Rhys Perry [Mon, 14 Feb 2022 19:23:15 +0000 (19:23 +0000)]
radv: fix dynamic RT stack size with VGPR spilling
VGPR spilling might cause VGPRs to be spilled at scratch offset 0, so we
can't use that.
fossil-db (Sienna Cichlid, Q2RTX and Control):
Totals from 4 (0.26% of 1524) affected shaders:
Instrs: 8734 -> 8737 (+0.03%)
CodeSize: 48492 -> 48504 (+0.02%)
Latency: 384375 -> 384369 (-0.00%)
InvThroughput: 256250 -> 256246 (-0.00%)
Copies: 1312 -> 1313 (+0.08%)
Branches: 256 -> 258 (+0.78%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18541>
Dave Airlie [Mon, 19 Sep 2022 20:57:20 +0000 (06:57 +1000)]
docs: add new llvmpipe/lavapipe atomic float extensions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18636>
Dave Airlie [Fri, 16 Sep 2022 15:03:13 +0000 (01:03 +1000)]
lavapipe: export VK_KHR_shader_atomic_float
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18636>
Dave Airlie [Fri, 16 Sep 2022 15:02:50 +0000 (01:02 +1000)]
llvmpipe: export GL_NV_shader_atomic_float
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18636>
Dave Airlie [Fri, 16 Sep 2022 09:58:59 +0000 (19:58 +1000)]
gallivm: add atomic 32-bit float support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18636>
Mike Blumenkrantz [Mon, 19 Sep 2022 14:31:36 +0000 (10:31 -0400)]
zink: disable GPL when sample shading is in use
this seems impossible to handle as near as I can tell
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18671>
Bas Nieuwenhuizen [Sun, 11 Sep 2022 15:59:15 +0000 (17:59 +0200)]
radv: Use nested ifs for pushing child nodes in traversal loop.
Avoids a bunch of overhead costs if the previous child was empty
already.
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18538>
Bas Nieuwenhuizen [Sun, 11 Sep 2022 14:48:58 +0000 (16:48 +0200)]
radv: Use constant for ray traversal exit condition.
Make the stack base ssa def dead in the loop, can save a register.
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18538>
Bas Nieuwenhuizen [Sun, 11 Sep 2022 14:18:14 +0000 (16:18 +0200)]
Revert "radv/rt: use derefs for the traversal stack"
This reverts commit
3750663c72b01d8668c13eed44f40863af588ba4.
Doing things with derefs adds extra instructions for multiplying the
index with the element size, e.g.
BBF0_13:
s_waitcnt vmcnt(0)
v_mov_b32_e32 v27, v55
s_mov_b32 s23, exec_lo
v_cmpx_ne_i32_e32 -1, v27
s_cbranch_execz _L14
BBF0_14:
v_lshlrev_b32_e32 v48, 2, v46 <--
ds_write_b32 v48, v27
v_add_nc_u32_e32 v46, 32, v46
_L14:
s_mov_b32 exec_lo, s23
v_mov_b32_e32 v27, v54
s_mov_b32 s23, exec_lo
v_cmpx_ne_i32_e32 -1, v27
s_cbranch_execz _L15
BBF0_15:
v_lshlrev_b32_e32 v48, 2, v46 <--
ds_write_b32 v48, v27
v_add_nc_u32_e32 v46, 32, v46
On Q2RTC indirect lighting this saves about 2.3 VALU instructions
per loop iteration, which is ~4% of VALU instructions (we're at
58 per iteration now according to RGP).
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18538>
Bas Nieuwenhuizen [Sat, 10 Sep 2022 01:23:15 +0000 (03:23 +0200)]
radv: Store top of stack in a register.
Saves a bunch of processing and a lot of LDS traffic.
Improves perf of the indirect lighting RT pass in Q2RTX by ~3%. This
is mostly due to the -5% VALU instructions and -25% LDS instructions.
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18538>
Bas Nieuwenhuizen [Sat, 10 Sep 2022 00:34:35 +0000 (02:34 +0200)]
radv: Don't flatten bottom AS exit if statement.
The flattening by ACO is more efficient than the nir condmask.
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18538>
Kai Wasserbäch [Sat, 17 Sep 2022 16:42:44 +0000 (18:42 +0200)]
fix: frontends/va: unused variable ‘max_pipe_hevc_slices’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 16:37:05 +0000 (18:37 +0200)]
fix: zink: unused variable ‘intr’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 16:35:44 +0000 (18:35 +0200)]
fix: iris: unused variable ‘devinfo’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 16:33:10 +0000 (18:33 +0200)]
fix: r600/sfn: unused variable ‘spi_sid’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 16:13:58 +0000 (18:13 +0200)]
fix: r600/sfn: variable ‘fail’ set but not used [-Wunused-but-set-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 16:12:37 +0000 (18:12 +0200)]
fix: r600/sfn: unused variable ‘{splitpos,param}’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 16:10:13 +0000 (18:10 +0200)]
fix: r600/sfn: unused variable ‘splitpos’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 16:08:43 +0000 (18:08 +0200)]
fix: r600/sb: warning: unused variable ‘{b,nl}’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 11:50:21 +0000 (13:50 +0200)]
fix: r600/sfn: variable ‘opinfo’ set but not used [-Wunused-but-set-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 11:48:13 +0000 (13:48 +0200)]
fix: r600/sb: unused variable ‘r’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 11:46:07 +0000 (13:46 +0200)]
fix: r600/sb: unused variable ‘fop’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 11:43:53 +0000 (13:43 +0200)]
fix: r600/sb: unused variable ‘repdep2’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 11:39:19 +0000 (13:39 +0200)]
fix: gallivm: variable ‘type_kind’ set but not used [-Wunused-but-set-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 11:37:36 +0000 (13:37 +0200)]
fix: mesa/st: unused variable ‘src’ [-Wunused-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>
Kai Wasserbäch [Sat, 17 Sep 2022 11:35:59 +0000 (13:35 +0200)]
fix: mesa/st: variable ‘texobj’ set but not used [-Wunused-but-set-variable]
Only used in debug builds.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18643>