Nikhil Raj [Fri, 5 Jul 2019 11:22:58 +0000 (12:22 +0100)]
IVGCVSW-3293 Add CL backend support for PReLU
Change-Id: I1bb187db89bb3eb883b8f0aca4c3439d82b56583
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Matteo Martincigh [Thu, 4 Jul 2019 16:52:55 +0000 (17:52 +0100)]
Fix the warning message reporting when sub-graphs fail to get optimized
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Change-Id: I92a83b61a0c89029cbde0a6cc26599691d171660
Matthew Bentham [Fri, 21 Jun 2019 16:22:23 +0000 (17:22 +0100)]
IVGCVSW-3307 Add RefMemoryManager
Simple pool memory manager for use in the reference backend,
in order to make the backend usable for testing large networks.
Change-Id: I5694da29052c60f95b57da595c64cc114d75b8ba
Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com>
Narumol Prangnawarat [Wed, 3 Jul 2019 13:55:57 +0000 (14:55 +0100)]
IVGCVSW-3399 Add QSymm16 IsLayerSupportedTest to reference backend
* Refactor and add QSymm16 to IsDepthwiseConvolutionSupported
* Refactor and add QSymm16 to IsEqualSupported
* Refactor and add QSymm16 to IsGreaterSupported
* Refactor and add QSymm16 to IsSplitterSupported
* Refactor and add QSymm16 to IsStridedSliceSupported
* Refactor and add QSymm16 to IsMemCopySupported
* Refactor IsFakeQuantizationSupported
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I4f115a5535748fc22df8bc90b24b537fd5dd95b8
Matteo Martincigh [Wed, 3 Jul 2019 09:17:40 +0000 (10:17 +0100)]
IVGCVSW-3277 Remove dead code
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Change-Id: Ibc108699f0bccf9210defac8707c4f61cb181e3f
Matthew Bentham [Tue, 2 Jul 2019 14:45:18 +0000 (15:45 +0100)]
IVGCVSW-3307 TransposeConvolution: Don't call Map() before Execute()
Change-Id: I7a812eafc8c73d074049ba95189cbc17d276eee3
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Teresa Charlin [Tue, 2 Jul 2019 12:25:22 +0000 (13:25 +0100)]
IVGCVSW-3161 Bug Fix in Nearest Neighbor implementation;
consider 4 neighbors instead of 2.
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ia724b35f723157e9f51b5345964200f126b98267
Aron Virginas-Tar [Mon, 1 Jul 2019 18:01:44 +0000 (19:01 +0100)]
IVGCVSW-3382 Deprecate ResizeBilinear and use Resize with Bilinear method
!android-nn-driver:1451
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Ieedbce1f6e95891137a250fdd07e2f7e4e1f4828
Jan Eilers [Wed, 26 Jun 2019 12:10:09 +0000 (13:10 +0100)]
IVGCVSW-3236 Extend Ref LSTM with layer normalization support
* Add descriptor values
* Update lstm queue descriptor validate function
* Update lstm workload
* Update isLstmSupported (Cl and Ref), LayerSupportBase, ILayerSupport
* Update lstm layer
* Add unit tests
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I932175d550facfb342325051eaa7bd2084ebdc18
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Matteo Martincigh [Thu, 27 Jun 2019 15:15:20 +0000 (16:15 +0100)]
IVGCVSW-3369 Add IsPreluSupported to default layer support
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Change-Id: Ic3ed5911cea75b9052dab2ed802cbbe4bca38603
Matthew Bentham [Mon, 24 Jun 2019 11:51:25 +0000 (12:51 +0100)]
IVGCVSW-3307 Don't assume TensorInfo::Map() can be called before Execute()
Change-Id: I445c69d2e99d8c93622e739af61f721e61b0f90f
Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com>
Matthew Bentham [Tue, 18 Jun 2019 15:14:34 +0000 (16:14 +0100)]
IVGCVSW-3307 Introduce RefTensorHandle
Use it for intermediate tensors on reference backend.
Lays the groundwork for memory management in the reference backend.
Change-Id: I7d3ee132cac31bde70ae6e1b815f4f0b03d550a6
Signed-off-by: Matthew Bentham <Matthew.Bentham@arm.com>
Aron Virginas-Tar [Mon, 1 Jul 2019 15:12:58 +0000 (16:12 +0100)]
IVGCVSW-3361 Add end-to-end tests for Resize on CpuRef
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Ie89dc91a2fc0281d58c6f1ccef65ed1228d33ccb
Teresa Charlin [Mon, 1 Jul 2019 15:22:56 +0000 (16:22 +0100)]
IVGCVSW-3366 Add Quantizer support for ResizeLayer
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ibfd4725bb04a5859488e968513cf11ac450fd277
Teresa Charlin [Mon, 1 Jul 2019 12:51:07 +0000 (13:51 +0100)]
IVGCVSW-3365 Add reference workload support for ResizeLayer
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Id551690065dca0686ce597d1f0c14fd73163481e
FinnWilliamsArm [Fri, 28 Jun 2019 14:07:10 +0000 (15:07 +0100)]
IVGCVSW-3364 Add serialization support for Resize layer
Signed-off-by: FinnWilliamsArm <Finn.Williams@arm.com>
Change-Id: I3b1af816cefc1760f63324f365de93f899c9c9ee
Teresa Charlin [Thu, 27 Jun 2019 14:41:57 +0000 (15:41 +0100)]
IVGCVSW-3363 Add frontend support for Resize Layer
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I63493ddb7598515773073deb6db2eb3a635c5dfe
Aron Virginas-Tar [Thu, 27 Jun 2019 17:54:47 +0000 (18:54 +0100)]
IVGCVSW-3162 Support CL workload for TransposeConv2D
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I3b021c0828d30298d99ddb211c9aae17fe3636f0
Aron Virginas-Tar [Thu, 27 Jun 2019 15:59:36 +0000 (16:59 +0100)]
Remove unnecessary include from RefLayerTests.cpp
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I0078d91f86f8632ab87c6c4484ca1ba52a142812
Aron Virginas-Tar [Wed, 26 Jun 2019 14:02:47 +0000 (15:02 +0100)]
IVGCVSW-3324 Add end-to-end tests for TransposeConvolution2d on CpuRef
* Added one end-to-end test for all supported data types and data layout
* Implemented RefLayerSupport::IsTransposeConvolution2dSupported()
* Fixed formula used in TransposeConvolution2dLayer::InferOutputShapes()
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: If1ba3c226ecfa17f7fceffae857f39297c6433f2
Aron Virginas-Tar [Wed, 26 Jun 2019 14:02:47 +0000 (15:02 +0100)]
IVGCVSW-3320 Add reference workload support for TransposeConvolution2dLayer
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Icc64f8148c9d8a0d14d772e6e4e7865e70585cd9
Ferran Balaguer [Tue, 18 Jun 2019 15:46:00 +0000 (16:46 +0100)]
IVGCVSW-3287 Add L2Normalization epsilon CL workload support
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
Change-Id: Ifb7d50ed43cd66e219b17369130f9091d4a668e7
Narumol Prangnawarat [Wed, 26 Jun 2019 14:10:46 +0000 (15:10 +0100)]
IVGCVSW-3193 Allow ExecuteNetwork to have qasymm8 input type
and add option to quantize float inputs to qasymm8
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I54b13b8b53c31c05658fe9c310ca5a66df759aa5
Ferran Balaguer [Mon, 24 Jun 2019 11:43:38 +0000 (12:43 +0100)]
Update the CL pin to the latest master
* Update SoftMaxUint8Workload for CL and NEON to deal with
quantization parameters as vectors.
* Change Sigmoid Activation function QAsymm8 tests to use
scale=1.f/256.f and offset=0 as quatization output parameters.
!android-nn-driver:1417
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
Change-Id: Ief91f10193fbbbad0c0124ece41f0bf4e0dcd992
Keith Davis [Wed, 26 Jun 2019 14:28:43 +0000 (15:28 +0100)]
IVGCVSW-3197 Support SPACE_TO_DEPTH on Android
* Fix for undefined reference to IsLayerSupported
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: If9d39149a5ad41dbf835d79b8cb937ac253c927e
Francis Murtagh [Tue, 25 Jun 2019 13:41:55 +0000 (14:41 +0100)]
IVGCVSW-3347 Add EndToEnd test for BatchToSpaceNd
* Add Simple and complex end to end tests based on tensorflow.org examples
Change-Id: Ifa758a48cf5ea09f9be7945859cd37377dbb9465
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Francis Murtagh [Tue, 25 Jun 2019 09:57:10 +0000 (10:57 +0100)]
IVGCVSW-3249 Extend the BatchToSpace workload to support QSymm16
* Add reference supportedness validation checks.
* Call unit tests with QSymm16 data type.
Change-Id: Ie6621ca7072dfc69278198c53e09b090275a7fff
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Sadik Armagan [Wed, 26 Jun 2019 08:47:51 +0000 (09:47 +0100)]
IVGCVSW-3310 Update scripts to download q-fsk version
* Updated Android.mk file to be consistent with android-nn-driver and q-fsk
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I97d0a73c6d0dcac6848d850c4a53182dd55e40f9
Matthew Bentham [Mon, 24 Jun 2019 12:10:54 +0000 (13:10 +0100)]
Don't override compiler options specified on command line
Change-Id: Id004415afe70c1b4c97ede2da2613edbb9b4e064
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Ellen Norris-Thompson [Mon, 24 Jun 2019 08:23:38 +0000 (09:23 +0100)]
IVGCVSW-3250 Extend the Gather workload for QSymm16 support
* Add LayerTests and EndToEndTests for QSymm16
* Updated GatherQueueDescriptor::Validate function
* Reimplemented RefLayerSupport::IsGatherSupported
Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com>
Change-Id: I5b4df55d31b5ee3c5563d2df17b412a387c27595
SiCong Li [Wed, 19 Jun 2019 17:07:25 +0000 (18:07 +0100)]
MLCE-103 Fix out-of-bound bug in ModelAccuracyChecker
* Inside method AddImageResult, the number of generated output may
exceed the size of m_TopK. Limit the check to the size of m_TopK.
Signed-off-by: SiCong Li <sicong.li@arm.com>
Change-Id: Ic7513ca27a283ef6d098d5aa0a94b4f17ff04f66
Francis Murtagh [Mon, 24 Jun 2019 13:24:36 +0000 (14:24 +0100)]
IVGCVSW-3334 Refactor BatchToSpace tests to be generic
* Generify and reformat test BatchToSpace tests
* Add missing RefCreateWorkload test
Change-Id: I08af018c07ee41df5b9d1e578d99bc03f38090ac
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
David Monahan [Wed, 19 Jun 2019 10:47:21 +0000 (11:47 +0100)]
IVGCVSW-3235 Add scalar to use as padding value in Reference Pad
Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: If050f318fcb7626bbfae1b8737a1d232a4a5a915
Derek Lamberti [Thu, 13 Jun 2019 10:40:08 +0000 (11:40 +0100)]
IVGCVSW-3277 Refactor TensorHandle factory API
* Added backend support for multiple types of TensorHandle factories
* Refactored the backend API to enable new tensor strategies
* Added mechanism to determine memory strategies during optimization
* Perform mem-copy only when Direct access is not found
* Explicitly deleted the copy-constructor from OutputSlot to prevent
accidental local copies that would cause the DisconnectAll to be
called by the destructor
Change-Id: I7e812c8e5e6c1c20db1c5932749ac70fd93db7f8
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Keith Davis [Fri, 21 Jun 2019 08:33:59 +0000 (09:33 +0100)]
IVGCVSW-3263 - Add End to End tests for SpaceToDepth on Ref
Change-Id: I35d1c06b34ca160895f902255a69b87b711275b7
Signed-off-by: Keith Davis <keith.davis@arm.com>
Jim Flynn [Mon, 24 Jun 2019 13:32:41 +0000 (14:32 +0100)]
IVGCVSW-3343 Add backward compatibility deserialisation test for pad value
Change-Id: Ic0f4745e26ce177dad26c60d3b84c450240d2c7b
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Matteo Martincigh [Thu, 20 Jun 2019 16:17:45 +0000 (17:17 +0100)]
IVGCVSW-3267 Add more code coverage to the PReLU layer
* Added more unit tests to cover all code branches
* Moved the InferOutput tests to separate files
* Created convenience ARMNN_SIMPLE_TEST_CASE macro
* Created TestUtils file for common utility functions
Change-Id: Id971d3cf77005397d1f0b2783fab68b1f0bf9dfc
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Ellen Norris-Thompson [Fri, 21 Jun 2019 14:50:00 +0000 (15:50 +0100)]
IVGCVSW-3247: Refactor reference Gather workload
* Refactored Gather reference workload to not use templates for different types
* Added quantization values in Gather unit tests for Quantized types
Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com>
Change-Id: Ibe5d655aa1c287824e45b83818c5862bda7f92b0
Aron Virginas-Tar [Fri, 21 Jun 2019 14:25:19 +0000 (15:25 +0100)]
IVGCVSW-3322 Add Quantizer support for TransposeConvolution2DLayer
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I26997d7770585055b2b3256baad2800a4c5ed7e8
Aron Virginas-Tar [Fri, 21 Jun 2019 13:20:11 +0000 (14:20 +0100)]
IVGCVSW-3330 Parse dilation parameters for DepthwiseConvolution2d in Deserializer
* Added code for reading parameters dilationX and dilationY
to Deserializer::ParseDepthwiseConvolution()
* Updated serialization unit tests to check for dilation params
for both Convolution2d and DepthwiseConvolution2d
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Id03629866009e799cf7daf8b7bdafc73d158d9bb
Aron Virginas-Tar [Fri, 21 Jun 2019 12:53:38 +0000 (13:53 +0100)]
IVGCVSW-3321 Add serialization support for TransposeConvolution2dLayer
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: If0c8f3662d5e03696f97040abed784c0fbcdbc6f
Ferran Balaguer [Tue, 18 Jun 2019 15:25:06 +0000 (16:25 +0100)]
IVGCVSW-3291 Add L2Normalization epsilon value to serialization
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
Change-Id: Icfff3fb596a03c126a42b1d0c254a68e498df734
Aron Virginas-Tar [Thu, 20 Jun 2019 13:28:19 +0000 (14:28 +0100)]
IVGCVSW-3319 Add frontend support for TransposeConvolution2d Layer
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Ic06f63f1eff255e697facf319e2ac4c83d782e7c
Narumol Prangnawarat [Thu, 20 Jun 2019 16:08:03 +0000 (17:08 +0100)]
IVGCVSW-3193 Update bounding box value of MobileNet SSD after refactor
Convolution2d and DepthwiseConvolution2d to use Encoders and Decoders
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ic87b8ce6f68343983f3c825902425516cbb23b06
Matteo Martincigh [Thu, 20 Jun 2019 11:46:43 +0000 (12:46 +0100)]
IVGCVSW-3212 Refactor RefBatchNormalizationWorkload
* Refactor the reference batch normalization workload to avoid unnecessary function
calls and to improve readibility
Change-Id: I49d78dcac7bad36f57bd1eb196c12dbad01cc893
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Francis Murtagh [Thu, 20 Jun 2019 11:07:19 +0000 (12:07 +0100)]
IVGCVSW-3248 Refactor reference BatchToSpace workload
* Add Decoders and Encoders to workload to make it data type agnostic
* Merge float32 and Uint8 into single workload
Change-Id: I8adfa1898a63f13889eaaf55a31c26fd1e2d7ee8
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Ellen Norris-Thompson [Wed, 19 Jun 2019 10:46:21 +0000 (11:46 +0100)]
IVGCVSW-3269 Add Serialization support for the new Prelu Activation layer
* Adds serialization/deserialization support
* Adds related unit test
Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com>
Change-Id: I600322b03e51f443cbcd9262bb27e36e5fd95ae5
Matteo Martincigh [Wed, 19 Jun 2019 11:53:27 +0000 (12:53 +0100)]
IVGCVSW-3270 Add Quantizer support for the new Prelu Activation layer
* Implemented VisitPreluLayer
* Added unit test for Prelu layer quantization
Change-Id: I0442053f69608a400d295654b103cfd2429a0341
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Teresa Charlin [Wed, 19 Jun 2019 08:34:37 +0000 (09:34 +0100)]
IVGCVSW-3271 Add unit test for dilated DepthwiseConvolution2d
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I0e7132f61001f7b2a9fad3d7b21acf2558c01df4
Keith Davis [Fri, 14 Jun 2019 16:33:22 +0000 (17:33 +0100)]
IVGCVSW-3231 Add reference workload support for SpaceToDepth
* Added reference workload for SpaceToDepth
* Added unit tests for float32 & uint8
* Minor sort refactoring to RefWorkloads.hpp to alphabetical order
Change-Id: I2e01f8101650e2aae102a8a32bc0064f067141ab
Signed-off-by: Keith Davis <keith.davis@arm.com>
Matteo Martincigh [Thu, 13 Jun 2019 16:27:46 +0000 (17:27 +0100)]
IVGCVSW-3268 Add Reference workload support for the new Prelu Activation layer
* Added reference workload for the PReLU Activation layer
* Added factory methods
* Added validation support
* Added Int16 support
* Added unit tests
Change-Id: Ic950d908c5e0a335dccd2960a3ffab0f8b599876
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Francis Murtagh [Tue, 18 Jun 2019 11:30:37 +0000 (12:30 +0100)]
IVGCVSW-3299 Add Uint8 Support to Model Accuracy Checker
* Seperate ExecuteNetwork main function into standalone application
* Include NetworkExecutionUtils header and remove duplicate functions
* Add uint8 and int32 support to ModelAccuracyChecker
Change-Id: I5fb4bc147232f8388f37eea7db5130b04fd215d1
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Ferran Balaguer [Tue, 18 Jun 2019 15:32:30 +0000 (16:32 +0100)]
IVGCVSW-3288 Add L2Normalization epsilon Neon workload support
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
Change-Id: I938d97e6a2bfab8ff5f4548efeeaa43b7f5ccda2
Narumol Prangnawarat [Tue, 18 Jun 2019 15:22:35 +0000 (16:22 +0100)]
IVGCVSW-3234 Ensure that Quantizer allows different quantization scales
on inputs and output of Concat layer
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Idd79e44dbf49345aced3ddeeb8a53c9776f9f5d5
Narumol Prangnawarat [Mon, 17 Jun 2019 16:45:43 +0000 (17:45 +0100)]
IVGCVSW-3234 Add unit test for Concat with different quantization params
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ia655b1b6c5f57d2b7c0d9dd17be342cd01f36c09
Teresa Charlin [Fri, 14 Jun 2019 10:09:19 +0000 (11:09 +0100)]
IVGCVSW-3264 Add Unit Test for Dilated Convolution2d to armnn
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I60da1414ab41ea196cdebc27f0f014a502274fa8
Matteo Martincigh [Wed, 12 Jun 2019 14:42:18 +0000 (15:42 +0100)]
IVGCVSW-3267 Add Arm NN front end support for the new Prelu Activation layer
* Added new PreluLayer class
* Made necessary changes to ILayerSupport, ILayerVisitor, etc.
* Added unit tests
Change-Id: Ifcfb78e823bb5a245ed1dad15290d2f60115c882
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Ferran Balaguer [Mon, 17 Jun 2019 11:23:52 +0000 (12:23 +0100)]
IVGCVSW-3286 Add epsilon Reference workload support
Change-Id: I5cabbf9d1ef3858be68d6820d14845e512128c5b
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
Matteo Martincigh [Mon, 17 Jun 2019 12:25:18 +0000 (13:25 +0100)]
IVGCVSW-2779 Fix Android Q build
* Removed names of unused variables, as they cause the Android Q
build to fail
Change-Id: I4b091d6af05a67ce0aa4fcde3c5048a4a75798fc
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Ellen Norris-Thompson [Mon, 17 Jun 2019 10:32:49 +0000 (11:32 +0100)]
IVGCVSW-3219: Add QSymm16 support to the ResizeBilinear Reference workload
* Adds CreateWorkload and LayerTests for QSymm16
* Updated ResizeBilinearQueueDescriptor::Validate function
* Reimplemented RefLayerSupport::IsResizeBilinearSupported
Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com>
Change-Id: Id9d14d3b41d26ac3d51227ab248ce8cca9dc9969
Nikhil Raj [Mon, 17 Jun 2019 13:38:34 +0000 (14:38 +0100)]
IVGCVSW-3273 ArmnnQuantizer: UnimplementedException thrown for: VisitNormalizationLayer
Change-Id: Ic2929635c1c15c09f493053b2e64ddfbab2fe217
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
James Conroy [Tue, 11 Jun 2019 10:25:30 +0000 (11:25 +0100)]
IVGCVSW-3222 Extend Mean ref workload to support QSymm16
* Added support for QSymm16 in Mean ref workload
* Added unit tests for QSymm16 Mean
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I600b15069ff4a4531666c6bc7fb73187dcebf0ee
James Conroy [Mon, 10 Jun 2019 16:06:39 +0000 (17:06 +0100)]
IVGCVSW-3221 Refactor Mean ref workload and tests
* Renamed RefMeanFloat32Workload and RefMeanUint8Workload
to RefMeanWorkload, updated references to reflect this
change.
* Refactored RefFloorWorkload to use Decoders/Encoders,
to support the use of multiple data types.
* Deleted reference Unit8 Mean tests as they were
duplicates of the Float32 tests. Refactored these tests
to support multiple data types and updated references.
* Adjusted the values used in the tests' input tensors so
that they are more like floating point numbers
e.g. change 1.0f to 1.5f.
* Replace size_t with unsigned int in Mean ref workload,
for better compatibility with the Encoder/Decoder,
removed some unnecessary casts after this.
* Added ValidateTensorDataTypesMatch() function to
WorkloadData.cpp, added CreateIncorrectDimensionsErrorMsg
function to RefLayerSupport.cpp.
* Added passing and failing tests for ref IsMeanSupported.
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: Id3d44463d1385255c727a497d4026d21a49e7eb2
Aron Virginas-Tar [Fri, 14 Jun 2019 16:00:09 +0000 (17:00 +0100)]
IVGCVSW-3285 Remove out of date check from RefLayerSupport::IsDilatedDepthwiseConvolutionSupported
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Ie8d0247a65774e4e9717501439014dd0e973f9f3
Ellen Norris-Thompson [Wed, 12 Jun 2019 09:23:57 +0000 (10:23 +0100)]
IVGCVSW-3218 Refactor the Reference Workloads for the ResizeBilinear layer
* Refactored ResizeBilinear Reference Workloads to combine Float32 and Uint8 files
Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com>
Change-Id: I725a830f4c4755a7d3a37ca68e31e44e7eb267cb
Derek Lamberti [Thu, 13 Jun 2019 16:34:19 +0000 (17:34 +0100)]
IVGCVSW-3278 Cl and Neon TensorHandles inherit from common base interface
Change-Id: Ia68da09d8f0fb0a04af9cb61062d7edaa5f1b887
Signed-off-by: Derek Lamberti <derek.lamberti@arm.com>
Mike Kelly [Fri, 14 Jun 2019 11:35:24 +0000 (12:35 +0100)]
MLCE-121 Github: Build error on GCC 9
* Fixed an error encountered when building on GCC 9
error: moving a local object in a return statement prevents copy elision
* Fixed failures in unit tests due to std::initializer_list handling in GCC 9
Change-Id: I4bfdd2113dfedcecd29479ee556e4ae22278755d
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
nikraj01 [Fri, 14 Jun 2019 13:20:40 +0000 (14:20 +0100)]
IVGCVSW-3225 Add QSymm16 support for Rsqrt workload
Change-Id: I83b8494af24ff271dc4cd609944a1c5c55c405e0
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Ferran Balaguer [Thu, 13 Jun 2019 16:23:50 +0000 (17:23 +0100)]
IVGCVSW-3275 Add Uint8 support for L2Normalization
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
Change-Id: I7f2bcf0596a4f654166aad9657bc7084f55e7451
Ferran Balaguer [Mon, 10 Jun 2019 09:29:54 +0000 (10:29 +0100)]
IVGCVSW-3229 Refactor L2Normalization workload to support multiple data types
Signed-off-by: Ferran Balaguer <ferran.balaguer@arm.com>
Change-Id: I848056aad4b172d432664633eea000843d85a85d
nikraj01 [Fri, 14 Jun 2019 08:40:34 +0000 (09:40 +0100)]
IVGCVSW-3224 Add Uint8 support for Rsqrt
Change-Id: I45598fc9b6d408b19d8d050e64c12b1d48535fa3
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Ellen Norris-Thompson [Mon, 10 Jun 2019 13:15:12 +0000 (14:15 +0100)]
IVGCVSW-3217 Refactor the Layer tests for ResizeBilinear to make them generic
* Refactored the ResizeBilinear tests so can be used for both Float32 and Uint8.
* Moved to .hpp file and renamed tests accordingly.
Signed-off-by: Ellen Norris-Thompson <ellen.norris-thompson@arm.com>
Change-Id: Icf79b0616db0c307cfcf94747fe0a6d4343588bd
Aron Virginas-Tar [Wed, 12 Jun 2019 12:04:11 +0000 (13:04 +0100)]
IVGCVSW-3261 Add Quantizer support for SpaceToDepth layer
Change-Id: Ic08e38fe10ca1abd79c6e4b1a83dc9a929686b56
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Aron Virginas-Tar [Tue, 11 Jun 2019 15:01:44 +0000 (16:01 +0100)]
IVGCVSW-3260 Add serialization support for SpaceToDepth
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Ie0d9561437ff5da8fa4db81fee1e70bd18c47034
konsof01 [Fri, 7 Jun 2019 14:15:58 +0000 (15:15 +0100)]
IVGCVSW-3010: Unit Test for Activation Workload for Float32 and Uint8
Unit tests for following Activations have been added
*Relu
*SoftRelu
*LeakyRelu
*Abs
*Sqrt
*Square
*Tanh
Signed-off-by: Konstantin Sofeikov <konstantin.sofeikov@arm.com>
Change-Id: I2812a24842400c8b2c2d87933fbe1eca8c66e911
Aron Virginas-Tar [Tue, 11 Jun 2019 13:14:03 +0000 (14:14 +0100)]
IVGCVSW-3258 Add front end support for new SpaceToDepth layer
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: Id677e29a734f2b36483d939ad370079bdc11551e
Aron Virginas-Tar [Fri, 7 Jun 2019 15:55:07 +0000 (16:55 +0100)]
IVGCVSW-3253 Refactor MonotonicClockRaw in WallClockTimer
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I759aaeff4e543c36047698716bd99bac4e4092d3
Matthew Bentham [Mon, 10 Jun 2019 16:11:31 +0000 (17:11 +0100)]
Github #208 Search for flatc on standard paths
Change-Id: Ib5a77dc4b654c67d79f1f53e783b319c885b5215
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Guillaume GARDET [Wed, 5 Jun 2019 08:58:47 +0000 (10:58 +0200)]
libarmnnQuantizer has references to libarmnn, so use libarmnn for link
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Change-Id: Id80d04cca20b470914401246f5cb04dbcb94f00c
Francis Murtagh [Fri, 7 Jun 2019 10:28:49 +0000 (11:28 +0100)]
IVGCVSW-3228 Fix bias quantization to be INT32 not QAsymm8
* Add function to calculate bias tensor quantization scale
from input and weights scales.
* Change visitor method of Conv2d, DepthwiseConv and FullyConnected to use
the new function.
* Fix Unit tests to expect correctly calculated quantization parameters.
Change-Id: Ic36f47ceea81243c813d74ccf791e984c819cc71
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Matthew Bentham [Fri, 7 Jun 2019 08:23:41 +0000 (09:23 +0100)]
Github #140 Use snprintf instead of strncpy
Change-Id: I4da3b390d60da76754bbab016a656fbaf37d7df5
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Aron Virginas-Tar [Thu, 6 Jun 2019 15:08:30 +0000 (16:08 +0100)]
IVGCVSW-3237 Add type check to RefLayerSupport::IsDetectionPostProcessSupported
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I68ff6f3682a93689a890fff46bb1a6ccb1acda20
Matteo Martincigh [Thu, 6 Jun 2019 14:46:22 +0000 (15:46 +0100)]
IVGCVSW-3223 Fix ref convolution performance regression
* Do not use DataLayoutIndexed::GetIndex for weights and inputs,
as it causes a large regression in performance
* It turned out that the calculation of the indexes for the weights
and inputs was the way it was because of an optimization done
many months ago
* Reverted the relevant hunks and added some comments so
we won't make the same mistake again in the future
* Made the GetIndex function inline to speed up other usages
Change-Id: I343b2ef0446993086f58b9dea1f0de0ba2d92216
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
nikraj01 [Thu, 6 Jun 2019 09:31:27 +0000 (10:31 +0100)]
IVGCVSW-3211 Refactor reference Rsqrt workload
Change-Id: Ia413c6b5352dbb3390e7d84e837a542c24ae8813
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Teresa Charlin [Thu, 6 Jun 2019 12:40:35 +0000 (13:40 +0100)]
IVGCVSW-3143 Extend the Pooling 2d workload to support QSymm16
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I4026a77377002f4f9c15a923e8fcb7075d700f6e
Matteo Martincigh [Wed, 5 Jun 2019 16:23:29 +0000 (17:23 +0100)]
IVGCVSW-3227 Extend the reference normalization workload to support QSymm16
* Added support for QSymm16
* Added unit tests
Change-Id: I7ba57793830bed7958ac9a94e9ac39d6dbe708b5
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Wed, 5 Jun 2019 13:12:48 +0000 (14:12 +0100)]
IVGCVSW-3226 Refactor the reference normalization workload
* Refactored RefNormalizationFloat32Workload into RefNormalizationWorkload
* Added ref support of Uint8 norm workloads
* Added workload unit tests for Uint8
Change-Id: I063ce919c267e02a32e739848e49d75fd98a5eb6
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Teresa Charlin [Thu, 6 Jun 2019 10:12:32 +0000 (11:12 +0100)]
IVGCVSW-3142 Refactor reference Pooling2d workload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I94c973ab747309c0214268c9c39f6d8f3fc7b255
Aron Virginas-Tar [Mon, 3 Jun 2019 16:10:02 +0000 (17:10 +0100)]
IVGCVSW-2971 Support QSymm16 for DetectionPostProcess workloads
Signed-off-by: Aron Virginas-Tar <Aron.Virginas-Tar@arm.com>
Change-Id: I8af45afe851a9ccbf8bce54727147fcd52ac9a1f
Matteo Martincigh [Wed, 5 Jun 2019 12:54:25 +0000 (13:54 +0100)]
IVGCVSW-3223 Use GetIndex from DataLayoutIndexed.cpp in ConvImpl.cpp
* Used DataLayoutIndexed::GetIndex wherever possible
* Removed unnecessary GetOffset function
Change-Id: Ieaad2def60e8de48dbc3afb63e550ac5883b3690
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Wed, 5 Jun 2019 08:17:33 +0000 (09:17 +0100)]
IVGCVSW-3212 Refactor the Reference BatchNormalization workloads
* Used the new DataLayoutIndexed::GetIndexmethod in BatchNormImpl
for convenience
Change-Id: Ifb7e5abbdb48d958ee2139d22b97cd8d479357bc
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
nikraj01 [Wed, 5 Jun 2019 09:48:46 +0000 (10:48 +0100)]
IVGCVSW-3216 Make Rsqrt f32 layers test generic
Change-Id: Ibb8b71058039d0fb7345c2e6cba6382023541269
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
Matteo Martincigh [Wed, 5 Jun 2019 08:02:41 +0000 (09:02 +0100)]
IVGCVSW-3142 Refactor DataLayoutIndexed and TensorBufferArrayView
for convenience
* Added GetIndex method to DataLayoutIndexed
* Refactored TensorBufferArrayView::Get to use the new method
Change-Id: Iae08b2761bddeda9e935b25e6bc4985f2d386cd3
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Fri, 31 May 2019 12:02:11 +0000 (13:02 +0100)]
Do not rebuild the serializer/deserializer code if not necessary
* Make ArmnnSchema_generated.h depend on ArmnnSchema.fbs
so that the serializer code is not rebuilt every time
* Removed unnecessary header usage from the serializer/deserializer code
Change-Id: I35368c9611fcc2b777a4dbffa45d9872772e9dd4
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Signed-off-by: Matthew Bentham <matthew.bentham@arm.com>
Matteo Martincigh [Tue, 4 Jun 2019 09:59:47 +0000 (10:59 +0100)]
IVGCVSW-3213 Extend the Reference BatchNormalization workload to
support the new QSymm16 type
* Added QSymm16 to the range of supported types for batch
normalization ref workloads
* Added unit tests for QSymm16
Change-Id: I5b2fcfbd9cb5af149ebfe24e2d95f3affa2e3690
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Mon, 3 Jun 2019 15:54:25 +0000 (16:54 +0100)]
IVGCVSW-3212 Refactor the Reference BatchNormalization workloads to
handle Float32 and QAsymm8 types
* Removed the type-specific workload implementations
* Added type-independent RefBatchNormalizationWorkload implementation
* Reworked BachNormImpl to use decoders/encoders
* Improved the validation of the BatchNorm queue descriptor
* Fixed unit tests where necessary
Change-Id: Icf3fa1332292d38ec2fa0b1cb984cab78426034b
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Matteo Martincigh [Mon, 3 Jun 2019 08:33:55 +0000 (09:33 +0100)]
Update the CL pin to the latest master
* Updated the pinned CL revision
* Changed the type for axis in L2Norm workloads
!clframework:
d7dd15c445397ab879439de6659859db09f4b752
!android-nn-driver:1268
Change-Id: Ib568869ae8259c4c7d62fc8b434c74a7f8242988
Signed-off-by: Matteo Martincigh <matteo.martincigh@arm.com>
Narumol Prangnawarat [Tue, 4 Jun 2019 10:22:00 +0000 (11:22 +0100)]
Add support for all data type for input and output layers
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I688f4db5f5950877ad88f637cf71c05270fd5338
nikraj01 [Tue, 4 Jun 2019 14:35:34 +0000 (15:35 +0100)]
IVGCVSW-3215 Add CreateWorkload test for Rsqrt Fp32
Change-Id: Iea6edf90148773b12f361bfa4b1d572c5322d18b
Signed-off-by: nikraj01 <nikhil.raj@arm.com>
James Conroy [Tue, 4 Jun 2019 11:32:09 +0000 (12:32 +0100)]
IVGCVSW-3179 Extend floor workload to support QSymm16
* Added support for QSymm16 in Floor workload
* Added unit test for QSymm16 Floor
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I6d36a07b3cfff212056125232f7842ca04bf4947
projects / platform / upstream / armnn.git / log