Timothy Arceri [Thu, 26 May 2016 04:50:43 +0000 (14:50 +1000)]
glsl: re-enable varying packing in GL4.4+
We can still do packing we just need to get the packing type from the consumer
rather than the producer.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97033
Kenneth Graunke [Wed, 20 Jul 2016 23:11:18 +0000 (16:11 -0700)]
i965: Include VUE handles for GS with invocations > 1.
We always resort to the pull model for instanced GS inputs. So, we'd
better include the VUE handles, or else we can't actually pull anything.
Ian reports that on his branch with OES_geometry_shader enabled,
this fixes a bunch of dEQP-GLES31.functional.geometry_shading tests::
- instanced.draw_2_instances_geometry_2_invocations
- instanced.draw_2_instances_geometry_8_invocations
- instanced.draw_4_instances_geometry_2_invocations
- instanced.draw_4_instances_geometry_8_invocations
- instanced.draw_8_instances_geometry_2_invocations
- instanced.draw_8_instances_geometry_8_invocations
- instanced.geometry_2_invocations
- instanced.geometry_32_invocations
- instanced.geometry_8_invocations
- instanced.geometry_max_invocations
- instanced.geometry_output_different_2_invocations
- instanced.geometry_output_different_32_invocations
- instanced.geometry_output_different_8_invocations
- instanced.geometry_output_different_max_invocations
- instanced.invocation_output_vary_by_attribute
- instanced.invocation_output_vary_by_texture
- instanced.invocation_output_vary_by_uniform
- query.primitives_generated_instanced
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Thu, 30 Jun 2016 22:02:49 +0000 (15:02 -0700)]
mesa: Add -fno-math-errno -fno-trapping-math to CXXFLAGS.
Not sure why I forgot to add them to CXXFLAGS in commit
f55c408067 or
commit
875458b778. Cuts about 1k of .text.
text data bss dec hex filename
5806354 287816 29384 6123554 5d7022 i965_dri.so before
5805497 287744 29384 6122625 5d6c81 i965_dri.so after
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Matt Turner [Thu, 30 Jun 2016 21:16:16 +0000 (14:16 -0700)]
mesa: Drop -fno-builtin-memcmp.
According to the referenced bug report, gcc-4.5 and newer do not inline
memcmp(). I see no difference in performance of ipers with llvmpipe on a
Sandybridge (which does not have "Enhanced REP MOVSB/STOSB") by removing
this flag.
I attempted to confirm the problem with gcc-4.4, but it fails to compile
for quite a few different reasons.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Mon, 11 Jul 2016 17:44:25 +0000 (10:44 -0700)]
mapi: Massage code to allow clang to compile.
According to https://llvm.org/bugs/show_bug.cgi?id=19778#c3 this code
was violating the spec, resulting in it failing to compile.
Cc: mesa-stable@lists.freedesktop.org
Co-authored-by: Tomasz Paweł Gajc <tpgxyz@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89599
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Ian Romanick [Tue, 31 May 2016 23:04:00 +0000 (16:04 -0700)]
docs: Add extensions not part of any GL or GL ES version
Based loosely on patches submitted ages ago by Thomas Helland.
v2: Add lots of missing data provided by Ilia. Fix sort order of
GL_ARB_sparse_texture extensions suggested by Ilia.
v3: Note that Dave Airlie has started work on GL_ARB_bindless_texture.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Ian Romanick [Mon, 16 May 2016 18:30:19 +0000 (11:30 -0700)]
docs: Update GL3.txt for OpenGL 4.0 on i965-ish hardware
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Ian Romanick [Mon, 16 May 2016 18:26:15 +0000 (11:26 -0700)]
docs: Update GL3.txt for OpenGL ES on i965-ish hardware
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Timothy Arceri [Thu, 21 Jul 2016 04:07:01 +0000 (14:07 +1000)]
i965: print error messages if gs fails to compile
We do this for all other stages.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Timothy Arceri [Thu, 21 Jul 2016 01:53:14 +0000 (11:53 +1000)]
i965: enable GL4.4 for Gen8+
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Timothy Arceri [Fri, 20 May 2016 03:37:45 +0000 (13:37 +1000)]
i965: enable ARB_enhanced_layouts for gen6+
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Timothy Arceri [Fri, 24 Jun 2016 02:31:56 +0000 (12:31 +1000)]
i965/vec4: add packing support for tcs load outputs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Timothy Arceri [Fri, 24 Jun 2016 02:14:30 +0000 (12:14 +1000)]
i965/vec4: add support for packing tes inputs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Timothy Arceri [Fri, 24 Jun 2016 02:10:12 +0000 (12:10 +1000)]
i965/vec4: add support for packing tcs outputs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Timothy Arceri [Thu, 23 Jun 2016 04:26:16 +0000 (14:26 +1000)]
i965/vec4: support packing tcs inputs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Timothy Arceri [Thu, 23 Jun 2016 03:03:47 +0000 (13:03 +1000)]
i965/vec4: add component packing for gs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Timothy Arceri [Thu, 23 Jun 2016 02:49:53 +0000 (12:49 +1000)]
i965/vec4: add support for packing vs/gs/tes outputs
Here we create a new output_generic_reg array with the ability to
store the dst_reg for each component of user defined varyings.
This is needed as the previous code only stored the dst_reg based
on the varying location which meant packed varyings would overwrite
each other.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Timothy Arceri [Wed, 22 Jun 2016 23:37:03 +0000 (09:37 +1000)]
i965/vec4: add support for packing inputs
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Timothy Arceri [Thu, 23 Jun 2016 02:52:05 +0000 (12:52 +1000)]
i965: add helper for creating packing writemask
For example where n=3 first_component=1 this will give us
0xE (WRITEMASK_YZW).
V2:
Add assert to check first component is <= 4 (Suggested by Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Timothy Arceri [Wed, 22 Jun 2016 23:32:39 +0000 (09:32 +1000)]
i965: add helpers for creating component layout swizzle
This will be used to swizzle components to the beginning or end
of the vector based on the component layout qualifier and whether
we are doing a load or store.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Eric Anholt [Tue, 12 Jul 2016 18:57:13 +0000 (11:57 -0700)]
vc4: Return V3D version details in the GL renderer info.
This is as close as we get to a name for the 3D blocks.
Eric Anholt [Tue, 12 Jul 2016 00:55:33 +0000 (17:55 -0700)]
vc4: Check the V3D version reported by the kernel.
We don't want to bring up an old userspace driver on a kernel for
newer hardware. We'll also want to look at the other ident fields in
the future.
Eric Anholt [Thu, 10 Mar 2016 23:18:31 +0000 (15:18 -0800)]
vc4: Detect and report kernel support for branching.
Eric Anholt [Sat, 2 Jul 2016 21:35:34 +0000 (14:35 -0700)]
vc4: Switch to using the libdrm-provided vc4_drm.h.
The required version is set to .69 for the getparam ioctl that will be
used in the next commit.
Timothy Arceri [Wed, 16 Dec 2015 02:55:50 +0000 (13:55 +1100)]
docs: mark ARB_enhanced_layouts as DONE for i965
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Timothy Arceri [Fri, 20 May 2016 03:37:45 +0000 (13:37 +1000)]
i965: enable ARB_enhanced_layouts for gen8+
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Timothy Arceri [Tue, 19 Jul 2016 05:40:14 +0000 (15:40 +1000)]
nir: add doubles component packing support
This makes sure we give the correct driver location
for doubles when using component packing. Specifically
it handles packing a dvec3 with a double which is the
only packing scenario allowed which spans across two
locations.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Timothy Arceri [Wed, 15 Jun 2016 02:35:49 +0000 (12:35 +1000)]
i965: add component packing support for load_output intrinsics
Here we use the component qualifier (which is the first component)
as an offset when loading output varyings.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Timothy Arceri [Mon, 23 May 2016 06:48:05 +0000 (16:48 +1000)]
i965: enable component packing for vs and fs
Rather than trying to work out the total number of components
used at a location we simply treat all outputs as vec4s. This
removes the need for complex code looping over varyings to match
packed locations and the need for storing the total number of
components used at each location.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Timothy Arceri [Tue, 19 Jul 2016 05:13:51 +0000 (15:13 +1000)]
i965: bring back type_size_vec4_times_4()
We will use this for output varyings. To make component
packing simpler we will just treat all varyings as vec4s.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Fri, 15 Jul 2016 22:44:32 +0000 (15:44 -0700)]
nir/inline: Constant-initialize local variables in the callee if needed
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Fri, 15 Jul 2016 22:21:19 +0000 (15:21 -0700)]
nir: Add a nir_deref_foreach_leaf helper
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Tom Stellard [Tue, 19 Jul 2016 15:07:23 +0000 (15:07 +0000)]
clover: Re-order includes in invocation.cpp to fix build
The build was failing because the official CL headers have a few defines,
like: # define cl_khr_gl_sharing 1
Which have the same name as some class members of clang's OpenCLOptions class.
If we include the cl headers first, this breaks the build because the member
names of this class are replaced by the literal 1.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Vedran Miletić <vedran@miletic.net>
Tom Stellard [Tue, 19 Jul 2016 15:05:34 +0000 (15:05 +0000)]
clover: Add missing include v2
clang commit r275822 removed unnecessary includes from header files,
so we now need to explicitly include clang/Lex/PreprocessorOptions.h
v2:
- Use <> instead of "" for the include path.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Vedran Miletić <vedran@miletic.net>
Kenneth Graunke [Wed, 20 Jul 2016 02:00:19 +0000 (19:00 -0700)]
i965: Move VS load_input handling to nir_emit_vs_intrinsic().
TCS/TES/GS and now FS all handle these in stage-specific functions.
CS don't have inputs, so VS was the only one left using this code.
Move it to the VS-specific function for clarity.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Sat, 16 Jul 2016 18:52:36 +0000 (11:52 -0700)]
i965: Delete the FS_OPCODE_INTERPOLATE_AT_CENTROID virtual opcode.
We no longer use this message. As far as I can tell, it's fairly
useless - the equivalent information is provided in the payload.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 12 Jul 2016 10:57:25 +0000 (03:57 -0700)]
i965: Rewrite FS input handling to use the new NIR intrinsics.
This eliminates the need to walk the list of input variables, recurse
into their types (via logic largely redundant with nir_lower_io), and
interpolate all possible inputs up front. The backend no longer has
to care about variables at all, which eliminates complications from
trying to pack multiple variables into the same location. Instead,
each intrinsic specifies exactly what's needed.
This should unblock Timothy's work on GL_ARB_enhanced_layouts.
Each load_interpolated_input intrinsic corresponds to PLN instructions,
while load_barycentric_at_* intrinsics correspond to pixel interpolator
messages. The pixel/centroid/sample barycentric intrinsics simply refer
to payload fields (delta_xy[]), and don't actually generate any code.
Because we use a single intrinsic for both centroid-qualified variables
and interpolateAtCentroid(), they become indistinguishable. We stop
sending pixel interpolator messages for those, and instead use the
payload provided data, which should be considerably faster.
On Broadwell:
total instructions in shared programs: 9067751 -> 9067570 (-0.00%)
instructions in affected programs: 145902 -> 145721 (-0.12%)
helped: 422
HURT: 209
total spills in shared programs: 2849 -> 2899 (1.76%)
spills in affected programs: 760 -> 810 (6.58%)
helped: 0
HURT: 10
total fills in shared programs: 3910 -> 3950 (1.02%)
fills in affected programs: 617 -> 657 (6.48%)
helped: 0
HURT: 10
LOST: 3
GAINED: 3
The differences mostly appear to be slight changes in MOVs.
v2: Use nir_shader_compiler_options::use_interpolated_input_intrinsics
flag rather than passing it directly to nir_lower_io. Use the
unreachable() macro rather than assert in one place. (Review
feedback from Chris Forbes.)
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 18 Jul 2016 01:44:58 +0000 (18:44 -0700)]
i965: Move load_interpolated_input/barycentric_* intrinsics to the top.
Currently, i965 interpolates all FS inputs at the top of the program.
This has advantages and disadvantages, but I'd like to keep that policy
while reworking this code. We can consider changing it independently.
The next patch will make the compiler generate PLN instructions "on the
fly", when it encounters an input load intrinsic, rather than doing it
for all inputs at the start of the program.
To emulate this behavior, we introduce an ugly pass to move all NIR
load_interpolated_input and payload-based (not interpolator message)
load_barycentric_* intrinsics to the shader's start block.
This helps avoid regressions in shader-db for cases such as:
if (...) {
...load some input...
} else {
...load that same input...
}
which CSE can't handle, because there's no dominance relationship
between the two loads. Because the start block dominates all others,
we can CSE all inputs and emit PLNs exactly once, as we did before.
Ideally, global value numbering would eliminate these redundant loads,
while not forcing them all the way to the start block. When that lands,
we should consider dropping this hacky pass.
Again, this pass currently does nothing, as i965 doesn't generate these
intrinsics yet. But it will shortly, and I figured I'd separate this
code as it's relatively self-contained.
v2: Dramatically simplify pass - instead of creating new instructions,
just remove/re-insert their list nodes (suggested by Jason Ekstrand).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisforbes@google.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 18 Jul 2016 01:37:08 +0000 (18:37 -0700)]
i965: Add a pass to demote sample interpolation intrinsics.
When working with a non-multisampled render target, asking for "sample"
interpolation locations doesn't make sense. We demote them to centroid.
In a couple of patches, brw_compute_barycentric_modes will begin looking
at these intrinsics to determine the barycentric modes. fs_visitor also
will use them to code-generate pixel interpolator messages or payload
references. Handling the "but what if it's not MSAA?" logic ahead of
time in a NIR pass simplifies things and prevents duplicated logic.
This patch doesn't actually do anything useful yet as we don't generate
these intrinsics. I decided to keep it separate as it's self-contained,
in the hopes of shrinking the "convert everything" patch for reviewers.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 12 Jul 2016 08:46:53 +0000 (01:46 -0700)]
nir: Add nir_load_interpolated_input lowering code.
Now nir_lower_io can optionally produce load_interpolated_input
and load_barycentric_* intrinsics for fragment shader inputs.
flat inputs continue using regular load_input.
v2: Use a nir_shader_compiler_options flag rather than ad-hoc boolean
passing (in response to review feedback from Chris Forbes).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 12 Jul 2016 08:46:43 +0000 (01:46 -0700)]
nir: Add new intrinsics for fragment shader input interpolation.
Backends can normally handle shader inputs solely by looking at
load_input intrinsics, and ignore the nir_variables in nir->inputs.
One exception is fragment shader inputs. load_input doesn't capture
the necessary interpolation information - flat, smooth, noperspective
mode, and centroid, sample, or pixel for the location. This means
that backends have to interpolate based on the nir_variables, then
associate those with the load_input intrinsics (say, by storing a
map of which variables are at which locations).
With GL_ARB_enhanced_layouts, we're going to have multiple varyings
packed into a single vec4 location. The intrinsics make this easy:
simply load N components from location <loc, component>. However,
working with variables and correlating the two is very awkward; we'd
much rather have intrinsics capture all the necessary information.
Fragment shader input interpolation typically works by producing a
set of barycentric coordinates, then using those to do a linear
interpolation between the values at the triangle's corners.
We represent this by introducing five new load_barycentric_* intrinsics:
- load_barycentric_pixel (ordinary variable)
- load_barycentric_centroid (centroid qualified variable)
- load_barycentric_sample (sample qualified variable)
- load_barycentric_at_sample (ARB_gpu_shader5's interpolateAtSample())
- load_barycentric_at_offset (ARB_gpu_shader5's interpolateAtOffset())
Each of these take the interpolation mode (smooth or noperspective only)
as a const_index, and produce a vec2. The last two also take a sample
or offset source.
We then introduce a new load_interpolated_input intrinsic, which
is like a normal load_input intrinsic, but with an additional
barycentric coordinate source.
The intention is that flat inputs will still use regular load_input
intrinsics. This makes them distinguishable from normal inputs that
need fancy interpolation, while also providing all the necessary data.
This nicely unifies regular inputs and interpolateAt functions.
Qualifiers and variables become irrelevant; there are just
load_barycentric intrinsics that determine the interpolation.
v2: Document the interp_mode const_index value, define a new
BARYCENTRIC() helper rather than using SYSTEM_VALUE() for
some of them (requested by Jason Ekstrand).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 18 Jul 2016 23:13:36 +0000 (16:13 -0700)]
anv: Properly call gen75_emit_state_base_address on Haswell.
This should fix MOCS values. Caught by Coverity.
CID: 1364155
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 18 Jul 2016 23:00:20 +0000 (16:00 -0700)]
genxml: Rename "API Rendering Disable" to "Rendering Disable".
Gen7/7.5 call it "Rendering Disable" while Gen8/9 prefix it with "API".
Pick one for consistency, and so we can share code between generations.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 18 Jul 2016 21:27:35 +0000 (14:27 -0700)]
anv: Unify 3DSTATE_CLIP code across generations.
The bulk of this is the same. There are just a couple fields that only
exist on one generation or another, and we can easily handle those with
an #ifdef.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 18 Jul 2016 20:52:07 +0000 (13:52 -0700)]
anv: Enable early culling on Gen7.
We set the cull mode, but forgot the enable bit. Gen8 uses this.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 18 Jul 2016 21:15:49 +0000 (14:15 -0700)]
anv: Fix near plane clipping on Gen7/7.5.
The Gen7/7.5 clip code used APIMODE_OGL, while the Gen8+ clip code used
APIMODE_D3D. The meaning hasn't changed, so one of these must be wrong.
It appears that the hardware documentation is completely wrong. It
claims that the "API Mode" bit means:
0h APIMODE_OGL NEAR_VP boundary == 0.0 (NDC)
1h APIMODE_D3D NEAR_VP boundary == -1.0 (NDC)
However, DirectX typically uses 0.0 for the near plane, while unextended
OpenGL uses -1.0. i965's gen6_clip_state.c uses APIMODE_D3D for the
GL_ZERO_TO_ONE case, so I believe the meanings are backwards from what
the documentation says.
Section 23.2 ("Primitive Clipping") of the Vulkan 1.0.21 specification
contains the following equations:
-w_c <= x_c <= w_c
-w_c <= y_c <= w_c
0 <= z_c <= w_c
This means that Vulkan follows D3D semantics.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 18 Jul 2016 20:56:23 +0000 (13:56 -0700)]
genxml: Add APIMODE_D3D missing enum values and improve consistency.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 18 Jul 2016 22:36:43 +0000 (15:36 -0700)]
genxml: Add CLIPMODE_* prefix to 3DSTATE_CLIP's "Clip Mode" enum values.
Gen6-7.5 use CLIPMODE_REJECT_ALL, while Gen8+ just used REJECT_ALL.
Being consistent will let me unify code, and I prefer having the prefix.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tim Rowley [Fri, 15 Jul 2016 18:23:46 +0000 (12:23 -0600)]
swr: [rasterizer core] introduce simd16intrin.h
Refactoring to leave existing simd_* intrinsics in "simdintrin.h" unchanged,
adding corresponding simd16_* intrinsics in "simd16intrin.h" on the side,
with emulation, that we can use piecemeal, rather than the all-or-nothing
approach to bring up avx512.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Thu, 14 Jul 2016 18:10:39 +0000 (12:10 -0600)]
swr: [rasterizer core] fix for possible int32 overflow condition
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Thu, 14 Jul 2016 18:02:51 +0000 (12:02 -0600)]
swr: [rasterizer core] rename *_MAX enum values to *_COUNT
Makes these names semantically correct.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Wed, 13 Jul 2016 23:34:03 +0000 (17:34 -0600)]
swr: [rasterizer core] centroid correction
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Wed, 13 Jul 2016 21:06:13 +0000 (15:06 -0600)]
swr: [rasterizer core] support range of values in TemplateArgUnroller
Fixes Linux warnings.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Tue, 12 Jul 2016 23:04:44 +0000 (17:04 -0600)]
swr: [rasterizer core] ensure adjacent topologies use the cut-aware PA
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Tue, 12 Jul 2016 21:03:42 +0000 (15:03 -0600)]
swr: [rasterizer] attribute swizzling and linkage
Add support for enhanced attribute swizzling. Currently supports constant
source overrides to handle PrimitiveID support. No support yet for input
select swizzling or wrap shortest. Removes obsoleted linkageMask and
associated code.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Tue, 12 Jul 2016 16:33:58 +0000 (10:33 -0600)]
swr: [rasterizer common] icc declspec definitions
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Fri, 8 Jul 2016 19:08:20 +0000 (13:08 -0600)]
swr: [rasterizer jitter] rework vertex/instance ID storage in fetch
Moved the setting into the existing component control code. Fixes bad
interaction between attribute/component setting for vertex/instance ID
and component packing.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Thu, 7 Jul 2016 23:41:58 +0000 (17:41 -0600)]
swr: [rasterizer core] avx512 simd utility work
Enabling KNOB_SIMD_WIDTH = 16 for AVX512 pre-work and low level simd utils
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Tim Rowley [Thu, 7 Jul 2016 23:32:39 +0000 (17:32 -0600)]
swr: [rasterizer core] viewport rounding for disabled scissor
Adjust viewport rounding when scissor rect is disabled during macro
tile scissor setup.
Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>
Jason Ekstrand [Mon, 18 Jul 2016 23:25:12 +0000 (16:25 -0700)]
i965: Stop muging cube array lengths by 6
From the Sky Lake PRM:
"For SURFTYPE_CUBE: For Sampling Engine Surfaces and Typed Data Port
Surfaces, the range of this field is [0,340], indicating the number of
cube array elements (equal to the number of underlying 2D array elements
divided by 6). For other surfaces, this field must be zero."
In other words, the depth field for cube maps is in number of cubes not
number of 2-D slices so we need to divide by 6. ISL will do this correctly
for us assuming that we provide it with the correct array bounds which it
expects to be in 2-D slices. It appears as if we've been doing this wrong
ever since we first added cube map arrays for Sandy Bridge and the change
to ISL made things slightly worse. While we're at it, we now need to remoe
the shader hacks we've always done since they were only needed because we
were setting the depth field six times too large.
v2: Fix the vec4 backend as well (not sure how I missed this).
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Jason Ekstrand [Tue, 19 Jul 2016 05:00:30 +0000 (22:00 -0700)]
i965/miptree: Set logical_depth0 == 6 for cube maps
This matches what we do for cube maps where logical_depth0 is in number of
face-layers rather than number of cubes. This does mean that we will
temporarily be setting the surface bounds too loose for cube map textures
but we are already setting them too loose for cube arrays and we will be
fixing that in the next commit anyway.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Cc: "12.0 11.2 11.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 19 Jul 2016 01:46:43 +0000 (18:46 -0700)]
i965/miptree: Enforce that height == 1 for 1-D array textures
The GL API and mesa internals do this differently than we do. In GL, there
is no depth parameter for 1-D arrays and height is used. In the i965
miptree code we do the sane thing and make height == 1 and use depth for
number of slices. This makes for a mismatch every time we create a 1-D
array texture from GL. Instead of actually solving this problem, we just
said "1-D is hard, let's make sure it works no matter which way we pass the
parameters" and called it a day.
This commit fixes the one GL -> i965 transition point where we weren't
already handling 1-D array textures to do the right thing and then replaces
the magic fixup code with an assert that you're doing the right thing.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Cc: "12.0 11.2 11.1" <mesa-stable@lists.freedesktop.org>
Stefan Dirsch [Thu, 14 Jul 2016 13:21:20 +0000 (15:21 +0200)]
Avoid overflow in 'last' variable of FindGLXFunction(...)
This 'last' variable used in FindGLXFunction(...) may become negative,
but has been defined as unsigned int resulting in an overflow,
finally resulting in a segfault when accessing _glXDispatchTableStrings[...].
Fixed this by definining it as signed int. 'first' variable also needs to be
defined as signed int. Otherwise condition for while loop fails due to C
implicitly converting signed to unsigned values before comparison.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Stefan Dirsch <sndirsch@suse.de>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tomasz Figa [Fri, 15 Jul 2016 07:53:50 +0000 (16:53 +0900)]
egl/android: Stop leaking DRI images
Current implementation of the DRI image loader does not free the images
created in get_back_bo() and so leaks memory. Moreover, it creates a new
image every time the DRI driver queries for buffers, even if the backing
native buffer has not changed. leaking memory again.
This patch adds missing call to destroyImage() in droid_enqueue_buffer()
and a check if image is already created to get_back_bo() to fix the
above.
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tomasz Figa [Fri, 15 Jul 2016 07:53:49 +0000 (16:53 +0900)]
egl/android: Add some useful error messages
It is much easier to debug issues when the application gives some
meaningful error messages. This patch adds few to the EGL Android
platform backend.
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tomasz Figa [Fri, 15 Jul 2016 07:53:48 +0000 (16:53 +0900)]
egl/android: Check return value of dri2_get_dri_config()
It might return NULL if specific config variant is unsupported.
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Fri, 15 Jul 2016 07:27:09 +0000 (16:27 +0900)]
i965: store reference to the context within struct brw_fence (v2)
As the spec allows for {server,client}_wait_sync to be called without
currently bound context, while our implementation requires context
pointer.
v2: Add a mutex and acquire it for the duration of
brw_fence_client_wait() and brw_fence_is_completed() as suggested
by Chad.
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Nicolas Boichat [Fri, 15 Jul 2016 08:24:20 +0000 (16:24 +0800)]
egl/dri2: dri2_make_current: Set EGL error if bindContext fails
Without this, if a configuration is, say, available only on GLES2/3, but
not on GLES1, and is rejected by the dri module's bindContext call,
eglMakeCurrent fails with error "EGL_SUCCESS".
In this patch, we set error to EGL_BAD_MATCH, which is what CTS/dEQP
dEQP-EGL.functional.surfaceless_context expect.
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tomasz Figa [Wed, 13 Jul 2016 03:33:24 +0000 (11:33 +0800)]
egl/android: Remove unused variables
There are some unused variables left after previous clean-ups triggering
compiler warnings. Let's remove them.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tomasz Figa [Wed, 13 Jul 2016 03:29:45 +0000 (11:29 +0800)]
gallium/dri: Add shared glapi to LIBADD on Android
An earlier patch fixed the problem for classic drivers, however Gallium
was still left broken. This patch applies the same workaround to
Gallium, when compiled for Android. Following is a quote from the
original patch:
0cbc90c57cfc mesa: dri: Add shared glapi to LIBADD on Android
/system/vendor/lib/dri/*_dri.so actually depend on libglapi: without
this, loading the so file fails with:
cannot locate symbol "__emutls_v._glapi_tls_Context"
On non-Android (non-bionic) platform, EGL uses the following
workflow, which works fine:
dlopen("libglapi.so", RTLD_LAZY | RTLD_GLOBAL);
dlopen("dri/<driver>_dri.so", RTLD_NOW | RTLD_GLOBAL);
However, bionic does not respect the RTLD_GLOBAL flag, and the dri
library cannot find symbols in libglapi.so, so we need to link
to libglapi.so explicitly. Android.mk already does this.
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 18 Jul 2016 18:28:09 +0000 (19:28 +0100)]
mesa: scons: remove left over src/glsl include
The path no longer exists.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 18 Jul 2016 18:23:02 +0000 (19:23 +0100)]
mesa: scons: list builddir before srcdir
Analogous to previous commit.
Note: scons always uses OOT builds, while the in-tree generated files
could be created either manually or by the autoconf build.
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Cc: Alexander von Gluck IV <kallisti5@unixzen.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 18 Jul 2016 18:12:17 +0000 (19:12 +0100)]
mesa: automake: list builddir before srcdir
In the case of building in out-of-tree fashion, while having generated
in-tree sources, the latter [likely stale] files will be used.
Flip the order to prevent that.
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Józef Kucia [Tue, 19 Jul 2016 11:07:26 +0000 (13:07 +0200)]
radeonsi: advertise 8 bits subpixel precision for viewport bounds
Signed-off-by: Józef Kucia <joseph.kucia@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Józef Kucia [Tue, 19 Jul 2016 11:07:25 +0000 (13:07 +0200)]
r600: advertise 8 bits subpixel precision for viewport bounds
Signed-off-by: Józef Kucia <joseph.kucia@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Józef Kucia [Tue, 19 Jul 2016 11:07:24 +0000 (13:07 +0200)]
gallium: add a cap for VIEWPORT_SUBPIXEL_BITS (v2)
This allows Gallium drivers to advertise the subpixel precision
for floating point viewports bounds.
v2:
- Set ViewportSubpixelBits in st_init_limits.
Signed-off-by: Józef Kucia <joseph.kucia@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 5 Jul 2016 20:43:14 +0000 (22:43 +0200)]
nvc0: disable MS images on GM107+
MS images have to be handled explicitly and I don't plan to implement
them for now.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Mon, 4 Jul 2016 23:53:56 +0000 (01:53 +0200)]
nv50/ir: print OP_SUREDB subops in debug mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Fri, 24 Jun 2016 20:35:59 +0000 (22:35 +0200)]
gm107/ir: add emission for SUREDx
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Fri, 24 Jun 2016 20:34:52 +0000 (22:34 +0200)]
gm107/ir: add emission for SUSTx and SULDx
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Thu, 19 May 2016 09:59:25 +0000 (11:59 +0200)]
gm107/ra: fix constraints for surface operations
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 10 May 2016 10:50:07 +0000 (12:50 +0200)]
gm107/ir: lower surface operations
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Mon, 4 Jul 2016 17:15:02 +0000 (19:15 +0200)]
nvc0: bind images for 3d/cp shaders on GM107+
On Maxwell, images binding is slightly different (and much better)
regarding Fermi and Kepler because a texture view needs to be uploaded
for each image and this is going to simplify the thing a lot.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Sun, 26 Jun 2016 00:00:40 +0000 (02:00 +0200)]
nvc0: increase the tex handles area size in the driver cb
Currently, we can store 32 tex handles of 32-bits integer each and
that fits perfectly with the underlying hardware except on GM107+
which requires to upload a texture view for each images.
This patch increases the number of storable texture handles in the
driver constant buffer from 32 to 40 because we expose 8 images.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Kenneth Graunke [Tue, 19 Jul 2016 05:42:44 +0000 (22:42 -0700)]
nir: Fix uninitialized use of 'replacement'.
For intrinsics we don't care about, just skip to the next loop iteration
and process the next instruction. We don't want to execute the rest of
the code.
This was a bug in commit
cdfc05ea6e8c87876cdbf588aa8e03d70f3da4bb.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Mon, 18 Jul 2016 23:55:28 +0000 (16:55 -0700)]
i965: Use tex_mocs instead of rb_mocs for GL images.
Fixes a 10-20% performance regression in OglCSDof caused by commit
5a8c89038abab0184ea72664ab390ec6ca58b4d6, which made images (in the
image load/store sense) use BDW_MOCS_PTE instead of BDW_MOCS_WB.
This seems sketchy, as the default PTE value is supposed to be
WB LLC eLLC, which is the same as our MOCS WB setting. It's only
supposed to change when using a surface for display, which won't
ever happen for images. Something may be wrong in the kernel...
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Marek Olšák [Sun, 17 Jul 2016 11:23:53 +0000 (13:23 +0200)]
winsys/amdgpu: use pb_cache buckets for fewer pb_cache misses
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 17 Jul 2016 11:23:53 +0000 (13:23 +0200)]
winsys/radeon: use pb_cache buckets for fewer pb_cache misses
This makes Bioshock Infinite with deferred flushing 2.2% faster.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 16 Jul 2016 23:27:08 +0000 (01:27 +0200)]
gallium/pb_cache: reduce the number of pointer dereferences
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 16 Jul 2016 22:53:55 +0000 (00:53 +0200)]
gallium/pb_cache: divide the cache into buckets for reducing cache misses
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 17 Jul 2016 09:59:40 +0000 (11:59 +0200)]
gallium/pb_cache: check parameters that are more likely to fail first
This makes Bioshock Infinite with deferred flushing 2% faster.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 16 Jul 2016 11:41:54 +0000 (13:41 +0200)]
radeonsi: emit PS exports last
This effectively removes s_waitcnt instructions after FP16 exports.
Before:
v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ;
5E000300
v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ;
5E020702
exp 15, 0, 1, 0, 0, v0, v1, v0, v0 ;
F800040F 00000100
s_waitcnt expcnt(0) ;
BF8C0F0F
v_cvt_pkrtz_f16_f32_e32 v0, v4, v5 ;
5E000B04
v_cvt_pkrtz_f16_f32_e32 v1, v6, v7 ;
5E020F06
exp 15, 1, 1, 0, 0, v0, v1, v0, v0 ;
F800041F 00000100
s_waitcnt expcnt(0) ;
BF8C0F0F
v_cvt_pkrtz_f16_f32_e32 v0, v8, v9 ;
5E001308
v_cvt_pkrtz_f16_f32_e32 v1, v10, v11 ;
5E02170A
exp 15, 2, 1, 0, 0, v0, v1, v0, v0 ;
F800042F 00000100
s_waitcnt expcnt(0) ;
BF8C0F0F
v_cvt_pkrtz_f16_f32_e32 v0, v12, v13 ;
5E001B0C
v_cvt_pkrtz_f16_f32_e32 v1, v14, v15 ;
5E021F0E
exp 15, 3, 1, 1, 1, v0, v1, v0, v0 ;
F8001C3F 00000100
s_endpgm ;
BF810000
After:
v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 ;
5E000300
v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 ;
5E020702
v_cvt_pkrtz_f16_f32_e32 v2, v4, v5 ;
5E040B04
v_cvt_pkrtz_f16_f32_e32 v3, v6, v7 ;
5E060F06
exp 15, 0, 1, 0, 0, v0, v1, v0, v0 ;
F800040F 00000100
v_cvt_pkrtz_f16_f32_e32 v4, v8, v9 ;
5E081308
v_cvt_pkrtz_f16_f32_e32 v5, v10, v11 ;
5E0A170A
exp 15, 1, 1, 0, 0, v2, v3, v0, v0 ;
F800041F 00000302
v_cvt_pkrtz_f16_f32_e32 v6, v12, v13 ;
5E0C1B0C
v_cvt_pkrtz_f16_f32_e32 v7, v14, v15 ;
5E0E1F0E
exp 15, 2, 1, 0, 0, v4, v5, v0, v0 ;
F800042F 00000504
exp 15, 3, 1, 1, 1, v6, v7, v0, v0 ;
F8001C3F 00000706
s_endpgm ;
BF810000
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 13 Jul 2016 20:34:54 +0000 (22:34 +0200)]
radeonsi: set optimal settings in COMPUTE_RESOURCE_LIMITS
ported from Vulkan
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 15 Jul 2016 14:04:03 +0000 (16:04 +0200)]
radeonsi: really wait for the second EOP event and not the first one
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 14 Jul 2016 23:15:42 +0000 (01:15 +0200)]
gallium/radeon: remove RADEON_FLUSH_KEEP_TILING_FLAGS flag
always set
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ian Romanick [Mon, 27 Jun 2016 18:38:15 +0000 (11:38 -0700)]
nir/algebraic: Optimize fabs(u2f(x))
I noticed this when I tried to do frexp(float(some_unsigned)) in the
ir_unop_find_lsb lowering pass. The code generated for frexp() uses
fabs, and this resulted in an extra instruction. Ultimately I ended up
not using frexp.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ian Romanick [Fri, 24 Jun 2016 08:58:18 +0000 (01:58 -0700)]
st/mesa: Enable MESA_shader_integer_functions on all GLSL 1.30 platforms
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ian Romanick [Thu, 23 Jun 2016 23:19:45 +0000 (16:19 -0700)]
i965: Enable MESA_shader_integer_functions on all GLSL 1.30 platforms
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ian Romanick [Thu, 9 Jun 2016 23:35:30 +0000 (16:35 -0700)]
i965: Don't lower uaddCarry and usubBorrow in both GLSL IR and NIR
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ian Romanick [Tue, 28 Jun 2016 21:48:22 +0000 (14:48 -0700)]
i965: Update assertion to account for Gen < 7
Previously SHADER_OPCODE_MULH could only exist on Gen7+, so the
assertion assumed the Gen7+ accumulator rules. A future patch will
allow this instruction on at least Gen6, so update the assertion.
v2: Use get_lowered_simd_width instead of open coding it. Suggested by
Curro.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com> [v1]