Mike Blumenkrantz [Mon, 1 Feb 2021 18:06:26 +0000 (13:06 -0500)]
zink: unify code for updating res->bind_count values
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11093>
Mike Blumenkrantz [Mon, 4 Jan 2021 18:34:13 +0000 (13:34 -0500)]
zink: add a second descriptor manager
this is the "lazy" descriptor manager, which aims to perform the least
amount of work calculating updates while ignoring the overhead that an
update may incur: effectively the inverse of the caching manager
in this initial implementation, divergence exists between the descriptor
layouts of the cached manager and the lazy manager in order to avoid
incurring regressions in the existing descriptor architecture; this will
be reconciled in a followup MR that refactors and unifies descriptor layouts
during this interim period and until such reconciliation occurs,
the default descriptor manager is now the lazy manager for testing purposes as
there are no changes here which can affect the existing infrastructure
the caching descriptor manager can be selected with the ZINK_CACHE_DESCRIPTORS
env var and will be automatically used for vulkan drivers which don't support
the features required for lazy mode (templates)
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11093>
Alyssa Rosenzweig [Wed, 26 May 2021 23:00:00 +0000 (19:00 -0400)]
panfrost/ci: Report flakes on IRC
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11022>
Emma Anholt [Wed, 26 May 2021 21:13:47 +0000 (14:13 -0700)]
ci: Move the flakes channels to OFTC
Following the rest of our channels, move CI reporting over. Seems to
still work fine. This affects freedreno and iris.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11020>
Emma Anholt [Wed, 26 May 2021 17:45:33 +0000 (10:45 -0700)]
ci: Add known-flake handling for the IRC flake reports
Now, flakes that aren't in the *-flakes.txt get a "NEW" in their report so
I can watch for them.
The bash was unwieldy and made debugging hard, so I switched to python.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11020>
Mike Blumenkrantz [Tue, 1 Jun 2021 16:26:27 +0000 (12:26 -0400)]
anv: fix availability for copying timestamp query results
idx here is the index of the value being written, so if it isn't used/incremented
when the query result is written, the availability result will clobber it and
be written to the same buffer offset
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11116>
Alyssa Rosenzweig [Thu, 20 May 2021 21:09:14 +0000 (17:09 -0400)]
panfrost: Eliminate reserve_* functions
We always want to reserve _something_, so reserve what we need at batch
creation time and stop trying to re-reserve in a zillion places after.
This has a neglible (<128 bytes per batch) increase in memory usage for
compute-only workloads, but given the amount of simplication, that's a
fair tradeoff.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Thu, 20 May 2021 23:25:00 +0000 (19:25 -0400)]
panfrost: Elucidate thread group split field
Last unknown field in the XML :-)
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Thu, 20 May 2021 23:12:13 +0000 (19:12 -0400)]
panfrost: Bubble up errors
Instead of punting to PAN_MESA_DEBUG=msgs, which we can now remove.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Thu, 20 May 2021 22:29:14 +0000 (18:29 -0400)]
panfrost: Minor changes to draw_vbo
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Thu, 20 May 2021 20:43:51 +0000 (16:43 -0400)]
panfrost: Write translate_index_size better
Encodings line up with Gallium except for uint32.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Thu, 20 May 2021 18:13:07 +0000 (14:13 -0400)]
panfrost: Dirty track stack sizes
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Thu, 20 May 2021 18:10:25 +0000 (14:10 -0400)]
panfrost: Don't allocate empty varying buffer
If the FS doesn't actually read any varyings, there's no point.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Thu, 20 May 2021 17:38:57 +0000 (13:38 -0400)]
panfrost: Dirty track constant buffers
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Thu, 20 May 2021 17:22:39 +0000 (13:22 -0400)]
panfrost: Analyze sysval dirty flags
We want dirty tracking for constant buffer uploads, but which dirty
flags are needed depend on what the sysvals are. So for each sysval,
record a corresponding dirty flag at compile time, so at draw-time the
check is easy.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Thu, 20 May 2021 17:22:01 +0000 (13:22 -0400)]
panfrost: Add draw parameters dirty flags
Needed to track some new sysvals.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Thu, 20 May 2021 17:11:02 +0000 (13:11 -0400)]
panfrost: Shrink pan_draw_mode return type
Let gcc emit ldrb instead of ldr for the table. Found by perf, but total
waste of time >_>
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Alyssa Rosenzweig [Wed, 19 May 2021 21:48:25 +0000 (17:48 -0400)]
panfrost: Update comment
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11074>
Juan A. Suarez Romero [Mon, 31 May 2021 15:47:02 +0000 (17:47 +0200)]
ci/v3dv: update expected results
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11103>
Antonio Caggiano [Fri, 28 May 2021 12:45:03 +0000 (14:45 +0200)]
panfrost: Fix pan_pool_ref construction
Fix designator order for `pan_pool_ref` fields by matching declaration
order and avoid an error by the C++ compiler.
Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11064>
Chia-I Wu [Tue, 25 May 2021 20:11:25 +0000 (13:11 -0700)]
docs: add basic documentation for venus
It probably lacks some details but is a start at least.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10988>
Tapani Pälli [Mon, 31 May 2021 07:09:55 +0000 (10:09 +0300)]
gitlab-ci: enable building of Vulkan tests in Piglit
This is part of tackling a Piglit issue:
https://gitlab.freedesktop.org/mesa/piglit/-/issues/53
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10971>
Icecream95 [Mon, 31 May 2021 11:20:33 +0000 (23:20 +1200)]
panfrost: Use first_tiler to check if tiling is needed
If there is a preload job needing tiling, but no other jobs, then
first_tiler will be set but not tiler_dep.
Fixes faults when two depth-only (stencil is reloaded) clears are done
in a row.
panfrost
ffa30000.gpu: Unhandled Page fault in AS1 at VA 0x0000000044870000
Reason: TODO
raw fault status: 0x49002C1
decoded fault status: SLAVE FAULT
exception type 0xC1: TRANSLATION_FAULT_LEVEL1
access type 0x2: READ
source id 0x490
panfrost
ffa30000.gpu: gpu sched timeout, js=0, config=0x3301, status=0x8, head=0x608a300, tail=0x608a300, sched_job=
f5b0862d
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11104>
Icecream95 [Mon, 31 May 2021 11:18:07 +0000 (23:18 +1200)]
panfrost: Call abort() when aborting on fault
The existing exit(EIO) wasn't getting trapped by debuggers.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11104>
Icecream95 [Mon, 31 May 2021 11:18:48 +0000 (23:18 +1200)]
pan/decode: Flush the dump stream after decoding
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11104>
Gustavo Padovan [Sat, 29 May 2021 00:38:54 +0000 (21:38 -0300)]
gitlab-ci: add python script to submit lava jobs
Covert the job submission process to a python script for more
robustness and control. allowing easier manipulation of job data.
As a result, it adds retry logic to deal with Infrastructure Errors in LAVA.
_call_proxy() is equipped with a robust retry logic, which I have been
using already in the past few weeks in stress testing to run hundreds
of jobs.
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11079>
Alejandro Piñeiro [Thu, 27 May 2021 08:59:07 +0000 (10:59 +0200)]
v3d/simulator: use BFC/RFC registers to wait for bin/render to complete
We were using the CT0CA (Control List Executor Current Address) and
CT0EA (Control List Executor End Address) registers, but that would
only wait for the CLE to reach the end of the list, but there could
still be things in the rest of the pipeline.
Even if that seems to work with the current simulator, the correct way
to do that is using the BFC (Binning Mode Flush Count) and RFC
(Rendering Mode Frame Count) registers instead.
In fact, this would be needed with a newer simulator snapshot, in
order to get the followint CTS tests working:
dEQP-VK.api.copy_and_blit.core.resolve_image.whole_array_image.4_bit
dEQP-VK.api.copy_and_blit.core.resolve_image.whole_array_image_one_region.4_bit
dEQP-VK.api.copy_and_blit.core.resolve_image.whole_copy_before_resolving.4_bit
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail
dEQP-VK.api.image_clearing.core.clear_color_image.1d.optimal.multiple_layers.r32g32_uint
dEQP-VK.api.image_clearing.core.clear_color_image.1d.optimal.remaining_array_layers_twostep.r16_sint
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11039>
Alejandro Piñeiro [Wed, 26 May 2021 21:21:31 +0000 (23:21 +0200)]
v3d/simulator: use the proper register when waiting on a CSD submit
Until now we were waiting until having a dispatch current and/or
queued. But that would only wait for all shaders to have started, it
won't wait for them to have finished.
With this commit we wait until the NUM_COMPLETED_JOBS (that in spite
of that name, it is about dispatches) field got increased.
This is in general safest, and it is needed after the latest simulator
update to get CTS tests like the following ones working:
dEQP-VK.compute.basic.copy_ssbo_multiple_invocations
dEQP-VK.compute.basic.copy_ssbo_single_invocation
dEQP-VK.compute.basic.ssbo_rw_single_invocation
dEQP-VK.compute.basic.ssbo_unsized_arr_single_invocation
dEQP-VK.compute.basic.ubo_to_ssbo_multiple_invocations
dEQP-VK.compute.basic.ubo_to_ssbo_single_invocation
v2 (from Juan feedback):
* Clarify JOBS vs DISPATCHES
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11039>
Alejandro Piñeiro [Tue, 25 May 2021 21:52:48 +0000 (23:52 +0200)]
v3d/simulator: wait for cache flushes
Current code just assumes that flushes are instant, as simulator
doesn't really model the caches. So right now we have just an assert
that the flush has been done.
But that can change on the future, so let's change the assert for a
wait.
Note that for the l1t case we are writing on the field TMUWCF. So I
understand that then we need to wait for TMUWCF_SET, even if the
previous code was using L2TFLS_SET.
This also happpens on the kernel side. We need to check if this was a
typo on the kernel side.
v2 (from Juan feedback)
* Add comment about the TMUWCF vs L2TFLS difference between this
commit and the kernel.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11039>
Alejandro Piñeiro [Sun, 23 May 2021 21:09:58 +0000 (23:09 +0200)]
v3d/simulator: add a cache flush mode enum
Makes the write to the l2t cache control more readable (without magic
numbers).
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11039>
Alejandro Piñeiro [Fri, 7 May 2021 23:11:42 +0000 (01:11 +0200)]
v3d/simulator: capture hub interrupts
So far we were not capturing any HUB interrupt, just core. This could
be a problem if any is fired, as we could enter on an infinite
loop. With this commit we start to capture them. So we split v3d_isr
into core and hub interrupt handling.
As reference we capture the same HUB interrupts that we capture on the
v3d kernel support.
It is worth to note that all those are mostly untested. Now with both
opengl/vulkan driver being stable we were not able to raise those
interrupts.
v2 (Juan feedback):
* Just one V3D_VERSION >= 41 block, more readable
* Assert that the core is 0 at v3d_isr_core (we don't handle
multi-core right now).
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11039>
Alejandro Piñeiro [Wed, 28 Apr 2021 22:57:25 +0000 (00:57 +0200)]
broadcom/compiler: use proper type field for atomic operations
We were using the num_components to infer it, but in the end it is
VEC2 for CMPXCHG and 32BIT for anything else.
This doesn't affect any test with the real hw, but fixes an assert
with the last version of the simulator.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11039>
Tomeu Vizoso [Fri, 28 May 2021 09:41:20 +0000 (11:41 +0200)]
ci/lava: Disable CPU frequency scaling
Lock CPU frequency scaling to max to speed up test execution and lower
the variation of frame times from performance replay jobs.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11101>
Tomeu Vizoso [Fri, 28 May 2021 09:20:50 +0000 (11:20 +0200)]
Revert "ci/freedreno: Skip Portal 2 trace on a630, due to flakiness"
This reverts commit
e381bc0e6711de83d393ef3cc0b6b795772c1813.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11058>
Samuel Pitoiset [Fri, 28 May 2021 12:56:04 +0000 (14:56 +0200)]
ac/rgp: bump the SQTT file minor version to 5
To match latest RGP spec. Captures generated by RADV still work
with latest RGP (v1.10).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11063>
Samuel Pitoiset [Fri, 28 May 2021 12:55:40 +0000 (14:55 +0200)]
ac/rgp: mark SQTT_FILE_CHUNK_TYPE_ISA_DATABASE as deprecated
This is now deprecated and reserved for future uses.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11063>
Alyssa Rosenzweig [Tue, 1 Jun 2021 00:08:50 +0000 (20:08 -0400)]
asahi: Allocate slices for mipmapping
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Tue, 1 Jun 2021 00:08:57 +0000 (20:08 -0400)]
asahi: Set levels in texture descriptor
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Tue, 1 Jun 2021 00:08:37 +0000 (20:08 -0400)]
asahi: Add mipmapping state to the XML
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 23:21:49 +0000 (19:21 -0400)]
asahi: Abort on blit()
Unimplemented.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 22:59:02 +0000 (18:59 -0400)]
asahi: Make data_valid a bitset to save memory
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 20:35:36 +0000 (16:35 -0400)]
asahi: Allow half-float vertex buffers
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 20:35:21 +0000 (16:35 -0400)]
asahi: Flesh out the formats table
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 20:34:23 +0000 (16:34 -0400)]
asahi: Fake CAPs for ES3 with AGX_MESA_DEBUG=deqp
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 20:10:40 +0000 (16:10 -0400)]
asahi: Lift streamout scaffolding from Panfrost
Trying to fake ES3 for dEQP-GLES3.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 20:10:02 +0000 (16:10 -0400)]
asahi: Add "hacks for dEQP" flag
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 19:46:18 +0000 (15:46 -0400)]
asahi: Add ETC2 formats to table
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 19:37:40 +0000 (15:37 -0400)]
asahi: Respect render target format swizzle
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 19:34:40 +0000 (15:34 -0400)]
asahi: Use pixel table in is_format_supported
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 19:29:20 +0000 (15:29 -0400)]
asahi: Scaffold format table
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 19:08:55 +0000 (15:08 -0400)]
asahi: Hide pixel formats behind an opaque type
Convenient for mapping a format table.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 18:37:06 +0000 (14:37 -0400)]
asahi: Add format enums
Split it up into the underlying parts. Now we can decode every format
accessible in Metal.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 18:36:56 +0000 (14:36 -0400)]
asahi: Print unknown enum values
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 22:54:40 +0000 (04:24 +0530)]
asahi: Align strides to 16 bytes
Apparently required for texturing.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 22:39:51 +0000 (04:09 +0530)]
asahi: Note that "render target" lacks an sRGB bit
sRGB is handled through other mechanisms.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Mon, 31 May 2021 22:08:14 +0000 (18:08 -0400)]
asahi: Handle linear display targets as well as tiled
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 22:03:05 +0000 (03:33 +0530)]
asahi: Respect linear strides
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 22:01:43 +0000 (03:31 +0530)]
asahi: Identify line stride in texture/RT XML
The off-by-four is concerning.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 21:55:34 +0000 (03:25 +0530)]
asahi: Translate layouts for texture and RTs
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 21:49:35 +0000 (03:19 +0530)]
asahi: Add layout enum to XML
Used for textures and render targets. There are more values here, probably for
other tiling schemes and compression.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 21:45:10 +0000 (03:15 +0530)]
asahi: Use dt_stride for line_stride where needed
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 21:31:07 +0000 (03:01 +0530)]
asahi: Determine tiling vs linear for internal textures
Logic lifted from Panfrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Sun, 30 May 2021 17:18:37 +0000 (22:48 +0530)]
asahi: Implement wide lines
Identify line width field and route through the Gallium line width.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Alyssa Rosenzweig [Fri, 28 May 2021 02:51:09 +0000 (22:51 -0400)]
asahi: Fix off-by-one in viewport scissoring
As discovered during the stream. Typo pointed out by someone in the Twitch chat.
Fixes:
f285a1220ea ("asahi: Implement scissors and scissor to viewport")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
Rob Clark [Mon, 31 May 2021 20:24:04 +0000 (13:24 -0700)]
freedreno/headergen2: Fix compile warnings with CP_DRAW_INDIRECT_MULTI
Using stripes to deal with the different packet layout variants resulted
in redefining "register" offsets with different values, so use "prefix"
to add a suffix to disambiguate.
drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h:1066: warning: "REG_A6XX_CP_DRAW_INDIRECT_MULTI_INDIRECT" redefined
1066 | #define REG_A6XX_CP_DRAW_INDIRECT_MULTI_INDIRECT 0x00000006
|
drivers/gpu/drm/msm/adreno/adreno_pm4.xml.h:1057: note: this is the location of the previous definition
1057 | #define REG_A6XX_CP_DRAW_INDIRECT_MULTI_INDIRECT 0x00000003
|
(Admittedly it isn't really a "prefix" but that was the field in the
schema available to use, and REG_INDEXED_CP_DRAW_INDIRECT_MULTI_STRIDE
sounds somewhat more funny.)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Mon, 24 May 2021 18:00:28 +0000 (11:00 -0700)]
freedreno/afuc: Use emulator to extract jmptbl
This runs through the SQE bootstrap code to extract the packet-table,
rather than relying on heuristics. As a bonus, it can detect the start
of the LPAC fw in a660+ fw so that we can properly decode the LPAC fw
and packet-table.
Note that this decodes the jmptable as normal instructions, which is a
change in behavior from the previous heuristic based jmptbl extraction.
Not sure if that is a good or bad thing.
For a5xx, for now the legacy heuristic based jmptable decoding is
preserved, at least until enough control regs are figured out.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Thu, 27 May 2021 21:37:59 +0000 (14:37 -0700)]
freedreno/ci: Add real packet-table loading for afuc test
When we start running the bootstrap code thru the emulator we will need
the packet-table loading to actually happen. So add this.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Thu, 27 May 2021 19:18:53 +0000 (12:18 -0700)]
freedreno/afuc: Add emulator support to run bootstrap
Run until the packet-table is populated, so the disassembler can use
this to know the offsets of various pm4 packet handlers without having
to rely on heuristics.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Thu, 27 May 2021 18:35:21 +0000 (11:35 -0700)]
freedreno/afuc: Split out helpers to parse labels and packet-table
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Thu, 27 May 2021 18:04:42 +0000 (11:04 -0700)]
freedreno/afuc: Extract full gpu-id
Some of the a6xx gens will require some control reg initialization, and
go into an infinite loop if they don't see the values they expect, so
we'll need to extract the compute gpu-id.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Sun, 23 May 2021 17:46:07 +0000 (10:46 -0700)]
freedreno/registers: Add a few a6xx regs and notes
A few things I noticed while playing with the emulator.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Sun, 16 May 2021 20:09:29 +0000 (13:09 -0700)]
freedreno/afuc: Add emulator mode to afuc-disasm
This is an (at least somewhat complete) logical emulator of the a6xx SQE
that lets us step through firmware execution (bootstrap, cmdstream pkt
handling, etc). It lets us poke at various fw visible state and run
through pm4 packet(s) to better understand what the fw is doing when it
handles various packets.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Fri, 21 May 2021 15:39:08 +0000 (08:39 -0700)]
freedreno/afuc: Add pipe reg name decoding
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Fri, 21 May 2021 00:12:35 +0000 (17:12 -0700)]
freedreno/afuc: Clean up special regs
Allow for different mnemonics depending on whether they are used as
source or destination register, to better reflect what they do.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Mon, 17 May 2021 01:43:20 +0000 (18:43 -0700)]
freedreno/afuc: Split out utils
With disasm emulator mode, we'll start wanting some things that are
duplicationg what the assembler does, so just split out all the rnndb
bits into shared utils.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Sun, 16 May 2021 19:15:31 +0000 (12:15 -0700)]
freedreno/afuc: Split out instruction decode helper
Split the giant switch/decode out into a helper function so that we can
re-use it for emulator mode.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Fri, 21 May 2021 20:58:13 +0000 (13:58 -0700)]
freedreno: Move pkt parsing helpers to common
I'll be needing these in afuc as well.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Rob Clark [Fri, 21 May 2021 19:16:37 +0000 (12:16 -0700)]
freedreno/tu+drm: Extract out pm4 pkt header helpers
I'm going to need these in a 3rd place, so let's deduplicate first.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10944>
Andres Gomez [Mon, 31 May 2021 18:41:58 +0000 (21:41 +0300)]
ci: replace glslangValidator with glslang-tools
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11096>
Andres Gomez [Mon, 31 May 2021 17:50:30 +0000 (20:50 +0300)]
ci: remove glslangValidator installation from the VK test container
We already include glslang-tools.
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11095>
Mike Blumenkrantz [Sun, 16 May 2021 14:16:41 +0000 (10:16 -0400)]
compiler/spirv: expand_to_vec4 -> nir_pad_vec4
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10821>
Rhys Perry [Mon, 31 May 2021 14:35:03 +0000 (15:35 +0100)]
radv: make attrib_end variable in radv_flush_vertex_descriptors 32-bit
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes:
1e9dc0474ef ("radv: make radv_pipeline::attrib_ends 32bit")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11089>
Danylo Piliaiev [Mon, 31 May 2021 08:41:22 +0000 (11:41 +0300)]
freedreno: reduce the upper bound of IB size by one
Going beyond 0x100000 results in hangs, however I found that the
last 0x100000 packet just doesn't get executed. Thus the real limit is
0x0FFFFF. At least this is true for a6xx.
This could be tested by appending nops to the cmdstream and placing
e.g. CP_INTERRUPT at the end, at any position other than being
0x100000 packet it results in a hang.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10786>
Danylo Piliaiev [Thu, 13 May 2021 13:50:45 +0000 (16:50 +0300)]
turnip: place a limit on the growth of BOs
There is a limit on IB size, which on freedreno is set to 0x100000.
Going beyond it results in hangs, however I found that the last
0x100000 packet just doesn't get executed. Thus the real limit is
0x0FFFFF.
This could be tested by appending nops to the cmdstream and placing
e.g. CP_INTERRUPT at the end, at any position other than being
0x100000 packet it results in a hang.
Fixes:
dEQP-VK.api.command_buffers.record_many_draws_secondary_2
dEQP-VK.api.command_buffers.record_many_draws_primary_2
However these tests could trigger hangcheck timeouts.
Also this fixes hangs when opening captures of games in RenderDoc.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10786>
Georg Lehmann [Fri, 28 May 2021 12:53:25 +0000 (14:53 +0200)]
v3dv: use VKAPI_ATTR and VKAPI_CALL.
Closes #4852
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Tested-by: Roman Stratiienko <r.stratiienko@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11062>
Neil Roberts [Mon, 31 May 2021 14:32:57 +0000 (16:32 +0200)]
kmsro: Fix confusing comma expression
It looks like this was a copy-and-paste mistake in
827e0d6654a2 where
the initialiser was moved from being a struct initialiser to a
standalone statement. Some of them were fixed with an unrelated change
in
187218395d7c but not all of them. This shouldn’t make any practical
difference to the compiled code.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11090>
Mike Blumenkrantz [Sat, 29 May 2021 03:01:12 +0000 (23:01 -0400)]
Revert "zink: call tc_driver_internal_flush_notify() on flush"
This reverts commit
4d62fca0877104080d4dee8656d09c67e93c8d0e.
this is broken beyond space and time but only reveals its true nature
when used outside of a unit test
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11080>
Mike Blumenkrantz [Tue, 26 Jan 2021 20:58:53 +0000 (15:58 -0500)]
zink: stop using util_set_vertex_buffers_mask()
we're already iterating this, so there's no point in double iterating
also no point in doing the extra refcounting
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 20:58:29 +0000 (15:58 -0500)]
zink: ref vertex buffers during set_vertex_buffers
now we don't need to do it during bind
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 15:37:32 +0000 (10:37 -0500)]
zink: update scissor only when necessary
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 15:31:24 +0000 (10:31 -0500)]
zink: only update viewport state when necessary
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 15:27:32 +0000 (10:27 -0500)]
zink: only rebind vertex buffers when necessary
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Sat, 30 Jan 2021 14:06:25 +0000 (09:06 -0500)]
zink: handle rebinds for vertex buffers
now that the tracking info is there, it's easy to make this happen
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 15:27:50 +0000 (10:27 -0500)]
zink: only rebind pipelines when necessary
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 15:19:51 +0000 (10:19 -0500)]
zink: mark some draw functions inline
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 19:52:40 +0000 (14:52 -0500)]
zink: remove barriers/refs from descriptor cache
these are applied on bind now so there's no need to track them
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 14:56:04 +0000 (09:56 -0500)]
zink: reapply program refs automatically
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Mike Blumenkrantz [Tue, 26 Jan 2021 14:37:17 +0000 (09:37 -0500)]
zink: reapply resource/surface refs after app flushes
instead of doing this during descriptor update, we can automatically handle
this rollover
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10997>
Iago Toral Quiroga [Thu, 27 May 2021 07:16:18 +0000 (09:16 +0200)]
v3dv: implement VK_KHR_device_group
We only support one device group with a single device, so the
implementation is trivial.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11037>
Iago Toral Quiroga [Thu, 27 May 2021 08:17:08 +0000 (10:17 +0200)]
v3dv: implement interactions of VK_KHR_device_group with VK_KHR_swapchain
There are some interactions between these two extensions that need to be
implemented when both are supported. Particularly:
1. Applications can create images that will be bound to swapchain memory
by passing a VkImageSwapchainCreateInfoKHR in the pNext chain
of VkImageCreateInfo. In this case we need to make sure that the
created image takes some of its parameters from the underlying
swapchain.
2. Applications can bind memory from a swapchain image to a VkImage
by passing a VkBindImageMemorySwapchainInfoKHR in the pNext chain
of VkBindImageMemoryInfo.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11037>