platform/upstream/llvm.git
2 years ago[llvm-profgen] Do not cache the frame location stack during computing inlined context...
wlei [Wed, 26 Oct 2022 04:07:55 +0000 (21:07 -0700)]
[llvm-profgen] Do not cache the frame location stack during computing inlined context size

In `computeInlinedContextSizeForRange`, the offset of range is only used one time, there is no need to cache the frame location stack.
Measured on one internal service binary, this can save 2GB memory usage and reduce a small run time (avoid one hash search).

Reviewed By: hoy, wenlei

Differential Revision: https://reviews.llvm.org/D128859

2 years ago[OpenMP] kmp_affinity.h: add missing #else
YunQiang Su [Wed, 26 Oct 2022 02:53:38 +0000 (19:53 -0700)]
[OpenMP] kmp_affinity.h: add missing #else

When detect __NR_sched_getaffinity. the last #else is missing,
which make the last platform MIPS64 failed to build with an error:
   "Unknown or unsupported architecture"

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D135552

2 years ago[sanitizer] Update struct_kernel_stat_sz for mips32 and mipsn32
YunQiang Su [Wed, 26 Oct 2022 02:00:38 +0000 (19:00 -0700)]
[sanitizer] Update struct_kernel_stat_sz for mips32 and mipsn32

On mips32 _LARGEFILE_SOURCE and _FILE_OFFSET_BITS == 64 is used (compiler-rt/cmake/base-config-ix.cmake),
thus the correct struct_kernel_stat_sz should be 160 instead of 144.

This value is also updated for N32, since we will use
_LARGEFILE_SOURCE and _FILE_OFFSET_BITS == 64 in future.

Fix https://github.com/llvm/llvm-project/issues/55499

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D135553

2 years ago[GlobalISel][AArch64] Fix miscompile caused by wrong G_ZEXT selection in GISel
chenglin.bi [Wed, 26 Oct 2022 01:52:51 +0000 (09:52 +0800)]
[GlobalISel][AArch64] Fix miscompile caused by wrong G_ZEXT selection in GISel

The miscompile case's G_ZEXT has a G_FREEZE source.  Similar to D127154, this patch removed isDef32, relying on the AArch64MIPeephole optimizer to remove redundant SUBREG_TO_REG nodes also in GISel.

Fix #58431

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D136433

2 years ago[lldb-vscode] Send Statistics Dump in terminated event
Wanyi Ye [Sat, 10 Sep 2022 18:27:09 +0000 (11:27 -0700)]
[lldb-vscode] Send Statistics Dump in terminated event

This patch will gather debug info & breakpoint info from the statistics dump and send to DAP in terminated event.

We will return full contents of statistics dump (`SBTarget.GetStatistics()`) as a JSON string. So that every time a new field being added, we will be able to capture them from DAP log without changing lldb-vscode.

All the info above will be append to `statistics` field in the terminated event

Test Plan

Debugged a simple hello world program from VSCode. Exit debug session in two ways: 1) run to program exit; 2) user initiated debug session end (quit debugging before program exit).
Check DAP log and see both debug sessions have statistics returned in terminated event.

Here's an example when debugging the test program:

```
{"event":"terminated","seq":0,"statistics":"{\"memory\":{\"strings\":{\"bytesTotal\":1851392,\"bytesUnused\":905933,\"bytesUsed\":945459}},\"modules\":[{\"debugInfoByteSize\":0,\"debugInfoEnabled\":false,\"debugInfoIndexLoadedFromCache\":false,\"debugInfoIndexSavedToCache\":false,\"debugInfoIndexTime\":0,\"debugInfoParseTime\":0,\"identifier\":93901655961472,\"path\":\"/data/users/wanyi/llvm-sand/build/Debug/fbcode-x86_64/toolchain/lldb-test-build.noindex/tools/lldb-vscode/terminated-event/TestVSCode_terminatedEvent.test_terminated_event/a.out.stripped\",\"symbolTableIndexTime\":0.00067299999999999999,\"symbolTableLoadedFromCache\":false,\"symbolTableParseTime\":0.00054799999999999998,\"symbolTableSavedToCache\":false,\"symbolTableStripped\":false,\"triple\":\"x86_64--linux\",\"uuid\":\"E317E50F\"},{\"debugInfoByteSize\":833593,\"debugInfoEnabled\":true,\"debugInfoIndexLoadedFromCache\":false,\"debugInfoIndexSavedToCache\":false,\"debugInfoIndexTime\":0.012657,\"debugInfoParseTime\":0.32714500000000002,\"identifier\":93901656106336,\"path\":\"/usr/lib64/ld-2.28.so\",\"symbolTableIndexTime\":0.0017719999999999999,\"symbolTableLoadedFromCache\":false,\"symbolTableParseTime\":0.025423000000000001,\"symbolTableSavedToCache\":false,\"symbolTableStripped\":false,\"triple\":\"x86_64--linux\",\"uuid\":\"57D782C6-AF24-135E-6970-7B9D3334B91B-6CD33392\"},{\"debugInfoByteSize\":0,\"debugInfoEnabled\":false,\"debugInfoIndexLoadedFromCache\":false,\"debugInfoIndexSavedToCache\":false,\"debugInfoIndexTime\":0,\"debugInfoParseTime\":0,\"identifier\":93901654578688,\"path\":\"[vdso](0x00007ffff7ffd000)\",\"symbolTableIndexTime\":3.1000000000000001e-05,\"symbolTableLoadedFromCache\":false,\"symbolTableParseTime\":0.00038900000000000002,\"symbolTableSavedToCache\":false,\"symbolTableStripped\":false,\"triple\":\"x86_64-unknown-linux-gnu\",\"uuid\":\"B5AF4022-69CE-E598-5703-F5C62C32322D-D9CF26D1\"},{\"debugInfoByteSize\":1020,\"debugInfoEnabled\":true,\"debugInfoIndexLoadedFromCache\":false,\"debugInfoIndexSavedToCache\":false,\"debugInfoIndexTime\":0.0021559999999999999,\"debugInfoParseTime\":0.00024699999999999999,\"identifier\":140008887806080,\"path\":\"/data/users/wanyi/llvm-sand/build/Debug/fbcode-x86_64/toolchain/lldb-test-build.noindex/tools/lldb-vscode/terminated-event/TestVSCode_terminatedEvent.test_terminated_event/libfoo.so\",\"symbolTableIndexTime\":6.2000000000000003e-05,\"symbolTableLoadedFromCache\":false,\"symbolTableParseTime\":0.00080800000000000002,\"symbolTableSavedToCache\":false,\"symbolTableStripped\":false,\"triple\":\"x86_64--\",\"uuid\":\"109BFB15\"},{\"debugInfoByteSize\":0,\"debugInfoEnabled\":false,\"debugInfoIndexLoadedFromCache\":false,\"debugInfoIndexSavedToCache\":false,\"debugInfoIndexTime\":0,\"debugInfoParseTime\":0,\"identifier\":140008887859888,\"path\":\"/lib64/libdl.so.2\",\"symbolTableIndexTime\":0.000105,\"symbolTableLoadedFromCache\":false,\"symbolTableParseTime\":0.0013470000000000001,\"symbolTableSavedToCache\":false,\"symbolTableStripped\":false,\"triple\":\"x86_64--linux\",\"uuid\":\"776BF255-7FD5-1D1A-CAB0-D1D2D7568263-EC5999B5\"},{\"debugInfoByteSize\":0,\"debugInfoEnabled\":false,\"debugInfoIndexLoadedFromCache\":false,\"debugInfoIndexSavedToCache\":false,\"debugInfoIndexTime\":0,\"debugInfoParseTime\":0,\"identifier\":140008887883408,\"path\":\"/lib64/libstdc++.so.6\",\"symbolTableIndexTime\":0.038710000000000001,\"symbolTableLoadedFromCache\":false,\"symbolTableParseTime\":0.075740000000000002,\"symbolTableSavedToCache\":false,\"symbolTableStripped\":false,\"triple\":\"x86_64--linux\",\"uuid\":\"104D4081-3FC7-4F42-7CD4-AC714B249C02-DA5E62C3\"},{\"debugInfoByteSize\":0,\"debugInfoEnabled\":false,\"debugInfoIndexLoadedFromCache\":false,\"debugInfoIndexSavedToCache\":false,\"debugInfoIndexTime\":0,\"debugInfoParseTime\":0,\"identifier\":140008887951248,\"path\":\"/lib64/libm.so.6\",\"symbolTableIndexTime\":0.003212,\"symbolTableLoadedFromCache\":false,\"symbolTableParseTime\":0.027257,\"symbolTableSavedToCache\":false,\"symbolTableStripped\":false,\"triple\":\"x86_64--linux\",\"uuid\":\"089E6D24-BF02-DE2B-C57E-456118BFDC1D-691B14BB\"},{\"debugInfoByteSize\":0,\"debugInfoEnabled\":false,\"debugInfoIndexLoadedFromCache\":false,\"debugInfoIndexSavedToCache\":false,\"debugInfoIndexTime\":0,\"debugInfoParseTime\":0,\"identifier\":140008888170224,\"path\":\"/lib64/libgcc_s.so.1\",\"symbolTableIndexTime\":0.000357,\"symbolTableLoadedFromCache\":false,\"symbolTableParseTime\":0.0040460000000000001,\"symbolTableSavedToCache\":false,\"symbolTableStripped\":false,\"triple\":\"x86_64--\",\"uuid\":\"CD2F6200-D8CA-7045-ADDB-17C6C4240AAC-5DE305B1\"},{\"debugInfoByteSize\":0,\"debugInfoEnabled\":false,\"debugInfoIndexLoadedFromCache\":false,\"debugInfoIndexSavedToCache\":false,\"debugInfoIndexTime\":0,\"debugInfoParseTime\":0,\"identifier\":140008887911072,\"path\":\"/lib64/libc.so.6\",\"symbolTableIndexTime\":0.0070210000000000003,\"symbolTableLoadedFromCache\":false,\"symbolTableParseTime\":0.072236999999999996,\"symbolTableSavedToCache\":false,\"symbolTableStripped\":false,\"triple\":\"x86_64--linux\",\"uuid\":\"F65C85BF-DB90-4B62-3D4F-E2139B4D7C25-CF8C0B58\"},{\"debugInfoByteSize\":833593,\"debugInfoEnabled\":true,\"debugInfoIndexLoadedFromCache\":false,\"debugInfoIndexSavedToCache\":false,\"debugInfoIndexTime\":0.012407,\"debugInfoParseTime\":0.012078999999999999,\"identifier\":140008887927648,\"path\":\"/lib64/ld-linux-x86-64.so.2\",\"symbolTableIndexTime\":0.001758,\"symbolTableLoadedFromCache\":false,\"symbolTableParseTime\":0.022352,\"symbolTableSavedToCache\":false,\"symbolTableStripped\":false,\"triple\":\"x86_64--linux\",\"uuid\":\"57D782C6-AF24-135E-6970-7B9D3334B91B-6CD33392\"}],\"targets\":[{\"breakpoints\":[{\"details\":{\"Breakpoint\":{\"BKPTOptions\":{\"AutoContinue\":false,\"ConditionText\":\"\",\"EnabledState\":true,\"IgnoreCount\":0,\"OneShotState\":false},\"BKPTResolver\":{\"Options\":{\"NameMask\":[56],\"Offset\":0,\"SkipPrologue\":true,\"SymbolNames\":[\"foo\"]},\"Type\":\"SymbolName\"},\"Hardware\":false,\"Names\":[\"vscode\"],\"SearchFilter\":{\"Options\":{},\"Type\":\"Unconstrained\"}}},\"id\":1,\"internal\":false,\"numLocations\":1,\"numResolvedLocations\":1,\"resolveTime\":0.0020110000000000002},{\"details\":{\"Breakpoint\":{\"BKPTOptions\":{\"AutoContinue\":false,\"ConditionText\":\"\",\"EnabledState\":true,\"IgnoreCount\":0,\"OneShotState\":false},\"BKPTResolver\":{\"Options\":{\"Column\":0,\"Exact\":false,\"FileName\":\"/data/users/wanyi/llvm-sand/external/llvm-project/lldb/test/API/tools/lldb-vscode/terminated-event/main.cpp\",\"Inlines\":true,\"LineNumber\":5,\"Offset\":0,\"SkipPrologue\":true},\"Type\":\"FileAndLine\"},\"Hardware\":false,\"Names\":[\"vscode\"],\"SearchFilter\":{\"Options\":{},\"Type\":\"Unconstrained\"}}},\"id\":2,\"internal\":false,\"numLocations\":0,\"numResolvedLocations\":0,\"resolveTime\":0.22744400000000001},{\"details\":{\"Breakpoint\":{\"BKPTOptions\":{\"AutoContinue\":false,\"ConditionText\":\"\",\"EnabledState\":true,\"IgnoreCount\":0,\"OneShotState\":false},\"BKPTResolver\":{\"Options\":{\"Language\":\"c\",\"NameMask\":[4,4,4,4,4,4],\"Offset\":0,\"SkipPrologue\":false,\"SymbolNames\":[\"_dl_debug_state\",\"rtld_db_dlactivity\",\"__dl_rtld_db_dlactivity\",\"r_debug_state\",\"_r_debug_state\",\"_rtld_debug_state\"]},\"Type\":\"SymbolName\"},\"Hardware\":false,\"SearchFilter\":{\"Options\":{\"ModuleList\":[\"/usr/lib64/ld-2.28.so\"]},\"Type\":\"Modules\"}}},\"id\":-1,\"internal\":true,\"kindDescription\":\"shared-library-event\",\"numLocations\":1,\"numResolvedLocations\":1,\"resolveTime\":0.00034600000000000001}],\"expressionEvaluation\":{\"failures\":0,\"successes\":0},\"firstStopTime\":0.157499681,\"frameVariable\":{\"failures\":0,\"successes\":0},\"launchOrAttachTime\":0.117741226,\"moduleIdentifiers\":[93901655961472,93901656106336,93901654578688,140008887806080,140008887859888,140008887883408,140008887951248,140008888170224,140008887911072],\"signals\":[{\"SIGSTOP\":1}],\"sourceMapDeduceCount\":0,\"stopCount\":8,\"targetCreateTime\":0.00064000000000000005,\"totalBreakpointResolveTime\":0.22980100000000003}],\"totalDebugInfoByteSize\":1668206,\"totalDebugInfoEnabled\":3,\"totalDebugInfoIndexLoadedFromCache\":0,\"totalDebugInfoIndexSavedToCache\":0,\"totalDebugInfoIndexTime\":0.027220000000000001,\"totalDebugInfoParseTime\":0.33947100000000002,\"totalModuleCount\":10,\"totalModuleCountHasDebugInfo\":3,\"totalSymbolTableIndexTime\":0.053701000000000006,\"totalSymbolTableParseTime\":0.23014699999999999,\"totalSymbolTableStripped\":0,\"totalSymbolTablesLoadedFromCache\":0,\"totalSymbolTablesSavedToCache\":0}","type":"event"}
```

Differential Revision: https://reviews.llvm.org/D136177

2 years ago[ORC] Skip non-SHF_ALLOC sections in DebugObjectManagerPlugin.
Lang Hames [Wed, 26 Oct 2022 01:37:24 +0000 (18:37 -0700)]
[ORC] Skip non-SHF_ALLOC sections in DebugObjectManagerPlugin.

We don't need to provide a load-address for non-alloc sections. Skipping them
allows us to avoid some complications, like handling duplicate .group sections.

2 years ago[clang] Instantiate concepts with sugared template arguments
Matheus Izvekov [Sun, 23 Oct 2022 09:37:20 +0000 (11:37 +0200)]
[clang] Instantiate concepts with sugared template arguments

Since we don't unique specializations for concepts, we can just instantiate
them with the sugared template arguments, at negligible cost.

If we don't track their specializations, we can't resugar them later
anyway, and that would be more expensive than just instantiating them
sugared in the first place since it would require an additional pass.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Differential Revision: https://reviews.llvm.org/D136566

2 years ago[clang] Instantiate alias templates with sugar
Matheus Izvekov [Sun, 23 Oct 2022 14:57:12 +0000 (16:57 +0200)]
[clang] Instantiate alias templates with sugar

This makes use of the changes introduced in D134604, in order to
instantiate alias templates witn a final sugared substitution.

This comes at no additional relevant cost.
Since we don't track / unique them in specializations, we wouldn't be
able to resugar them later anyway.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Differential Revision: https://reviews.llvm.org/D136565

2 years ago[clang] Instantiate NTTPs and template default arguments with sugar
Matheus Izvekov [Sun, 23 Oct 2022 11:41:57 +0000 (13:41 +0200)]
[clang] Instantiate NTTPs and template default arguments with sugar

This makes use of the changes introduced in D134604, in order to
instantiate non-type template parameters and default template arguments
with a final sugared substitution.

This comes at no additional relevant cost.
Since we don't track / unique them in specializations, we wouldn't be
able to resugar them later anyway.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Differential Revision: https://reviews.llvm.org/D136564

2 years ago[clang] Implement sugared substitution changes to infrastructure
Matheus Izvekov [Sun, 25 Sep 2022 15:18:39 +0000 (17:18 +0200)]
[clang] Implement sugared substitution changes to infrastructure

Implements the changes required to perform substitution with
non-canonical template arguments, and to 'finalize' them
by not placing 'Subst' nodes.

A finalized substitution means we won't resugar them later,
because these templates themselves were eagerly substituted
with the intended arguments at the point of use. We may still
resugar other templates used within those, though.

This patch does not actually implement any uses of this
functionality, those will be added in subsequent patches,
so expect no changes to existing tests.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Differential Revision: https://reviews.llvm.org/D134604

2 years ago[flang] Support lowering of parent component in strecture constructor
Peixin-Qiao [Wed, 26 Oct 2022 01:12:45 +0000 (09:12 +0800)]
[flang] Support lowering of parent component in strecture constructor

Reuse the previous record assignment code. Use gen(expr) to generate
the fir::ExtendedValue of parent component recursively and convert the
structure to a fir.ref<T> type, where T is the record type of parent
component. Then, fir::factory::genRecordAssignment can be reused to
assign the parent component to the type-casted structure.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D136530

2 years ago[flang] Add support for lowering intrinsic module procedure C_ASSOCIATED
Peixin-Qiao [Wed, 26 Oct 2022 01:09:38 +0000 (09:09 +0800)]
[flang] Add support for lowering intrinsic module procedure C_ASSOCIATED

As Fortran 2018 18.2.3.2, the arguments of C_ASSOCIATED have the same
type, a scalar of type C_PTR or C_FUNPTR, and the result has the default
logical scalar type. The interface is defined with two module procedures
c_associated_c_ptr/c_associated_c_funptr in flang/module/iso_c_binding.
The result is false if the first argument is a C null pointer. If the
second argument is present, the result is true only if the two arguments
are equal. Support the lowering by comparing the C pointer address
values of two arguments if the second argument is dynamically present
and comparing the C pointer address value of the first argument with the
value 0.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D136419

2 years ago[X86] Enable reassociation for ADD instructions
Guozhi Wei [Wed, 26 Oct 2022 00:46:13 +0000 (00:46 +0000)]
[X86] Enable reassociation for ADD instructions

ADD is an associative and commutative operation, so we can do reassociation for it.

Differential Revision: https://reviews.llvm.org/D136396

2 years ago[clang] Perform sugared substitution of builtin templates
Matheus Izvekov [Sun, 23 Oct 2022 11:38:39 +0000 (13:38 +0200)]
[clang] Perform sugared substitution of builtin templates

Since these are much like template type aliases, where we don't
track a specialization for them and just substitute them eagerly,
we can't resugar them anyway, and there is no relevant cost in just
performing a finalizing sugared substitution.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Differential Revision: https://reviews.llvm.org/D136563

2 years ago[mlir][sparse] use loop emitter to generate loop in sparsification
Peiming Liu [Tue, 18 Oct 2022 16:41:03 +0000 (16:41 +0000)]
[mlir][sparse] use loop emitter to generate loop in sparsification

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D136185

2 years ago[include-cleaner] Fix header guard. NFC
Sam McCall [Wed, 26 Oct 2022 00:24:31 +0000 (02:24 +0200)]
[include-cleaner] Fix header guard. NFC

2 years ago[clang] Changes to produce sugared converted template arguments
Matheus Izvekov [Mon, 5 Sep 2022 19:57:37 +0000 (21:57 +0200)]
[clang] Changes to produce sugared converted template arguments

Makes CheckTemplateArgumentList and the template deduction functions
produce a sugared converted argument list in addition to the canonical one.

This is mostly NFC except that we hook this up to a few diagnostics in
SemaOverload.

The infrastructure here will be used in subsequent patches
where we perform a finalized sugared substitution for entities
which we do not unique per specializations on canonical arguments,
and later on will be used for template specialization resugaring.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Differential Revision: https://reviews.llvm.org/D133874

2 years agoSimplifyLibCalls: Add missing testcase for sincospi
Matt Arsenault [Tue, 25 Oct 2022 23:15:41 +0000 (16:15 -0700)]
SimplifyLibCalls: Add missing testcase for sincospi

Part of issue 58604. Test should have been part of
50fe87a5c8597eb72e6055356fa7dad364756ff7

2 years agoGlobalISel: Fix copy paste error
Matt Arsenault [Tue, 25 Oct 2022 21:11:37 +0000 (14:11 -0700)]
GlobalISel: Fix copy paste error

Pretty sure this was harmless since the tablegen
calling convention definitions do not use pointers.

Part of issue 58604

2 years agoRevert "Update supported features in the generic CPU configuration"
Douglas Yung [Tue, 25 Oct 2022 23:34:08 +0000 (16:34 -0700)]
Revert "Update supported features in the generic CPU configuration"

This reverts commit 11afbf396e10e1b1e91a5991e2aec1916e29a910.

There are 10 tests still failing after follow-up fix b5d0bf9b9853, this should get the following bots back to green:
 - https://lab.llvm.org/buildbot/#/builders/183/builds/8194
 - https://lab.llvm.org/buildbot/#/builders/186/builds/9491
 - https://lab.llvm.org/buildbot/#/builders/214/builds/3908
 - https://lab.llvm.org/buildbot/#/builders/93/builds/11740
 - https://lab.llvm.org/buildbot/#/builders/231/builds/4200
 - https://lab.llvm.org/buildbot/#/builders/121/builds/24519
 - https://lab.llvm.org/buildbot/#/builders/230/builds/4466
 - https://lab.llvm.org/buildbot/#/builders/94/builds/11639
 - https://lab.llvm.org/buildbot/#/builders/45/builds/9325
 - https://lab.llvm.org/buildbot/#/builders/124/builds/5219
 - https://lab.llvm.org/buildbot/#/builders/67/builds/8623
 - https://lab.llvm.org/buildbot/#/builders/123/builds/13836
 - https://lab.llvm.org/buildbot/#/builders/109/builds/49355
 - https://lab.llvm.org/buildbot/#/builders/58/builds/27751
 - https://lab.llvm.org/buildbot/#/builders/117/builds/9922
 - https://lab.llvm.org/buildbot/#/builders/16/builds/37012
 - https://lab.llvm.org/buildbot/#/builders/104/builds/9490
 - https://lab.llvm.org/buildbot/#/builders/42/builds/7725
 - https://lab.llvm.org/buildbot/#/builders/196/builds/20077
 - https://lab.llvm.org/buildbot/#/builders/3/builds/15217
 - https://lab.llvm.org/buildbot/#/builders/6/builds/15251
 - https://lab.llvm.org/buildbot/#/builders/9/builds/15247
 - https://lab.llvm.org/buildbot/#/builders/36/builds/26487
 - https://lab.llvm.org/buildbot/#/builders/54/builds/2474
 - https://lab.llvm.org/buildbot/#/builders/74/builds/14536
 - https://lab.llvm.org/buildbot/#/builders/5/builds/28555

2 years agoRevert "[wasm-ld] Add -mcpu=mvp to wasm-ld tests"
Douglas Yung [Tue, 25 Oct 2022 23:33:51 +0000 (16:33 -0700)]
Revert "[wasm-ld] Add -mcpu=mvp to wasm-ld tests"

This reverts commit b5d0bf9b9853688d34290fafdd31c95aca58f624.

The original commit is causing 10 test failures on multiple bots, reverting to get back to green.

2 years ago[libc] Enable a few entrypoints on aarch64 already available on x86_64.
Siva Chandra [Tue, 25 Oct 2022 22:31:12 +0000 (15:31 -0700)]
[libc] Enable a few entrypoints on aarch64 already available on x86_64.

2 years ago[FuncSpec] Fix missed opportunities for function specialisation
Momchil Velikov [Tue, 25 Oct 2022 18:53:41 +0000 (19:53 +0100)]
[FuncSpec] Fix missed opportunities for function specialisation

When collecting the possible constant arguments to
specialise a function the compiler will abandon the search
on the first argument that is for some reason unsuitable as
a specialisation constant. Thus, depending on the traversal
order of the functions and call sites, the compiler can end
up with a different set of possible constants, hence with
different set of specialisations.

With this patch, the compiler will skip unsuitable
constants, but nevertheless will continue searching for
more.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D135867

2 years ago[trace][intel pt][simple] Fix errors after switching to libipt's top of tree
Walter Erquinigo [Tue, 25 Oct 2022 21:32:10 +0000 (14:32 -0700)]
[trace][intel pt][simple] Fix errors after switching to libipt's top of tree

These tests were being tested against a version of libipt from last
year. We just updated libipt to top of tree and many errors broke
because the new version of libipt emits more events than the older one,
which is fine.

`./bin/lldb-dotest -p TestTrace` passes

2 years ago[LV][RISCV] Disable vectorization of epilogue loops
Philip Reames [Tue, 25 Oct 2022 21:01:33 +0000 (14:01 -0700)]
[LV][RISCV] Disable vectorization of epilogue loops

Epilogue loop vectorization is a feature in the vectorize intended to avoid running fully scalar code when the vector length of the main loop turns out to be either longer than the trip count of the actual loop, or with a huge remainder.

In practice, this feature appears to not have been well tuned. I honestly don't think it should be on by default at all, but it definitely shouldn't be on for RISCV. Note that other targets have also disabled it, but they've done so via disabling interleaving - which is, well, completely unrelated - and we don't want to do that for RISCV.

In the near term, many examples I'm seeing have terrible codegen for epilogue vectorization. We are greatly increasing code size for little value at reasonable VLEN values for small types. In the long term, the cases that epilogue vectorization are intended to handle are likely better handled via tail folding on RISCV.

As an aside, I also don't really trust the correctness of epilogue vectorization. The code structure is such that otherwise straight forward changes sometimes break only epilogue vectorization. The reuse of an existing vplan without careful validation opens significant room for nasty bugs. Given how rarely the code is exercised, that is not a good combination.

As such, this patch introduces a TTI hook, and completely disables epilogue vectorization on RISCV.

Differential Revision: https://reviews.llvm.org/D136695

2 years agoQuick fix for previous commit; small code change before commit
Jason Molenda [Tue, 25 Oct 2022 20:56:02 +0000 (13:56 -0700)]
Quick fix for previous commit; small code change before commit

2 years agoChange debugserver to clear PAC auth bits manually
Jason Molenda [Tue, 25 Oct 2022 20:47:14 +0000 (13:47 -0700)]
Change debugserver to clear PAC auth bits manually

debugserver is currently using kernel supplied macros,
arm_thread_state64_get_{pc,fp,sp,lr} which can crash on an authorization
failure when the inferior has crashed with an invalid pc value, for
instance.  debugserver needs to be resistant to crashing in this
scenario, and we're merely clearing the bits, so do it with a bit
mask operation instead.

Differential Revision: https://reviews.llvm.org/D136620
rdar://98073271
rdar://100663221

2 years ago[clang-doc] Fix typedef/using output.
Brett Wilson [Mon, 24 Oct 2022 20:48:55 +0000 (13:48 -0700)]
[clang-doc] Fix typedef/using output.

Provides an initializer for the TypedefInfo.IsUsing member. Previously
this member was uninitialized and would produce random output.

Adds the Description (code comments) to the bitcode reader/writer.
Previously the typedef/using descriptions were lost during the bitcode
round-trip. Adds a test for this.

Differential Revision: https://reviews.llvm.org/D136638

2 years ago[lld-macho] Don't sort map file entries by name
Jez Ng [Tue, 25 Oct 2022 20:26:57 +0000 (16:26 -0400)]
[lld-macho] Don't sort map file entries by name

ld64 emits them in address order but not in alphabetical order. This
sorting is particularly expensive for dead-stripped symbols (which don't
need to be sorted at all, unlike live symbols that need to be sorted by
address).

Timings for chromium_framework_less_dwarf (with the `-map` flag added to
the response file) on my 16-core Mac Pro:

             base           diff           difference (95% CI)
  sys_time   1.997 ± 0.038  2.004 ± 0.028  [  -0.6% ..   +1.3%]
  user_time  8.698 ± 0.085  8.167 ± 0.070  [  -6.6% ..   -5.6%]
  wall_time  7.965 ± 0.114  7.715 ± 0.347  [  -5.1% ..   -1.2%]
  samples    25             23

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D136536

2 years agoFix exception description in lldb-vscode
Jeffrey Tan [Wed, 19 Oct 2022 18:58:23 +0000 (11:58 -0700)]
Fix exception description in lldb-vscode

There is a bug in lldb-vscode that only shows stop reason ("exception") in
stopped event without showing the stop description of thrown exception. This
causes VSCode UI to only show "Paused on Exception" general message in
callstack window UI.

This patch fixes the bug so that VSCode callstack will show the detailed
exceptioni description, like "signal SIGABRT" or "EXC_BAD_ACCESS..." which
aligns with command line lldb experience.

I use C++ exception in testcase because the hardware exception description is
platform dependent and hard to verify.

Differential Revision: https://reviews.llvm.org/D136295

2 years ago[Instrumentation] Remove legacy passes
Arthur Eubanks [Mon, 24 Oct 2022 16:26:16 +0000 (09:26 -0700)]
[Instrumentation] Remove legacy passes

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D136615

2 years ago[LoopPeeling] Add flag to disable support for peeling loops with non-latch exits
Alina Sbirlea [Mon, 24 Oct 2022 22:23:16 +0000 (15:23 -0700)]
[LoopPeeling] Add flag to disable support for peeling loops with non-latch exits

Add a flag to allow disabling the changes in
https://reviews.llvm.org/D134803.

Differential Revision: https://reviews.llvm.org/D136643

2 years ago[Driver][Fuchsia] Make -mfix-cortex-a53-835769 default when targeting Fuchsia
Alex Brachet [Tue, 25 Oct 2022 19:17:52 +0000 (19:17 +0000)]
[Driver][Fuchsia] Make -mfix-cortex-a53-835769 default when targeting Fuchsia

Differential Revision: https://reviews.llvm.org/D136703

2 years ago[wasm-ld] Add -mcpu=mvp to wasm-ld tests
Dan Gohman [Tue, 25 Oct 2022 19:13:49 +0000 (12:13 -0700)]
[wasm-ld] Add -mcpu=mvp to wasm-ld tests

Following up on D125729, add -mcpu-mvp to wasm-ld tests that use llc to
avoid test changes as a result of default target changes.

2 years ago[FuncSpec] Consider small noinline functions for specialisation
Momchil Velikov [Tue, 25 Oct 2022 17:56:31 +0000 (18:56 +0100)]
[FuncSpec] Consider small noinline functions for specialisation

Small functions with size under a given threshold are not
considered for specialisaion on the presumption that they
are easy to inline. This does not apply to `noinline`
functions, though.

Reviewed By: ChuanqiXu

Differential Revision: https://reviews.llvm.org/D135862

2 years ago[JITLink][AArch64] Add a generic 'createAnonymousPointer' utility.
Lang Hames [Tue, 25 Oct 2022 18:31:48 +0000 (11:31 -0700)]
[JITLink][AArch64] Add a generic 'createAnonymousPointer' utility.

Adds a generic utility for creating anonymous aarch64 pointer blocks
(automatically adding an edge to initialize the pointer if given an
initial target).

Updates the aarch64 GOTTableManager to use the utility when building
GOT entries.

2 years ago[WebAssembly] Update supported features in the generic CPU configuration
Dan Gohman [Tue, 18 Oct 2022 17:50:37 +0000 (10:50 -0700)]
[WebAssembly] Update supported features in the generic CPU configuration

Enable sign-ext and mutable-globals in -mcpu=generic. This makes these features
enabled by default.

These features are all [finished proposals], and all major wasm engines
support them.

[finished proposals]: https://github.com/WebAssembly/proposals/blob/main/finished-proposals.md

Differential Revision: https://reviews.llvm.org/D125728

2 years agoUpdate supported features in the generic CPU configuration
Dan Gohman [Tue, 18 Oct 2022 18:10:19 +0000 (11:10 -0700)]
Update supported features in the generic CPU configuration

Accompanying https://reviews.llvm.org/D125728, this updates LLVM
Codegen's "generic" CPU to enable the same new features.

Differential Revision: https://reviews.llvm.org/D125729

2 years ago[M68k][Driver] Rename target features and macros test files
Min-Yih Hsu [Tue, 25 Oct 2022 17:38:50 +0000 (10:38 -0700)]
[M68k][Driver] Rename target features and macros test files

test/Driver/m68k-features.cpp -> test/Driver/m68k-macros.cpp
test/Driver/m68k-fixed-register.c -> test/Driver/m68k-features.cpp

The original m68k-features.cpp should really be called m68k-macros.cpp
since it's testing built-in macro definitions rather than sub-target
features. Which are part of what m68k-fixed-register.c was previously
doing. NFC.

2 years ago[flang] Add atomic_fetch_add to list of intrinsics
Katherine Rasmussen [Mon, 3 Oct 2022 17:57:26 +0000 (10:57 -0700)]
[flang] Add atomic_fetch_add to list of intrinsics

Add the atomic subroutine, atomic_fetch_add, to the list of
intrinsic subroutines, add its last dummy argument to a check
for coindexed-object, and update test.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D136625

2 years ago[CUDA, NVPTX] Added basic __bf16 support for NVPTX.
Artem Belevich [Thu, 20 Oct 2022 01:49:32 +0000 (18:49 -0700)]
[CUDA, NVPTX] Added basic __bf16 support for NVPTX.

Recent Clang changes expose _bf16 types for SSE2-enabled host compilations and
that makes those types visible furing GPU-side compilation, where it currently
fails with Sema complaining that __bf16 is not supported.

Considering that __bf16 is a storage-only type, enabling it for NVPTX if it's
enabled on the host should pose no issues, correctness-wise.

Recent NVIDIA GPUs have introduced bf16 support, so we'll likely grow better
support for __bf16 on NVPTX going forward.

Differential Revision: https://reviews.llvm.org/D136311

2 years ago[libc++] Add missing includes to xlocale helpers
Louis Dionne [Mon, 24 Oct 2022 22:23:59 +0000 (18:23 -0400)]
[libc++] Add missing includes to xlocale helpers

Also, make sure those are compatible with _LIBCPP_HAS_NO_WIDE_CHARACTERS.

Differential Revision: https://reviews.llvm.org/D136682

2 years ago[libc] Add Linux implementations of time and clock functions.
Siva Chandra Reddy [Tue, 25 Oct 2022 06:45:45 +0000 (06:45 +0000)]
[libc] Add Linux implementations of time and clock functions.

Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D136666

2 years ago[BOLT] Add mold-style PLT support
Maksim Panchenko [Tue, 25 Oct 2022 00:54:25 +0000 (17:54 -0700)]
[BOLT] Add mold-style PLT support

mold linker creates symbols for PLT entries and that caught BOLT by
surprise. Add the support for marked PLT entries.

Fixes: #58498

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D136655

2 years ago[docs] Update clang-formatted-files.txt after bindings/go removal (D135436)
Fangrui Song [Tue, 25 Oct 2022 17:57:19 +0000 (10:57 -0700)]
[docs] Update clang-formatted-files.txt after bindings/go removal (D135436)

2 years ago[LegacyPM] Remove DataFlowSanitizerLegacyPass
Fangrui Song [Tue, 25 Oct 2022 17:55:29 +0000 (10:55 -0700)]
[LegacyPM] Remove DataFlowSanitizerLegacyPass

Using the legacy PM for the optimization pipeline was deprecated in 13.0.0.
Following recent changes to remove non-core features of the legacy
PM/optimization pipeline, remove DataFlowSanitizerLegacyPass.

Differential Revision: https://reviews.llvm.org/D124594

2 years ago[AArch64]SME2 single-multi and multi-multi INT dot product instructions[part2]
Caroline Concatto [Sat, 22 Oct 2022 14:55:02 +0000 (15:55 +0100)]
[AArch64]SME2 single-multi and multi-multi INT dot product  instructions[part2]

This patch adds the assembly/disassembly for the following instructions:
        SDOT: (4-way, multiple and single vector): Multi-vector signed integer dot-product by vector.
              SDOT (4-way, multiple vectors): Multi-vector signed integer dot-product.
        UDOT: (4-way, multiple and single vector): Multi-vector unsigned integer dot-product by vector.
              (4-way, multiple vectors): Multi-vector unsigned integer dot-product.
    for groups of 2 and 4 ZA registers

The reference can be found here:
                https://developer.arm.com/documentation/ddi0602/2022-09

Depends on: D135563

Differential Revision: https://reviews.llvm.org/D135760

2 years ago[flang] Add check for constraints on synchronization-stmts
Katherine Rasmussen [Mon, 17 Oct 2022 19:39:21 +0000 (13:39 -0600)]
[flang] Add check for constraints on synchronization-stmts

In the CoarrayChecker, add checks for the constraints C1172 and
C1173, which constrain sync-stat-list. Add these checks to
sync-all-stmt, sync-images-stmt, sync-memory-stmt, and
sync-team-stmt. Also add a check for the constraint C1174 in
sync-images-stmt. Update semantics tests for these stmts.

Reviewed By: klausler

Differential Revision: https://reviews.llvm.org/D136104

2 years ago[AArch64]SME2 single-multi and multi-multi INT/FP dot product instructions
Caroline Concatto [Sat, 22 Oct 2022 11:13:49 +0000 (12:13 +0100)]
[AArch64]SME2 single-multi and multi-multi INT/FP dot product instructions

This patch adds the assembly/disassembly for the following instruction:
INT:
  SDOT (2-way, multiple and single vector): Multi-vector signed integer dot-product by vector.
       (2-way, multiple vectors): Multi-vector signed integer dot-product.
  UDOT (2-way, multiple and single vector): Multi-vector unsigned integer dot-product by vector.
       (2-way, multiple vectors): Multi-vector unsigned integer dot-product.
  SUDOT (multiple and indexed vector): Multi-vector signed by unsigned integer dot-product by indexed elements.
        (multiple and single vector): Multi-vector signed by unsigned integer dot-product by vector.
  USDOT (multiple and single vector): Multi-vector unsigned by signed integer dot-product by vector.
        (multiple vectors): Multi-vector unsigned by signed integer dot-product.
FP:
  BFDOT(multiple and single vector): Multi-vector BFloat16 floating-point dot-product by vector.
        (multiple vectors): Multi-vector BFloat16 floating-point dot-product.

  FDOT (multiple and single vector): Multi-vector half-precision floating-point dot-product by vector.
       (multiple vectors): Multi-vector half-precision floating-point dot-product.
For set of 2 and 4 ZA registers

The reference can be found here:
        https://developer.arm.com/documentation/ddi0602/2022-09

Depends on:D135455

Differential Revision: https://reviews.llvm.org/D135683

2 years ago[SelectionDAG] Add missing semicolon after return.
Craig Topper [Tue, 25 Oct 2022 17:18:46 +0000 (10:18 -0700)]
[SelectionDAG] Add missing semicolon after return.

I'm unsure what the code does without the semicolon. On the surface it
seems like the assert below it would be considered part of the if
and thus the assert would only execute if DestReg is 0. But 0 isn't
considered a virtual register so the assert should fail.

Found by PVS Studio.
Reported https://pvs-studio.com/en/blog/posts/cpp/1003/ (N7)

2 years ago[trace][intel pt] Simple detection of infinite decoding loops
Walter Erquinigo [Sun, 23 Oct 2022 17:04:46 +0000 (10:04 -0700)]
[trace][intel pt] Simple detection of infinite decoding loops

The low-level decoder might fall into an infinite decoding loop for
various reasons, the simplest being an infinite direct loop reached due
to wrong handling of self-modified code in the kernel, e.g. it might
reach

```
0x0A: pause
0x0C: jump to 0x0A
```

In this case, all the code is sequential and requires no packets to be
decoded. The low-level decoder would produce an output like the
following

```
0x0A: pause
0x0C: jump to 0x0A
0x0A: pause
0x0C: jump to 0x0A
0x0A: pause
0x0C: jump to 0x0A
... infinite amount of times
```

These cases require stopping the decoder to avoid infinite work and signal this
at least as a trace error.

- Add a check that breaks decoding of a single PSB once 500k instructions have been decoded since the last packet was processed.
- Add a check that looks for infinite loops after certain amount of instructions have been decoded since the last packet was processed.
- Add some `settings` properties for tweaking the thresholds of the checks above. This is also nice because it does the basic work needed for future settings.
- Add an AnomalyDetector class that inspects the DecodedThread and the libipt decoder in search for anomalies. These anomalies are then signaled as fatal errors in the trace.
- Add an ErrorStats class that keeps track of all the errors in a DecodedThread, with a special counter for fatal errors.
- Add an entry for decoded thread errors in the `dump info` command.

Some notes are added in the code and in the documention of the settings,
so please read them.

Besides that, I haven't been unable to create a test case in LLVM style, but
I've found an anomaly in the thread #12 of the trace
72533820-3eb8-4465-b8e4-4e6bf0ccca99 at Meta. We have to figure out how to
artificially create traces with this kind of anomalies in LLVM style.

With this change, that anomalous thread now shows:

```
(lldb)thread trace dump instructions 12 -e -i 23101

thread #12: tid = 8
    ...missing instructions
    23101: (error) anomalous trace: possible infinite loop detected of size 2
  vmlinux-5.12.0-0_fbk8_clang_6656_gc85768aa64da`panic_smp_self_stop + 5 [inlined] rep_nop at processor.h:13:2
    23100: 0xffffffff81342785    pause
  vmlinux-5.12.0-0_fbk8_clang_6656_gc85768aa64da`panic_smp_self_stop + 7 at panic.c:87:2
    23099: 0xffffffff81342787    jmp    0xffffffff81342785        ; <+5> [inlined] rep_nop at processor.h:13:2
  vmlinux-5.12.0-0_fbk8_clang_6656_gc85768aa64da`panic_smp_self_stop + 5 [inlined] rep_nop at processor.h:13:2
    23098: 0xffffffff81342785    pause
  vmlinux-5.12.0-0_fbk8_clang_6656_gc85768aa64da`panic_smp_self_stop + 7 at panic.c:87:2
    23097: 0xffffffff81342787    jmp    0xffffffff81342785        ; <+5> [inlined] rep_nop at processor.h:13:2
  vmlinux-5.12.0-0_fbk8_clang_6656_gc85768aa64da`panic_smp_self_stop + 5 [inlined] rep_nop at processor.h:13:2
    23096: 0xffffffff81342785    pause
  vmlinux-5.12.0-0_fbk8_clang_6656_gc85768aa64da`panic_smp_self_stop + 7 at panic.c:87:2
    23095: 0xffffffff81342787    jmp    0xffffffff81342785        ; <+5> [inlined] rep_nop at processor.h:13:2
```

It used to be in an infinite loop where the decoder never stopped.

Besides that, the dump info command shows

```
(lldb) thread trace dump info 12

 Errors:
    Number of individual errors: 32
      Number of fatal errors: 1
      Number of other errors: 31
```

and in json format

```
(lldb) thread trace dump info 12 -j

 "errors": {
      "totalCount": 32,
      "libiptErrors": {},
      "fatalErrors": 1,
      "otherErrors": 31
    }
```

Differential Revision: https://reviews.llvm.org/D136557

2 years agoRevert "[mlir] Add vectorization tests for linalg.map,reduce,transpose."
Alexander Belyaev [Tue, 25 Oct 2022 17:17:17 +0000 (19:17 +0200)]
Revert "[mlir] Add vectorization tests for linalg.map,reduce,transpose."

This reverts commit 2f88268fc109a1845285e125dfc19b8b75c137a0.

I will take a look what's happening with vectorization.mlir and why it
works on my machine and not upstream. Reverting for now.

2 years ago[Tooling] Avoid StandardLibrary.h including Decl. NFC
Sam McCall [Tue, 25 Oct 2022 17:11:51 +0000 (19:11 +0200)]
[Tooling] Avoid StandardLibrary.h including Decl. NFC

So you can use the enum in a header without pulling in half the AST.

2 years ago[clang-format] Correctly annotate UDLs as OverloadedOperator
Emilia Dreamer [Thu, 29 Sep 2022 07:10:47 +0000 (10:10 +0300)]
[clang-format] Correctly annotate UDLs as OverloadedOperator

While the opening parenthesis of an user-defined literal operator was
correctly annotated as OverloadedOperatorLParen, the "" and its suffix
wasn't annotated as OverloadedOperator.

Fixes https://github.com/llvm/llvm-project/issues/58035

Differential Revision: https://reviews.llvm.org/D134853

2 years ago[AMDGPU] Fix delay alu for VOPD with src2acc
Joe Nash [Thu, 20 Oct 2022 19:03:46 +0000 (15:03 -0400)]
[AMDGPU] Fix delay alu for VOPD with src2acc

V_FMAC_F32 and V_DOT2C_F32_F16 have a dummy src2 operand tied to vdst to
inform passes that the instructions read the dst operand. The VOPD
versions of these instructions lacked the dummy operand, which was a
problem for inserting s_delay_alu.
Introduce the dummy src2 operand on the VOPD versions, and fix the VOPD operand
tracking logic to account for it.

Reviewed By: dp

Differential Revision: https://reviews.llvm.org/D136629

2 years ago[include-cleaner] Move vocabulary types into separate header for layering. NFC
Sam McCall [Tue, 25 Oct 2022 17:01:46 +0000 (19:01 +0200)]
[include-cleaner] Move vocabulary types into separate header for layering. NFC

2 years ago[SystemZInstPrinter] Introduce markup tags emission
Ulrich Weigand [Tue, 25 Oct 2022 16:58:33 +0000 (18:58 +0200)]
[SystemZInstPrinter] Introduce markup tags emission

SystemZ assembly syntax emission now leverages markup tags, if enabled.

Author: Antonio Frighetto

Differential Revision: https://reviews.llvm.org/D129868

2 years ago[SDAG] refactor folds for scalar-to-vector; NFCI
Sanjay Patel [Tue, 25 Oct 2022 16:48:46 +0000 (12:48 -0400)]
[SDAG] refactor folds for scalar-to-vector; NFCI

Fix typos, add comments, improve variable names,
rearrange code, add early exits.

2 years ago[Clang][NFC] Fix UnicodeData.txt parsing.
Corentin Jabot [Tue, 25 Oct 2022 16:41:41 +0000 (18:41 +0200)]
[Clang][NFC] Fix UnicodeData.txt parsing.

Fix the UnicodeNameToCodepoint tool misshandling
the case of a line containing a single semi-colon
(which does not happens in practice)

2 years ago[lldb] Host::ShellExpandArguments - fix error check for valid dictionary
Simon Pilgrim [Tue, 25 Oct 2022 16:43:47 +0000 (17:43 +0100)]
[lldb] Host::ShellExpandArguments - fix error check for valid dictionary

Fix repeated check for a valid JSON parse and actually check the dictionary pointer

Reported here: https://pvs-studio.com/en/blog/posts/cpp/1003/ (N40)

2 years agoWhitespace fix in a comment; NFC
Aaron Ballman [Tue, 25 Oct 2022 16:35:18 +0000 (12:35 -0400)]
Whitespace fix in a comment; NFC

2 years ago[lit] Define keyword used by MCJIT test
Paul Robinson [Tue, 25 Oct 2022 16:22:35 +0000 (09:22 -0700)]
[lit] Define keyword used by MCJIT test

test/ExecutionEngine/MCJIT/2005-12-02-TailCallBug.ll has
'XFAIL: mcjit-ia32' but that feature isn't defined anywhere, so
the XFAIL can't have any effect.  This has not been a problem
because apparently there are no 32-bit x86 bots out there.

I found this as part of other work to clean up lit keywords, so
I figured I would go ahead and fix it.  Verified by hacking my
lit.site.cfg.py so host_triple = target_triple = "i686-pc-windows-msvc"
and the test correctly reported XFAIL.

2 years ago[Transforms] classifyArgUse - don't deference pointer before null test
Simon Pilgrim [Tue, 25 Oct 2022 16:23:25 +0000 (17:23 +0100)]
[Transforms] classifyArgUse - don't deference pointer before null test

Reported here: https://pvs-studio.com/en/blog/posts/cpp/1003/ (N11)

2 years agoRevert "[clang] Fix missing diagnostic of declaration use when accessing TypeDecls...
Nico Weber [Tue, 25 Oct 2022 16:23:10 +0000 (12:23 -0400)]
Revert "[clang] Fix missing diagnostic of declaration use when accessing TypeDecls through typename access"

This reverts commit dc170433137aeda5e5276bd292cac12aa93fee7c.
Breaks building LLVM on mac when targeting macOS before 10.15, see
comments on https://reviews.llvm.org/D136533

2 years agoRevert "reland e5581df60a35 [SimplifyCFG] accumulate bonus insts cost"
Yaxun (Sam) Liu [Tue, 25 Oct 2022 16:15:39 +0000 (12:15 -0400)]
Revert "reland e5581df60a35 [SimplifyCFG] accumulate bonus insts cost"

This reverts commit bd7949bcd86633bd4203b2ba6f891aea00fce4d1.

Revert this patch since reviwers have different opinions regarding
the approach in post-commit review.

Will open RFC for further discussion.

Differential Revision: https://reviews.llvm.org/D132408

2 years ago[ORC] Allow EPCDebugObjectRegistrar clients to specify registration fn dylib.
Lang Hames [Tue, 25 Oct 2022 15:44:32 +0000 (08:44 -0700)]
[ORC] Allow EPCDebugObjectRegistrar clients to specify registration fn dylib.

Similar to the EPCEHFrameRegistrar change in c977251ef6f, this allows clients
who have sourced a dylib handle via a side-channel to search that dylib to
find the registration functions.

This patch defaults to the existing behavior in the case where the client does
not specify a handle to use.

2 years ago[ORC] Update SelfExecutorProcessControl to allow user-supplied handles.
Lang Hames [Tue, 25 Oct 2022 15:23:27 +0000 (08:23 -0700)]
[ORC] Update SelfExecutorProcessControl to allow user-supplied handles.

SelfExecutorProcessControl no longer requires that handles passed to
lookupSymbols be ones that were previously returned from loadDylib. This brings
SelfExecutorPRocessControl into alignment with SimpleRemoteEPC, which was
updated in 6613f4aff85.

2 years agoSpeculatively fix the test bots
Aaron Ballman [Tue, 25 Oct 2022 15:34:46 +0000 (11:34 -0400)]
Speculatively fix the test bots

This should hopefully fix the issues found on Linux hosts like:
https://lab.llvm.org/buildbot#builders/109/builds/49321
https://lab.llvm.org/buildbot/#/builders/139/builds/30061

2 years ago[mlgo] More wildcarding in extra features logging for regalloc
Mircea Trofin [Tue, 25 Oct 2022 15:19:58 +0000 (08:19 -0700)]
[mlgo] More wildcarding in extra features logging for regalloc

May need a different testing approach for opcodes.

2 years ago[OpenMP] [OMPIRBuilder] Create a new datatype to hold the unique target region info
Jan Sjodin [Mon, 24 Oct 2022 13:36:30 +0000 (09:36 -0400)]
[OpenMP] [OMPIRBuilder] Create a new datatype to hold the unique target region info

This patch puts the individual target region information attributes into a
struct so that the nested mappings are not needed and passing the information
around is simplified.

Reviewed By: jdoerfert, mikerice

Differential Revision: https://reviews.llvm.org/D136601

2 years agoAdd more C99 DR test cases and update the status page
Aaron Ballman [Tue, 25 Oct 2022 15:13:55 +0000 (11:13 -0400)]
Add more C99 DR test cases and update the status page

This mostly completes the C99 set of DRs, though there are a few still
marked as "unknown".

2 years ago[mlir] Add lower-to-loops tests for linalg.map/reduce/transpose.
Alexander Belyaev [Tue, 25 Oct 2022 15:05:40 +0000 (17:05 +0200)]
[mlir] Add lower-to-loops tests for linalg.map/reduce/transpose.

Differential Revision: https://reviews.llvm.org/D136691

2 years ago[mlir] Add vectorization tests for linalg.map,reduce,transpose.
Alexander Belyaev [Tue, 25 Oct 2022 15:04:44 +0000 (17:04 +0200)]
[mlir] Add vectorization tests for linalg.map,reduce,transpose.

Differential Revision: https://reviews.llvm.org/D136688

2 years ago[llvm-lit][test] Fix regex to capture scientific notation
gbreynoo [Tue, 25 Oct 2022 14:29:58 +0000 (15:29 +0100)]
[llvm-lit][test] Fix regex to capture scientific notation

We were seeing an intermittent local test failure of
utils\lit\tests\test-output.py in which the elapsed time output was
being given in scientific notation. Python automatically represents
small floating-point values in scientific notation so I have altered
these tests regex to capture output in that format.

Differential Revision: https://reviews.llvm.org/D136469

2 years ago[InstCombine] Fold series of instructions into mull for more types
zhongyunde [Tue, 25 Oct 2022 15:02:08 +0000 (23:02 +0800)]
[InstCombine] Fold series of instructions into mull for more types

Relax the constraint of wide/vectors types.
Address the comment https://reviews.llvm.org/D136015?id=469189#inline-1314520

Reviewed By: spatel, chfast
Differential Revision: https://reviews.llvm.org/D136661

2 years ago[LLDB] Fix RISCV build
Emmmer [Tue, 25 Oct 2022 11:18:24 +0000 (19:18 +0800)]
[LLDB] Fix RISCV build

After https://reviews.llvm.org/D135670

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D136674

2 years ago[X86] combineConcatVectorOps - fold v4i64/v8x32 concat(broadcast(),broadcast()) ...
Simon Pilgrim [Tue, 25 Oct 2022 14:34:23 +0000 (15:34 +0100)]
[X86] combineConcatVectorOps - fold v4i64/v8x32 concat(broadcast(),broadcast()) -> permilps(concat())

Extend the existing v4f64 fold to handle v4i64/v8f32/v8i32 as well

Fixes #58585

2 years ago[lit][REQUIRES] Fix llvm-debuginfod.test so it will run
Paul Robinson [Mon, 24 Oct 2022 16:13:17 +0000 (09:13 -0700)]
[lit][REQUIRES] Fix llvm-debuginfod.test so it will run

The test was added in D114846 but missed one place to introduce the
'httplib' feature keyword, so it has been UNSUPPORTED everywhere.

Differential Revision: https://reviews.llvm.org/D136613

2 years ago[gn build] Port a3be778ed09b
LLVM GN Syncbot [Tue, 25 Oct 2022 14:17:26 +0000 (14:17 +0000)]
[gn build] Port a3be778ed09b

2 years ago[gn build] Port 791fe26d7581
LLVM GN Syncbot [Tue, 25 Oct 2022 14:17:24 +0000 (14:17 +0000)]
[gn build] Port 791fe26d7581

2 years ago[DebugInfo] getMergedLocation: Maintain the line number if they match
Juan Manuel MARTINEZ CAAMAÑO [Tue, 25 Oct 2022 07:29:30 +0000 (07:29 +0000)]
[DebugInfo] getMergedLocation: Maintain the line number if they match

getMergedLocation returns a 'line 0' DILocaiton if the two locations
being merged don't perfecly match, even if they are in the same line but
a different column.

This commit adds support to keep the line number if it matches (but only
the column differs). The merged column number is the leftmost between the
two.

Reviewed By: dblaikie, orlando

Differential Revision: https://reviews.llvm.org/D135166

2 years ago[AMDGPU] Use Register in more places in SIInstrInfo. NFC.
Jay Foad [Tue, 25 Oct 2022 13:47:35 +0000 (14:47 +0100)]
[AMDGPU] Use Register in more places in SIInstrInfo. NFC.

Also avoid using AMDGPU::NoRegister when it's not neeeded.

2 years ago[X86] Add v4i64 test coverage for #58585
Simon Pilgrim [Tue, 25 Oct 2022 14:02:59 +0000 (15:02 +0100)]
[X86] Add v4i64 test coverage for #58585

Turns out we fail to do this for concat_v4i64(broadcast_v2i64,broadcast_v2i64) as well

2 years ago[AArch64][ARM] Alter v8.3a complex neon intrinsics to be target-based, not preprocess...
David Green [Tue, 25 Oct 2022 13:35:11 +0000 (14:35 +0100)]
[AArch64][ARM] Alter v8.3a complex neon intrinsics to be target-based, not preprocessor based

This alters the 8.3 complex intrinsics to be target-gated, as opposed to
hidden behind preprocessor macros. This is the last of arm_neon.h, and
follows the same formula as before.

Differential Revision: https://reviews.llvm.org/D135647

2 years ago[X86] Add test coverage for #58585
Simon Pilgrim [Tue, 25 Oct 2022 13:33:43 +0000 (14:33 +0100)]
[X86] Add test coverage for #58585

2 years ago[mlir][llvm] Don't return a dangling reference in getCallableResults().
Johannes de Fine Licht [Tue, 25 Oct 2022 12:52:59 +0000 (15:52 +0300)]
[mlir][llvm] Don't return a dangling reference in getCallableResults().

Use the `getReturnTypes()` API (which returns an `ArrayRef<Type>`)
rather than the `getReturnType()` API (which returns a `Type`) to avoid
returning a dangling reference in `LLVMFuncOp::getCallableResults()`.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136669

2 years ago[X86] Fold vbroadcast(bitcast(vbroadcast(src))) -> bitcast(vbroadcast(vbroadcast...
Simon Pilgrim [Tue, 25 Oct 2022 13:03:35 +0000 (14:03 +0100)]
[X86] Fold vbroadcast(bitcast(vbroadcast(src))) -> bitcast(vbroadcast(vbroadcast(src)))

If the inner broadcast scalar type is smaller/same width as the outer broadcast scalar type then we can broadcast using the same inner type directly. Works for vbroadcast_load as well.

2 years ago[LLDB] [LoongArch] Add minimal LoongArch support
Tiezhu Yang [Tue, 25 Oct 2022 12:19:06 +0000 (12:19 +0000)]
[LLDB] [LoongArch] Add minimal LoongArch support

Add as little code as possible to allow compiling lldb on LoongArch.
Actual functionality will be implemented later.

Reviewed By: SixWeining, DavidSpickett

Differential Revision: https://reviews.llvm.org/D136578

2 years agoRevert "[PGO] Make emitted symbols hidden"
Nico Weber [Tue, 25 Oct 2022 12:54:47 +0000 (08:54 -0400)]
Revert "[PGO] Make emitted symbols hidden"

This reverts commit 04877284b4592e9286cab43467662c1b4ff81861.
Looks like this is still breaking the test
Profile-x86_64 :: instrprof-darwin-dead-strip.c
(see comment on https://reviews.llvm.org/D135340).

2 years ago[LLDB][Docs][NFC] Fix formatting in -gmodules documentation
Michael Buch [Tue, 25 Oct 2022 11:32:49 +0000 (12:32 +0100)]
[LLDB][Docs][NFC] Fix formatting in -gmodules documentation

2 years ago[LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV
Emmmer [Thu, 20 Oct 2022 15:05:37 +0000 (23:05 +0800)]
[LLDB][RISCV] Add RV64C instruction support for EmulateInstructionRISCV

Add:

- RV64C instructions sets.
- corresponding unittests.
- `c.break` code for lldb and lldb-server

Fix:
- wrong decoding of imm in `DecodeSType`

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D136362

2 years ago[libc] Switch to new implementation of mem* functions
Guillaume Chatelet [Mon, 24 Oct 2022 13:10:53 +0000 (13:10 +0000)]
[libc] Switch to new implementation of mem* functions

The new framework makes it explicit which processor feature is being
used and allows for easier per platform customization:
 - ARM cpu now uses trivial implementations to reduce code size.
 - Memcmp, Bcmp and Memmove have been optimized for x86
 - Bcmp has been optimized for aarch64.

This is a reland of https://reviews.llvm.org/D135134 (b3f1d58)

Differential Revision: https://reviews.llvm.org/D136595

2 years ago[clang][ExtractAPI] Allow users to specify a list of symbols to ignore
Daniel Grumberg [Fri, 21 Oct 2022 13:49:46 +0000 (14:49 +0100)]
[clang][ExtractAPI] Allow users to specify a list of symbols to ignore

Adds a `--extract-api-ignores=` command line option that allows users to
provide a file containing a new line separated list of symbols to
unconditionally ignore when extracting API information.

Differential Revision: https://reviews.llvm.org/D136450

2 years ago[AArch64][SVE2] Add the SVE2.1 signed and unsigned 2-way dot instructions
David Sherwood [Wed, 19 Oct 2022 13:59:58 +0000 (13:59 +0000)]
[AArch64][SVE2] Add the SVE2.1 signed and unsigned 2-way dot instructions

This patch adds the assembly/disassembly for the following instructions:

SDOT : Signed integer 2-way dot product indexed and non-indexed
UDOT : Unsigned integer 2-way dot product, indexed and non-indexed

The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09

Differential Revision: https://reviews.llvm.org/D136464

2 years ago[LLDB] Add missing breaks to current frame row in command map
David Spickett [Tue, 25 Oct 2022 10:19:29 +0000 (10:19 +0000)]
[LLDB] Add missing breaks to current frame row in command map

Without these it was rendering as one line for all three commands.

2 years ago[Clang][AArch64] Add TargetParser support for defining CPU aliases
Sjoerd Meijer [Mon, 24 Oct 2022 15:32:26 +0000 (21:02 +0530)]
[Clang][AArch64] Add TargetParser support for defining CPU aliases

This adds AArch64 TargetParser support to define CPU aliases, and
ports the definition of Grace over to that. This is following up
on D136425.

Differential Revision: https://reviews.llvm.org/D136611

2 years ago[AArch64] Add precommit test for bcmp; NFC
chenglin.bi [Tue, 25 Oct 2022 09:23:03 +0000 (17:23 +0800)]
[AArch64] Add precommit test for bcmp; NFC

2 years ago[clang-format] Move bracket to correct line.
Adrian Kuegel [Tue, 25 Oct 2022 09:04:59 +0000 (11:04 +0200)]
[clang-format] Move bracket to correct line.

2 years ago[AArch64][SVE] Use more flag-setting instructions
Cullen Rhodes [Tue, 25 Oct 2022 08:29:09 +0000 (08:29 +0000)]
[AArch64][SVE] Use more flag-setting instructions

If OP in PTEST(PG, OP(PG, ...)) has a flag-setting variant change the
opcode so the PTEST becomes redundant. This patch extends this existing
optimization in AArch64::optimizePTestInstr to cover all flag-setting
opcodes.

Reviewed By: peterwaller-arm

Differential Revision: https://reviews.llvm.org/D136083

2 years ago[AArch64][SVE] NFC: extend tests for flag-setting predicate instructions
Cullen Rhodes [Tue, 25 Oct 2022 08:28:12 +0000 (08:28 +0000)]
[AArch64][SVE] NFC: extend tests for flag-setting predicate instructions

A follow on patch will extend existing

  PTEST(PG, OP(PG, ...)) -> OP_FLAG_SETTING(PG, ...)

optimization in AArch64InstrInfo::optimizePTestInstr to cover more of
the flag-setting instructions

Reviewed By: peterwaller-arm

Differential Revision: https://reviews.llvm.org/D136161