Ben Shi [Fri, 31 Mar 2023 04:02:28 +0000 (12:02 +0800)]
[LoongArch][NFC] Add tests of multiplication with immediates (for D147305)
Reviewed By: SixWeining
Differential Revision: https://reviews.llvm.org/D147304
Simon Pilgrim [Sat, 1 Apr 2023 10:08:13 +0000 (11:08 +0100)]
[X86] Refactor MatchVectorAllZeroTest -> MatchVectorAllEqualTest
Refactor MatchVectorAllZeroTest to work with allof/anyof/noneof comparisons with -1 as well as 0, and use it handle icmp(bitcast(icmp_eq(X,Y)),-1) reduction patterns.
We're still missing test coverage for other other reduction types, so have kept these limited to icmp X,0 for now.
Shoaib Meenai [Sat, 1 Apr 2023 09:22:17 +0000 (02:22 -0700)]
[asan] Fix Darwin runtimes compilation
It was failing because of size_t being unknown. I was going to just pull
in stddef.h, but the callback using size_t is only used for Linux and
NetBSD, so limit its definition to those platforms as well.
Hristo Hristov [Sun, 26 Mar 2023 09:00:18 +0000 (12:00 +0300)]
[libc++][spaceship[NFC] P1614R2 `operator<=>` moves misplaced tests to correct location
P1614R2:
- Moved misplaced tests from `libcxx/test/libcxx` to `libcxx/test/std`
- Updated status page `SpaceshipProjects.csv`: `operator<=>` implementation status
Related docs:
- https://eel.is/c++draft/
- https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2019/p1614r2.html
Reviewed By: #libc, philnik
Differential Revision: https://reviews.llvm.org/D146902
Phoebe Wang [Sat, 1 Apr 2023 06:20:01 +0000 (14:20 +0800)]
[Windows SEH] Fix catch+return crash for Windows -EHa
This change also turns on -fasync-exceptions by default under -EHa
option due to the backend patch merged.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D147165
Kazu Hirata [Sat, 1 Apr 2023 06:50:17 +0000 (23:50 -0700)]
[Scalar] Use SmallPtrSet::contains (NFC)
Craig Topper [Sat, 1 Apr 2023 06:35:43 +0000 (23:35 -0700)]
[TableGen] Simplify some code. NFC
This code was creating 1 entry or 0 entry std::array to pass to
to ArrayRef arguments. ArrayRef has a constructor from a single
object and we can use std::nullopt for an empty ArrayRef.
Craig Topper [Sat, 1 Apr 2023 05:54:10 +0000 (22:54 -0700)]
[TableGen] Reduce code duplication. NFC
Yi Kong [Fri, 31 Mar 2023 08:07:47 +0000 (16:07 +0800)]
[BOLT][NFC] Simplify code using std::optional
Use std::optional instead of tracking if it is the first profile seen.
Differential Revision: https://reviews.llvm.org/D147308
Ben Shi [Fri, 31 Mar 2023 09:59:31 +0000 (17:59 +0800)]
[RISCV][NFC] Simplify PatFrag mul_const_oneuse
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D147309
Sanjeet Karan Singh [Sat, 1 Apr 2023 03:36:34 +0000 (20:36 -0700)]
asan_memory_profile: Fix for deadlock in memory profiler code.
Wrapping stopTheWorld in dl_iterate_phdr acquire dl_load lock before
calling the function. Acquiring dl_load, allocator and thread registry
locks before calling stopTheWorld ensures no other threads are holding
that locks, we can safely suspend them and reenter in tracer thread.
LockStuffAndStopTheWorld's logic here is same as lsan's implementation
of this function.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D146990
Lang Hames [Sat, 1 Apr 2023 03:31:16 +0000 (20:31 -0700)]
[ORC][MachO] __objc_imageinfo isn't a MachO "object platform section".
Commit
2666231d173 fixed a typo ("__objc_image_info" was corrected to
"__objc_imageinfo"), but this has exposed a bug where we were adding this
section to the list of platform sections to register with the ORC runtime.
The ORC runtime's MachO "object platform section" code doesn't recognize
this section (it's handled elsewhere) and errors out on it.
The solution is simply to remove __objc_imageinfo from the list of sections
to register in MachOPlatform::PlatformPlugin::registerObjectPlatformSections.
Lang Hames [Sat, 1 Apr 2023 02:27:01 +0000 (19:27 -0700)]
[ORC] Prefer SectionRange::getRange convenience method.
Lang Hames [Sat, 1 Apr 2023 01:56:20 +0000 (18:56 -0700)]
[ORC] Remove more unnecessary ExecutorAddr::getValue calls.
Lang Hames [Sat, 1 Apr 2023 00:51:01 +0000 (17:51 -0700)]
[ORC] Remove redundant ExecutorAddr temporaries.
Most ORC APIs work with ExecutorAddr by default since
8b1771bd9f3, so we don't
need to wrap these values in ExecutorAddr(...) calls any more.
Peter Rong [Tue, 13 Dec 2022 00:33:19 +0000 (16:33 -0800)]
[FuzzMutate] introduce vector operations, select and fneg into InstInjectorStrategy
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D139894
Brad Smith [Sat, 1 Apr 2023 00:21:12 +0000 (20:21 -0400)]
[OHOS] Remove redundant IsIntegratedAssemblerDefault. NFC
It is already enabled.
Owen Pan [Wed, 29 Mar 2023 04:59:05 +0000 (21:59 -0700)]
[clang-format] Add MinDigits suboptions to IntegerLiteralSeparator
Closes #61209.
Differential Revision: https://reviews.llvm.org/D147111
Lang Hames [Sat, 1 Apr 2023 00:07:19 +0000 (17:07 -0700)]
[ORC] Simplify some ExecutorAddr uses by removing getValue and formatv.
Nico Weber [Sat, 1 Apr 2023 00:10:48 +0000 (20:10 -0400)]
[gn] Port
a52054cfa29d more
Nico Weber [Sat, 1 Apr 2023 00:08:26 +0000 (20:08 -0400)]
Cyndy Ishida [Fri, 31 Mar 2023 23:20:40 +0000 (16:20 -0700)]
[llvm][TextAPI] compare deployment versions for equality check
V Donaldson [Fri, 31 Mar 2023 16:36:16 +0000 (09:36 -0700)]
[flang] IO condition specfier control flow
Execution of a statement such as
read(internal,*,err=666,iostat=stat) k
that terminates with an END or EOR condition must not take the ERR branch.
Jonas Devlieghere [Fri, 31 Mar 2023 23:27:04 +0000 (16:27 -0700)]
[dsymutil] Disable 'auto' verification as the default
Don't make 'auto' verification the default when assertions or expensive
checks are enabled while I investigate the test failures on the bots.
Aiden Grossman [Fri, 31 Mar 2023 23:22:15 +0000 (23:22 +0000)]
[llvm-mc] Fix line_end_with_space.test
Currently, this test doesn't test what it was originally intended to
(that lvm-mc doesn't crash when disassembling a line that ends with a
space). This patch readds the space to the input so that this
functionality is actually tested and adds a comment describing what the
test does. The space seems to have been inadvertently removed in
c8d578311473fceb50579906658b0c017ef5b193 and then never added back
in.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D147207
Owen Pan [Fri, 31 Mar 2023 03:16:52 +0000 (20:16 -0700)]
[clang-format] Don't misannotate left squares as lambda introducers
A left square can start a lambda only if it's not preceded by an
identifier other than return and co-wait/co-yield/co-return.
Fixes #54245.
Fixes #61786.
Differential Revision: https://reviews.llvm.org/D147295
Dave Lee [Thu, 8 Dec 2022 18:31:16 +0000 (10:31 -0800)]
[clang] Set ShowInSystemHeader for module-build and module-import remarks
Without this change, the use of `-Rmodule-build` and `-Rmodule-import` only
produces diagnostics for modules built or imported by non-system code.
For example, if a project source file requires the Foundation module to be
built, then `-Rmodule-build` will show a single diagnostic for Foundation, but
not in turn for any of Foundation's (direct or indirect) dependencies. This is
because the locations of those transitive module builds are initiated from
system headers, which are ignored by default. When wanting to observe module
building/importing, the system modules can represent a significant amount of
module diagnostics, and I think should be shown by default when
`-Rmodule-build` and `-Rmodule-import` are specified.
I noticed some other remarks use `ShowInSystemHeader`.
Differential Revision: https://reviews.llvm.org/D139653
Peiming Liu [Fri, 31 Mar 2023 21:17:57 +0000 (21:17 +0000)]
[mlir][sparse] support sparse bufferization.alloc_tensor with copy argument.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D147358
Min-Yih Hsu [Fri, 31 Mar 2023 21:46:39 +0000 (14:46 -0700)]
[M68k] Add AssemblerPredicate to existing `AtLeast680x0` predicates
And refactor how `AtLeast680x0` are defined. This is essentially NFC.
Alex Langford [Fri, 31 Mar 2023 21:42:49 +0000 (14:42 -0700)]
[debugserver] Fix ARM64 logs
DNBArchImplARM64.cpp had a ton of logs referring to DNBArchMachARM and
one log referring to DNBArchMachX86_64. I've changed these all to ARM64.
Jonas Devlieghere [Fri, 31 Mar 2023 21:23:56 +0000 (14:23 -0700)]
[dsymutil] Remove spurious newline in warning
Remove spurious newline at the end of the warning about not being able
to open a binary.
Alexey Bataev [Fri, 31 Mar 2023 19:29:45 +0000 (12:29 -0700)]
[SLP]Fix PR61835: Assertion `I->use_empty() && "trying to erase
instruction with users."' failed.
If the externally used scalar is part of the tree and is replaced by
extractelement instruction, need to add generated extractelement
instruction to the list of the ExternallyUsedValues to avoid deletion
during vectorization.
Md Abdullah Shahneous Bari [Fri, 31 Mar 2023 21:02:25 +0000 (14:02 -0700)]
[mlir][spirv] Add OpExtension "SPV_INTEL_bfloat16_conversion"
Add Intel-specific "SPV_INTEL_bfloat16_conversion" extension and
capability (Bfloat16ConversionINTEL), and
two ops (OpConvertFToBF16INTEL, OpConvertBF16ToFINTEL)
that are introduced by this extension.
These ops allow BF16 to Float conversion and vice-versa.
Reference Specification:
https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_bfloat16_conversion.asciidoc
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D147087
Florian Hahn [Fri, 31 Mar 2023 20:50:39 +0000 (21:50 +0100)]
[LV] Improve test added in
74dee4791a2.
Adjust test so it triggers a case missed in the original version
of D147260.
Alex Langford [Tue, 28 Mar 2023 21:00:13 +0000 (14:00 -0700)]
[lldb] Move ObjectFileJIT to lldbExpression
In the spirit of not having lldbExpression rely on plugins, this move
makes the most sense. ObjectFileJIT is not really a "plugin" in the
sense that without it, expression evaluation doesn't work at all. This
is different than something like ObjectFileELF where lldb can still
technically debug non-ELF targets without it. For that reason, moving
ObjectFileJIT into Expression where it will be used in conjunction with
IRExecutionUnit makes the most sense.
Differential Revision: https://reviews.llvm.org/D147084
Mingming Liu [Fri, 31 Mar 2023 04:55:41 +0000 (21:55 -0700)]
[AutoFDO]Merge called target in body samples when flattening profiles
- Body samples could have call targets, merge them as well.
Differential Revision: https://reviews.llvm.org/D147297
Florian Hahn [Fri, 31 Mar 2023 20:15:13 +0000 (21:15 +0100)]
[LV] Add test with predicated load where EltSize % Align != 0.
Craig Topper [Fri, 31 Mar 2023 20:08:10 +0000 (13:08 -0700)]
[RISCV] Add named constants for rounding mode to tablegen. NFC
Instead of hardcoding the values, uses name constants to improve
readability.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D147352
Craig Topper [Fri, 31 Mar 2023 20:06:26 +0000 (13:06 -0700)]
[RISCV] Collapse loadfp32imm/loadfp64imm/loadfp16imm to a single Operand in tablegen
They were identical except for the type passed to Operand, but
I don't think that type is used for anything with the way its
being used today.
Simon Pilgrim [Fri, 31 Mar 2023 20:09:57 +0000 (21:09 +0100)]
[X86] vector-reduce-and-bool.ll - add AVX1OR2 check-prefix and make AVX a common check-prefix
Simon Pilgrim [Fri, 31 Mar 2023 19:54:22 +0000 (20:54 +0100)]
[X86] vector-compare-all_of.ll - add AVX1OR2 check-prefix and make AVX a common check-prefix
Joseph Huber [Fri, 31 Mar 2023 17:26:56 +0000 (12:26 -0500)]
[OpenMP] Add CMake option to disable `libarcher` support
The support for `libarcher` can sometimes cause problems when running
tests or building. We want an option to turn this off when we are not
directly testing `libarcher`.
Reviewed By: jplehr
Differential Revision: https://reviews.llvm.org/D147343
Philip Reames [Fri, 31 Mar 2023 19:41:21 +0000 (12:41 -0700)]
{tests] Rerun autogen to reduce a diff [nfc]
Siva Chandra Reddy [Fri, 31 Mar 2023 19:36:18 +0000 (19:36 +0000)]
[libc][Obvious] Add a missing dep and fix an incorrect dep.
Jun Sha (Joshua) [Fri, 31 Mar 2023 19:15:05 +0000 (12:15 -0700)]
[RISCV] Fix Zfa fceil/ffloor codegen bugs
D143982 confused ceil and floor. Ceil should use fround instructions with 'rup' and floor should use 'rdn'.
Differential Revision: https://reviews.llvm.org/D146516
Craig Topper [Fri, 31 Mar 2023 18:57:31 +0000 (11:57 -0700)]
[RISCV] Fix formatting in RISCVInstrInfoZfa.td. NFC
Extracted from D146516.
Haowei Wu [Fri, 31 Mar 2023 18:27:18 +0000 (11:27 -0700)]
Revert "[Assignment Tracking] Enable by default"
This reverts commit
aa32490bfe0b957c4f5583e14304f5e34b2b9bce, which
breaks llvm runtimes builds on armv7 linux.
Lang Hames [Fri, 31 Mar 2023 04:57:03 +0000 (21:57 -0700)]
[ORC] Fix a typo in __objc_imageinfo section name.
Lang Hames [Fri, 31 Mar 2023 04:53:35 +0000 (21:53 -0700)]
[JITLink] Fix bug in LinkGraph::createMutableContentBlock overload.
Creating zero-filled blocks should use allocateBuffer to allocate the block's
content buffer, rather than allocateContent. (allocateContent interpreted what
would have been the size argument as a single-element ArrayRef and allocated a
single byte).
Simon Pilgrim [Fri, 31 Mar 2023 17:35:31 +0000 (18:35 +0100)]
[DAG] Add SelectionDAG::SplitScalar helper
Similar to the existing SelectionDAG::SplitVector helper, this helper creates the EXTRACT_ELEMENT nodes for the LO/HI halves of the scalar source.
Differential Revision: https://reviews.llvm.org/D147264
Benjamin Kramer [Fri, 31 Mar 2023 17:31:25 +0000 (19:31 +0200)]
[bazel] Add missing dependency after
9884eb149e612
Jez Ng [Fri, 31 Mar 2023 17:19:48 +0000 (13:19 -0400)]
[lld-macho] Gate category checking behind --check-category-conflicts
@oontvoo reports that the current implementation crashes on a bunch of
their builds. Let's leave it disabled by default for now.
Reviewed By: #lld-macho, oontvoo
Differential Revision: https://reviews.llvm.org/D147341
wlei [Fri, 31 Mar 2023 17:15:51 +0000 (10:15 -0700)]
Fix a missing checksum field
Leonard Chan [Fri, 31 Mar 2023 17:03:18 +0000 (17:03 +0000)]
"Reland "[hwasan] Provide aliases for c allocation functions for Fuchsia"
This reverts commit
7b6c0ce9c6c1e2cc3076e787e0e8d9a43bc2bfcc.
See if this works on the android builder this time by keeping the
original WRAP declaration.
Guozhi Wei [Fri, 31 Mar 2023 16:58:41 +0000 (16:58 +0000)]
[AARCH64] Enable STORE of v4i8 to help more vectorization opportunities
For the attached test case, currently llvm generates instructions to load/or/store the bytes one by one. Although NEON doesn't support v4i8 natively, we can promote it to v4i16 and operate on v4i16 vectors. So this patch override getStoreMinimumVF and specify the minimum VF for i8 vector is v4i8.
Differential Revision: https://reviews.llvm.org/D145614
Jonas Devlieghere [Fri, 31 Mar 2023 16:45:06 +0000 (09:45 -0700)]
[dsymutil] Add a new automatic verification mode
This patch a new verification mode called "auto" that runs the DWARF
verifier on the input and if the input is valid, also runs the DWARF
verifier on the output. The goal is to catch cases where dsymutil turns
valid DWARF into invalid DWARF. This patch makes this verification mode
the default when assertions or expensive checks are enabled.
Differential revision: https://reviews.llvm.org/D147203
Ben Langmuir [Thu, 30 Mar 2023 22:47:53 +0000 (15:47 -0700)]
[clang][deps] Remove -coverage-data-file and -coverage-notes-file from modules
When not performing codegen, we can strip the coverage-data-file and
coverage-notes-file options to improve canonicalization.
rdar://
107443796
Differential Revision: https://reviews.llvm.org/D147282
Jonas Devlieghere [Fri, 31 Mar 2023 00:43:18 +0000 (17:43 -0700)]
[dwarfdump] Fix .debug_line verification for DWARF 5
DWARF 5 uses a 0-based index while previous versions use a 1-based
index. Fix the verifier and add a test.
Differential revision: https://reviews.llvm.org/D147202
Oleg Shyshkov [Thu, 30 Mar 2023 21:18:21 +0000 (23:18 +0200)]
[mlir][scf] Create constants for tiling in parent with isolated region.
FuncOp is IsolatedFromAbove, so this change doesn't alter current behaviour, but the current code fails if the tile op is in an op with IsolatedFromAbove trait.
An alternative would be to create constant in the same region where they're used a rely on CSE to figure out where to move them.
Differential Revision: https://reviews.llvm.org/D147273
Mikhail R. Gadelha [Fri, 31 Mar 2023 16:21:23 +0000 (13:21 -0300)]
[libc] Enable more headers for riscv
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D146203
Mikhail R. Gadelha [Fri, 31 Mar 2023 15:58:58 +0000 (12:58 -0300)]
[RISCV] Lower inline asm m with offset to register+imm.
As part of D145584, we noticed that llvm was generating suboptimal code
for constraint m when the operand can be be lowered to reg+imm form: it
was being selected as a single register rather than register+imm. This
caused an unnecessary 'addi' to be gen for each m constraint.
This patch changes llvm to select register+imm. This might generate code
that cannot be assembled, but matches gcc's behavior.
Reviewed By: craig.topper, kito-cheng
Differential Revision: https://reviews.llvm.org/D146245
LLVM GN Syncbot [Fri, 31 Mar 2023 16:12:58 +0000 (16:12 +0000)]
[gn build] Port
a084854266ca
Philip Reames [Fri, 31 Mar 2023 15:49:44 +0000 (08:49 -0700)]
[LV] Add tests for non-constant stride pointer inductions
Reduced from the case which triggered the revert of
498aa534f472, and then generalized to cover both expansion paths.
Piotr Zegar [Fri, 31 Mar 2023 15:28:12 +0000 (15:28 +0000)]
[clang-tidy] Add readability-operators-representation check
Check helps enforce consistent token representation for binary, unary and
overloaded operators in C++ code. The check supports both traditional and
alternative representations of operators.
Reviewed By: carlosgalvezp
Differential Revision: https://reviews.llvm.org/D144522
Roy Sundahl [Thu, 23 Mar 2023 17:53:11 +0000 (10:53 -0700)]
[sanitizers] Explainer about dyld and weak overrides on Darwin. (NFC)
Explain in the release notes that the Darwin dynamic linker (dyld) requires
that at least one weak symbol be present in any mach-o file that defines an
intended override of a sanitizer dylib weak reference.
rdar://
103453678
Reviewed By: thetruestblue
Differential Revision: https://reviews.llvm.org/D146745
Roy Sundahl [Thu, 23 Mar 2023 15:49:43 +0000 (08:49 -0700)]
[utils] Give git a dummy email address when cherry picking.
Git wants an email address these days. (Also a nit typo.)
Reviewed By: XiaodongLoong
Differential Revision: https://reviews.llvm.org/D146728
Jay Foad [Fri, 31 Mar 2023 15:47:03 +0000 (16:47 +0100)]
[PowerPC] Fix UNSUPPORTED syntax in addr-label.ll
Alex Brachet [Fri, 31 Mar 2023 15:18:35 +0000 (15:18 +0000)]
[libc] Fix UBSan error after D147171
Differential Revision: https://reviews.llvm.org/D147258
Nikita Popov [Fri, 31 Mar 2023 14:56:56 +0000 (16:56 +0200)]
[ValueTracking] Fix incorrect computeConstantRange() arguments
The second argument is ForSigned, not UseInstrInfo.
Nikita Popov [Fri, 31 Mar 2023 14:54:45 +0000 (16:54 +0200)]
[InstCombine] Add extra test for non-overflowing usub.sat (NFC)
Same as the existing one, but with both nuw and nsw on the add.
Jie Fu [Fri, 31 Mar 2023 14:52:46 +0000 (22:52 +0800)]
[InstCombine] Fix -Wimplicit-fallthrough in InstCombinerImpl::visitCallInst (NFC)
/data/llvm-project/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp:3078:3: error: unannotated fall-through between switch labels [-Werror,-Wimplicit-fallthrough]
default:
^
/data/llvm-project/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp:3078:3: note: insert 'break;' to avoid fall-through
default:
^
break;
1 error generated.
Simon Pilgrim [Fri, 31 Mar 2023 14:44:41 +0000 (15:44 +0100)]
[X86] MatchVectorAllZeroTest - add support for icmp(bitcast(icmp_ne(X,Y)),0) vector reduction patterns
Many allof/anyof/noneof reduction patterns are canonicalized by bitcasting a vXi1 vector comparison result to iN and compared against 0/-1.
This patch adds support for recognizing a icmp_ne vector comparison against 0, which matches an 'whole vectors are equal' comparison pattern.
There are a few more steps to follow in future patches - we need to add support to MatchVectorAllZeroTest for comparing against -1 (in some cases), and this initial refactoring of LowerVectorAllZero to LowerVectorAllEqual needs to be extended so we can fully merge with the similar combineVectorSizedSetCCEquality code (which deals with scalar integer memcmp patterns).
Another step towards Issue #53419
Differential Revision: https://reviews.llvm.org/D147243
Stefan Pintilie [Fri, 31 Mar 2023 14:14:29 +0000 (10:14 -0400)]
[NFC][PowerPC] Marked the addr-label.ll test unsupported on PowerPC.
The addr-label.ll test uses the following setup:
define ptr @test1() nounwind {
entry:
ret ptr blockaddress(@test1b, %test_label)
}
define i32 @test1b() nounwind {
entry:
ret i32 -1
test_label:
br label %ret
ret:
ret i32 -1
}
However, according to the LLVM Reference guide for blockaddress()
"This value only has defined behavior when used as an operand to the
‘indirectbr’ or for comparisons against null." For this test the value
is just returned as a pointer from test1().
On PowerPC this test has unreliable results as the order in which
passes are run can make this test pass or fail. If the %test_label
in test1b() is removed before a number of passes are completed on
test1() then this test will fail on PowerPC.
I have marked this test as UNSUPPORTED on PowerPC.
David Green [Fri, 31 Mar 2023 14:38:27 +0000 (15:38 +0100)]
[InterleaveAccess] Check that binop shuffles have an undef second operand
It is expected that shuffles that we hoist through binops only have a single
vector operand, the other being undef/poison. The checks for
isDeInterleaveMaskOfFactor check that all the elements come from inside the
first vector, but with non-canonical shuffles the second operand could still
have a value. Add a quick check to make sure it is UndefValue as expected, to
make sure we don't run into problems with BinOpShuffles not using BinOps.
Fixes #61749
Differential Revision: https://reviews.llvm.org/D147306
Nikita Popov [Fri, 31 Mar 2023 11:27:02 +0000 (13:27 +0200)]
[InstCombine] Fold more intrinsics over selects
Move this handling to a centralized place and extend it to handle
saturating add/sub intrinsics.
I originally wanted to make this fully generic rather than
whitelist based, because this is legal and likely profitable for all
speculatable intrinsics. The caveat is that for vector selects,
the intrinsic can't perform cross-lane operations like a shuffle
or reduction, which we don't really expose as a generic property
right now. So for now I'm just extending the list.
Timm Bäder [Thu, 26 Jan 2023 13:07:46 +0000 (14:07 +0100)]
[clang][Interp] Check This pointer without creating InterpFrame
The InterpFrame was only created so early so we could use getThis().
However, we need to know the Function when creating the InterpFrame and
in the case of virtual functions, we need to determine what function to
call at interpretation time.
Get the This pointer ourselves and just create the InterpFrame later.
Differential Revision: https://reviews.llvm.org/D142617
Nikita Popov [Fri, 31 Mar 2023 14:09:23 +0000 (16:09 +0200)]
[InstCombine] Add additional test cases for folding intrinsic into select (NFC)
Test cross-lane intrinsics with vector selects.
Nikita Popov [Fri, 31 Mar 2023 14:10:30 +0000 (16:10 +0200)]
[InstCombine] Regenerate test checks (NFC)
Qiongsi Wu [Fri, 31 Mar 2023 13:47:07 +0000 (09:47 -0400)]
[AIX][CodeGen] Renaming mroptr to xcoff-mroptr
This patch renames the `mroptr` option to `mxcoff-roptr` to indicate in the option itself that it is xcoff specific.
Reviewed By: hubert.reinterpretcast
Differential Revision: https://reviews.llvm.org/D147161
Jay Foad [Thu, 30 Mar 2023 16:31:33 +0000 (17:31 +0100)]
[AMDGPU] Don't bother to use OffsetMode to define Real SMEM instructions
Various Real classes took an OffsetMode parameter, but only used it
to extract the suffix for the name of the corresponding pseudo. I found
this confusing because you couldn't usefully define and use a different
OffsetMode here, e.g. one with different operand types to affect how the
instruction was printed.
Overall I think it's simpler to just pass in the suffixed pseudo name
directly.
Differential Revision: https://reviews.llvm.org/D147242
Jay Foad [Wed, 29 Mar 2023 14:11:08 +0000 (15:11 +0100)]
[AMDGPU] Do not reserve 16-bit registers
There should be no need to reserve all SGPR hi16/lo16 halves, or all
AGPR hi16 halves. This should be done by marking the corresponding
register classes as not allocatable instead.
Differential Revision: https://reviews.llvm.org/D147158
Timm Bäder [Tue, 24 Jan 2023 11:11:45 +0000 (12:11 +0100)]
[clang][Interp] Handle TypeTraitExprs
Differential Revision: https://reviews.llvm.org/D142448
Nikita Popov [Fri, 31 Mar 2023 11:37:08 +0000 (13:37 +0200)]
[InstCombine] Add additional test for folding intrinsic into select (NFC)
Timm Bäder [Mon, 16 Jan 2023 10:13:52 +0000 (11:13 +0100)]
[clang][Interp] Fix double-printing InterpFrame::describe()
Differential Revision: https://reviews.llvm.org/D141831
Florian Hahn [Fri, 31 Mar 2023 13:24:43 +0000 (14:24 +0100)]
[AArch64] Add cost model tests for fshl intrinsics.
Tests for D147322.
OCHyams [Fri, 31 Mar 2023 13:17:52 +0000 (14:17 +0100)]
[Assignment Tracking] Remove assertion from DbgAssignIntrinsic::setAddress
Follow up to https://reviews.llvm.org/D146987.
Remove assertion that the Value must be a pointer type. This fires in
real-world examples e.g. by codegenprepare introducing ptrtoint conversions.
The buildbots have not caught up yet but without this change the test
compiler-rt/test/ubsan/TestCases/TypeCheck/vptr.cpp fails with an ICE.
Timm Bäder [Sun, 15 Jan 2023 08:27:11 +0000 (09:27 +0100)]
[clang][Interp] Fix binary comma operators
We left the result of RHS on the stack in case DiscardResult was true.
Differential Revision: https://reviews.llvm.org/D141784
Joseph Huber [Fri, 31 Mar 2023 12:28:08 +0000 (07:28 -0500)]
[libc][NFC] Adjust some CMake messages for the GPU build
Summary:
This disables the MPFR warning on the GPU since we can't support it
anyway. Also fixes a misspelled message.
Aaron Ballman [Fri, 31 Mar 2023 12:20:09 +0000 (08:20 -0400)]
Fix a simple think-o; NFC
This was using a bitwise OR of two boolean member variables, now it's
using a logical OR instead.
Benjamin Kramer [Fri, 31 Mar 2023 12:20:01 +0000 (14:20 +0200)]
[bazel] Port
9d2b84ef6232
Leandro Lupori [Tue, 28 Mar 2023 14:28:56 +0000 (14:28 +0000)]
[flang] Don't fold operation when shapes differ
When folding a binary operation between two array constructors, it
is necessary to check if each value contained in the left operand
has the same rank and shape as the one on the right.
Otherwise, lowering would end up with an operation between values
of different ranks/shapes, which could result in a crash.
For instance, the following code was crashing the compiler:
integer :: x(4), y(2, 2), z(4)
z = (/x/) + (/y/)
Fixes #60229
Reviewed By: klausler, jeanPerier
Differential Revision: https://reviews.llvm.org/D147181
tyb0807 [Thu, 30 Mar 2023 20:40:51 +0000 (20:40 +0000)]
[mlir] Fix casting of leading unit dims for vector.insert
When dropping leading unit dims of vector.insert's operands and creating
a new vector.insert, its new position rank should be computed explicitly
in two steps: first based on the numbers of leading unit dims dropped
from the vector.insert's destination, then based on the numbers of
leading unit dims dropped from its source.
Reviewed By: pifon2a
Differential Revision: https://reviews.llvm.org/D147280
Tobias Gysi [Fri, 31 Mar 2023 11:45:21 +0000 (11:45 +0000)]
[mlir][llvm] Import pointer data layout specification.
The revision moves the data layout parsing into a separate file
and extends it to support pointer data layout specifications.
Additionally, it also produces more precise warnings and error
messages.
Reviewed By: Dinistro, definelicht
Differential Revision: https://reviews.llvm.org/D147170
Nikita Popov [Fri, 31 Mar 2023 11:46:16 +0000 (13:46 +0200)]
[InstCombine] Remove min/max special case when folding into select
Now that we canonicalize to min/max intrinsics, we no longer need
to guard against this here.
In fact, it seems like the issue from PR46271 was the final push
for introducing the intrinsics in the first place...
Vir Narula [Fri, 31 Mar 2023 11:40:04 +0000 (12:40 +0100)]
[Matrix] Add special case dot product lowering
Add special case to matrix lowering for dot products. Normal matrix lowering if optimized for either row-major or column-major, which results in many `shufflevector` instructions being generated for one vector. We work around this in our special case. We can also use vector-reduce adds instead of sequential adds to sum the result of the element-wise multiplication, which takes advantage of SIMD instructions.
Reviewed By: fhahn, thegameg
Differential Revision: https://reviews.llvm.org/D131125
OCHyams [Fri, 31 Mar 2023 11:22:02 +0000 (12:22 +0100)]
[Assignment Tracking] Enable by default
See https://discourse.llvm.org/t/rfc-enable-assignment-tracking/69399
This sets the `-Xclang -fexperimental-assignment-tracking` flag to the value
`enabled` which means it will be enabled so long as none of the following are
true: it's an LTO build, LLDB debugger tuning has been specified, or it's an O0
build (no work is done in any case if -g is not specified or -gmlt is used).
Reviewed By: jmorse
Differential Revision: https://reviews.llvm.org/D146987
OCHyams [Fri, 31 Mar 2023 11:06:35 +0000 (12:06 +0100)]
[Assignment Tracking][SROA] Handle DIArgList in migrateDebugInfo
If the to-be-split dbg.assign has a `DIArgList` and a new `Value` has been
requested then use a kill-location for the new dbg.assign. We can't simply
replace the value component (a `DIArgList`) with the new `Value` as that would
leave the `DIExpression` in an invalid state (`DW_OP_LLVM_arg` operands with no
arglist).
Reviewed By: jmorse
Differential Revision: https://reviews.llvm.org/D147312
Nikita Popov [Fri, 31 Mar 2023 11:29:43 +0000 (13:29 +0200)]
[InstCombine] Regenerate test checks (NFC)
Florian Hahn [Fri, 31 Mar 2023 11:32:40 +0000 (12:32 +0100)]
[Matrix] Update most dot tests using vXi64 to vXi32.
Update dot-product-int.ll tests to use mostly i32 instead of i64;
there's no mul.2d instruction, so vector versions of v2i64 cannot be
lowered efficiently.
Timm Bäder [Sat, 14 Jan 2023 18:24:49 +0000 (19:24 +0100)]
[clang][Interp] Fix record initialization via CallExpr subclasses
We can't just use VisitCallExpr() here, as that doesn't handle CallExpr
subclasses such as CXXMemberCallExpr.
Differential Revision: https://reviews.llvm.org/D141772