pal1000 [Tue, 7 Sep 2021 19:16:44 +0000 (22:16 +0300)]
ci: Add osmesa to Windows GitLab CI
osmesa CI coverage on Windows was lost when Windows CI with
Meson build was migrated from AppVeyor to GitLab CI
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8672>
Italo Nicola [Tue, 7 Sep 2021 13:37:20 +0000 (10:37 -0300)]
main: don't always clamp pixels read from snorm buffers
From the OpenGL 4.6 spec, section 18.2.8:
"For a signed normalized fixed-point color buffer, each component is
clamped to [0,1] if read color clamping is enabled, or if type
represents un- signed integer components; otherwise type represents
signed integer components, and each component is clamped to [−1,1]."
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12749>
Mike Blumenkrantz [Tue, 7 Sep 2021 16:17:55 +0000 (12:17 -0400)]
zink: clamp query results to 500 per qbo on 32bit
this makes 4000byte qbos instead of 40000, which avoids bypassing slab
allocation and makes the buffers more reusable to avoid exploding 32bit
address space
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12752>
Emma Anholt [Fri, 3 Sep 2021 17:54:36 +0000 (10:54 -0700)]
llvmpipe: memcpy user_buffers at set_constant_buffer time.
The data in the user buffer is only valid for a short period of time, and
we could use-after-free it if rendering hadn't been flushed by shader
deletion time.
Fixes: #5254
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12724>
Emma Anholt [Fri, 3 Sep 2021 20:28:58 +0000 (13:28 -0700)]
llvmpipe: Fix leak of CS local memory with 0 threads.
Fixes:
bde08ce4d7bf ("llvmpipe: handle compute shader launch with 0 threads")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12724>
Emma Anholt [Fri, 3 Sep 2021 23:02:46 +0000 (16:02 -0700)]
llvmpipe: Free CS shader images on context destroy.
Cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12724>
Paulo Zanoni [Tue, 31 Aug 2021 21:16:32 +0000 (14:16 -0700)]
iris: signal the syncobj after a failed batch
When a batch fails we either recreate our context (in case we got -EIO
or -ENOMEM) or we abort() (every other error). If we don't abort and a
later batch has a dependency on the batch that failed, then this newer
batch will fail with -EINVAL since it requires a syncobj that was
never submitted, which means we'll abort().
To avoid this problem, in this patch we simply signal syncobjs of
failed batches. This means we may be breaking our dependency tracking,
but IMHO it's better than simply letting it abort() later.
In other words, this moves the situation for some apps from "app
causes a GPU hang and then aborts" to "app causes a GPU hang but keeps
running".
Note: on some older Kernels (like today's Debian 5.10 Kernel) I see X
simply freezing after the GPU hang when the app doesn't decide to
abort(). Switching to a more recent Kernel fixes this issue for me, so
in case it happens to you make sure you have the most recent stable
trees.
v2:
- Fix coding style (Ken).
- Use the big comment block provided by Ken (Ken).
- Adjust the commit message so avoid saying we retry (Ken).
- Rebase after the syncobj ownership changes.
- Drive-by add a missing white space in the header.
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12657>
Emma Anholt [Tue, 7 Sep 2021 18:10:16 +0000 (11:10 -0700)]
ci/freedreno: Skip slow SizedDeclarationsPrimitive in CI.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12753>
Emma Anholt [Tue, 7 Sep 2021 17:58:58 +0000 (10:58 -0700)]
ci/freedreno: Mark a630 basic-glsl-misc-fs as flaky.
My branch mostly fixed it, but apparently it's not stable yet.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12753>
Emma Anholt [Tue, 7 Sep 2021 18:11:17 +0000 (11:11 -0700)]
ci/freedreno: Fix typo in glx-tfp flake annotation.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12753>
Emma Anholt [Wed, 18 Aug 2021 17:08:15 +0000 (10:08 -0700)]
freedreno/a6xx: Emit a WFI after event writes flushing CCU.
Following on from !12475, do the same CCU workaround for freedreno as
turnip is doing, so that we flush CCU correctly for when color/depth is
next read under a different cache domain from where it was written.
Fixes instability (particularly if the GPU is clocked up) on
dEQP-GLES3.functional.fbo.blit.depth_stencil.depth32f_stencil8* in bypass
mode on a630.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11481>
Marek Olšák [Sat, 4 Sep 2021 05:20:12 +0000 (01:20 -0400)]
ac,radv: remove unused inputs array and VS input code
The previous commit stopped using "inputs".
"load_layer_id" has always been broken and it was probably unused anyway.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
Marek Olšák [Sat, 21 Aug 2021 03:59:05 +0000 (23:59 -0400)]
ac,radeonsi: load VS inputs at the call site of nir_intrinsic_load_input
to match ACO
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
Marek Olšák [Wed, 1 Sep 2021 08:02:16 +0000 (04:02 -0400)]
ac/llvm: implement nir_intrinsic_elect
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
Marek Olšák [Sat, 21 Aug 2021 02:10:38 +0000 (22:10 -0400)]
ac/llvm: implement nir_intrinsic_overwrite_*_arguments_amd
This should work if the intrinsics are not called from conditional blocks.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
Marek Olšák [Sat, 21 Aug 2021 14:16:47 +0000 (10:16 -0400)]
ac: make ac_shader_abi::inputs an array instead of a pointer
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
Marek Olšák [Sat, 21 Aug 2021 14:12:23 +0000 (10:12 -0400)]
ac: remove needless parameters from ac_shader_abi::emit_outputs
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
Marek Olšák [Sat, 21 Aug 2021 02:09:15 +0000 (22:09 -0400)]
ac/llvm: implement a bunch of NIR AMD intrinsics for NGG
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
Marek Olšák [Fri, 20 Aug 2021 23:32:20 +0000 (19:32 -0400)]
ac/llvm: remove load_tess_coord callback
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
Emma Anholt [Tue, 17 Aug 2021 20:14:37 +0000 (13:14 -0700)]
ci/iris: Switch GL/GLES testing to suites.
Better board utilization, less fussy load-balancing of the boards, and
being able to add KHR-GLES* and multisample testing without having to add
more reboots.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12437>
Emma Anholt [Fri, 20 Aug 2021 21:01:39 +0000 (14:01 -0700)]
ci/iris: Consistently use .test-manual-mr for our unstable hardware.
... and place it in the board's definition, instead of the consuming jobs.
GLK and APL are the boards that are enabled by default so far, and the
rest are off. But, if you want to check on some other board, you should
be able to click the button.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12437>
Emma Anholt [Tue, 31 Aug 2021 17:17:28 +0000 (10:17 -0700)]
ci/iris: Unmark dma_buf_import_export tests as failing.
We now get the binaries built in our rootfs.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12437>
Emma Anholt [Tue, 31 Aug 2021 19:08:13 +0000 (12:08 -0700)]
ci/iris: Mark create_context-no_error as failing.
Consistent in CI, and other drivers fail at it too.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12437>
Connor Abbott [Tue, 7 Sep 2021 09:45:07 +0000 (11:45 +0200)]
ir3/lower_pcopy: Set entry->done in the swap loop
We process all the remaining copy entries one-at-a-time when emitting
swaps, so normally we wouldn't need to care about whether the entry is
done, except that we need to look at the other entries to split them up
and we need to skip this when the copy to be split has already been
processed.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5307
Fixes:
0ffcb19b9d9 ("ir3: Rewrite register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12747>
Connor Abbott [Tue, 7 Sep 2021 09:42:21 +0000 (11:42 +0200)]
ir3/lower_pcopy: Use right flags for src const/immed
At some point I split up the flags into overall/source flags and made
copies from immed/const only set IR3_REG_IMMED/IR3_REG_CONST on the
source flags, but I forgot to update this. Noticed by inspection.
Fixes:
0ffcb19b9d9 ("ir3: Rewrite register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12747>
Jesse Natalie [Sat, 4 Sep 2021 19:18:21 +0000 (12:18 -0700)]
llvmpipe: Don't wait for already-terminated threads on Windows
In the case of an app returning from main(), Windows will apparently terminate
other threads before invoking final cleanup on the main thread.
llvmpipe can't wait for threads to signal a semaphore if the thread is already
gone. Since we're already in a WIN32 special case, just call the Win32 API
to check if the thread is terminated or STILL_ALIVE.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12731>
Jose Maria Casanova Crespo [Mon, 6 Sep 2021 17:43:14 +0000 (19:43 +0200)]
v3d: Enable PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12744>
Ed Martin [Wed, 1 Sep 2021 14:39:08 +0000 (10:39 -0400)]
winsys/radeonsi: Set vce_encode = true when VCE found
Allows VA-API encoding on AMD PITCAIRN
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5305
Fixes:
43c04ab2b43 ("radeonsi: separate video hw info based on HW engine individually")
Reviewed-by: James Zhu <James.Zhu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12679>
Veerabadhran Gopalakrishnan [Fri, 27 Aug 2021 06:43:55 +0000 (12:13 +0530)]
radeon/vcn: Add FW header flag to enable VP9 header parsing
set flags to enable VP9 uncompressed header parsing in FW and extract
quantization and loop filter parameters.
Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12703>
Mike Blumenkrantz [Wed, 1 Sep 2021 13:35:58 +0000 (09:35 -0400)]
zink: fix PIPE_SHADER_CAP_FP16_DERIVATIVES handling
this requires 16bit io, not just alus
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>
Mike Blumenkrantz [Thu, 5 Aug 2021 18:04:49 +0000 (14:04 -0400)]
zink: handle bo struct types that are just a runtime array
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>
Mike Blumenkrantz [Tue, 20 Jul 2021 20:40:59 +0000 (16:40 -0400)]
zink: handle 8/16bit ssbo storage
this is a bit gross, but basically just add an array of extra spvids
so that each bitsize can have its own variables to keep the types in sync
glsl can't do this, but (future) internal mesa shaders can
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>
Mike Blumenkrantz [Tue, 20 Jul 2021 20:07:34 +0000 (16:07 -0400)]
zink: implement nir_op_pack_half_2x16_split
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>
Mike Blumenkrantz [Tue, 20 Jul 2021 20:07:07 +0000 (16:07 -0400)]
zink: lower 32_2x16_split pack/unpack instructions
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>
Mike Blumenkrantz [Tue, 20 Jul 2021 20:06:58 +0000 (16:06 -0400)]
zink: hook up 8/16bit storage exts
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>
Mike Blumenkrantz [Tue, 20 Jul 2021 20:06:45 +0000 (16:06 -0400)]
zink: add 8bit alu handling
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634>
Mike Blumenkrantz [Thu, 2 Sep 2021 17:27:25 +0000 (13:27 -0400)]
zink: fix PIPE_CAP_DRAW_PARAMETERS export
before 1.2, assume this is available if the extension is there, otherwise
require the feature
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12710>
Mike Blumenkrantz [Thu, 2 Sep 2021 16:44:07 +0000 (12:44 -0400)]
zink: always emit sample id 0 for non-msaa texel pointers in ntv
in practice this shouldn't matter since the sample id must always be zero,
but it's still a spec violation
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12710>
Mike Blumenkrantz [Thu, 24 Jun 2021 19:10:49 +0000 (15:10 -0400)]
zink: move drawid_broken to unhashed pipeline state
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>
Mike Blumenkrantz [Thu, 24 Jun 2021 18:59:01 +0000 (14:59 -0400)]
zink: move point sprite rasterizer bits to unhashed pipeline state
avoid reading values that aren't part of the pipeline state
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>
Mike Blumenkrantz [Thu, 24 Jun 2021 18:52:00 +0000 (14:52 -0400)]
zink: add pipeline state flag for determining if output type is points
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>
Mike Blumenkrantz [Thu, 24 Jun 2021 14:40:20 +0000 (10:40 -0400)]
zink: move sample part of fs key to renderpass
this is more accurate
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>
Mike Blumenkrantz [Thu, 24 Jun 2021 14:27:05 +0000 (10:27 -0400)]
zink: remove tcs shader keys
these never did anything and need a rework to become useful, assuming
I even find a case where such a thing would be needed
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>
Mike Blumenkrantz [Thu, 17 Jun 2021 20:05:00 +0000 (16:05 -0400)]
zink: hash blend state pointers on creation
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660>
Danylo Piliaiev [Wed, 1 Sep 2021 17:21:21 +0000 (20:21 +0300)]
turnip: re-emit vertex params after they are invalidated
Constants could be invalidated via HLSQ_INVALIDATE_CMD which is
emitted when new pipeline is bound and in CmdClearAttachments.
Also they become invalid after secondary cmd execution.
Fixes geometry flickering in Genshin Impact
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5313
Fixes:
815a85dd7c44f4be4cbf5b351836c921a7a923fd "turnip: do not re-emit same vs params"
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12684>
Jonathan Marek [Mon, 6 Sep 2021 17:55:37 +0000 (13:55 -0400)]
freedreno/registers: add a6xx media formats
Define hardware formats which correspond to media formats.
DPU/CAMSS/VENUS/CDSP can consume/produce buffers in these formats with UBWC
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12740>
Emma Anholt [Sun, 1 Aug 2021 17:11:17 +0000 (10:11 -0700)]
i915g: Reject non-unrolled loops or non-flattend IFs at link time.
i915 has no support for control flow, so we need to link-fail shaders that
fail to unrooll loops. This is valid for GLES2, and non-conformant but
the best we can do for GL2.
Note that we still have some dEQP failures where loops that should be
unrollable and thus are required to be supported don't get unrolled
(#4979).
Closes: #4978
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>
Emma Anholt [Tue, 3 Aug 2021 17:20:18 +0000 (10:20 -0700)]
mesa/st: Add an optional GLSL link fail msg to finalize_nir.
GLES2 drivers are allowed to reject some GLSL constructs, like dynamic
loop bounds (which neither i915g nor vc4 can fully support), but gallium
hasn't had any way to trigger a link failure. Add a return msg to the
finalize_nir hook, which is called at the end of GLSL linking, and use
that. This means that some other callers of finalize need to do something
with the msg, and we (for now) just throw it away.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>
Emma Anholt [Sun, 1 Aug 2021 17:23:51 +0000 (10:23 -0700)]
i915g: Add finalize_nir.
This allows mesa/st to do some more optimization of state variables, but
more importantly it will be what we use to do GLSL link-time errors for
loops.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>
Emma Anholt [Fri, 3 Sep 2021 00:07:11 +0000 (17:07 -0700)]
i915g: Expose PIPE_CAP_TGSI_TEXCOORD.
We want to be able to use finalize_nir, but doing so requires this flag to
be set because not having it is incompatible with being able to finalize
twice (since the texcoord workaround varyings shift happens at variant
time rather than link time).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>
Emma Anholt [Fri, 3 Sep 2021 00:03:17 +0000 (17:03 -0700)]
i915g: Simplify the process of texcoord mapping to TGSI semantics.
Custom index-as-semantic defines and extra bool flags at state update time
are unnecessary if we just store the semantics and index that each
texcoord should be.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>
Emma Anholt [Tue, 31 Aug 2021 23:31:26 +0000 (16:31 -0700)]
mesa/st: Add an assertion for finalize_nir versus PIPE_CAP_TEXCOORD.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>
Emma Anholt [Fri, 3 Sep 2021 00:13:52 +0000 (17:13 -0700)]
cso: Revert using FS sampler count for other stages at context unbind.
You shouldn't be asking drivers without VS texturing to unbind VS
textures, which was breaking i915g.
Fixes:
802e43a6b587 ("gallium/cso: add unbind mask for cso restore")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218>
Rob Clark [Sun, 29 Aug 2021 17:00:02 +0000 (10:00 -0700)]
nir/lower_amul: Fix usage of nir_foreach_src()
nir_foreach_src() bails after cb returns false for any src. Which isn't
the behavior we were looking for. Move progress flag to state struct
instead, so we don't skip visiting some sources.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12732>
Rob Clark [Sun, 29 Aug 2021 16:28:06 +0000 (09:28 -0700)]
nir/lower_amul: Handle load/store_global
These need more than 24b.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12732>
Rhys Perry [Fri, 3 Sep 2021 16:15:03 +0000 (17:15 +0100)]
aco/ra: don't use ds_write_b8_d16_hi/ds_write_b16_d16_hi on GFX8
GFX8 doesn't support these opcodes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes:
c75138ed640 ("aco/ra: refactor subdword definition info")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12721>
Juan A. Suarez Romero [Fri, 13 Aug 2021 14:21:08 +0000 (16:21 +0200)]
broadcom/compiler: check instruction belongs to current block
Check in the ldunif optimization if the current instruction belongs to
current block.
These avoids again searching the instruction when current block is not
correctly set, as it happened in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12339 and in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12221.
v2:
- Remove extra blank line (Iago)
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12358>
Iago Toral Quiroga [Mon, 6 Sep 2021 08:55:02 +0000 (10:55 +0200)]
broadcom/compiler: don't enable early fragment tests if shader writes Z
We had an optimization to auto-enable early fragment tests when a shader
didn't have side effects, but of course, we cannot do that this if the
shader writes Z, as in that case the fragment tests need to use the
value written from the shader.
Also, if the shader enables early fragment tests, then any shader Z
writes should be ignored.
Fixes:
dEQP-VK.spirv_assembly.instruction.graphics.early_fragment.*
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12736>
Iago Toral Quiroga [Fri, 3 Sep 2021 10:15:03 +0000 (12:15 +0200)]
v3dv: honor VkPhysicalDeviceFeatures2 in pNext chain of VkDeviceCreateInfo
Fixes:
dEQP-VK.robustness.buffer_access.through_pointers.*.reads.*
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12718>
Vinson Lee [Thu, 2 Sep 2021 10:11:14 +0000 (03:11 -0700)]
nv50/ir: Add DeadCodeElim constructor.
Fix defect reported by Coverity Scan.
Uninitialized scalar field (UNINIT_CTOR)
member_not_init_in_gen_ctor: The compiler-generated constructor
for this class does not initialize deadCount.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12697>
Ilia Mirkin [Sun, 5 Sep 2021 21:58:24 +0000 (17:58 -0400)]
freedreno: use OUT_WFI for emit_marker
This is only used pre-a5xx, where we want OUT_WFI. Tested on FD420.
Fixes:
8651cfbbf0 (freedreno: emit_marker() cleanup)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12734>
Rob Clark [Tue, 24 Aug 2021 00:19:07 +0000 (17:19 -0700)]
clover: Don't remove sampler/image uniforms
Otherwise we fool nir_shader_gather_info() into telling us there are no
samplers/images.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12733>
Jesse Natalie [Sat, 4 Sep 2021 17:31:08 +0000 (10:31 -0700)]
ci/windows: Build spirv-to-dxil
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12728>
Jesse Natalie [Sat, 4 Sep 2021 17:28:18 +0000 (10:28 -0700)]
spirv2dxil: Fix build after spirv_to_dxil signature change
Fixes:
ada05759 ("spirv_to_dxil: Convert out parameters to a single object")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5322
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12728>
Bas Nieuwenhuizen [Sat, 4 Sep 2021 01:32:21 +0000 (03:32 +0200)]
util/fossilize_db: Don't corrupt keys during entry read.
We change the hash that is still used to set entry->key.
Fixes:
d2d642cc014 "util/fossilize_db: Only allocate entries after full read."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12725>
Emma Anholt [Fri, 3 Sep 2021 18:19:35 +0000 (11:19 -0700)]
osmesa: Add a unit test for resizing buffers.
This should cover both the former use-after-free of the old pixel buffer
when moving the context to a new pixel buffer, and also successful moving
to a different-sized pixel buffer.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12685>
mattvchandler [Wed, 1 Sep 2021 17:44:12 +0000 (09:44 -0800)]
gallium/osmesa: fix buffer resizing
Generate a new buffer if OSMesaMakeCurrent is called with a new size
Fix a use-after-free error when the old buffer is destroyed
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5276
Fixes:
26c6f6cfbb6 ("gallium/osmesa: Remove the broken buffer-reuse scheme.")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12685>
Mike Blumenkrantz [Thu, 2 Sep 2021 19:18:49 +0000 (15:18 -0400)]
tgsi_to_nir: force int type for LAYER output
this otherwise gets confused as a vec4 most of the time
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12709>
Emma Anholt [Thu, 2 Sep 2021 16:23:15 +0000 (09:23 -0700)]
freedreno/ir3: Use LDIB for coherent image loads on a5xx.
If the coherent flag is present, then we need to not have an incoherent
cache between us and previous stores to the image that were also decorated
as coherent. isam apparently (unsurprisingly) goes through a texture
cache. Use ldib instead, so that we don't get the wrong result.
We would need a similar fix for a4xx, but that uses ldgb and I don't
have hardware to test on.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>
Emma Anholt [Thu, 2 Sep 2021 19:56:24 +0000 (12:56 -0700)]
freedreno/ir3: Add encode/decode support for a5xx's LDIB.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>
Emma Anholt [Fri, 3 Sep 2021 17:15:25 +0000 (10:15 -0700)]
freedreno/ir3: Refactor a3xx ibo/ssbo load/store instruction XML.
There are fields common to both loads and stores, but not resinfo. Move
them to a common bitset to reduce duplication.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>
Emma Anholt [Thu, 2 Sep 2021 19:14:20 +0000 (12:14 -0700)]
freedreno/ir3: Clarify what's going on in a4xx SSBO atomics.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>
Emma Anholt [Thu, 2 Sep 2021 00:06:13 +0000 (17:06 -0700)]
freedreno/ir3: Don't use isam for coherent image loads on a6xx.
If the coherent flag is present, then we need to not have an incoherent
cache between us and previous stores to the image that were also decorated
as coherent. isam apparently (unsurprisingly) goes through a texture
cache. Use ldib instead, so that we don't get the wrong result.
We need a similar fix for pre-a6xx, but we don't have
emit_intrinsic_load_image for those (yet).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>
Emma Anholt [Fri, 3 Sep 2021 16:53:51 +0000 (09:53 -0700)]
ci/freedreno: Fix xfail update for arb_draw_indirect.
I saw UnexpectedPass in my patch, and removed the Crash, but it was
actually Crash -> Fail that had happened.
Fixes:
83e9a7fbcf53 ("freedreno/ir3: Align driver param upload size/offset for indirect uploads.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704>
Emma Anholt [Wed, 1 Sep 2021 16:12:26 +0000 (09:12 -0700)]
ci/v3dv: generalize the buffer_access.through_pointers flakes.
I saw an unrelated marge pipeline fail on
dEQP-VK.robustness.buffer_access.through_pointers.graphics.reads.fragment.4B_out_of_memory_with_vec4_f32,
and it sure looks like all of these are flaky.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12681>
Enrico Galli [Thu, 2 Sep 2021 20:22:57 +0000 (13:22 -0700)]
spirv_to_dxil: Add support for non-zero vertex and instance indices
Since DXIL does not have a way to get the base/first vertex and base
instance as well as using a zero-based vertex index, these values need
to be passed in via a constant buffer.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707>
Enrico Galli [Mon, 30 Aug 2021 22:00:00 +0000 (15:00 -0700)]
spirv_to_dxil: Add support for nir_intrinsic_load_num_workgroups
Since DXIL does not have a way to get the number of workgroups used
during dispatch with a system-value, these numbers need to be passed in
via a constant buffer.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707>
Enrico Galli [Thu, 2 Sep 2021 20:30:55 +0000 (13:30 -0700)]
nir: Add CAN_REORDER to load_ubo_dxil
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707>
Enrico Galli [Mon, 30 Aug 2021 21:45:11 +0000 (14:45 -0700)]
spirv_to_dxil: Convert out parameters to a single object
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707>
Timur Kristóf [Wed, 1 Sep 2021 16:28:51 +0000 (18:28 +0200)]
aco/optimize_postRA: Use iterators instead of operator[] of std::array.
Also add a few more assertions to make sure the registers are
within the bounds of the array.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12682>
Timur Kristóf [Wed, 1 Sep 2021 16:09:01 +0000 (18:09 +0200)]
aco: Skip code paths to emit copies when there are no copies.
Found while running with libstdc++ debug mode.
Fixes the following:
Error: attempt to advance a dereferenceable (start-of-sequence)
iterator -1 steps, which falls outside its valid range.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12682>
Timur Kristóf [Wed, 1 Sep 2021 15:16:16 +0000 (17:16 +0200)]
aco: Use Builder reference in emit_copies_block.
Found while running with libstdc++ debug mode.
Fixes the following:
Error: attempt to copy-construct an iterator from a singular iterator.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12682>
Danylo Piliaiev [Tue, 2 Feb 2021 16:00:08 +0000 (18:00 +0200)]
turnip: consider shader's immediates size for sub-stream allocation
Otherwise we could exceed pre-allocated space.
Fixes:
dEQP-VK.spirv_assembly.instruction.compute.opphi.wide
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8841>
Mike Blumenkrantz [Thu, 2 Sep 2021 21:41:37 +0000 (17:41 -0400)]
zink: add a piglit ci job for lazy descriptors
this fills out lavapipe's descriptor coverage in ci
Acked-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12708>
Mike Blumenkrantz [Thu, 2 Sep 2021 20:16:40 +0000 (16:16 -0400)]
lavapipe: unbreak push descriptor templates
the stride/offset calculation on this was all wrong, so just unroll the
template before enqueuing to present a uniform stream of descriptors
without trying to copy potentially megabytes of data
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12708>
Rhys Perry [Mon, 2 Aug 2021 18:48:55 +0000 (19:48 +0100)]
radv: expose VK_KHR_shader_integer_dot_product
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Mon, 30 Aug 2021 12:58:52 +0000 (13:58 +0100)]
aco/ra: allow v1b operands with 16-bit instructions
Instruction selection can create these.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes:
ec1bbfa6088 ("aco/ra: refactor subdword operand stride")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Mon, 2 Aug 2021 18:42:44 +0000 (19:42 +0100)]
aco: implement udot_4x8/sdot_4x8/udot_2x16/sdot_2x16 opcodes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Mon, 30 Aug 2021 10:59:39 +0000 (11:59 +0100)]
aco: implement nir_op_pack_32_4x8
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Mon, 2 Aug 2021 19:14:03 +0000 (20:14 +0100)]
radv,aco: implement iadd_sat
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Tue, 16 Jun 2020 15:33:32 +0000 (16:33 +0100)]
radv: refactor handling of nir_options
Make it easier to change them depending on chip_class and family.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Tue, 31 Aug 2021 10:53:33 +0000 (11:53 +0100)]
ac/llvm: implement udot_4x8/sdot_4x8/udot_2x16/sdot_2x16 opcodes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Mon, 30 Aug 2021 13:02:38 +0000 (14:02 +0100)]
ac/llvm,radv: implement uadd_sat/iadd_sat
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Mon, 30 Aug 2021 13:07:53 +0000 (14:07 +0100)]
ac/llvm: implement nir_op_pack_32_4x8
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Tue, 31 Aug 2021 10:17:25 +0000 (11:17 +0100)]
ac/gpu_info: add has_accelerated_dot_product
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Mon, 30 Aug 2021 12:56:17 +0000 (13:56 +0100)]
spirv: use sdot_2x16 and udot_2x16 opcodes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Mon, 30 Aug 2021 12:56:01 +0000 (13:56 +0100)]
nir: add sdot_2x16 and udot_2x16 opcodes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Mon, 30 Aug 2021 10:35:36 +0000 (11:35 +0100)]
nir: separate lower_add_sat
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
Rhys Perry [Thu, 2 Sep 2021 16:30:57 +0000 (17:30 +0100)]
aco/spill: add temporary operands of exec phis to next_use_distances_end
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes:
dfb10e4f4b7 ("aco/spill: don't count phis as variable access")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12702>
Rhys Perry [Thu, 2 Sep 2021 16:04:29 +0000 (17:04 +0100)]
aco: don't coalesce constant copies into non-power-of-two sizes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12702>