David Spickett [Tue, 21 Jun 2022 13:12:38 +0000 (13:12 +0000)]
Revert "[CMake] Enable LLVM_ENABLE_PER_TARGET_RUNTIME_DIR by default on Linux"
This reverts commit
311f7839602344ca347816146edb68c0ffaaa060.
Due to not working for Arm where arm and armhf configs are built.
Emre Kultursay [Tue, 21 Jun 2022 12:28:53 +0000 (14:28 +0200)]
Support expressions in the context of a reference
...type variable by dereferencing the variable before
evaluating the expression.
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D128126
Nikita Popov [Wed, 8 Jun 2022 08:00:31 +0000 (10:00 +0200)]
[GlobalsModRef] Remove check for allocator calls
As the FIXME already indicates, I don't see why this code would be
necessary. If there's a call to an allocator function, that should
get treated just like any other function call -- usually it will be
a declaration and handled conservatively based on memory attributes
only. There should be no need to explicitly force it to be modref.
No test failures either, so I think this is just dead code.
Differential Revision: https://reviews.llvm.org/D127273
Nicolas Vasilache [Tue, 21 Jun 2022 08:38:54 +0000 (01:38 -0700)]
[mlir][Linalg] Split reduction transform op
This revision separates the `LinalgSplitReduction` pattern, whose application is based on attributes,
from its implementation.
A transform dialect op extension is added to control the application of the transformation at a finer granularity.
Differential Revision: https://reviews.llvm.org/D128165
David Spickett [Tue, 21 Jun 2022 11:50:38 +0000 (11:50 +0000)]
[llvm] Disable LLVM_ENABLE_PER_TARGET_RUNTIME_DIR for Arm Linux
I did this before but the other change got reverted and relanded
recently.
arm vs armhf isn't handled correctly so this setting doesn't work
for 32 bit Arm Linux. Causing failures like:
https://lab.llvm.org/buildbot/#/builders/178/builds/2293
LLVM GN Syncbot [Tue, 21 Jun 2022 11:45:40 +0000 (11:45 +0000)]
[gn build] Port
6ede65205073
Anubhab Ghosh [Tue, 21 Jun 2022 11:44:17 +0000 (13:44 +0200)]
[JITLink][Orc] Add MemoryMapper interface with InProcess implementation
MemoryMapper class takes care of cross-process and in-process address space
reservation, mapping, transferring content and applying protections.
Implementations of this class can support different ways to do this such
as using shared memory, transferring memory contents over EPC or just
mapping memory in the same process (InProcessMemoryMapper).
Reviewed By: sgraenitz, lhames
Differential Revision: https://reviews.llvm.org/D127491
Simon Pilgrim [Tue, 21 Jun 2022 11:30:53 +0000 (12:30 +0100)]
[X86] combineAndnp - constant fold ANDNP(C,X) -> AND(~C,X)
If the LHS op has a single use then using the more general AND op is likely to allow commutation, load folding, generic folds etc.
David Green [Tue, 21 Jun 2022 11:21:37 +0000 (12:21 +0100)]
[AArch64] Remove unnecessary funnel shift sve costs.
D127680 added some unnecessary funnel shift costs for AArch64 to "match
the legacy behaviour". The default costs are closer to the correct
values and line up with the scalar/neon costs better. Remove the lines
again to clean up the code, they can be added back at a later date with
better values if needed.
Nikita Popov [Fri, 17 Jun 2022 13:19:23 +0000 (15:19 +0200)]
[SROA] Migrate tests to opaque pointers (NFC)
Tests were updated with this script:
https://gist.github.com/nikic/
98357b71fd67756b0f064c9517b62a34
However, in this case a lot of fixup was required, due to many
minor, but ultimately immaterial differences in results. In
particular, the GEP representation changes slightly in many cases,
either because we now use an i8 GEP, or because we now leave a
GEP alone, using it's original index types and (lack of) inbounds.
basictest-opaque-ptrs.ll has been dropped, because it was an
opaque pointers duplicate of basictest.ll.
Simon Pilgrim [Tue, 21 Jun 2022 10:47:51 +0000 (11:47 +0100)]
[X86] computeKnownBitsForTargetNode - add X86ISD::VBROADCAST_LOAD handling
This requires us to override the isTargetCanonicalConstantNode callback introduced in D128144, so we can recognise the various cases where a VBROADCAST_LOAD constant is being reused at different vector widths to prevent infinite loops.
Martin Storsjö [Tue, 21 Jun 2022 10:16:00 +0000 (13:16 +0300)]
Revert "[LLD] [COFF] Use StringTableBuilder to optimize the string table"
This reverts commit
9ffeaaa0ea54307db309104696a0b6cce6ddda38.
This fixes debugging large executables with lldb and gdb.
When StringTableBuilder is used, the string offsets for any string
can point anywhere in the string table - while previously, all strings
were inserted in order (without deduplication and tail merging).
For symbols, there's no complications in encoding the string offset;
the offset is encoded as a raw 32 bit binary number in half of the
symbol name field.
For sections, the string table offset is written as
"/<decimaloffset>", but if the decimal offset would be larger than
7 digits, it's instead written as "//<base64offset>". Tools that
operate on object files can handle the base64 offset format, but
apparently neither lldb nor gdb expect that syntax when locating the
debug information section. Prior to the reverted commit, all long
section names were located at the start of the string table, so
their offset never exceeded the range for the decimal syntax.
Just reverting this change for now, as the actual benefit from it
was fairly modest.
Longer term, lld could write all long section names unoptimized
at the start of the string table, followed by all the strings for
symbol names, with deduplication and tail merging. And lldb and
gdb could be fixed to handle sections with the base64 offset syntax.
This fixes https://github.com/mstorsjo/llvm-mingw/issues/289.
Nikita Popov [Tue, 21 Jun 2022 10:23:42 +0000 (12:23 +0200)]
[SROA] Regenerate test checks (NFC)
Shraiysh Vaishay [Tue, 21 Jun 2022 09:57:01 +0000 (15:27 +0530)]
[mlir][OpenMP][NFC] Parameter refers to single args and hence changing description for taskgroup allocate clause.
Florian Hahn [Tue, 21 Jun 2022 09:50:13 +0000 (11:50 +0200)]
[ConstraintElimination] Move logic to check condition to helper (NFC).
Balazs Benics [Tue, 21 Jun 2022 09:42:09 +0000 (11:42 +0200)]
[clang-tidy][docs] Fix wrong sphinx link after
d9afb8c3e8fd01a3c89ab2ddebcd44602a30a975
There was a copy-paste mistake at the embedded link:
`clang-tidy/checks/cppcoreguidelines-virtual-class-destructor`
->
`clang-tidy/checks/cppcoreguidelines/virtual-class-destructor`
Sphinx error:
/home/zbebnal/git/llvm-project/clang-tools-extra/docs/ReleaseNotes.rst:168:unknown document: clang-tidy/checks/cppcoreguidelines-virtual-class-destructor
Build bot: https://lab.llvm.org/buildbot#builders/115/builds/29805
Differential Revision: https://reviews.llvm.org/D126891
Balazs Benics [Tue, 21 Jun 2022 09:02:18 +0000 (11:02 +0200)]
[clang-tidy] cppcoreguidelines-virtual-class-destructor should ignore final classes
The `cppcoreguidelines-virtual-class-destructor` supposed to enforce
http://isocpp.github.io/CppCoreGuidelines/CppCoreGuidelines#c35-a-base-class-destructor-should-be-either-public-and-virtual-or-protected-and-non-virtual
Quote:
> A **base** class destructor should be either public and virtual, or
> protected and non-virtual
[emphasis mine]
However, this check still rules the following case:
class MostDerived final : public Base {
public:
MostDerived() = default;
~MostDerived() = default;
void func() final;
};
Even though `MostDerived` class is marked `final`, thus it should not be
considered as a **base** class. Consequently, the rule is satisfied, yet
the check still flags this code.
In this patch, I'm proposing to ignore `final` classes since they cannot
be //base// classes.
Reviewed By: whisperity
Differential Revision: https://reviews.llvm.org/D126891
David Green [Tue, 21 Jun 2022 08:51:22 +0000 (09:51 +0100)]
[AArch64] Add Extract(DUP(C)) as a canonical constant.
As a followup to D128144, this adds extract(DUP(C)) as a canonical
constant to prevent it being transformed back into a BUILD_VECTOR,
leading to an infinite loop.
Carl Ritson [Wed, 28 Jul 2021 10:57:09 +0000 (19:57 +0900)]
[AMDGPU] Set GFX11 null export target based on export attributes
If shader only has depth exports use MRTZ otherwise use MRT0.
Differential Revision: https://reviews.llvm.org/D128185
Nicolas Vasilache [Tue, 21 Jun 2022 07:41:31 +0000 (00:41 -0700)]
[mlir][SCF] Fold tensor.cast feeding into scf.foreach_thread.parallel_insert_slice
Differential Revision: https://reviews.llvm.org/D128247
Matthias Springer [Tue, 21 Jun 2022 08:07:52 +0000 (10:07 +0200)]
[mlir][memref] Fix layout map computation in inferRankReducedResultType
Differential Revision: https://reviews.llvm.org/D128160
Nicolas Vasilache [Mon, 20 Jun 2022 20:34:51 +0000 (13:34 -0700)]
[mlir][SCF] Add scf::ForeachThread canonicalization.
This revision adds the necessary plumbing for canonicalizing scf::ForeachThread with the
`AffineOpSCFCanonicalizationPattern`.
In the process the `loopMatcher` helper is updated to take OpFoldResult instead of just values.
This allows composing various scenarios without the need for an artificial builder.
Differential Revision: https://reviews.llvm.org/D128244
Balázs Kéri [Tue, 21 Jun 2022 06:29:31 +0000 (08:29 +0200)]
[clang][Analyzer] Add errno state to standard functions modeling.
This updates StdLibraryFunctionsChecker to set the state of 'errno'
by using the new errno_modeling functionality.
The errno value is set in the PostCall callback. Setting it in call::Eval
did not work for some reason and then every function should be
EvalCallAsPure which may be bad to do. Now the errno value and state
is not allowed to be checked in any PostCall checker callback because
it is unspecified if the errno was set already or will be set later
by this checker.
Reviewed By: martong, steakhal
Differential Revision: https://reviews.llvm.org/D125400
Kazu Hirata [Tue, 21 Jun 2022 06:35:53 +0000 (23:35 -0700)]
Don't use Optional::getValue (NFC)
Nikolas Klauser [Thu, 16 Jun 2022 09:48:10 +0000 (11:48 +0200)]
[libc++] Implement P0174R2 (Deprecating Vestigial Library Parts in C++17)
Reviewed By: ldionne, Mordante, #libc
Spies: jwakely, libcxx-commits
Differential Revision: https://reviews.llvm.org/D127387
Kazu Hirata [Tue, 21 Jun 2022 06:20:25 +0000 (23:20 -0700)]
[mlir] Don't use Optional::getValue (NFC)
Markus Lavin [Tue, 21 Jun 2022 06:08:06 +0000 (08:08 +0200)]
[machinesink] fix debug invariance issue
Do not include debug instructions when comparing block sizes with
thresholds.
Differential Revision: https://reviews.llvm.org/D127208
Kazu Hirata [Tue, 21 Jun 2022 05:59:26 +0000 (22:59 -0700)]
[clang] Don't use Optional::getValue (NFC)
Kazu Hirata [Tue, 21 Jun 2022 05:45:45 +0000 (22:45 -0700)]
[llvm] Don't use Optional::getValue (NFC)
Chen Zheng [Tue, 21 Jun 2022 04:26:17 +0000 (00:26 -0400)]
[PowerPC][ctrloop] handles calls in preheader before MTCTRloop
Argyrios Kyrtzidis [Tue, 21 Jun 2022 05:03:11 +0000 (22:03 -0700)]
[Support/BLAKE3] Do a CMake check for the `-mavx512vl` flag before applying it
Shraiysh Vaishay [Tue, 21 Jun 2022 04:36:54 +0000 (10:06 +0530)]
[mlir][OpenMP] Add omp.taskgroup operation
This patch adds omp.taskgroup operation according to OpenMP 5.0 2.17.6.
Also added tests for the same.
Reviewed By: kiranchandramohan, peixin
Differential Revision: https://reviews.llvm.org/D127250
Shraiysh Vaishay [Mon, 20 Jun 2022 14:10:44 +0000 (19:40 +0530)]
[flang][OpenMP] Fix firstprivate with barrier
This patch fixes the unintentional data race in firstprivate
implementation. There is a Read-Write race when one thread tries
to copy the value inside the omp.parallel region while other
thread modifies it from inside the region (using pointers or
some other form of indirect access).
For detailed discussion please refer to [[ https://discourse.llvm.org/t/issues-with-the-current-implementation-of-privatization-in-openmp-with-fortran/62335 | discourse ]].
Reviewed By: kiranchandramohan, peixin, NimishMishra
Differential Revision: https://reviews.llvm.org/D125689
Argyrios Kyrtzidis [Sun, 19 Jun 2022 05:32:57 +0000 (22:32 -0700)]
[Support/BLAKE3] Enable the SIMD implementations for macOS universal builds
To accomodate macOS universal configuration include the assembly files
and `blake3_neon.c` without a CMake check but instead guard their source
with architecture "#ifdef" checks.
Differential Revision: https://reviews.llvm.org/D128132
Craig Topper [Tue, 21 Jun 2022 03:56:20 +0000 (20:56 -0700)]
[RISCV] Add RISCVISD opcode for PseudoAddTPRel.
Use it along with RISCVISD::HI and ADD_LO to avoid emitting
MachineSDNodes during lowering.
Craig Topper [Tue, 21 Jun 2022 03:20:00 +0000 (20:20 -0700)]
Recommit "[RISCV] Enable subregister liveness tracking for RVV."
The failure that caused the previous revert has been fixed
by https://reviews.llvm.org/D126048
Original commit message:
RVV makes heavy use of subregisters due to LMUL>1 and segment
load/store tuples. Enabling subregister liveness tracking improves the quality
of the register allocation.
I've added a command line that can be used to turn it off if it causes compile
time or functional issues. I used the command line to keep the old behavior
for one interesting test case that was testing register allocation.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/D128016
Serguei Katkov [Wed, 8 Jun 2022 12:14:20 +0000 (19:14 +0700)]
[AARCH64 folding] Do not fold any copy with NZCV
There is no instruction to fold NZCV, so, just do not do it.
Without the fix the added test case crashes with an assert
"Mismatched register size in non subreg COPY"
Reviewed By: danilaml
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D127294
Kazu Hirata [Tue, 21 Jun 2022 03:26:05 +0000 (20:26 -0700)]
Don't use Optional::hasValue (NFC)
Kazu Hirata [Tue, 21 Jun 2022 03:17:57 +0000 (20:17 -0700)]
Don't use Optional::hasValue (NFC)
Kazu Hirata [Tue, 21 Jun 2022 03:05:16 +0000 (20:05 -0700)]
Don't use Optional::hasValue (NFC)
LLVM GN Syncbot [Tue, 21 Jun 2022 02:57:40 +0000 (02:57 +0000)]
[gn build] Port
a71fe49bb534
Chen Zheng [Fri, 8 Apr 2022 07:16:05 +0000 (03:16 -0400)]
[PowerPC] add a new pass to expand ctr loop pseudos
This patch implements a new way to generate the CTR loops. Now the
intrinsics inserted in hardware loop pass will be mapped to pseudo
instructions and these pseudo instructions will be expanded to CTR
loop or normal compare+branch loop in this post ISEL pass.
Reviewed By: lkail
Differential Revision: https://reviews.llvm.org/D122125
Craig Topper [Tue, 21 Jun 2022 01:58:23 +0000 (18:58 -0700)]
[RISCV] Add merge operand to RISCVISD::VRGATHER*_VL nodes.
Use it in place of VSELECT_VL+VRGATHER*_VL.
This simplifies the isel patterns.
Overall, I think trying to match select+op to create masked instructions
in isel doesn't scale. We either need to do it in DAG combine, pre-isel
peepole, or post-isel peephole. I don't yet know which is the right
answer, but for this case it seemed best to be able to request the
masked form directly from lowering.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D128023
chenglin.bi [Mon, 20 Jun 2022 10:27:49 +0000 (18:27 +0800)]
[SelectionDAG][DAGCombiner] Reuse exist node by reassociate
When already have (op N0, N2), reassociate (op (op N0, N1), N2) to (op (op N0, N2), N1) to reuse the exist (op N0, N2)
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D122539
Luo, Yuanke [Tue, 21 Jun 2022 00:10:16 +0000 (08:10 +0800)]
[fastregalloc] Enhance the heuristics for liveout in self loop.
For below case, virtual register is defined twice in the self loop. We
don't need to spill %0 after the third instruction `%0 = def (tied %0)`,
because it is defined in the second instruction `%0 = def`.
1 bb.1
2 %0 = def
3 %0 = def (tied %0)
4 ...
5 jmp bb.1
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D125079
Mogball [Tue, 21 Jun 2022 00:59:05 +0000 (00:59 +0000)]
[mlir][ods] Remove StructAttr
Depends on D127373
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D127375
Phoebe Wang [Tue, 21 Jun 2022 00:40:32 +0000 (08:40 +0800)]
[X86] Make sure SF is updated when optimizing for `jg/jge/jl/jle`
This fixes issue #56103.
Reviewed By: mingmingl
Differential Revision: https://reviews.llvm.org/D128122
Brad Smith [Tue, 21 Jun 2022 01:02:56 +0000 (21:02 -0400)]
[Driver] Pass -X to ld for riscv64-fuchsia
D127826, add support for Fuchsia which uses lld on riscv64
Reviewed By: MaskRay, phosek
Differential Revision: https://reviews.llvm.org/D128134
Jeffrey Tan [Tue, 21 Jun 2022 00:21:18 +0000 (17:21 -0700)]
Fix build break introduced by https://reviews.llvm.org/D127702
Fix build break introduced by https://reviews.llvm.org/D127702
Differential Revision: https://reviews.llvm.org/D128234
archsaxe [Mon, 20 Jun 2022 23:53:03 +0000 (16:53 -0700)]
[test][AlwaysInline]:Correct comment and file check for always-inline.ll
This fixes a useless filecheck and wrong comment for always-inline.ll. Testing
has been done using ninja check-llvm and llvm-lit always-inline.ll --show-all.
Reviewed By: modimo, hoy
Differential Revision: https://reviews.llvm.org/D127815
Pengxuan Zheng [Mon, 20 Jun 2022 22:14:44 +0000 (15:14 -0700)]
[LLD][COFF] Ignore /pdbcompress flag
Microsoft does not seem to document the flag. Ignoring it for now is probably
better than getting an unknown flag error.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D128231
lewuathe [Mon, 20 Jun 2022 23:29:02 +0000 (08:29 +0900)]
[mlir][math] Lower cos,sin to libm
Lower math.cos and math.sin to libm
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D128028
Jeffrey Tan [Fri, 13 May 2022 18:31:23 +0000 (11:31 -0700)]
Support logpoints in lldb-vscode
This patch implements VSCode DAP logpoints feature (also called tracepoint
in other VS debugger).
This will provide a convenient way for user to do printf style logging
debugging without pausing debuggee.
Differential Revision: https://reviews.llvm.org/D127702
Nico Weber [Mon, 20 Jun 2022 23:15:57 +0000 (19:15 -0400)]
Revert "[lld-macho] Show source information for undefined references"
This reverts commit
cd7624f15369f0d395c1edee1a0b9592083d2fe0.
See https://reviews.llvm.org/D128184#3597534
Daniel Bertalan [Mon, 20 Jun 2022 22:49:42 +0000 (18:49 -0400)]
[lld-macho] Show source information for undefined references
The error used to look like this:
ld64.lld: error: undefined symbol: _foo
>>> referenced by /path/to/bar.o:(symbol _baz+0x4)
If DWARF line information is available, we now show where in the source
the references are coming from:
ld64.lld: error: unreferenced symbol: _foo
>>> referenced by: bar.cpp:42 (/path/to/bar.cpp:42)
>>> /path/to/bar.o:(symbol _baz+0x4)
Differential Revision: https://reviews.llvm.org/D128184
Kazushi (Jam) Marukawa [Sat, 18 Jun 2022 14:16:38 +0000 (23:16 +0900)]
[Clang][VE] Add missing intrinsics
Add missing intrinsics and tests for them. An expanding macro
from _vel_pack_f32p to __builtin_ve_vl_pack_f32p and others is
already defined in clang/lib/Headers/velintrin.h.
Reviewed By: efocht
Differential Revision: https://reviews.llvm.org/D128120
Maksim Panchenko [Mon, 20 Jun 2022 21:20:22 +0000 (14:20 -0700)]
[BOLT][TEST] Fix stack alignment in section-reloc-with-addend.s
Misaligned stack can cause a runtime crash.
Reviewed By: Amir
Differential Revision: https://reviews.llvm.org/D128227
Martin Storsjö [Mon, 20 Jun 2022 21:19:09 +0000 (00:19 +0300)]
[lldb] Fix building with GCC 7
Ruiling Song [Wed, 9 Mar 2022 14:12:42 +0000 (22:12 +0800)]
[AMDGPU] Mark GFX11 dual source blend export as strict-wqm
The instructions that generate the source of dual source blend export
should run in strict-wqm. That is if any lane in a quad is active,
we need to enable all four lanes of that quad to make the shuffling
operation before exporting to dual source blend target work correctly.
Differential Revision: https://reviews.llvm.org/D127981
Piotr Sobczak [Thu, 11 Mar 2021 16:52:11 +0000 (17:52 +0100)]
[AMDGPU] Tag GFX11 LDS loads as using strict_wqm
LDS_PARAM_LOAD and LDS_DIRECT_LOAD use EXEC per quad
(if any pixel is enabled in the quad, data is written
to all 4 pixels/threads in the quad).
Tag LDS_PARAM_LOAD and LDS_DIRECT_LOAD as using strict_wqm
to enforce this and avoid lane clobbering issues.
Note that only the instruction itself is tagged.
The implicit uses of these do not need to be set WQM.
The reduces unnecessary WQM calculation of M0.
Differential Revision: https://reviews.llvm.org/D127977
Jay Foad [Thu, 16 Jun 2022 14:02:06 +0000 (15:02 +0100)]
[AMDGPU] Add support for GFX11 LDSDIR hazards
Detect LDS direct WAR/WAW hazards and compute values for
wait_vdst (va_vdst) parameter. Where appropriate this
raises wait_vdst from the default 0 to allow concurrent
issue of LDS direct with VALU execution.
Also detect LDS direct versus VMEM source VGPR hazards
and insert vm_vsrc=0 waits using s_waitcnt_depctr.
Differential Revision: https://reviews.llvm.org/D127963
Philip Reames [Mon, 20 Jun 2022 20:16:15 +0000 (13:16 -0700)]
[BasicTTI] Return Invalid for scalable vectors reaching getScalarizationOverhead
If we would scalarize a fixed vector, we know we can't do so for a scalable one. However, there's no need to crash, we can instead simply return a invalid cost which will work its way through the computation (since invalid is sticky), and the client should bail out.
Sorry for the lack of test here. The particular codepath I saw this reached on was the result of another bug.
Amir Ayupov [Mon, 20 Jun 2022 19:58:31 +0000 (12:58 -0700)]
[TableGen] Emit instruction name in INSTRINFO_OPERAND_TYPE
Make Offsets and OpcodeOperandTypes tables human-readable by printing the
instruction name before the operand list.
In effect, this makes debugging generated `getOperandType` possible.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D127931
Philip Reames [Mon, 20 Jun 2022 19:13:24 +0000 (12:13 -0700)]
[RISCV] Fix crash when costing scalable gather/scatter of pointer
This was a bug introduced in d764aa. A pointer type is not a primitive type, and thus we were ending up dividing by zero when computing VLMax.
Differential Revision: https://reviews.llvm.org/D128219
Mehdi Chinoune [Mon, 20 Jun 2022 19:39:00 +0000 (12:39 -0700)]
[CMake][MSVC] Compile with `/permissive-`
This turns off a bunch of non-standard behaviors in MSVC. LLVM, as a
portable codebase, should build correctly without those behaviors. Note
that `/permissive-` implies `/Zc:strictStrings` and `/Zc:rvalueCast`.
See also:
https://docs.microsoft.com/en-us/cpp/build/reference/permissive-standards-conformance
Differential Revision: https://reviews.llvm.org/D125263
Amir Ayupov [Mon, 20 Jun 2022 19:40:52 +0000 (12:40 -0700)]
Revert "[TableGen] Emit instruction name in INSTRINFO_OPERAND_TYPE"
This reverts commit
4cd416193cc126355a22b2c9e5c1df3a49b59e50.
Florian Hahn [Mon, 20 Jun 2022 19:33:45 +0000 (21:33 +0200)]
[ConstraintElimination] Move logic to get a constraint to helper (NFC).
Nemanja Ivanovic [Mon, 20 Jun 2022 13:45:24 +0000 (08:45 -0500)]
[PowerPC] Disable automatic generation of STXVP
There are instances where using paired vector stores leads to significant
performance degradation due to issues with store forwarding.To avoid falling
into this trap with compiler - generated code, we will not emit these
instructions unless the user requests them explicitly(with a builtin or by
specifying the option).
Reviewed By : lei, amyk, saghir
Differential Revision: https://reviews.llvm.org/D127218
Amir Ayupov [Mon, 20 Jun 2022 19:23:39 +0000 (12:23 -0700)]
[TableGen] Emit instruction name in INSTRINFO_OPERAND_TYPE
Make Offsets and OpcodeOperandTypes tables human-readable by printing the
instruction name before the operand list.
In effect, this makes debugging generated `getOperandType` possible.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D127931
Jakob Johnson [Fri, 17 Jun 2022 20:37:07 +0000 (13:37 -0700)]
Add LoadTraceFromFile to SBDebugger and SBTrace
Add trace load functionality to SBDebugger via the `LoadTraceFromFile` method.
Update intelpt test case class to have `testTraceLoad` method so we can take advantage of
the testApiAndSB decorator to test both the CLI and SB without duplicating code.
Differential Revision: https://reviews.llvm.org/D128107
Kazu Hirata [Mon, 20 Jun 2022 18:49:10 +0000 (11:49 -0700)]
Don't use Optional::hasValue (NFC)
Kazu Hirata [Mon, 20 Jun 2022 18:33:56 +0000 (11:33 -0700)]
Don't use Optional::hasValue (NFC)
Kazu Hirata [Mon, 20 Jun 2022 18:22:37 +0000 (11:22 -0700)]
[mlir] Don't use Optional::hasValue (NFC)
David Green [Mon, 20 Jun 2022 18:11:57 +0000 (19:11 +0100)]
[AArch64] Known bits for AArch64ISD::DUP
An AArch64ISD::DUP is just a splat, where the known bits for each lane
are the same as the input. This teaches that to computeKnownBitsForTargetNode.
Problems arise for constants though, as a constant BUILD_VECTOR can be
lowered to an AArch64ISD::DUP, which SimplifyDemandedBits would then
turn back into a constant BUILD_VECTOR leading to an infinite cycle.
This has been prevented by adding a isTargetCanonicalConstantNode node
to prevent the conversion back into a BUILD_VECTOR.
Differential Revision: https://reviews.llvm.org/D128144
Kazu Hirata [Mon, 20 Jun 2022 17:51:34 +0000 (10:51 -0700)]
[clang] Don't use Optional::hasValue (NFC)
Simon Pilgrim [Mon, 20 Jun 2022 17:16:49 +0000 (18:16 +0100)]
[X86] LowerINSERT_VECTOR_ELT - always lower v32i8/v16i16 allones insertions on AVX1 as OR ops
v32i8/v16i16 blend shuffles on AVX1 will expand to OR(AND,ANDN) patterns which can be easily broken by other combines
Michał Górny [Fri, 17 Jun 2022 10:25:26 +0000 (12:25 +0200)]
[lldb] [test] Fix test_platform_file_fstat to account for negative ints
Fix test_platform_file_fstat to correctly truncate/max out the expected
value when GDB Remote Serial Protocol specifies a value as an unsigned
integer but the underlying platform type uses a signed integer.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D128042
Michał Górny [Fri, 17 Jun 2022 09:45:49 +0000 (11:45 +0200)]
[lldb] [test] Make AVX/MPX register tests more robust and fix on BSD
Make the AVX/MPX register tests more robust by checking for the presence
of actual registers rather than register sets. Account for the option
that the respective registers are defined but not available, as is
the case on FreeBSD and NetBSD. This fixes test regression on these
platforms.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D128041
Michał Górny [Fri, 17 Jun 2022 07:41:47 +0000 (09:41 +0200)]
[lldb] [test] Disable gmodules testing on FreeBSD
The -gmodule tests currently fail on FreeBSD due to include bugs:
https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=264730
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D128034
Michał Górny [Thu, 9 Jun 2022 16:54:50 +0000 (18:54 +0200)]
[lldb] [llgs] Refactor SendStopReasonForState for multiprocess
Refactor GDBRemoteCommunicationServerLLGS::SendStopReasonForState()
to accept process as an argument rather than hardcoding
m_current_process, in order to make it work correctly for multiprocess
scenarios.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D127497
Michał Górny [Tue, 7 Jun 2022 15:04:01 +0000 (17:04 +0200)]
[lldb] [llgs] Refactor SendStopReplyPacketForThread for multiprocess
Refactor SendStopReplyPacketForThread() to accept process instance
as a parameter rather than use m_current_process. This future-proofs
it for multiprocess support.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D127289
Philip Reames [Mon, 20 Jun 2022 17:36:53 +0000 (10:36 -0700)]
[BasicTTI] Allow generic handling of scalable vector fshr/fshl
This change removes an explicit scalable vector bailout for fshl and fshr. This bailout was added in
60e4698b9aba8, when sinking a unconditional bailout for all intrinsics into selected cases. Its not clear if the bailout was originally unneeded, or if our cost model infrastructure has simply matured in the meantime. Either way, the generic code appears to handle scalable vectors without issue.
Note that the RISC-V cost model changes here aren't particularly interesting. They do probably better match the current lowering, but the main point is to have coverage of the BasicTTI path and simply show lack of crashing.
AArch64 costing was changed to preserve legacy behavior. There will most likely be an upcoming change to use the generic costs there too, but I didn't want to make that change not being particularly familiar with the target.
Differential Revision: https://reviews.llvm.org/D127680
Kazu Hirata [Mon, 20 Jun 2022 17:38:12 +0000 (10:38 -0700)]
[llvm] Don't use Optional::hasValue (NFC)
Stanislav Gatev [Mon, 20 Jun 2022 11:02:51 +0000 (11:02 +0000)]
[clang][dataflow] Extend flow condition in the body of a do/while loop
Extend flow condition in the body of a do/while loop.
Differential Revision: https://reviews.llvm.org/D128183
Reviewed-by: gribozavr2, xazax.hun
Arthur Eubanks [Mon, 20 Jun 2022 17:26:47 +0000 (10:26 -0700)]
Revert "[GlobalOpt] Perform store->dominated load forwarding for stored once globals"
This reverts commit
6f348b146b69a50d5fb1b9fbfd14bc1d204e45c4.
Am seeing internal test failures plus a linux kernel breakage reported due to this.
Arthur Eubanks [Mon, 20 Jun 2022 17:25:10 +0000 (10:25 -0700)]
Revert "[GlobalOpt] Preserve CFG analyses"
This reverts commit
cc65f3e167144c39ef9ca3a69c3148b71dcab496.
Causes crashes: https://github.com/llvm/llvm-project/issues/56131
Philip Reames [Mon, 20 Jun 2022 17:11:06 +0000 (10:11 -0700)]
[RISCV] Delete unexercised VL=0 vsetvli compatibility logic
The code being removed is technically correct; if we end up with two VL=0 instructions next to each other, we can avoid a state transition if the second is a scalar move. However, since both ops are also nops, we should simply delete them instead. As such, this compatibility rule simply complicates the code for no purpose.
David Candler [Mon, 20 Jun 2022 15:03:59 +0000 (16:03 +0100)]
[ConstantFolding] Respect denormal handling mode attributes when folding instructions
Depending on the environment, a floating point instruction should
treat denormal inputs as zero, and/or flush a denormal output to zero.
Denormals are not currently accounted for when an instruction gets
folded to a constant, which can lead to differences in output between
a folded and a unfolded instruction when running on the target. The
denormal handling mode can be set by the function level attribute
denormal-fp-math, which this patch uses to determine whether any
denormal inputs to or outputs from folding should be zero, and that
the sign is set appropriately.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D116952
Fraser Cormack [Mon, 20 Jun 2022 10:03:19 +0000 (11:03 +0100)]
Update usage comments in Printable.h. NFC.
The example wouldn't compile, and used an invalid case style for a
function.
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D128176
Guillaume Chatelet [Mon, 20 Jun 2022 15:02:59 +0000 (15:02 +0000)]
[Alignment] Remove alignTo version taking a MaybeAlign
Guillaume Chatelet [Mon, 20 Jun 2022 15:01:41 +0000 (15:01 +0000)]
[NFC] Simplify alignment code in MemorySanitizer
Guillaume Chatelet [Mon, 20 Jun 2022 15:00:45 +0000 (15:00 +0000)]
[NFC] Simplify alignment code in CoroFrame
Guillaume Chatelet [Mon, 20 Jun 2022 14:48:53 +0000 (14:48 +0000)]
[NFC] Simplify code
Florian Hahn [Mon, 20 Jun 2022 15:08:35 +0000 (17:08 +0200)]
[ConstraintElimination] Move logic to add constraint to helper (NFC).
Krzysztof Drewniak [Fri, 17 Jun 2022 18:31:05 +0000 (18:31 +0000)]
[mlir][ROCDL] Define MLIR wrappers around new MFMA intrinsics
In order to support newer hardware, define wrappers around MFMA
intrinsics that have not previously been exposed in the ROCDL dialect.
A `amdgpu.mfma` wrapper around these instructions is in development
and will provide a more user-friendly interface to them.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D128079
Krzysztof Drewniak [Fri, 17 Jun 2022 20:39:59 +0000 (20:39 +0000)]
[mlir][Arith] Make --unsigned-when-equivalent use dialect conversion
Reviewed By: Mogball
Differential Revision: https://reviews.llvm.org/D128096
Philip Reames [Mon, 20 Jun 2022 14:46:46 +0000 (07:46 -0700)]
[RISCV] Fold prepass back into InsertVSETVLI data flow [nfc-ish]
When working through correctness issues in this pass, I moved a number of transforms which were phrased as mutating prior vsetvli instructions out of the main data flow because mutating prior instructions can invalidate the running dataflow results in subtle ways. We ended up creating both a prepass and a post-pass.
After consideration, I believe the prepass to be redundant, and this change removes it by folding it back into the data flow via a key conceptual change. Instead of phrasing the mutations on instructions, we can phrase them on abstract states. This avoids the dataflow inconsistency problem mentioned above by simply propagating the potential change forward, and thus reflecting its results in the dataflow. Critically, we do so without modifying existing VSETVLI instructions; some of the data flow steps include non-local IR analysis.
Compile time wise, this removes a linear pass, but has the potential to increase the number of iterations for the data flow to converge. That's not a algorithmic complexity change, the needVSETVLI mechanism has the same effect. In practice, I don't see this triggering more iterations, so I think it's likely to be a net win overall. (I didn't do any careful analysis here; just an impression from glancing at a couple tests.)
This has the potential to produce better results, so this isn't strictly speaking NFC.
Differential Revision: https://reviews.llvm.org/D127870
Jan Svoboda [Mon, 20 Jun 2022 14:56:03 +0000 (16:56 +0200)]
[support][ci] Fix modular build on GreenDragon
This is to fix the following error on https://green.lab.llvm.org/green/job/clang-stage2-Rthinlto:
BranchProbability.h:236:34: error: declaration of 'distance' must be imported from module 'std.iterator.__iterator.distance' before it is required
Philip Reames [Mon, 20 Jun 2022 14:41:18 +0000 (07:41 -0700)]
[RISCV] Assert initial load/store SEW is the EEW
In D127983, I had flipped from using the computed EEW to using the SEW value pulled from the VSETVLI when checking compatibility. This wasn't intentional, though thankfully it appears to be a non-functional difference. The new code does make a unchecked assumption that the initial SEW operand on the load/store is the EEW. This patch clarifies the assumption, and adds an assert to make sure this remains true.
Differential Revision: https://reviews.llvm.org/D128085
Kadir Cetinkaya [Mon, 20 Jun 2022 13:23:32 +0000 (15:23 +0200)]
[clangd] Handle initializers that contain =
Differential Revision: https://reviews.llvm.org/D128197