Tom Rini [Wed, 10 Feb 2021 02:42:44 +0000 (21:42 -0500)]
ata: DWC_AHSATA depends on BLK
The dwc ahsata driver is written such that CONFIG_BLK must be enabled,
add this as a dependency in Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 10 Feb 2021 02:42:43 +0000 (21:42 -0500)]
am57xx_hs_evm_usb: Enable AHCI and BLK
Enable the AHCI and BLK features to complete migration of various
drivers.
Cc: Andrew F. Davis <afd@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 10 Feb 2021 02:42:42 +0000 (21:42 -0500)]
ls1012aqds_tfa_SECURE_BOOT: Remove unused CONFIG_SCSI_AHCI
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 9 Apr 2021 17:10:59 +0000 (13:10 -0400)]
Merge tag 'u-boot-stm32-
20210409' of https://source.denx.de/u-boot/custodians/u-boot-stm
Add rt-thread art-pi board support based on STM32H750 SoC
Add Engicam i.Core STM32MP1 SoM
Add FIP header support for STM32programmer
Update uart number when no serial device found for STM32MP1
Remove board_check_usb_power function when ADC flag is not set
Update SPL size limitation for STM32MP1
Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
Tom Rini [Fri, 9 Apr 2021 17:10:38 +0000 (13:10 -0400)]
Merge branch 'v2021.07-rc1' of https://github.com/lftan/u-boot
Tom Rini [Fri, 9 Apr 2021 11:41:32 +0000 (07:41 -0400)]
Merge tag 'u-boot-imx-
20210409' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-
20210409
-------------------
- Secure Boot :
- HAB for MX8M / MX7ULP
- CAAM fixes
- Fixes for imxrt1020
- Fixes for USDHC driver
- Fixes for Toradex (Colibri / Apalis)
- Switch to DM for several boards
- mx23 olinuxo
- usbarmory
- marsboard / riotboard
- Gateworks GW Ventana
- NXP upstream patches (LPDDR / CAAM / HAB)
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
Marek Vasut [Wed, 31 Mar 2021 12:15:09 +0000 (14:15 +0200)]
arm: stm32mp1: Set soc_type, soc_pkg, soc_rev env variables
Split up get_soc_name(), clean the decoding up a bit, and set up
environment variables which contain the SoC type, package, revision.
This is useful on SoMs, where multiple SoC options are populated.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Alexandru Gagniuc [Mon, 22 Mar 2021 13:20:01 +0000 (08:20 -0500)]
configs: stm32mp1: Fix misleading SPL size limitations
A now removed comment promises to "limit SYSRAM usage to first 128 KB".
This would imply that only SYSRAM from 0x2ffc0000 - 0x2ffe0000 would be
used. This is not what happens at all.
First, SPL_MAX_SIZE is referenced from SPL_TEXT_BASE, which on all
existing configs is set to 0x2ffc2500, not SYSRAM_BASE (0x2ffc0000).
Some of it is in the first 128 KiB and some of it is in the second
128 KiB chunk of SYSRAM.
Second, SPL_MAX_SIZE, does not restrict the BSS size. While a valiant
attempt is made via SPL_BSS_MAX_SIZE, the value of 0x00100000 is much
larger than SYSRAM, and doesn't account for the non-BSS sections.
Because we're putting the .text and .bss in the same boat, the correct
way to limit them together is via SPL_MAX_FOOTPRINT. With the current
SPL_TEXT_BASE, we couldn't limit even a very basic SPL to the first
128 KiB, and there is no technical reason to do so. Because of this,
simply allow the SPL to use all SYSRAM.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Alexandru Gagniuc [Mon, 22 Mar 2021 13:20:00 +0000 (08:20 -0500)]
configs: stm32mp1: Remove misleading CONFIG_SPL_BSS_START_ADDR
CONFIG_SPL_BSS_START_ADDR is only used on a few mach- linker scripts.
stm32mp1 uses the generic script under arch/arm/cpu/u-boot-spl.lds,
which does not make use of this definition.
The SPL BSS starts in SRAM, right after .text, .rodata, .data, and
.u_boot_list. A very short version of the STM32MP1 memory map is:
* SYSRAM:
2ffc0000 -
30000000 <- all of SPL is here
* DRAM:
c0000000+
0xC0200000 is a DRAM address, and has nothing to do with SPL. It is
just very misleading to have it next to CONFIG_SPL_BSS_MAX_SIZE, or to
have it at all.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Alexandru Gagniuc [Mon, 22 Mar 2021 13:19:59 +0000 (08:19 -0500)]
configs: stm32mp1: stm32mp1: Increase SPL malloc() size
Since commit
03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer for
loading images"), FIT images must be malloc()'d before being loaded.
The old size of 1 MiB is suitable for FIT images with u-boot and an
FDT, but something containing a linux kernel is almost sure to fail.
It's safe to extend malloc all the way to 0xc2000000, but no further.
Linux likes to be loaded at 0xc2000000, so we use that as our cutoff
point. This gives us 29 MiB of malloc() space, which suited for more
complex FIT images including several DTBs, kernel, and OP-TEE images.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Tue, 6 Apr 2021 07:57:54 +0000 (09:57 +0200)]
stm32mp1: remove the board_check_usb_power function when ADC is not activated
Simplify the code of the function board_check_usb_power
based in CONFIG_ADC and adc_measurement; the function is removed by the
linker when the CONFIG_ADC is not activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Patrick Delaunay [Tue, 6 Apr 2021 07:27:39 +0000 (09:27 +0200)]
stm32mp: replace printf by log macro in setup_boot_mode
Replace the remaining printf in setup_boot_mode() by log macro
to handle filtering for log features.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Tue, 6 Apr 2021 07:27:38 +0000 (09:27 +0200)]
stm32mp: update uart number in trace of serial device not found
Align the uart number in the trace of setup_boot_mode() with the name of
the uart/usart device (start at 1) and not with the instance value
(start at 0), i.e. the serial device sequence number and the index in
serial_addr[].
Fixes:
f49eb16c17e2c ("stm32mp: stm32prog: replace alias by serial
device sequence number")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Fri, 2 Apr 2021 12:05:17 +0000 (14:05 +0200)]
stm32mp: stm32prog: add FIP header support
Add support of TF-A FIP header in command stm32prog for all the boot
partition and not only the STM32IMAGE.
This patch is a preliminary patch to support FIP as second boot stage
after TF-A BL2 when CONFIG_TFABOOT is activated for trusted boot chain.
The FIP is archive binary loaded by TF-A BL2, which contains the secure OS
= OP-TEE and the non secure firmware and device tree = U-Boot.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Jagan Teki [Tue, 16 Mar 2021 16:22:07 +0000 (21:52 +0530)]
board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OF
7" OF is a capacitive touch 7" Open Frame panel solutions with
- 7" AUO B101AW03 LVDS panel
- EDT, FT5526 Touch
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.
MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0
7" Open Frame Solution board.
Linux dts commit details:
commit <
1d278204cbaa> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
MicroDev 2.0 7" OF")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 16 Mar 2021 16:22:06 +0000 (21:52 +0530)]
board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 board
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.
Genaral features:
- Ethernet 10/100
- USB Type A
- Audio Out
- microSD
- LVDS panel connector
- Wifi/BT (option)
- UMTS LTE with sim connector (option)
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.
MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
Linux dts commit details:
commit <
f838dae7afd0> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
MicroDev 2.0 board")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 16 Mar 2021 16:22:05 +0000 (21:52 +0530)]
ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 Micro SoM
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.
General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S
MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
boards for creating complete platform solutions.
Linux dts commit details:
commit <
0be81dfaeaf8> ("ARM: dts: stm32: Add Engicam MicroGEA STM32MP1
SoM")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 16 Mar 2021 16:22:04 +0000 (21:52 +0530)]
board: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.
Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
i.Core STM32MP1 needs to mount on top of this Carrier board for
creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
Linux dts commit details:
commit <
6ca2898df59f> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
C.TOUCH 2.0")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 16 Mar 2021 16:22:03 +0000 (21:52 +0530)]
board: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.
Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
i.Core STM32MP1 needs to mount on top of this Evaluation board for
creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
Linux dts commit details:
commit <
adc0496104b6> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
EDIMM2.2 Starter Kit")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 16 Mar 2021 16:22:02 +0000 (21:52 +0530)]
ARM: stm32: Imply SPL_SPI_LOAD
SPI Load isn't mandatory for STM32 builds.
Let's imply instead of select it to get rid of build
issues for non-SPI defconfigs.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 16 Mar 2021 16:22:01 +0000 (21:52 +0530)]
ARM: dts: stm32: Add Engicam i.Core STM32MP1 1X4Gb DDR3
Engicam i.Core STM32MP1 SODIMM SoM has mounted 1x4Gb DDR3
which has 32bits width 528000Khz frequency.
Add DDR configuration via dtsi.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 16 Mar 2021 16:22:00 +0000 (21:52 +0530)]
ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.
General features:
- STM32MP157A
- Up to 1GB DDR3L
- 4GB eMMC
- 10/100 Ethernet
- USB 2.0 Host/OTG
- I2S
- MIPI DSI to LVDS
- rest of STM32MP157A features
i.Core STM32MP1 needs to mount on top of Engicam baseboards
for creating complete platform solutions.
Linux commit details:
commit <
30f9a9da4ee1> ("ARM: dts: stm32: Add Engicam i.Core STM32MP1
SoM")
Add support for it.
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
dillon min [Fri, 9 Apr 2021 07:28:46 +0000 (15:28 +0800)]
board: Add rt-thread art-pi board support
All these files are add for support rt-thread art-pi board
- add board/st/stm32h750-art-pi, defconfig, header support for u-boot
for more information about art-pi, please goto:
https://art-pi.gitee.io/website/
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
dillon min [Fri, 9 Apr 2021 07:28:45 +0000 (15:28 +0800)]
ram: stm32: fix strsep failed on read only memory
strsep will change data from original memory address,
in case the memory is in non-sdram/sram place, will
run into a bug(hang at SDRAM: )
just add a temporary array to store bank_name[] to fix this
bug.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
dillon min [Fri, 9 Apr 2021 07:28:44 +0000 (15:28 +0800)]
ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6
This patchset has following changes:
- introduce stm32h750.dtsi to support stm32h750 value line
- add pin groups for usart3/uart4/spi1/sdmmc2
- add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile)
- add stm32h750i-art-pi.dts to support art-pi board
- add stm32h750i-art-pi-u-boot.dtsi to support art-pi board (u-boot)
art-pi board component:
- 8MiB qspi flash
- 16MiB spi flash
- 32MiB sdram
- ap6212 wifi&bt&fm
the detail board information can be found at:
https://art-pi.gitee.io/website/
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
dillon min [Fri, 9 Apr 2021 07:28:43 +0000 (15:28 +0800)]
ARM: dts: stm32: fix i2c node typo in stm32h743, update dmamux1 register
Replace upper case by lower case in i2c nodes name.
update dmamux1 register range.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
dillon min [Fri, 9 Apr 2021 07:28:42 +0000 (15:28 +0800)]
ARM: dts: stm32: add new instances for stm32h743 MCU
Some instances are missing in current support of stm32h743 MCU. This commit
adds usart3/uart4 and sdmmc2 support.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
dillon min [Fri, 9 Apr 2021 07:28:41 +0000 (15:28 +0800)]
ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750
This patch is intend to add support stm32h750 value line,
just add stm32h7-pinctrl.dtsi for extending, with following changes:
- rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi
- move 'pin-controller' from stm32h7-pinctrl.dtsi to stm32h743.dtsi
- update stm32h743i-{disco, eval}.dts to include stm32h7-pinctrl.dtsi
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
dillon min [Fri, 9 Apr 2021 07:28:40 +0000 (15:28 +0800)]
ARM: dts: stm32: split sdram pin & timing parameter into specific board dts
As different boards has their own sdram hw connection, mount different
sdram modules, so move sdram timing parameter and pin configuration
to their board device tree.
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Max Krummenacher [Thu, 11 Mar 2021 17:18:07 +0000 (18:18 +0100)]
imx: bootaux fix elf loading
This reverts the arch/arm/mach-imx/imx_bootaux.c changes of commit
805b3cac1e0c. The loader function name was changed so that it does
not clash with the generically available function in lib/elf.c.
imx-bootaux loads an elf file linked for an auxilary core. Thus the
loader function requires address translation from the auxilary core's
address space to where those are mapped into U-Boot's address space.
So the elf loader is specific and must not be replaced with a generic
loader which doesn't provide the address translation functionality.
Fixes commit
805b3cac1e0c ("lib: elf: Move the generic elf
loading/validating functions to lib")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Fabio Estevam [Fri, 5 Mar 2021 22:11:49 +0000 (19:11 -0300)]
pico-imx6ul: Pass the PMIC I2C address in pmic_get()
Pass "pfuze3000@8" in pmic_get() so that the PMIC node can
be found in the devicetree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Haibo Chen [Mon, 22 Mar 2021 10:55:38 +0000 (18:55 +0800)]
mmc: fsl_esdhc_imx: add extra delay for IO voltage switch if necessary
Some board like imx8mm-evkb, IO voltage switch from 3.3v to 1.8v need
around 18ms, common code only delay 10ms, so need to delay extra 8ms.
Otherwise voltage switch will timeout when wait for data0 line.
This IO voltage switch time depends on board design, depend on the
PMIC and capacitance. imx8mm-evkb board use PCA9450(PMIC) and 10uF
capacitance.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Haibo Chen [Mon, 22 Mar 2021 10:55:37 +0000 (18:55 +0800)]
mmc: fsl_esdhc_imx: remove redundant cmd11 related code.
Common code already handle the voltage switch sequence based on spec,
so remove the redundant voltage switch code.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Heinrich Schuchardt [Tue, 16 Mar 2021 20:46:39 +0000 (21:46 +0100)]
imx6: icorem6: chmod 644 enigcam.bmp
Bitmap files should not be executable.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Yuichiro Goto [Mon, 29 Mar 2021 00:14:02 +0000 (09:14 +0900)]
imx: imx6ull: fix pinmux sel_input value for uart5 pins
sel_input value for the following uart5 pins is
different between i.MX6UL and i.MX6ULL:
MX6_PAD_UART5_TX_DATA__UART5_DTE_RX
MX6_PAD_UART5_RX_DATA__UART5_DCE_RX
MX6_PAD_ENET1_RX_EN__UART5_DCE_RTS
MX6_PAD_ENET1_TX_DATA0__UART5_DTE_RTS
MX6_PAD_CSI_DATA02__UART5_DCE_RTS
As sel_input value for the second one is fixed by
the previous commit, fix the rest.
Signed-off-by: Yuichiro Goto <goto@k-tech.co.jp>
Marek Vasut [Thu, 25 Mar 2021 00:20:48 +0000 (01:20 +0100)]
doc: imx: psb: Document usage of SRC_GPR10 PERSIST_SECONDARY_BOOT for A/B switching
Document SRC_GPR10 PERSIST_SECONDARY_BOOT functionality. This is useful for
reliable bootloader A/B updates, as it permits switching between two copies
of bootloader at different offsets of the same storage. The switch happens
in case one copy is corrupted OR can be enforced by user. This functionality
is present at least since i.MX53, however is poorly documented in all known
SoC datasheets, hence this document aims to clarify the usage, currently on
i.MX7D and i.MX8MM.
Signed-off-by: Marek Vasut <marex@denx.de> # Original MX7D work, this document
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> # All the MX8M work
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Harald Seiler <hws@denx.de>
Cc: Igor Opaniuk <igor.opaniuk@foundries.io>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Ludwig Zenz <lzenz@dh-electronics.com>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Niel Fourie [Mon, 22 Mar 2021 13:05:11 +0000 (14:05 +0100)]
ARM: pcm058: Match mainline Linux NAND ECC layout/behaviour
Enabled "fsl,legacy-bch-geometry" in U-Boot device tree overlay
to match the legacy BCH geometry layout, which mainline Linux
applies when "fsl,use-minimum-ecc" is not specified in the device
tree.
Reinstated SYS_NAND_ONFI_DETECTION, which when disabled, masked
the mismatch on SOMs with Winbond NAND flash chips.
Signed-off-by: Niel Fourie <lusus@denx.de>
Trevor Woerner [Mon, 22 Mar 2021 15:31:29 +0000 (11:31 -0400)]
mx23_olinuxino: convert MMC to driver model
Convert the Olimex Olinuxino board's support for MMC to driver model following
Fabio Estevam's excellent example from:
commit:
23013aa9619881290dbeb6217f1fab863869050e:
mx23evk: Convert to driver model
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Trevor Woerner [Mon, 22 Mar 2021 15:31:28 +0000 (11:31 -0400)]
mx23_olinuxino: enable device tree
Add the dts file for the Olimex Olinuxino from the linux kernel, and enable
its use in this machine's defconfig.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Haibo Chen [Wed, 3 Mar 2021 09:05:46 +0000 (17:05 +0800)]
mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output
For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these
are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the
card clock output.
After commit
b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support"),
we meet SD3.0 card can't work at UHS mode, mmc_switch_voltage() fail because
the second mmc_wait_dat0 return -ETIMEDOUT. According to SD spec, during
voltage switch, need to gate off/on the card clock. If not set the FRC_SDCLK_ON,
after CMD11, hardware will gate off the card clock automatically, so card do
not detect the clock off/on behavior, so will draw the data0 line low until
next command.
Fixes:
b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support")
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Peter Robinson [Fri, 2 Apr 2021 16:52:51 +0000 (17:52 +0100)]
ARM: imx: udoo: convert to DM_ETH
Convert the UDOO board to use DM_ETH.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 16:52:50 +0000 (17:52 +0100)]
ARM: imx: udoo: Convert block devices to DM
Enable DM block, DM MMC and DM SATA support on iMX6 Udoo
convert board code to match the DM support.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 16:52:49 +0000 (17:52 +0100)]
ARM: imx: udoo: drop MTD config
The UDOO doesn't have any MTD storage so drop the config.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 16:52:48 +0000 (17:52 +0100)]
ARM: imx: udoo: Enable OF_CONTROL and DM gpio/pin control
Enable OF_CONTROL and DM for gpio and pin control support
on the i.MX6 based Udoo boards.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 16:52:47 +0000 (17:52 +0100)]
ARM: board: udoo: Import UDOO dts files
Import the i.MX6 based UDOO dts files from Linux 5.12-rc1.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Peter Robinson [Fri, 2 Apr 2021 14:52:33 +0000 (15:52 +0100)]
ARM: embestmx6boards: convert the mars/riot boards to DM SPI
Enable DM_SPI and DM_SPI_FLASH on the mars/riot boards.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 14:52:32 +0000 (15:52 +0100)]
ARM: embestmx6boards: convert mars/riot boards to DM_ETH
Convert the boards to use DM_ETH.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 14:52:31 +0000 (15:52 +0100)]
ARM: embestmx6boards: convert mars/riot boards to DM_USB
Convert the marsboard/riotboard to use DM_USB.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 14:52:30 +0000 (15:52 +0100)]
ARM: embestmx6boards: convert the mars/riot boards to DM_MMC
Convert the two Embest boards to use DM MMC.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 14:52:29 +0000 (15:52 +0100)]
ARM: riotboard: Enable OF_CONTROL and DM gpio/pin control
Enable OF_CONTROL and DM for gpio and pin control support
on the i.MX6D based riotboard.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 14:52:28 +0000 (15:52 +0100)]
ARM: embestmx6boards: merge the riotboard's configs together
It doesn't make much sense to have two separate configs for
the riotboard so let's merge the SPL config into the main one
for less duplication.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 14:52:27 +0000 (15:52 +0100)]
ARM: marsboard: Enable OF_CONTROL and DM gpio/pin control
Enable OF_CONTROL and DM for gpio and pin control support
on the i.MX6Q based embestmx6boards marsboard.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Fri, 2 Apr 2021 14:52:26 +0000 (15:52 +0100)]
ARM: embestmx6boards: Import the marsboard/riotboard. dts files
Import the iMX6 based marsboard and riotboard. dts files from Linux 5.12-rc1
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Giulio Benetti [Sun, 4 Apr 2021 18:21:35 +0000 (20:21 +0200)]
board: st: stm32f746-disco: fix console is not enabled while init dram
While initializing dram in spl_dram_init(), mdelay() is called that in
order calls get_ticks() that verifies if timer exists, if doesn't, it
throws a panic(), but since preloader_console_init() has still not been
called those panic()s will fail. This doesn't help debugging, so let's
setup console before calling spl_dram_init() by moving it after
spl_dram_init().
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Sun, 4 Apr 2021 18:21:34 +0000 (20:21 +0200)]
board: freescale: imxrt1050-evk: fix console is not enabled while init dram
While initializing dram in spl_dram_init(), mdelay() is called that in
order calls get_ticks() that verifies if timer exists, if doesn't, it
throws a panic(), but since preloader_console_init() has still not been
called those panic()s will fail. This doesn't help debugging, so let's
setup console before calling spl_dram_init() by moving it after
spl_dram_init().
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Giulio Benetti [Sun, 4 Apr 2021 18:21:33 +0000 (20:21 +0200)]
board: freescale: imxrt1020-evk: fix console is not enabled while init dram
While initializing dram in spl_dram_init(), mdelay() is called that in
order calls get_ticks() that verifies if timer exists, if doesn't, it
throws a panic(), but since preloader_console_init() has still not been
called those panic()s will fail. This doesn't help debugging, so let's
setup console before calling spl_dram_init() by moving it after
spl_dram_init().
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Adam Ford [Sat, 3 Apr 2021 03:17:18 +0000 (22:17 -0500)]
configs: imx8mn_beacon: Enable QSPI Support
There is a QSPI chip connected to the FSPI. Enable the defconfig
to support it.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sat, 3 Apr 2021 03:17:17 +0000 (22:17 -0500)]
arm: dts: imx8mn, imx8mn-beacon: Sync dts files with Kernel 5.12-rc5
There have been a few updates including flexspi, so it's necessary
to re-sync.
Signed-off-by: Adam Ford <aford173@gmail.com>
Peter Robinson [Thu, 1 Apr 2021 21:17:06 +0000 (22:17 +0100)]
ARM: board: usbarmory: Convert to OF_CONTROL and DM
Convert usbarmory to OF_CONTROL and DM for gpio, pin
usb support on the i.MX53 based usbarmory.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Andrej Rosano <andrej@inversepath.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Thu, 1 Apr 2021 21:17:05 +0000 (22:17 +0100)]
ARM: board: usbarmory: Import the usbarmory dts file
Import the iMX53 based usbarmory dts files from Linux 5.12-rc1
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Andrej Rosano <andrej@inversepath.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Oleksandr Suvorov [Thu, 11 Mar 2021 20:00:37 +0000 (22:00 +0200)]
board: toradex: apalis-imx8x: fix build instructions
Fix an URL for downloading the SCFW binary for an Apalis iMX8X
and improve u-boot image build instructions.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Oleksandr Suvorov [Thu, 11 Mar 2021 20:00:36 +0000 (22:00 +0200)]
apalis/colibri_imx6: remove video= settings
Since Toradex provides the full set of overlays for Linux kernel
for display interfaces for both Apalis iMX6Q and Colibri iMX6DL
modules, the video= settings are obsolete. Remove them.
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Philippe Schenker [Thu, 11 Mar 2021 20:00:35 +0000 (22:00 +0200)]
colibri_imx6ull/imx7: add missing tdxargs variable
All the other boards have tdxargs specified for setting manual kernel
command-line arguments. Add them also to NAND-based boards.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Thu, 11 Mar 2021 20:00:34 +0000 (22:00 +0200)]
colibri_imx6: adjust boot order
Remove duplicate of mmc0, set this boot order:
1) SD
2) eMMC
3) USB
4) DHCP boot
Fixes:
0e15165bc4e0 ("colibri_imx6: boot env configuration updates")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Tim Harvey [Mon, 8 Mar 2021 21:52:36 +0000 (13:52 -0800)]
board: gateworks: venice: increase CONFIG_SYS_SPL_MALLOC_SIZE
commit
03f1f78a9b44 ("spl: fit: Prefer a malloc()'d buffer for loading images")'
changed the way buffer allocation worked for SPL to a more flexible
method.
For venice this caused breakage that is resolved by increasing the size
of CONFIG_SYS_SPL_MALLOC_SIZE as the current FIT slighly exceeds 512KiB.
Additionally remove the unnecessary comment on CONFIG_SPL_BSS_MAX_SIZE
and CONFIG_SYS_SPL_MALLOC_SIZE as the size is obvious from the define.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tim Harvey [Mon, 8 Mar 2021 21:52:35 +0000 (13:52 -0800)]
board: gateworks: venice: fix gsc_get_dev
use dm_i2c_probe instead of i2c_get_chip which appears to be more
reliable.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Thu, 4 Mar 2021 17:09:34 +0000 (14:09 -0300)]
MAINTAINERS: Use my personal e-mail address
Use my personal e-mail address for U-Boot related work.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:37 +0000 (14:33 -0800)]
imx: ventana: enable dm for SPI
Enable driver model for SPI which allows us to remove the iomux
and init.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:36 +0000 (14:33 -0800)]
imx: ventana: enable dm for MTD and NAND
Enable driver model for MTD and NAND support allowing us to remove
the iomux, init, and most of the static configuration.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:35 +0000 (14:33 -0800)]
imx: ventana: enable dm support for MMC and SATA
Enable driver model support for MMC and SATA.
Note that DM_MMC requires aliases for your mmc devices so
they are added to the dts. Linux does not support enumerating mmc
devices by alias so these are not present in the Linux dts.
Note that we still need board_mmc_init() and board_mmc_getcd() for
not DM SPL to support MMC.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:34 +0000 (14:33 -0800)]
imx: ventana: enable dm support for USB
Enable dm support for USB (which also requires dm support for fixed
regulators used for vbus enable) and remove usb iomux which is no
longer needed.
We can remove the handling of otgpwr_en gpio as this is defined in
dt as usbotg vbus-supply but we need to keep the handling of
USB_HUB_RST# for boards that have a USB HUB as that isn't defined in
the dt's currently.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:33 +0000 (14:33 -0800)]
imx: ventana: add pinctrl and remove unneeded UART init and config
Once the IMX6 pinctrl driver is added UART is fully using driver mode
so we no longer need to config and initialize it.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:32 +0000 (14:33 -0800)]
imx: ventana: convert U-Boot to OF_CONTROL using FIT image
In preparation for dm conversion convert to OF_CONTROL by adding FIT image
support and multi dtb.
Add a board_fit_config_name_match to match the dtb based off of EEPROM
model.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:31 +0000 (14:33 -0800)]
arm: dts: imx6qdl-gw*: add dr_mode prop to dt to avoid error
The fsl-usb dt bindings in Linux default dr_mode to 'host' for
backward compatibility however U-Boot prints an error if
this property does not exist. Declare it in the Gateworks
Ventana device-trees to avoid the error.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:30 +0000 (14:33 -0800)]
imx: ventana: add Gateworks Ventana dts
Add Gateworks Ventana dts/dtsi files from Linux 5.11 in preparation for
conversion to driver-model.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:29 +0000 (14:33 -0800)]
dt-bindings: add tda1997x and bindings
Add td1997x header from Linux to be included by dts files.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:28 +0000 (14:33 -0800)]
spl: fit: nand: allow for non-page-aligned elements
Add a weak nand_get_mtd function for nand drivers to provide mtd info
and use this to set pagesize such that reading of non page-aligned
elements can succeed.
The spl_load_simple_fit already handles block block access so all we
need to do is provide the nand writesize as the block length.
Further cleanup of the drivers which use nand_spl_loaders.c such as
am335x_spl_bch.c, atmel_nand.c, and nand_spl_simple.c could be done
using info from mtd_info instead of statically defined details.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tim Harvey [Mon, 1 Mar 2021 22:33:27 +0000 (14:33 -0800)]
spl: fit: nand: skip bad block handling if NAND chip not fully defined
commit
9f6a14c47ff9 ("spl: fit: nand: fix fit loading in case of bad blocks")
added support for adjusting the image offset to account for bad blocks.
However this requires nand_spl_adjust_offset() which requires fully defined
specifics of the NAND chip being used may not be avialable.
Allow skipping this support for drivers or configs which don't specify
the NAND chip details statically with defines.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Marek Vasut [Thu, 25 Feb 2021 20:52:26 +0000 (21:52 +0100)]
ARM: imx: Add OCRAM_S into iMX8M MMU tables
The OCRAM_S is regular memory, just like the OCRAM, add it to the MMU
tables so it can be used and cached.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Tue, 6 Apr 2021 03:59:03 +0000 (11:59 +0800)]
doc: imx8mp-evk: update after using binman
update doc after using binman to pack images
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 6 Apr 2021 03:59:02 +0000 (11:59 +0800)]
imx8mp-evk: switch to use binman
Use binman to pack images
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 6 Apr 2021 03:59:01 +0000 (11:59 +0800)]
doc: imx8mn_evk: update doc after using binman
Update doc after using binman to pack images
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 6 Apr 2021 03:59:00 +0000 (11:59 +0800)]
imx8mn-evk: switch to use binman
Use binman to pack images.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 6 Apr 2021 03:58:59 +0000 (11:58 +0800)]
imx8mn-ddr4-evk: switch to use binman
Use binman to pack images
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 6 Apr 2021 03:58:58 +0000 (11:58 +0800)]
doc: imx8mm_evk: update doc after using binman
Update doc after switch to binman to pack images
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 6 Apr 2021 03:58:57 +0000 (11:58 +0800)]
imx8mm_evk: switch to use binman to pack images
Use binman to pack images
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Thu, 25 Mar 2021 09:30:36 +0000 (17:30 +0800)]
crypto: fsl: refactor for 32 bit version CAAM support on ARM64
Previous patch "MLK-18044-4: crypto: caam: Fix pointer size to 32bit
for i.MX8M" breaks the 64 bits CAAM.
Since i.MX CAAM are all 32 bits no matter the ARM arch (32 or 64),
to adapt and not break 64 bits CAAM support, add a new config
CONFIG_CAAM_64BIT and new relevant type "caam_dma_addr_t".
This config is default enabled when CONFIG_PHYS_64BIT is set except
for iMX8M.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Breno Lima [Thu, 25 Mar 2021 09:30:35 +0000 (17:30 +0800)]
fsl_mfgprot: Fix typo in sign_mppubk()
The signature is generated using manufacturing protection private key.
Fix typo in fsl_mfgprot.c.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Clement Faure [Thu, 25 Mar 2021 09:30:34 +0000 (17:30 +0800)]
imx8: Add DEK blob encapsulation
Add DEK encapsulation support for imx8. The DEK blob is generated by the
SECO through the SCFW API.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Clement Faure [Thu, 25 Mar 2021 09:30:33 +0000 (17:30 +0800)]
imx8m: Add DEK blob encapsulation for imx8m
Add DEK blob encapsulation support for IMX8M through "dek_blob" command.
On ARMv8, u-boot runs in non-secure, thus cannot encapsulate a DEK blob
for encrypted boot.
The DEK blob is encapsulated by OP-TEE through a trusted application call.
U-boot sends and receives the DEK and the DEK blob binaries through OP-TEE
dynamic shared memory.
To enable the DEK blob encapsulation, add to the defconfig:
CONFIG_SECURE_BOOT=y
CONFIG_FAT_WRITE=y
CONFIG_CMD_DEKBLOB=y
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Clement Le Marquis [Thu, 25 Mar 2021 09:30:32 +0000 (17:30 +0800)]
imx: caam: new u-boot command to set PRIBLOB bitfield from CAAM SCFGR register to 0x3
It is highly recommended to set the PRIBLOB bitfield to 0x3 once your
encrypted boot image has booted up, this prevents the generation of new
blobs that can be used to decrypt an encrypted boot image. The PRIBLOB is
a sticky type bit and cannot be changed until the next power on reset.
Add the set_priblob_bitfield U-Boot command to prevent the generation of
new blobs.
Signed-off-by: Clement Le Marquis <clement.lemarquis@nxp.com>
Acked-by: Ye Li <Ye.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Thu, 8 Apr 2021 11:33:14 +0000 (07:33 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- Watchdog, Unleashed and Icicle improvements
Tom Rini [Thu, 8 Apr 2021 11:32:54 +0000 (07:32 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Add Armada 38x RTC driver (Marek)
- turris_omnia: Misc updates (enable RTC and other cmds) (Marek)
- ds414: Misc updates (enable XHCI_PCI USB support etc) (Phil)
- Convert MVEBU MMC driver to DM (Harm)
- kirkwood: Misc updates and cleanups to some boards (Harm)
Siew Chin Lim [Thu, 25 Mar 2021 06:07:45 +0000 (14:07 +0800)]
arm: socfpga: smc: Add function to get usercode
Add function to send mailbox command via SMC to get usercode from SDM.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Siew Chin Lim [Wed, 24 Mar 2021 15:56:37 +0000 (23:56 +0800)]
arm: socfpga: Enable FIT signature with crc32 for SOC64 devices
Add signature with crc32 value for all images in binman node for FIT
image in device tree. And, enable FIT signature checking for Stratix10
and Agilex ATF and VAB sdmmc boot.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Wed, 24 Mar 2021 09:16:50 +0000 (17:16 +0800)]
arm: socfpga: Changed to store QSPI reference clock in kHz
Changed to store QSPI reference clock in kHz instead of Hz in
boot scratch cold0 register for Stratix10 and Agilex.
This patch is in preparation for Intel N5X SDRAM driver
support. Reserved 4 bits for Intel N5X SDRAM driver,
and there will be 28 bits to store QSPI reference clock.
Due to limited bits, QSPI reference clock frequency is
converted to kHz from Hz.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Siew Chin Lim [Wed, 24 Mar 2021 09:16:49 +0000 (17:16 +0800)]
arm: socfpga: Move Stratix10 and Agilex clock manager common code
Move duplicated function cm_get_qspi_controller_clk_hz to clock_manager.c.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Siew Chin Lim [Wed, 24 Mar 2021 05:11:38 +0000 (13:11 +0800)]
arm: socfpga: Restructure Stratix10 and Agilex handoff code
Restructure Stratix10 and Agilex handoff code to used by
all SOC64 devices, in preparation to support handoff for
Diamond Mesa.
Remove wrap_pinmux_config_s10.c. Add wrap_handoff_soc64.c
which contains the generic function to parse the handoff
data.
Update system_manager_soc64.c to use generic handoff
function in wrap_handoff_soc64.c.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Siew Chin Lim [Wed, 24 Mar 2021 05:11:37 +0000 (13:11 +0800)]
arm: socfpga: Rearrange sequence of macros in handoff_soc64.h
Rearrange sequence of macros in handoff_soc64.h without any functionality
change. In preparation for Stratix10 and Agilex handoff function
restructuring.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Siew Chin Lim [Wed, 24 Mar 2021 05:11:36 +0000 (13:11 +0800)]
arm: socfpga: Changed system_manager_s10.c to system_manager_soc64.c
Rename to common file name to used by all SOC64 devices.
No functionality change.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>