Simon Glass [Mon, 8 Jun 2020 02:33:00 +0000 (20:33 -0600)]
cmd: Correct the 'md.q' command
This displays incorrect data at present due to a missing header file
in display_options. Fix it.
Fixes:
09140113108 ("command: Remove the cmd_tbl_t typedef")
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 8 Jun 2020 12:51:59 +0000 (08:51 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- DM_ETH support for P2041RDB, T1024RDB, P5040DS, P3041DS, P4080DS, bug
fixes
- Add TBI PHY access through MII
- DDR: Rework errata workaround for A008109, A008378, 009942
Tom Rini [Mon, 8 Jun 2020 12:51:30 +0000 (08:51 -0400)]
Merge tag 'u-boot-rockchip-
20200607' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- revive rk3399 puma board to adapt mainline dts;
- Fix rk3399-evb stdout path;
- Enable PCIe for rk3399: Rockpro64, firefly, pinebookpro;
- Add rk3328 Rock-pi-e board;
- Enable SPI boot for rockpro64 and roc-pc-rk3399;
Patrick Wildt [Sun, 7 Jun 2020 10:08:35 +0000 (12:08 +0200)]
rockchip: enable PCIe and NVMe on Pinebook Pro
Enable CONFIG_PCI and CONFIG_NVME and related configs for the
Pinebook Pro.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Fri, 5 Jun 2020 10:06:43 +0000 (12:06 +0200)]
rockchip: puma: enable new usb config options
With recently added changes we get support for usb3 including handling
of the phys (type-c and inno-usb2), so enable the necessary config
options on puma.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Fri, 5 Jun 2020 10:06:42 +0000 (12:06 +0200)]
rockchip: puma: drop special handling of usb host regulator
With the current usb stack in u-boot, all host ports on puma work
flawlessly without any additional special handling, so drop that
usb hub hacking from the puma board.
Tested with mass-storage and usb-ethernet on both usb3 and usb2 ports.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Heiko Stuebner [Fri, 5 Jun 2020 10:06:41 +0000 (12:06 +0200)]
rockchip: puma: remove separate fit generator
The introduction of the puma-specific generator was mainly a way
to split the pmu firmware from the ATF binary and not having to
distribute that 4GB (sparse) image that was created before moving
to the bl31.elf as base.
Looking at the publically available repository for that separate
pmu firmware
https://git.theobroma-systems.com/rk3399-cortex-m0.git/
there is also no activity for 3 years and apart from some build
customizations no other changes were done.
And even then, if changes need to be made, this can very well also
happen in the atf context itself, so there is no real need to
diverge from the established build procedure and we can just go
back to using the main make_fit_atf.py script.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Fri, 5 Jun 2020 10:06:40 +0000 (12:06 +0200)]
rockchip: puma: reorganize devicetrees to actually work and match upstream
So far the puma dts files only just included the main puma dtsi without
handling the actual baseboard and rk3399-puma.dtsi was very much
detached from the variant in the mainline Linux kernel.
Recent changes resulted in a strange situation with nonworking puma boards.
Commit
ab800e5a6f28 ("arm: dts: rockchip: puma: move U-Boot specific bits to u-boot.dtsi")
moved the sdram include from rk3399-puma-ddrX.dts to new files
rk3399-puma-ddrx-u-boot.dtsi which were never included anywhere though.
Commit
167efc2c7a46 ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux")
replaced the rk3399-puma.dtsi nearly completely, but in the kernel
it definitly depends on a baseboard dts to actually enable peripherals
like sd-slot, uarts, etc.
So to untagle this and bring the whole thing more in line with mainline
Linux, bring the rk3399-puma-haikou.dts over as well, drop the separate
DDR-option devicetrees and instead replace them with a puma Kconfig option
to select and include the needed DDR variant.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Fri, 5 Jun 2020 10:06:39 +0000 (12:06 +0200)]
rockchip: puma: fix indentation of misc_init_r
The commit moving puma to the generic cpuid/macaddr helpers used 7 spaces
as indentation, so correct that by moving to the required tabs.
Fixes:
fa177ff0208b ("board: puma: Use rockchip_* helpers to setup cpuid and macaddr")
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Fri, 5 Jun 2020 10:06:38 +0000 (12:06 +0200)]
rockchip: puma: fix indentation for -u-boot.dtsi
Tabs not spaces, so transform it to the common styling.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner [Fri, 5 Jun 2020 10:06:37 +0000 (12:06 +0200)]
arm64: dts: rk3399-puma: fix gpio levels for vcc5v0-host regulator
The regulator enable-gpio uses opposite values for the declaration
vs. the enable_active_low property, breaking the regulator enablement.
Make the usbhost-supply work again by bringing them in sync again.
This mimics the upstream Linux change found on:
http://lore.kernel.org/r/
20200604091239.424318-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Heiko Stuebner [Fri, 5 Jun 2020 10:06:36 +0000 (12:06 +0200)]
arm64: dts: rk3399-puma: fix gpio levels for gmac reset pin
The gmac reset has opposite values for the gpio declaration
and the separate reset-active, bring this in line to make
u-boot also find the ethernet-phy.
This mimics the upstream Linux commit found on
https://lore.kernel.org/r/
20200603132836.362519-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Marcin Juszkiewicz [Wed, 3 Jun 2020 15:15:13 +0000 (17:15 +0200)]
rockchip: rockpro64: add SPI boot
U-Boot TPL 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB
256B stride
256B stride
lpddr4_set_rate: change freq to
400000000 mhz 0, 1
lpddr4_set_rate: change freq to
800000000 mhz 1, 0
Trying to boot from BOOTROM
Returning to boot ROM...
U-Boot SPL 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42 +0200)
Trying to boot from SPI
U-Boot 2020.07-rc3-00121-gab88251130 (Jun 03 2020 - 16:43:42 +0200)
SoC: Rockchip rk3399
Reset cause: RST
Model: Pine64 RockPro64 v2.1
DRAM: 3.9 GiB
PMIC: RK808
MMC: mmc@
fe310000: 2, mmc@
fe320000: 1, sdhci@
fe330000: 0
Loading Environment from SPI Flash... SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
*** Warning - bad CRC, using default environment
In: serial
Out: vidconsole
Err: vidconsole
Model: Pine64 RockPro64 v2.1
Net: eth0: ethernet@
fe300000
Hit any key to stop autoboot: 0
=>
Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Marcin Juszkiewicz [Wed, 3 Jun 2020 15:15:12 +0000 (17:15 +0200)]
rockchip: rockpro64: Store default env into SPI
Board has flash chip on board so let store U-Boot environment there.
Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Thu, 4 Jun 2020 14:51:41 +0000 (20:21 +0530)]
doc: rockchip: Document SPI flash program steps
Document SPI flash program steps for rockchip platforms.
Suggested-by: Hugh Cole-Baker <sigmaris@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Thu, 4 Jun 2020 14:51:40 +0000 (20:21 +0530)]
roc-rk3399-pc: Add SPI boot
U-Boot TPL 2020.07-rc3-00090-gd4e919f927-dirty (Jun 01 2020 - 23:45:53)
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
256B stride
256B stride
lpddr4_set_rate: change freq to
400000000 mhz 0, 1
lpddr4_set_rate: change freq to
800000000 mhz 1, 0
Trying to boot from BOOTROM
Returning to boot ROM...
U-Boot SPL 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530)
Trying to boot from MMC1
NOTICE: BL31: v2.2(release):
NOTICE: BL31: Built : 15:05:37, May 12 2020
U-Boot 2020.07-rc3-00087-ga21e9fd385 (Jun 02 2020 - 00:09:45 +0530)
SoC: Rockchip rk3399
Reset cause: POR
Model: Firefly ROC-RK3399-PC Board
DRAM: 3.9 GiB
PMIC: RK808
MMC: mmc@
fe320000: 1, sdhci@
fe330000: 0
Loading Environment from SPI Flash... SF: Detected w25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Model: Firefly ROC-RK3399-PC Board
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Thu, 4 Jun 2020 14:51:39 +0000 (20:21 +0530)]
roc-rk3399-pc: Mark default env from SPI
Mark the default U-Boot environment as SPI flash since
this is an on board flash device.
Updated env offset, size in contrast with default since
the U-Boot proper has to start from 384K.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Thu, 4 Jun 2020 14:51:38 +0000 (20:21 +0530)]
Makefile: Drop to handle rkspi image type
On rockchip platforms, SPI boot image creation is not
straightforward like MMC boot image creation where former
requires to specify tpl, spl in multimage format in mkimage,
and later simply do a concatenate mkimaged-tpl with spl.
On this note, let drop rkspi image type creation via kbuild
and let inform via rockchip.rst
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Wed, 3 Jun 2020 07:25:28 +0000 (15:25 +0800)]
rockchip: rk3399-evb: add stdout-path for the board
The 'stdout-path' is missing after dts sync.
Fixes:
167efc2c7a ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
b.l.huang [Sun, 31 May 2020 16:02:11 +0000 (00:02 +0800)]
rockchip: rk3328: add rock-pi-e-rk3328_defconfig file
This commit add the default configuration file and relevant description
for rock-pi-e board
Signed-off-by: Banglang Huang <banglang.huang@foxmail.com>
b.l.huang [Sun, 31 May 2020 16:01:28 +0000 (00:01 +0800)]
rockchip: rk3328: add rock-pi-e dts file
The ROCK-PI-E is a credit card size SBC based on Rockchip RK3328
Quad-Core ARM Cortex A53.
Net - Dual ethernet port, 1 X Gbe, 1 X 100M
USB - USB 3.0
DC - USB-Type C, 5V 2A
Storage - TF card, eMMC
Just build idbloader.img and u-boot.itb for Rockpi E board and
follow the blow steps to replace the relevant partition.
dd if=idbloader.img of=/dev/sdcard seek=64 conv=notrunc
dd if=u-boot.itb of=/dev/sdcard seek=16384 conv=notrunc
Signed-off-by: Banglang Huang <banglang.huang@foxmail.com>
Mark Kettenis [Mon, 25 May 2020 09:00:57 +0000 (11:00 +0200)]
rockchip: Enable PCIe and NVMe on ROCKPro64
Enable CONFIG_PCI and CONFIG_NVME and related configs for the
ROCKPro64 board.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Mark Kettenis [Mon, 25 May 2020 09:00:56 +0000 (11:00 +0200)]
rockchip: Enable PCIe/M.2 and NVMe on Firefly RK3399
Enable CONFIG_PCI and CONFIG_NVME and related configs for the
Firefly RK3399 board.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Sat, 6 Jun 2020 14:59:55 +0000 (10:59 -0400)]
Merge tag 'efi-2020-07-rc4-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-07-rc4 (2)
The following problems are resolved:
* When booting via UEFI an SMBIOS table is presented to the operating
system. If U-Boot tries to add an empty string, this results in corrupted
SMBIOS information. We will now use "Unknown" as property value.
* The EFI_RNG_PROTOCOL uses the DM_RNG drivers. For the virtio RNG driver
the missing DM_RNG Kconfig dependency is added.
* Missing function descriptions for the EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL are
added.
Heinrich Schuchardt [Thu, 4 Jun 2020 16:40:44 +0000 (18:40 +0200)]
efi_loader: comments EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL
Provide missing comments for the functions implementing the
EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 31 May 2020 09:02:42 +0000 (11:02 +0200)]
virtio: VIRTIO_RNG depends on DM_RNG
Add the missing Kconfig dependency and let VIRTIO_RNG default to yes.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Heinrich Schuchardt [Mon, 1 Jun 2020 13:44:00 +0000 (15:44 +0200)]
smbios: empty strings in smbios_add_string()
smbios_add_string() cannot deal with empty strings. This leads to incorrect
property values and invalid tables. E.g. for the pine64-lts_defconfig
CONFIG_SMBIOS_MANUFACTURER="". Linux command dmidecode shows:
Table 1:
Manufacturer: sunxi
Product Name: sunxi
Table 3:
Invalid entry length (2). DMI table is broken! Stop.
Replace empty strings by "Unknown".
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Thu, 4 Jun 2020 23:29:09 +0000 (19:29 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 4 Jun 2020 22:12:57 +0000 (18:12 -0400)]
Merge branch '2020-06-04-misc-bugfixes'
- Resync checkpatch.pl (largely) with v5.7 and introduce U-Boot specific
checks in a localized area, so they aren't lost in the future.
- Complete / re-migrate some options from config headers to defconfigs
- Add dependencies to the various debug uart drivers
Tom Rini [Tue, 26 May 2020 18:29:02 +0000 (14:29 -0400)]
checkpatch.pl: Add check for defining CONFIG_CMD_xxx via config files
All of our cmds have a Kconfig entry. Making enabling a CMD via the
config file an error to checkpatch.pl.
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Fri, 22 May 2020 22:32:40 +0000 (16:32 -0600)]
checkpatch.pl: Request if() instead #ifdef
There is a lot of use of #ifdefs in U-Boot. In an effort reduce this,
suggest using the compile-time construct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 22 May 2020 22:32:39 +0000 (16:32 -0600)]
checkpatch.pl: Request a test when a new command is added
This request is made with nearly every new command. Point to some docs
on how to do it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 22 May 2020 22:32:38 +0000 (16:32 -0600)]
checkpatch.pl: Warn if the flattree API is used
We want people to use the livetree API, so request it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 22 May 2020 22:32:37 +0000 (16:32 -0600)]
checkpatch.pl: Add a check for tests needed for uclasses
A common problem when submitting a new uclass is to forget to add sandbox
tests. Add a warning for this.
Of course tests should always be added for new code, but this one seems to
be missed by nearly every new contributor.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 22 May 2020 22:32:36 +0000 (16:32 -0600)]
checkpatch.pl: Add a U-Boot option
Add an option to indicate that U-Boot-specific checks should be enabled.
Add a function to house the code that will be added.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 22 May 2020 22:32:35 +0000 (16:32 -0600)]
checkpatch.pl: Update to v5.7
Keep the U-Boot changes to $logFunctions
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Resync with v5.7 release which changed the default max line
length, update commit to reflect]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 19:06:19 +0000 (15:06 -0400)]
Convert CONFIG_BOARD_LATE_INIT to Kconfig
This converts the following to Kconfig:
CONFIG_BOARD_LATE_INIT
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 19:06:18 +0000 (15:06 -0400)]
Convert CONFIG_CMD_ASKENV et al to Kconfig
This converts the following to Kconfig:
CONFIG_CMD_ASKENV
CONFIG_CMD_BMP
CONFIG_CMD_BOOTD
CONFIG_CMD_CACHE
CONFIG_CMD_CRC32
CONFIG_CMD_DHCP
CONFIG_CMD_ENV
CONFIG_CMD_EXPORTENV
CONFIG_CMD_EXT2
CONFIG_CMD_EXT4
CONFIG_CMD_FLASH
CONFIG_CMD_FS_GENERIC
CONFIG_CMD_FUSE
CONFIG_CMD_GPIO
CONFIG_CMD_GPT
CONFIG_CMD_GREPENV
CONFIG_CMD_I2C
CONFIG_CMD_IMLS
CONFIG_CMD_IMPORTENV
CONFIG_CMD_LOADB
CONFIG_CMD_LOADS
CONFIG_CMD_MEMINFO
CONFIG_CMD_MII
CONFIG_CMD_MTDPARTS
CONFIG_CMD_NAND
CONFIG_CMD_NAND_TRIMFFS
CONFIG_CMD_NFS
CONFIG_CMD_PCA953X
CONFIG_CMD_PCA953X_INFO
CONFIG_CMD_PCI
CONFIG_CMD_PING
CONFIG_CMD_READ
CONFIG_CMD_SF
CONFIG_CMD_SPI
CONFIG_CMD_SPL
CONFIG_CMD_SPL_WRITE_SIZE
CONFIG_CMD_TIME
CONFIG_CMD_TRACE
CONFIG_CMD_UBI
CONFIG_CMD_UBIFS
CONFIG_CMD_UNZIP
CONFIG_FS_EXT4
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 19:06:17 +0000 (15:06 -0400)]
Convert CONFIG_BZIP2 et al to Kconfig
This converts the following to Kconfig:
CONFIG_BZIP2
CONFIG_GZIP
CONFIG_LZO
CONFIG_ZLIB
CONFIG_LZMA
CONFIG_LZO
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 19:06:16 +0000 (15:06 -0400)]
topic_miami: Disable GPIO
Per the boards config header file, there is no useful GPIO on these
boards. Remove CONFIG_CMD_GPIO from the defconfigs.
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 19:06:15 +0000 (15:06 -0400)]
ARM: rmobile: blanche: Disable CONFIG_CMD_SF / CONFIG_CMD_SPI
The config header for this platform disables both CMD_SF and CMD_SPI and
the defconfig leaves them enabled. Disable them from the defconfig and
enable them in the header.
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 19:06:14 +0000 (15:06 -0400)]
bcmstb: Migrate CONFIG_CMD_EXT[24]
The common config header for bcm7260 and bcm7445 enable
CONFIG_CMD_EXT2/EXT4 but the defconfigs do not. This results in the
commands being disabled. Enable them via the defconfig.
Cc: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 19:06:13 +0000 (15:06 -0400)]
mx6memcal: Finish migration to defconfig options
The config header for this platform uses '#undef' in a number of cases.
All of the MMC related ones were already handled correctly in the
defconfig file. In the case of CONFIG_CMD_FUSE, the command was being
built and enabled via defconfig. Disable it in the defconfig, cleanup
the header.
Reviewed-by: Eric Nelson <eric@nelint.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 26 May 2020 19:06:12 +0000 (15:06 -0400)]
pfla02: Rework excluding NAND from SPL
Rather than only enable CONFIG_CMD_NAND for non-SPL builds, move the CMD
options to defconfig and rework the guards to not try and call the
function in SPL builds.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Michal Simek [Thu, 28 May 2020 10:05:12 +0000 (12:05 +0200)]
serial: Add missing Kconfig dependencies for debug consoles
Debug console is the part of serial driver in the same file. It means to be
able to enable debug console you also need to enable driver itself.
That's why add all dependecies and list only debug consoles which are
enabled based on driver selection to avoid compilation error when user
asks for certain debug console but driver is not enable for it.
Error:
aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `putc':
/home/monstr/data/disk/u-boot/common/console.c:513: undefined reference to `printch'
aarch64-linux-gnu-ld.bfd: common/built-in.o: in function `puts':
/home/monstr/data/disk/u-boot/common/console.c:563: undefined reference to `printch'
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Fix ns16550 dependency, add ZYNQ_SERIAL, change S5P]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 2 Jun 2020 21:26:33 +0000 (17:26 -0400)]
serial: Convert ARM_DCC to Kconfig
The symbol "CONFIG_ARM_DCC" is used to control building
drivers/serial/arm_dcc.c. Provide a simple Kconfig entry for this.
Cc: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Tom McLeod <tom.mcleod@opalkelly.com>
Cc: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Tom Rini [Thu, 4 Jun 2020 17:50:39 +0000 (13:50 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fixes
7e249bc13aaf: ("riscv: Move all SMP related SBI calls to
SBI_v01") Move sbi_probe_extension() out of CONFIG_SBI_V01.
- SiFive FU540 support SPL.
Tom Rini [Thu, 4 Jun 2020 14:21:51 +0000 (10:21 -0400)]
Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel fixes for 2020.07 cycle
This set includes just two small commits that fix a build warning and
add a missing serial node.
Jaiprakash Singh [Tue, 2 Jun 2020 07:14:02 +0000 (12:44 +0530)]
ddr: Rework errata A008109, A008378, 009942 workaround
Move errata A008109, A008378, 009942 workaround implementation from
compute_fsl_memctl_config_regs() to fsl_ddr_set_memctl_regs()
and add register write after each workaround implementation.
Signed-off-by: Jaiprakash Singh <Jaiprakash.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Joakim Tjernlund [Wed, 20 Nov 2019 16:07:34 +0000 (17:07 +0100)]
ddr: fsl: Impl. Erratum A008109
Impl. erratum as descibed in errata doc.
Enable A008109 for T1040 and T1024
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Sun, 3 May 2020 14:48:43 +0000 (22:48 +0800)]
net: tsec: Access TBI PHY through the corresponding MII
When an eTSEC is configured to use TBI, configuration of the
TBI is done through the MIIM registers for that eTSEC.
For example, if a TBI interface is required on eTSEC2, then
the MIIM registers starting at offset 0x2_5520 are used to
configure it.
Fixes:
9a1d6af55ecd ("net: tsec: Add driver model ethernet support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Sun, 3 May 2020 14:48:42 +0000 (22:48 +0800)]
net: tsec: Access eTSEC registers using virtual address
The current code accesses eTSEC registers using physical
address directly, it's not correct, though no problem on
current platforms. It won't work on platforms, which does
not support 1:1 virtual-physical address map.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Sun, 3 May 2020 14:48:41 +0000 (22:48 +0800)]
doc: dt-bindings: tsec: Correct the Ethernet port compatible string
Change the compatible string to "fsl,etsec2" for the Ethernet ports,
which is used in the current driver's match table.
Fixes:
69a00875e3db ("doc: dt-bindings: Describe Freescale TSEC ethernet controller")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Acked-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:15 +0000 (16:00 +0300)]
configs: enable DM_ETH support for T1024RDB
Enable DM_ETH on all the defconfigs for the T1024RDB board.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:14 +0000 (16:00 +0300)]
configs: enable DM_ETH support for P2041RDB
Enable DM_ETH on all the defconfigs for the P2041RDB board.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:13 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan v3 to T1024RDB
Introduce the QorIQ DPAA 1 Frame Manager nodes in the T1024RDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:12 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan v3 for T102x
Add the QorIQ DPAA 1 Frame Manager v3 device tree nodes for the
T102x SoCs. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:11 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan to P5040DS
Introduce the QorIQ DPAA 1 Frame Manager nodes in the P5040DS
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:10 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan for P5040
The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:09 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan to P3041DS
Introduce the QorIQ DPAA 1 Frame Manager nodes in the P3041DS
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:08 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan for P3041
The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:07 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan to P2041RDB
Introduce the QorIQ DPAA 1 Frame Manager nodes in the P2041RDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:06 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan for P2041
The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:05 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan interfaces to P4080DS
Introduce the QorIQ DPAA 1 Frame Manager interfaces nodes in the
P4080DS device tree.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:04 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan for P4080
The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:03 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan v3 device tree nodes
Add the QorIQ DPAA Frame Manager version 3 device tree nodes
description. The device tree fragments are copied over with little
modification from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:02 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ DPAA 1 FMan device tree nodes
Add the QorIQ DPAA Frame Manager device tree nodes description.
The device tree fragments are copied over with little modification
from the Linux kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:01 +0000 (16:00 +0300)]
powerpc: dts: add QorIQ GPIOs
Add the QorIQ GPIO device tree nodes description. The device tree
fragments are copied over with little modification from the Linux
kernel source code.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 13:00:00 +0000 (16:00 +0300)]
powerpc: dts: QorIQ: Add node(s) for the platform PLL
Add the QorIQ clock control device nodes include files.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Thu, 30 Apr 2020 12:59:59 +0000 (15:59 +0300)]
net: tsec: fsl_mdio: add DM MDIO support
Allow the MDIO devices to be probed based on the device tree.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Bin Meng [Wed, 27 May 2020 09:04:53 +0000 (02:04 -0700)]
riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01
sbi_probe_extension() is an API defined in SBI v0.2, not v0.1.
Fixes
7e249bc13aaf: ("riscv: Move all SMP related SBI calls to SBI_v01")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Bin Meng [Wed, 27 May 2020 09:04:52 +0000 (02:04 -0700)]
riscv: sbi: Remove sbi_spec_version
U-Boot defaults to use SBI v0.2. Howerver there is a global variable
sbi_spec_version that stills refers to v0.1. Since it is not used
anywhere, let's remove it.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:39 +0000 (11:33 +0530)]
doc: sifive: fu540: Add description for OpenSBI generic platform
OpenSBI generic platform support provides platform specific
functionality based on the FDT passed by previous booting stage.
Depends on OpenSBI commit:
platform: Add generic FDT based platform support
(sha1:
f1aa9e54e00006ae70aeac638d5b75093520f65d)
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:38 +0000 (11:33 +0530)]
configs: fu540: Add config options for U-Boot SPL
With sifive_fu540_defconfig:
User can use FSBL or u-boot-spl.bin anyone at a time.
For FSBL,
fsbl->fw_payload.bin (opensbi + U-Boot)
For u-boot-spl.bin,
u-boot-spl.bin->FIT image (opensbi + U-Boot proper + dtb)
U-Boot SPL will be loaded by ZSBL from SD card (replace fsbl.bin with
u-boot-spl.bin) and runs in L2 LIM in machine mode and then load FIT
image u-boot.itb from SD card into RAM.
U-Boot SPL expects u-boot.itb FIT image at the starting of SD card sector
number (0x822) of GUID type "
2E54B353-1271-4842-806F-
E436D6AF6985"
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Jagan Teki [Fri, 29 May 2020 06:03:37 +0000 (11:33 +0530)]
sifive: fu540: Add U-Boot proper sector start
Add U-Boot proper sector start offset for SiFive FU540.
This value is based on the partition layout supported
by SiFive FU540.
u-boot.itb need to write on this specific offset so-that
the SPL will retrieve it from here and load.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Jagan Teki [Fri, 29 May 2020 06:03:36 +0000 (11:33 +0530)]
sifive: fu540: Add sample SD gpt partition layout
This is a sample GPT partition layout for SD card,
right now three important partitions are added to
make the system bootable.
partition layout:
Part Start LBA End LBA Name
Attributes
Type GUID
Partition GUID
1 0x00000022 0x00000821 "loader1"
attrs: 0x0000000000000000
type:
5b193300-fc78-40cd-8002-
e86c45580b47
guid:
cbcbef44-e627-42bc-b134-
93b6f3784b8c
2 0x00000822 0x00002821 "loader2"
attrs: 0x0000000000000000
type:
2e54b353-1271-4842-806f-
e436d6af6985
guid:
f54eba28-d8de-4852-978d-
1a673777e2ae
3 0x00002822 0x00020821 "rootfs"
attrs: 0x0000000000000004
type:
0fc63daf-8483-4772-8e79-
3d69d8477de4
type: linux
guid:
9561df46-8d55-4799-a83b-
cfee9ef6ff93
Note:
- loader1 would be fsbl or spl
- loader2 would be U-Boot or U-Boot proper
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:35 +0000 (11:33 +0530)]
riscv: sifive: fu540: add SPL configuration
Add a support for SPL which will boot from L2 LIM (0x0800_0000) and
then SPL will boot U-Boot FIT image (OpenSBI FW_DYNAMIC + u-boot.bin)
from MMC boot devices.
SPL related code is leveraged from FSBL
(https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:34 +0000 (11:33 +0530)]
riscv: cpu: fu540: Add support for cpu fu540
Add SiFive fu540 cpu to support RISC-V arch
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:33 +0000 (11:33 +0530)]
riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux
This sync has changes required to use GPIO in U-Boot and
U-Boot SPL.
Sync dts from linux v5.7-rc2 commit:
"riscv: dts: Add GPIO reboot method to HiFive Unleashed DTS file"
(sha1:
0a91330b2af9f71ceeeed483f92774182b58f6d9)
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:32 +0000 (11:33 +0530)]
riscv: sifive: dts: fu540: set ethernet clock rate
Set ethernet clock rate to 125 Mhz so that it will work with 1000Mbps,
Earlier this is done by FSBL. With this change We can remove the
ethernet clock rate code from FSBL.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:31 +0000 (11:33 +0530)]
clk: sifive: fu540-prci: Release ethernet clock reset
U-Boot ethernet works with FSBL flow where releasing ethernet clock
reset is part of FSBL itself but with the SPL, We need to release
ethernet clock reset explicitly for U-Boot proper. With this change
Release ethernet clock reset code in FSBL might not be needed or
unaffected.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:30 +0000 (11:33 +0530)]
clk: sifive: fu540-prci: Add ddr clock initialization
Release ddr clock reset once clock is initialized
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:29 +0000 (11:33 +0530)]
clk: sifive: fu540-prci: Add clock enable and disable ops
Added clock enable and disable functions in prci ops
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:28 +0000 (11:33 +0530)]
riscv: sifive: dts: fu540: add U-Boot dmc node
Add dmc node to enable ddr driver. dmc is used to
initialize the memory controller.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:27 +0000 (11:33 +0530)]
sifive: dts: fu540: Add DDR controller and phy register settings
Add DDR controller and phy register settings, taken from fsbl
(https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:26 +0000 (11:33 +0530)]
sifive: fu540: add ddr driver
Add driver for fu540 to support ddr initialization in SPL.
This driver is based on FSBL
(https://github.com/sifive/freedom-u540-c000-bootloader.git)
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:25 +0000 (11:33 +0530)]
riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
Devicetree files in FU540 platform is synced from Linux, like other
platforms does. Apart from these U-Boot in FU540 would also require
some U-Boot specific node like clint.
So, create board specific -u-boot.dtsi files. This would help of
maintain U-Boot specific changes separately without touching Linux
dts(i) files which indeed easy for syncing from Linux between
releases.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:24 +0000 (11:33 +0530)]
lib: Makefile: build crc7.c when CONFIG_MMC_SPI
When build U-Boot SPL, meet an issue of undefined reference to
'crc7' for drivers/mmc/mmc_spi.c, so let's compile crc7.c when
CONFIG_MMC_SPI selected.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:23 +0000 (11:33 +0530)]
riscv: Add _image_binary_end for SPL
For SPL_SEPARATE_BSS, Device tree will be put at _image_binary_end
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:22 +0000 (11:33 +0530)]
riscv: sifive: fu540: Use OTP DM driver for serial environment variable
Use the OTP DM driver to set the serial environment variable.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Pragnesh Patel [Fri, 29 May 2020 06:03:21 +0000 (11:33 +0530)]
misc: add driver for the SiFive otp controller
Added a misc driver to handle OTP memory in SiFive SoCs.
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Wed, 3 Jun 2020 18:10:03 +0000 (14:10 -0400)]
Merge tag 'efi-2020-07-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-07-rc4
This patch series addresses the following issues:
* allow compiling with clang
* add missing function descriptions to the HTML documentation
* simplify the validation of UEFI images
* validate load options in the UEFI boot manager
In a preparatory patch a structure definition is moved.
Tom Rini [Wed, 3 Jun 2020 16:27:51 +0000 (12:27 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- Toshiba spinand (Yoshio)
- SPI/SPI Flash cleanup (Jagan)
- Remove SH SPI (Jagan)
Tom Rini [Wed, 3 Jun 2020 15:52:13 +0000 (11:52 -0400)]
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- H6 emac support
- USB PHY H6 logic alignment
Tom Rini [Wed, 3 Jun 2020 15:44:12 +0000 (11:44 -0400)]
Merge branch '2020-06-03-misc-bugfixes'
- Update various docs to not have 'ARCH=' in them as that's not part of
how U-Boot builds.
- Add macOS tools-only build to Azure to help catch problems on BSD
hosts with tools.
- Bugfixes from the latest header cleanup around ARCH_DMA_MINALIGN
- Assorted small Kconfig logic/typo corrections
- Add a default hash to FIT images that have their its auto generated.
- Other assorted fixes
AKASHI Takahiro [Fri, 29 May 2020 06:41:18 +0000 (15:41 +0900)]
efi_loader: signature: move efi_guid_cert_type_pkcs7 to efi_signature.c
The global variable, efi_guid_cert_type_pkcs7, will also be used in
efi_image_loader.c in a succeeding patch so as to correctly handle
a signature type of authenticode in signed image.
Meanwhile, it is currently defined in efi_variable.c. Once some secure
storage solution for UEFI variables is introduced, efi_variable.c may
not always be compiled in.
So move the definition to efi_signature.c as a common place.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 30 May 2020 05:35:59 +0000 (07:35 +0200)]
efi_loader: simplify PE consistency check
Knowing that at least one section header follows the optional header we
only need to check for the length of the 64bit header which is longer than
the 32bit header.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 30 May 2020 04:44:48 +0000 (06:44 +0200)]
efi_loader: function description cmp_pe_section()
Rework the description of function cmp_pe_section().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sat, 30 May 2020 03:48:08 +0000 (05:48 +0200)]
efi_loader: function descriptions efi_image_loader.c
We want to follow the Linux kernel style for function descriptions.
Add missing parentheses after function names.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 26 May 2020 23:58:30 +0000 (01:58 +0200)]
efi_loader: allow compiling with clang
On ARM systems gd is stored in register r9 or x18. When compiling with
clang gd is defined as a macro calling function gd_ptr(). So we can not
make assignments to gd.
In the UEFI sub-system we need to save gd when leaving to UEFI binaries and
have to restore gd when reentering U-Boot.
Define a new function set_gd() for setting gd and use it in the UEFI
sub-system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tom Rini <trini@konsulko.com>