Bin Meng [Mon, 15 Oct 2018 09:21:00 +0000 (02:21 -0700)]
dm: Add a new uclass driver for VirtIO transport devices
This adds a new virtio uclass driver for “virtio” [1] family of
devices that are are found in virtual environments like QEMU,
yet by design they look like physical devices to the guest.
The uclass driver provides child_pre_probe() and child_post_probe()
methods to do some common operations for virtio device drivers like
device and driver supported feature negotiation, etc.
[1] http://docs.oasis-open.org/virtio/virtio/v1.0/virtio-v1.0.pdf
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 15 Oct 2018 09:20:59 +0000 (02:20 -0700)]
riscv: bootm: Add dm_remove_devices_flags() call to do_bootm_linux()
This adds a call to dm_remove_devices_flags() to do_bootm_linux()
so that drivers that have one of the removal flags set (e.g.
DM_FLAG_ACTIVE_DMA_REMOVE) in their driver struct, may do some
last-stage cleanup before the OS is started.
arm and x86 already did such, and we should do the same for riscv.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 15 Oct 2018 09:20:58 +0000 (02:20 -0700)]
test: dm: core: Add test case for uclass driver's child_post_probe()
Add test case to cover uclass driver's child_post_probe() method.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 15 Oct 2018 09:20:57 +0000 (02:20 -0700)]
dm: core: Allow uclass to set up a device's child after it is probed
Some buses need to set up their child devices after they are probed.
Support a common child_post_probe() method for the uclass.
With this change, the two APIs uclass_pre_probe_device() and
uclass_post_probe_device() become symmetric.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mario Six [Mon, 15 Oct 2018 07:24:15 +0000 (09:24 +0200)]
regmap: Add overview documentation
Add some overview documentation that explains the purpose and some of
the features and limitations of the regmap interface.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Oct 2018 07:24:14 +0000 (09:24 +0200)]
regmap: Add endianness support
Add support for switching the endianness of regmap accesses via the
"little-endian", "big-endian", and "native-endian" boolean properties in
the device tree.
The default endianness is native endianness.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Mario Six [Mon, 15 Oct 2018 07:24:13 +0000 (09:24 +0200)]
test: regmap: Add test for regmap_{set, get}
Add test for regmap_{set,get} functions.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Oct 2018 07:24:12 +0000 (09:24 +0200)]
regmap: Define regmap_{get,set}
It would be convenient if one could use the regmap API in conjunction
with register maps defined as structs (i.e. structs that directly mirror
the memory layout of the registers in question). A similar approach was
planned with the regmap_write32/regmap_read32 macros, but was never
used.
Hence, implement regmap_set/regmap_range_set and
regmap_get/regmap_range_get macros, which, given a register map, a
struct describing the layout of the register map, and a member name
automatically produce regmap_read/regmap_write calls that access the
specified member in the register map.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Oct 2018 07:24:11 +0000 (09:24 +0200)]
regmap: Support reading from specific range
It is useful to be able to treat the different ranges of a regmap
separately to be able to use distinct offset for them, but this is
currently not implemented in the regmap API.
To preserve backwards compatibility, add regmap_read_range and
regmap_write_range functions that take an additional parameter
'range_num' that identifies the range to operate on.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Oct 2018 07:24:10 +0000 (09:24 +0200)]
regmap: Add raw read/write functions
The regmap functions currently assume that all register map accesses
have a data width of 32 bits, but there are maps that have different
widths.
To rectify this, implement the regmap_raw_read and regmap_raw_write
functions from the Linux kernel API that specify the width of a desired
read or write operation on a regmap.
Implement the regmap_read and regmap_write functions using these raw
functions in a backwards-compatible manner.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mario Six [Mon, 15 Oct 2018 07:24:09 +0000 (09:24 +0200)]
mips: Implement {in, out}_{le, be}_{16, 32, 64} and {in, out}_8
MIPS is the only architecture currently supported by U-Boot that does
not implement any of the in/out register access functions.
To have a interface that is useable across architectures, add the
functions to the MIPS architecture (implemented using the __raw_write
and __raw_read functions).
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Oct 2018 07:24:08 +0000 (09:24 +0200)]
regmap: Add error output
Add some debug output in cases where the initialization of a regmap
fails.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Mon, 15 Oct 2018 07:24:07 +0000 (09:24 +0200)]
regmap: Introduce init_range
Both fdtdec_get_addr_size_fixed and of_address_to_resource can fail with
an error, which is not currently checked during regmap initialization.
Since the indentation depth is already quite deep, extract a new
'init_range' method to do the initialization.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Simon Glass [Tue, 12 Jun 2018 05:26:46 +0000 (23:26 -0600)]
buildman: Add a --boards option to specify particular boards to build
At present 'buildman sandbox' will build all 5 boards for the sandbox
architecture rather than the single board 'sandbox'. The only current way
to exclude sandbox_spl, sandbox_noblk, etc. is to use -x which is a bit
clumbsy.
Add a --boards option to allow individual build targets to be specified.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 17 Jun 2018 14:57:43 +0000 (08:57 -0600)]
sandbox: Try to start the RAM buffer at a particular address
Use a starting address of 256MB which should be available. This helps to
make sandbox RAM buffers pointers more recognisable.
Signed-off-by: Simon Glass <sjg@chromium.org>
Mario Six [Thu, 4 Oct 2018 07:22:24 +0000 (09:22 +0200)]
core: ofnode: Fix mem leak in error path
A newly created property is currently not freed if a name could not be
allocated. This patch fixes the resulting memory leak in the error
patch.
Reported-by: Coverity (CID: 184085)
Fixes:
e369e58df79c ("core: Add functions to set properties in live-tree")
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 4 Oct 2018 07:00:55 +0000 (09:00 +0200)]
misc: Add IHS FPGA driver
Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which
supports initialization of the FPGA, as well as information gathering.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 4 Oct 2018 07:00:54 +0000 (09:00 +0200)]
misc: Add gdsys_soc driver
This patch adds a driver for the bus associated with a IHS FPGA.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 4 Oct 2018 07:00:53 +0000 (09:00 +0200)]
misc: Sort Makefile entries
Makefile entries should be sorted.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Mario Six [Thu, 4 Oct 2018 07:00:43 +0000 (09:00 +0200)]
regmap: Improve error handling
ofnode_read_simple_addr_cells may fail and return a negative error code.
Check for this when initializing regmaps.
Also check if both_len is zero, since this is perfectly possible, and
would lead to a division-by-zero further down the line.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 4 Oct 2018 07:00:42 +0000 (09:00 +0200)]
regmap: Add documentation
Document the regmap_alloc() function.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 4 Oct 2018 07:00:41 +0000 (09:00 +0200)]
regmap: Fix documentation
The documentation in regmap.h is not in kernel-doc format. Correct this.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 4 Oct 2018 07:00:40 +0000 (09:00 +0200)]
test: regmap: Increase size of syscon0 memory
The upcoming changes to the regmap interface will contain a proper check
for plausibility when reading/writing from/to a register map. To still
have the current tests pass, increase the size of the memory region for
the syscon0 device, since one of the tests reads and writes beyond this
range.
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Bin Meng [Thu, 11 Oct 2018 05:07:02 +0000 (22:07 -0700)]
timer: Sort Kconfig driver entries
This is currently out of order. Sort it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 11 Oct 2018 05:07:01 +0000 (22:07 -0700)]
test: dm: core: Add a test case for driver marked with DM_FLAG_PRE_RELOC flag
Now that we fixed the pre-relocation driver binding for driver marked
with DM_FLAG_PRE_RELOC flag, add a test case to cover that scenario.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 11 Oct 2018 05:07:00 +0000 (22:07 -0700)]
dm: core: Mirror the chosen node parse logic in the livetree scanning
Commit
f2006808f099: ("dm: core: parse chosen node") added a logic
to parse the chosen node during dm_scan_fdt_node(), but unfortunately
it missed adding the same logic in dm_scan_fdt_live(). This mirrors
the logic in the livetree version.
The weird thing is that commit
f2006808f099 did update the test case
to test such logic, but even if I reset to that commit, the test case
still fails, and I have no idea how it could pass.
With this fix, the following 2 test cases now pass:
Test: dm_test_bus_children: bus.c
test/dm/bus.c:112, dm_test_bus_children(): num_devices ==
list_count_items(&uc->dev_head): Expected 7, got 6
Test: dm_test_fdt: test-fdt.c
test/dm/test-fdt.c:184, dm_test_fdt(): num_devices ==
list_count_items(&uc->dev_head): Expected 7, got 6
Fixes:
f2006808f099 ("dm: core: parse chosen node")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 11 Oct 2018 05:06:59 +0000 (22:06 -0700)]
dm: Correct pre_reloc_only parameter description in several APIs' comments
The pre_reloc_only parameter description currently only mentions
drivers with the DM_FLAG_PRE_RELOC flag, but does not mention the
special device tree properties. Correct them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 11 Oct 2018 05:06:58 +0000 (22:06 -0700)]
dm: core: Respect drivers with the DM_FLAG_PRE_RELOC flag in lists_bind_fdt()
Currently the comments of several APIs (eg: dm_init_and_scan()) say:
@pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
flag. If false bind all drivers.
The 'Pre-Relocation Support' chapter in doc/driver-model/README.txt
documents the same that both device tree properties and driver flag
are supported.
However the implementation only checks these special device tree
properties without checking the driver flag at all. This updates
lists_bind_fdt() to consider both scenarios.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Squashed in http://patchwork.ozlabs.org/patch/996473/ :
Signed-off-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 11 Oct 2018 05:06:57 +0000 (22:06 -0700)]
dm: util: Add a livetree equivalent API of dm_fdt_pre_reloc()
This adds a new API dm_ofnode_pre_reloc(), a livetree equivalent
API of dm_fdt_pre_reloc().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 11 Oct 2018 05:06:56 +0000 (22:06 -0700)]
cpu: mpc83xx: Remove unnecessary characters in the description string
The description string should not contain unnecessary characters,
like the ending '\n' or the leading 'CPU:'.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 11 Oct 2018 05:06:55 +0000 (22:06 -0700)]
dm: cpu: Fix print_cpuinfo() output
It was observed that current output of print_cpuinfo() on QEMU
x86 targets does not have an ending '\n', neither have a leading
'CPU:' any more. However it used to have these before.
It turns out commit
c0434407b595 introduced a unified DM version
of print_cpuinfo() that exposed such issue on QEMU x86.
Fixes:
c0434407b595 ("board_f: Use static print_cpuinfo if CONFIG_CPU is active")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mario Six [Mon, 6 Aug 2018 08:23:41 +0000 (10:23 +0200)]
board_f: Use static print_cpuinfo if CONFIG_CPU is active
When the DM CPU drivers are active, printing information about a CPU
should be delegated to a matching driver.
Hence, add a static print_cpuinfo that implements this delegation when
DM CPU drivers are active.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Changed condition to CONFIG_IS_ENABLED(CPU):
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 14 Nov 2018 16:30:07 +0000 (11:30 -0500)]
Merge branch 'next'
This brings in the u-boot-net PR from Joe.
Tom Rini [Wed, 14 Nov 2018 16:10:06 +0000 (11:10 -0500)]
Prepare v2018.11
Signed-off-by: Tom Rini <trini@konsulko.com>
Anatolij Gustschin [Thu, 18 Oct 2018 14:15:39 +0000 (16:15 +0200)]
gpio: pca953x_gpio: fix DT GPIO flags translation
Commit
fb01e07a95 accidentally broke initialisation of GPIO
descriptor flags from device tree: currently the active low
flag from gpio-specifier is always ignored. Fix it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Tom Rini [Wed, 14 Nov 2018 00:54:45 +0000 (19:54 -0500)]
configs: Migrate and re-enabled CONFIG_CMD_MTDPARTS
Now that CMD_UBI does not select CMD_MTDPARTS we need to make platforms
that had been enabling it turn it on by hand. This exposed that we had
not yet migrated CMD_MTDPARTS fully, so do so now.
Fixes:
86dfa556d927 ("cmd: ubi: Remove useless call to mtdparts_init()")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 14 Nov 2018 00:50:01 +0000 (19:50 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Wed, 14 Nov 2018 00:44:53 +0000 (19:44 -0500)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Boris Brezillon [Tue, 13 Nov 2018 11:43:13 +0000 (12:43 +0100)]
mtd: Drop duplicate MTD_PARTITIONS Kconfig option
Commit
9c5b00973bce ("Convert CONFIG_MTD_PARTITIONS et al to Kconfig")
introduced a publicly visible Kconfig entry for the
CONFIG_MTD_PARTITIONS option, while the rework on MTD partitioning
was in progress, and we somehow did not notice that the same Kconfig
entry was added by commit
4048a5c519a8 ("mtd: declare MTD_PARTITIONS
symbol in Kconfig"), but this time as an invisible entry (this can
only be selected by other options).
Keep the non-visible version of this symbol, since MTD_PARTITIONS is
not something the user should be able to enable/disable directly.
Fixes:
4048a5c519a8 ("mtd: declare MTD_PARTITIONS symbol in Kconfig")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Tue, 13 Nov 2018 11:43:12 +0000 (12:43 +0100)]
cmd: ubi: Remove useless call to mtdparts_init()
Commit
c58fb2cdb3e4 ("cmd: ubi: clean the partition handling")
introduced a call to mtd_probe_devices() in the ubi_attach() path
and this function takes care of parsing mtdparts/mtdids and
creating/registering the associated mtd partitions.
The mtdparts_init() call in the ubi_detach() path is not only
unnecessary but can sometimes print error messages even when things
work properly (that's the case with SPI NAND devices that have not
been probed with 'mtd list'), which is misleading.
Remove this call to mtdparts_init() and drop the dependency on
CMD_MTDPARTS.
Fixes:
c58fb2cdb3e4 ("cmd: ubi: clean the partition handling")
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Tue, 13 Nov 2018 11:43:11 +0000 (12:43 +0100)]
mtd: Make {MTDIDS, MTDPARTS}_DEFAULT visible when MTD_PARTITIONS is selected
gwventana configs are relying on CMD_UBI to select CMD_MTDPARTS,
which is then making {MTDIDS,MTDPARTS}_DEFAULT options available.
We are about to remove the 'select CMD_MTDPARTS' statement in the
CMD_UBI entry, but if we do that without first making sure
{MTDIDS,MTDPARTS}_DEFAULT are visible, we end up with a build
failure when building gwventana configs.
Address that by adding a depends on MTD_PARTITIONS to
{MTDIDS,MTDPARTS}_DEFAULT which does the trick since CMD_UBI selects
MTD_UBI which in turn selects MTD_PARTITIONS.
We also get rid of the depends on CMD_MTD, since CMD_MTD also selects
MTD_PARTITIONS.
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Tue, 13 Nov 2018 11:43:10 +0000 (12:43 +0100)]
dfu: nand: Add missing dependency on CMD_MTDPARTS
dfu_fill_entity_nand() uses find_dev_and_part() and mtdparts_init()
which are provided by cmd/mtdparts.c.
Add the dependency to avoid build failures when CMD_MTDPARTS is not
selected.
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Fixes:
6828e602b722d ("dfu: Migrate to Kconfig")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Tue, 13 Nov 2018 11:43:09 +0000 (12:43 +0100)]
mtd: Use default mtdparts/mtids when not defined in the environment
U-boot provides a mean to define default values for mtdids and mtdparts
when they're not defined in the environment. Patch mtd_probe_devices()
to use those default values when env_get("mtdparts") or
env_get("mtdids") return NULL.
This implementation is based on the logic found in cmd/mtdparts.c.
Fixes:
5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tom Rini [Mon, 12 Nov 2018 13:06:34 +0000 (08:06 -0500)]
Merge tag 'u-boot-imx-
20181112' of git://git.denx.de/u-boot-imx
Fix build vf boards + fix gpr_init()
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:17 +0000 (15:31 +0100)]
imx: mkimage: add size check to the u-boot.imx make target
The make macro to check if the binary exceeds the board size limit is
taken straight from the root Makefile.
Without this and e.g. enabled EFI Vybrid fails booting as the regular
size limit check does not take the final u-boot.imx binary size into
account which is bigger due to alignment as well as IMX header stuff.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:16 +0000 (15:31 +0100)]
board: toradex: colibri_vf: drop SPI support
Drop SPI support saving precious 4 Kb on boards with tough size
restrictions.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:15 +0000 (15:31 +0100)]
board: toradex: colibri_vf: unset CONFIG_CMDLINE_EDITING
Unset CONFIG_CMDLINE_EDITING saving precious 4 Kb on boards with tough
size restrictions.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:14 +0000 (15:31 +0100)]
board: toradex: colibri_vf: efi_loader: unset CONFIG_EFI_UNICODE_CAPITALIZATION
Unset CONFIG_EFI_UNICODE_CAPITALIZATION on boards with tough size
restrictions.
This is analogous to commit
a90bf07afc43
("efi_loader: unset CONFIG_EFI_UNICODE_CAPITALIZATION").
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Marek Vasut [Tue, 6 Nov 2018 22:42:11 +0000 (23:42 +0100)]
mmc: dw_mmc: Add RCRC handling
This patch adds check for command response CRC failure. The driver
is currently ignoring CRC check failure on command resposes which
have CRC atteched to it, which can be potentially dangerous. Even
more grueling problem happens when the command response is followed
by data transfer though, as in that case, the dwmci_data_transfer()
function will spin until it reaches the 240s timeout.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jun Nie [Tue, 13 Feb 2018 08:07:55 +0000 (16:07 +0800)]
common: build ymodem only on need
Build ymodem only on need to shrink spl image size.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Lars Povlsen [Tue, 23 Oct 2018 08:21:25 +0000 (10:21 +0200)]
common: Compile error with CONFIG_MULTI_DTB_FIT and not SPL
common/common_fit.c is including <spl.h>, but not actually using it. The
inclusion will cuase compile error on platforms using CONFIG_OF_SEPARATE
and not SPL.
Signed-off-by: Lars Povlsen <lars.povlsen@microsemi.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Andy Shevchenko [Mon, 5 Nov 2018 16:24:03 +0000 (18:24 +0200)]
dm: Fix typo - missed semicolon
The commit
484fdf5ba058 ("dm: Add support for all targets which requires MANUAL_RELOC")
introduces subtle typo, i.e. missed semicolon.
Fixes:
484fdf5ba058 ("dm: Add support for all targets which requires MANUAL_RELOC")
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Simon Goldschmidt [Fri, 2 Nov 2018 20:49:52 +0000 (21:49 +0100)]
spl: fix debug prints for tiny printf
Tiny printf does not support %.*s and %lX. Since tiny printf should
be very common in SPL, replace these by %32s (for printing image
name) and %lx.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Thu, 8 Nov 2018 16:52:21 +0000 (17:52 +0100)]
MAINTAINERS: Update stm32mp entry
Add mailing list for stm32mp architecture and board.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Stefan Roese [Thu, 8 Nov 2018 06:00:31 +0000 (07:00 +0100)]
fit: Add missing CR in debug output in fit_find_config_node()
Testing has shown that a line-break is missing in one debug line in
fit_find_config_node().
Signed-off-by: Stefan Roese <sr@denx.de>
Christoph Niedermaier [Fri, 19 Oct 2018 15:40:54 +0000 (17:40 +0200)]
imx: imx6: perform gpr_init only on suitable cpu types
If the function gpr_init is used in a common MX6 spl
implementation we have to ensure that it is only called for
suitable cpu types, otherwise it breaks hardware parts like
enet1, can1, can2, etc.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
Tom Rini [Thu, 8 Nov 2018 12:15:29 +0000 (07:15 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi
Bin Meng [Wed, 7 Nov 2018 11:50:35 +0000 (03:50 -0800)]
imx8qxp_mek: Disable CONFIG_DISPLAY_CPUINFO
Due to revert of commit
c0434407b595, this board does not build
any more. Disable CONFIG_DISPLAY_CPUINFO for v2018.11 release.
This commit should be reverted after v2018.11 release.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 7 Nov 2018 11:50:34 +0000 (03:50 -0800)]
Revert "board_f: Use static print_cpuinfo if CONFIG_CPU is active"
This reverts commit
c0434407b595f785fc7401237896c48c791b45fd.
It turns out commit
c0434407b595 broke some boards which have DM CPU
driver with CONFIG_DISPLAY_CPUINFO option on. These boards just fail
to boot when print_cpuinfo() is called during boot.
Fixes are already sent to ML and in u-boot-dm/next, however since
we are getting close to the v2018.11 release, it's safer we revert
the original commit.
This commit should be reverted after v2018.11 release.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 7 Nov 2018 12:10:02 +0000 (07:10 -0500)]
Merge tag 'xilinx-for-v2018.11-rc3' of git://git.denx.de/u-boot-microblaze
Xilinx fixes for v2018.11-rc3
- Fix fit loading address for Zynq
Michal Simek [Wed, 17 Oct 2018 10:16:12 +0000 (12:16 +0200)]
arm: zynq: Setup non zero SPL FIT load address
Default setup is 0 which is incorrect place because it points to OCM
which is allocated for SPL only in our case.
Use address in DDR.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Paul Davey [Mon, 5 Nov 2018 05:09:29 +0000 (18:09 +1300)]
fs: ubifs: Fix UBIFS decompression on 64 bit
Add local size_t variable to crypto_comp_decompress as intermediate
storage for destination length to avoid memory corruption and incorrect
results on 64 bit targets.
This is what linux does for the various lz compression implementations.
Signed-off-by: Paul Davey <paul.davey@alliedtelesis.co.nz>
Cc: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tom Rini [Tue, 6 Nov 2018 16:12:00 +0000 (11:12 -0500)]
Merge tag 'u-boot-imx-
20181106' of git://git.denx.de/u-boot-imx
Fix coverity issues for i.MX8
Tom Rini [Tue, 6 Nov 2018 15:37:31 +0000 (10:37 -0500)]
Merge git://git.denx.de/u-boot-marvell
Tom Rini [Tue, 6 Nov 2018 13:23:32 +0000 (08:23 -0500)]
Merge git://git.denx.de/u-boot-x86
Stefan Roese [Tue, 23 Oct 2018 10:25:16 +0000 (12:25 +0200)]
arm: mvebu: armada-xp-theadorable.dts: Change CS# for 2nd FPGA
The new board version has the 2nd FPGA connected via CS# 0 instead of
2 on SPI bus 1. Change this setup in the DT accordingly. Please note
that this change does still work on the old board version because the
CS signal is not used on this board.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 23 Oct 2018 10:25:15 +0000 (12:25 +0200)]
arm: mvebu: armada-xp-theadorable.dts: Add "spi-flash" compatible property
Add the "spi-flash" compatible string so that the generic sf_probe
driver can probe the SPI flash on the theadorable Armada-XP board.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2018 12:21:17 +0000 (14:21 +0200)]
arm: mvebu: Move PCI(e) MBUS window to end of RAM
With patch
49b23e035d96 (pci: mvebu: Increase size of PCIe default mapping)
the mapping size for each PCI(e) controller was increased from 32MiB to
128MiB. This leads to problems on boards with multiple PCIe slots / ports
which are unable to map all PCIe ports, e.g. the Armada-XP theadorable:
DRAM: 2 GiB (667 MHz, 64-bit, ECC not enabled)
SF: Detected m25p128 with page size 256 Bytes, erase size 256 KiB, total 16 MiB
Cannot add window '4:f8', conflicts with another window
PCIe unable to add mbus window for mem at
f0000000+
08000000
Model: Marvell Armada XP theadorable
This patch moves the base address for the PCI(e) memory spaces from
0xe8000000 to the end of SDRAM (clipped to a max of 0xc0000000 right now).
This gives move room and flexibility for PCI(e) mappings.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: VlaoMao <vlaomao@gmail.com>
Tested-by: VlaoMao <vlaomao at gmail.com>
Peng Fan [Fri, 26 Oct 2018 02:11:42 +0000 (02:11 +0000)]
MAINTAINERS: add NXP linux team maillist as i.MX reviewer
Add NXP linux team upstream maillist as reviewer
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Fri, 26 Oct 2018 00:49:31 +0000 (21:49 -0300)]
ARM: dts: fsl-imx8qxp-mek: Move regulator outside "simple-bus"
Commit
3c28576bb0f0 ("arm: dts: imx8qxp: fix build warining")
fixed the dts warning by removing the unnecessary
#address-cells/#size-cells, but the recommendation for regulators is not
to place them under "simple-bus", so move the reg_usdhc2_vmmc regulator
accordingly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Fri, 26 Oct 2018 00:23:07 +0000 (21:23 -0300)]
mx8mq_evk: README: Delete file introduced by mistake
board/freescale/mx8mq_evk/README has been introduced by mistake
in commit
d0dd73974c61 ("imx: add i.MX8QXP MEK board support")
Remove it for now as this should be introduced when mx8mq_evk
support is in place.
Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:31 +0000 (09:53 +0000)]
tools: imx8image: flatten container header only when creating container
If there is no CONTAINER entry, there is no need to flatten container
header.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:28 +0000 (09:53 +0000)]
tools: imx8image: fix coverity CID 184233
Fix:
CID 184233: (NEGATIVE_RETURNS)
Using variable "container" as an index to array "imx_header.fhdr".
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:25 +0000 (09:53 +0000)]
tools: imx8image: fix coverity CID 184234
Fix:
CID 184234: (TAINTED_SCALAR)
Using tainted variable "header.num_images - 1" as an index into an array "header.img".
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:22 +0000 (09:53 +0000)]
tools: imx8image: check lseek return value
Check lseek return value.
Fix Coverity CID: 184236 184235 184232
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Andy Shevchenko [Wed, 31 Oct 2018 17:14:08 +0000 (19:14 +0200)]
x86: acpi: Remove redundant Offset (0x00)
New ACPI assembler issues a warning:
board/intel/edison/dsdt.asl.tmp 13: Offset (0x00),
Remark 2158 - ^ Unnecessary/redundant use of Offset operator
Indeed, in the OperationRegion the offset is 0x00 by default.
Thus, drop unneeded Offset() use as suggested by ACPI assembler.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Mon, 5 Nov 2018 18:32:56 +0000 (13:32 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-net into next
- ftgmac100 improvements
- TI: CPSW improvements
- VSC8584 PHY support
- Add MT7628 ethernet driver
Grygorii Strashko [Wed, 31 Oct 2018 21:21:45 +0000 (16:21 -0500)]
driver: net: ti: keystone_net: switch to use common mdio lib
Update TI Keystone 2 driver to re-use common mdio lib.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:44 +0000 (16:21 -0500)]
driver: net: ti: cpsw: switch to use common mdio lib
Update TI CPSW driver to re-use common mdio lib
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:43 +0000 (16:21 -0500)]
driver: net: ti: introduce common mdio support library
All existing TI SoCs network HW have similar MDIO implementation, so
introduce common mdio support library which can be reused by TI networking
drivers.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:42 +0000 (16:21 -0500)]
driver: net: ti: cpsw: update to use SPDX identifier
Update to use SPDX license identifier.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:41 +0000 (16:21 -0500)]
drivers: net: keystone_net: drop non dm code
Networking support for all TI K2 boards converted to use DM model and
CONFIG_DM_ETH enabled in all corresponding defconfig files, hence drop
unused non DM K2 networking code.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:40 +0000 (16:21 -0500)]
configs: net: convert DRIVER_TI_KEYSTONE_NET kconfig
Convert DRIVER_TI_KEYSTONE_NET to Kconfig.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:39 +0000 (16:21 -0500)]
driver: net: consolidate ti's code in separate folder
Add drivers/net/ti/ folder and move all TI's code in this folder for better
maintenance.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Quentin Schulz [Wed, 31 Oct 2018 10:20:39 +0000 (11:20 +0100)]
net: phy: mscc: add support for VSC8574 PHY
The VSC8574 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX,
1000BASE-X and triple-speed copper SFP capable, can communicate with
the MAC via SGMII, QSGMII or 1000BASE-X, supports WOL, downshifting and
can set the blinking pattern of each of its 4 LEDs, supports SyncE as
well as HP Auto-MDIX detection.
This adds support for 10/100/1000BASE-T and SGMII/QSGMII link with the
MAC.
The VSC8574 has also an internal Intel 8051 microcontroller whose
firmware needs to be patched when the PHY is reset. If the 8051's
firmware has the expected CRC, its patching can be skipped. The
microcontroller can be accessed from any port of the PHY, though the CRC
function can only be done through the PHY that is the base PHY of the
package (internal address 0) due to a limitation of the firmware.
The GPIO register bank is a set of registers that are common to all PHYs
in the package. So any modification in any register of this bank affects
all PHYs of the package.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Quentin Schulz [Wed, 31 Oct 2018 10:20:38 +0000 (11:20 +0100)]
net: phy: mscc: factorize part of config function for VSC8584
Part of the config is common between the VSC8584 and the VSC8574, so to
prepare for the upcoming support of VSC8574, use the phy_device.priv
pointer that will keep the function that holds code that is PHY-specific
and that should be called during config function.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Quentin Schulz [Wed, 31 Oct 2018 10:20:37 +0000 (11:20 +0100)]
net: phy: mscc: add support for VSC8584 PHY
The VSC8584 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX,
1000BASE-X and triple-speed copper SFP capable, can communicate with the
MAC via SGMII, QSGMII or 1000BASE-X, supports downshifting and can set
the blinking pattern of each of its 4 LEDs, supports hardware offloading
of MACsec and supports SyncE as well as HP Auto-MDIX detection.
This adds support for 10/100/1000BASE-T and SGMII/QSGMII link with the
MAC.
The VSC8584 has also an internal Intel 8051 microcontroller whose
firmware needs to be patched when the PHY is reset. If the 8051's
firmware has the expected CRC, its patching can be skipped. The
microcontroller can be accessed from any port of the PHY, though the CRC
function can only be done through the PHY that is the base PHY of the
package (internal address 0) due to a limitation of the firmware.
The GPIO register bank is a set of registers that are common to all PHYs
in the package. So any modification in any register of this bank affects
all PHYs of the package.
The revA of the VSC8584 PHY (which is not and will not be publicly
released) should NOT patch the firmware of the microcontroller or it'll
make things worse, the easiest way is just to not support it.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:41 +0000 (07:06 +0100)]
aspeed: ast2500: fix D2-PLL clock setting in RGMII mode
The algorithm in the ast2500_calc_clock_config() routine suffers from
integer rounding and the requested rate does not get the appropriate
set of Numerator, Denumerator, Post Divider parameters.
This is the case for the D2-PLL clock used by the MAC controllers in
RGMII mode. The requested rated is 250MHz but a 251MHz is assigned.
The easiest way to fix this problem is to introduce an array of clock
settings defining the N, M, P parameters for well known frequencies
used by the Aspeed SoC.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:40 +0000 (07:06 +0100)]
aspeed: Activate ethernet devices on the ast2500 Eval Board
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:39 +0000 (07:06 +0100)]
aspeed: Update ast2500 SoC DTS file to Linux v4.17-rc6 level
This is a large update of the AST2500 SoC DTS file bringing it to the
level of commit
927c2fc2db19 :
Author: Joel Stanley <joel@jms.id.au>
Date: Sat Jun 2 01:18:53 2018 -0700
ARM: dts: aspeed: Fix hwrng register address
There are some differences on the compatibility property names. scu,
reset and clock drivers are also different.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:38 +0000 (07:06 +0100)]
net: ftgmac100: Add support for the Aspeed SoC
The Faraday ftgmac100 MAC controllers as found on the Aspeed SoCs have
some slight differences in the HW interface (End-Of-Rx/Tx-Ring bits).
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:37 +0000 (07:06 +0100)]
aspeed: ast2500: fix missing break in D2PLL clock enablement
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:36 +0000 (07:06 +0100)]
net: ftgmac100: add clock support
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:35 +0000 (07:06 +0100)]
net: ftgmac100: handle timeouts when transmitting
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:34 +0000 (07:06 +0100)]
net: ftgmac100: convert the RX/TX descriptor arrays
Use simple arrays under the device priv structure to hold the RX and
TX descriptors and handle memory coherency by invalidating or flushing
the d-cache when required.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:33 +0000 (07:06 +0100)]
net: ftgmac100: add MDIO bus and phylib support
Implement the MDIO bus read/write functions using the readl_poll_timeout()
routine, initialize the bus and scan for the PHY. RGMII and RMII mode
are supported.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:32 +0000 (07:06 +0100)]
net: ftgmac100: use setbits_le32() in the reset method
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:31 +0000 (07:06 +0100)]
net: ftgmac100: convert to driver model
The driver is based on the previous one and the code is only adapted
to fit the driver model. The support for the Faraday ftgmac100
controller is the same with MAC and MDIO bus support for RGMII/RMII
modes.
Configuration is updated to enable compile again. At this stage, the
driver compiles but is not yet functional.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:30 +0000 (07:06 +0100)]
net: ftgmac100: use the aligned() macro
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:29 +0000 (07:06 +0100)]
net: ftgmac100: use the BIT() macro
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>