Emil Velikov [Fri, 7 Nov 2014 03:42:15 +0000 (03:42 +0000)]
egl_dri2: add a note about dri2_create_screen
The function is not called by platform_drm. As such one needs to
pay special attention at teardown.
v2: Fix the comment block. Spotted by Ken.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Emil Velikov [Fri, 7 Nov 2014 03:33:56 +0000 (03:33 +0000)]
egl_dri2: fix double free on drm platforms
Earlier commit failed to attribure that for drm platforms one does not
call dri2_create_screen, thus it does not create the screen and
driver_configs but inherits them from the "display" - gbm.
As such wrap cleanup in Platform != _EGL_PLATFORM_DRM to prevent
the issue and still cleanup correctly for non-drm platforms.
v2:
- Drop the ifdef HAVE_DRM_PLATFORM, reindent the code and fix the
comment block. Suggested by Ken.
Reported-by: Kenneth Graunke <kenneth@whitecape.org>
Reported-by: Mark Janes <mark.a.janes@intel.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Chia-I Wu [Fri, 7 Nov 2014 08:10:38 +0000 (16:10 +0800)]
ilo: tidy up message descriptor decoding
Move opcode to string mappings to functions of their own. Have for consistent
outputs for similar opcodes.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Fri, 7 Nov 2014 07:45:25 +0000 (15:45 +0800)]
ilo: decode INTERFACE_DESCRIPTOR_DATA
This is at least much better than decoding as blobs.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Matt Turner [Wed, 5 Nov 2014 23:23:05 +0000 (15:23 -0800)]
i965/fs: Wire up control flow correctly in predicated break pass.
When the earlier block ended with control flow, we'd mistakenly remove
some of its links to its children. The same happened with the later
block.
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Mon, 27 Oct 2014 21:36:48 +0000 (14:36 -0700)]
i965/cfg: Add functions to get first and last non-CF instructions.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Kenneth Graunke [Thu, 30 Oct 2014 03:56:07 +0000 (20:56 -0700)]
glsl: Skip loop-too-large heuristic if indexing arrays of a certain size
A pattern in certain shaders is:
uniform vec4 colors[NUM_LIGHTS];
for (int i = 0; i < NUM_LIGHTS; i++) {
...use colors[i]...
}
In this case, the application author expects the shader compiler to
unroll the loop. By doing so, it replaces variable indexing of the
array with constant indexing, which is more efficient.
This patch extends the heuristic to see if arrays accessed within the
loop are indexed by an induction variable, and if the array size exactly
matches the number of loop iterations. If so, the application author
probably intended us to unroll it. If not, we rely on the existing
loop-too-large heuristic.
Improves performance in a phong shading microbenchmark by 2.88x, and a
shadow mapping microbenchmark by 1.63x. Without variable indexing, we
can upload the small uniform arrays as push constants instead of pull
constants, avoiding shader memory access. Affects several games, but
doesn't appear to impact their performance.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Kristian Høgsberg <krh@bitplanet.net>
Kenneth Graunke [Sat, 26 Apr 2014 07:18:54 +0000 (00:18 -0700)]
glsl: Lower constant arrays to uniform arrays.
Consider GLSL code such as:
const ivec2 offsets[] =
ivec2[](ivec2(-1, -1), ivec2(-1, 0), ivec2(-1, 1),
ivec2(0, -1), ivec2(0, 0), ivec2(0, 1),
ivec2(1, -1), ivec2(1, 0), ivec2(1, 1));
ivec2 offset = offsets[<non-constant expression>];
Both i965 and nv50 currently handle this very poorly. On i965, this
becomes a pile of MOVs to load the immediate constants into registers,
a pile of scratch writes to move the whole array to memory, and one
scratch read to actually access the value - effectively the same as if
it were a non-constant array.
We'd much rather upload large blocks of constant data as uniform data,
so drivers can simply upload the data via constbufs, and not have to
populate it via shader instructions.
This is currently non-optional because both i965 and nouveau benefit
from it, and according to Marek radeonsi would benefit today as well.
(According to Tom, radeonsi may want to handle this itself in the long
term, but we can always add a flag when it becomes useful.)
Improves performance in a terrain rendering microbenchmark by about 2x,
and cuts the number of instructions in about half. Helps a lot of
"Natural Selection 2" shaders, as well as one "HOARD" shader.
total instructions in shared programs: 5473459 -> 5471765 (-0.03%)
instructions in affected programs: 5880 -> 4186 (-28.81%)
v2: Use ir_var_hidden to avoid exposing the new uniform via the GL
uniform introspection API.
v3: Alphabetize Makefile.sources properly.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77957
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Mon, 27 Oct 2014 23:34:06 +0000 (16:34 -0700)]
glsl: Add infrastructure for "hidden" uniforms.
In the compiler, we'd like to generate implicit uniforms for internal
use. These should not be visible via the GL uniform introspection API.
To support that, we add a new ir_variable::how_declared value of
ir_var_hidden, and plumb that through to gl_uniform_storage.
v2 (idr): Fix some memory management issues in
move_hidden_uniforms_to_end. The comment block on the function has more
details.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Timothy Arceri [Wed, 29 Oct 2014 12:05:59 +0000 (23:05 +1100)]
mesa: Add SSE 4.1 optimisation for glDrawElements.
Makes use of SSE 4.1 to speed up compute of min and max elements.
Callgrind cpu usage results from pts benchmarks:
Openarena 0.8.8: 3.67% -> 1.03%
UrbanTerror: 2.36% -> 0.81%
V5:
- actually make use of the optimisation in android (Emil Velikov)
- set a better array size limit for using SSE and added TODO
V4:
- fixed bugs with incrementing pointer and updating counters
V3:
- Removed sse_minmax.c from Makefile.sources
- handle the first few values without SSE until the pointer is aligned
and use _mm_load_si128 rather than _mm_loadu_si128
- guard the call to the SSE code better at build time
V2:
- removed GL* types
- use _mm_store_si128() rather than _mm_store_ps()
- add runtime check for SSE
- use aligned attribute for local mix/max
- bunch of tidyups
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Matt Turner [Tue, 28 Oct 2014 16:04:41 +0000 (09:04 -0700)]
i965: Remove non-existent vertical strides from array.
These never existed, as far as I can tell.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Wed, 27 Aug 2014 05:38:17 +0000 (22:38 -0700)]
i965: Convert stride/width/execution size macros into enums.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Fri, 31 Oct 2014 18:29:24 +0000 (11:29 -0700)]
i965/fs: Remove force uncompressed stack.
Last use was in shader_time.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Fri, 31 Oct 2014 18:24:43 +0000 (11:24 -0700)]
i965/fs: Use execution size of 1 for some shader_time operations.
The ADDs depended on dispatch_width, which really isn't what we wanted.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Matt Turner [Fri, 31 Oct 2014 18:12:30 +0000 (11:12 -0700)]
i965/fs: Use mov(4) instructions to read timestamp.
We only want fields 0-2.
Jan Vesely [Thu, 6 Nov 2014 16:46:41 +0000 (11:46 -0500)]
clover: Fix build after llvm r221375
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Emil Velikov [Thu, 23 Oct 2014 16:27:01 +0000 (17:27 +0100)]
egl_dri2: do not leak dri2_dpy->driver_configs
Walk through the list and free each config, and finally free the list
itself. Freeing approx 20KiB of memory, according to valgrind.
Inspired by a similar patch by enpeng xu.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Thu, 6 Nov 2014 13:19:08 +0000 (13:19 +0000)]
ilo: add two missing headers to the sources list
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Alexandros Frantzis [Fri, 24 Oct 2014 10:03:13 +0000 (03:03 -0700)]
Releasing a surfaceless EGL context doesn't release underlying DRI context.
driUnbindContext() checks for valid drawables before calling the driver
unbind function. In case of Surfaceless contexts, the drawables are always
Null and we end up not releasing the underlying DRI context. Moving the
call to the driver function before the drawable validity checks fixes things.
Steps to trigger this bug are following:
- create surfaceless context and make it current
- make some other context current
- {another thread} destroy surfaceless context
- make another context current
Signed-off-by: Alexandros Frantzis <Alexandros.Frantzis@canonical.com>
Signed-off-by: Kalyan Kondapally <kalyan.kondapally@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74563
Chia-I Wu [Wed, 5 Nov 2014 02:16:49 +0000 (10:16 +0800)]
ilo: let ilo_shader_compile_cs() return a dummy shader
The dummy shader sends an EOT message to end itself. There are many more
works need to be done on the compiler side before we can advertise
PIPE_CAP_COMPUTE.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Wed, 29 Oct 2014 01:57:23 +0000 (09:57 +0800)]
ilo: hook up launch_grid()
All we need to do is to upload the input data and call
ilo_render_emit_launch_grid() with space checking.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Wed, 29 Oct 2014 01:57:01 +0000 (09:57 +0800)]
ilo: add ilo_render_emit_launch_grid()
ilo_render_emit_launch_grid() emits all the hardware states needed for a
launch_grid() call.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Wed, 29 Oct 2014 01:42:31 +0000 (09:42 +0800)]
ilo: improve media command helpers
They were written for Gen6 but mostly untested. Make them work for Gen7+.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Wed, 5 Nov 2014 03:08:42 +0000 (11:08 +0800)]
ilo: disassemble DP DC messages
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Wed, 5 Nov 2014 05:10:25 +0000 (13:10 +0800)]
ilo: disassemble TS messages
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Tue, 28 Oct 2014 08:16:45 +0000 (16:16 +0800)]
ilo: update genhw headers for media pipeline
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Thu, 30 Oct 2014 07:45:05 +0000 (15:45 +0800)]
ilo: add ilo_finalize_compute_states()
It updates the handles of the global bindings.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Thu, 30 Oct 2014 06:35:00 +0000 (14:35 +0800)]
ilo: use a dynamic array for global bindings
Use util_dynarray in ilo_set_global_binding() to allow for unlimited number of
global bindings. Add a comment for global bindings.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Thu, 30 Oct 2014 02:03:17 +0000 (10:03 +0800)]
ilo: add kernel queries for compute shaders
We need to know the local/input/private sizes and others. This is not
complete. We need many others for CURBE setup.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Thu, 30 Oct 2014 04:24:01 +0000 (12:24 +0800)]
ilo: fix compute params
Based on beignet, hardware capabilities, and OpenCL requirements.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Tue, 28 Oct 2014 23:49:53 +0000 (07:49 +0800)]
ilo: add eu_count and thread_count to ilo_dev_info
They will be used to report compute params or program compute states.
thread_count can also be used for 3DSTATE_VS.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Chia-I Wu [Wed, 5 Nov 2014 07:27:42 +0000 (15:27 +0800)]
ilo: fix intel_bo_wait() on kernel 3.17
drm_intel_gem_bo_wait() with negative timeout is broken on kernel 3.17.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Ian Romanick [Wed, 29 Oct 2014 20:06:15 +0000 (13:06 -0700)]
mesa: Silence unused parameter warning in check_context_limits in non-debug builds
../../src/mesa/main/context.c: In function 'check_context_limits':
../../src/mesa/main/context.c:733:41: warning: unused parameter 'ctx' [-Wunused-parameter]
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Ian Romanick [Wed, 22 Oct 2014 23:41:41 +0000 (16:41 -0700)]
util: Implement unreachable for MSVC using __assume
Based on the description of __assume at:
http://msdn.microsoft.com/en-us/library/1b3fsfxw.aspx
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Chris Forbes [Tue, 4 Nov 2014 17:41:13 +0000 (06:41 +1300)]
i965: Fix sampler state pointer adjustment for nonconst samplers
This started hitting an assertion recently. Only affects Haswell
(Ivybridge doesn't support this meddling with the sampler state pointer,
and ARB_gpu_shader5 is not enabled yet on Broadwell)
14 Piglits crash->pass.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Nick Sarnie [Wed, 15 Oct 2014 20:08:38 +0000 (16:08 -0400)]
ilo: add drm_configuration for the pipe-target
Allows the driver to advertise DMA-BUF and throttling.
Kenneth Graunke [Wed, 22 Oct 2014 15:58:59 +0000 (08:58 -0700)]
i965: Re-enable Z16 on Gen8+.
Improves performance in GLBenchmark 2.7 TRex by 3.88889% +/- 0.336383%
(n=80) at 1280x720 on Broadwell GT3. Together with the previous patch,
it improves performance by 5.42738% +/- 0.541971% (n=10) at 1920x1080.
Note that without the PMA stall fix, this would instead decrease
performance by 22%.
v2: Update comment (noticed by Kristian Høgsberg).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Wed, 22 Oct 2014 15:58:58 +0000 (08:58 -0700)]
i965: Implement the PMA stall fix.
Certain non-promoted depth cases typically incur stalls. In very
specific cases, we can enable a workaround which improves performance.
Improves performance in GLBenchmark 2.7 TRex by 1.17762% +/- 0.448765%
(n=75) at 1280x720 on Broadwell GT3.
Haswell has this feature as well, but we can't currently write registers
from userspace batches (and we'd incur additional software batch
scanning overhead as well), so we haven't enabled it. Broadwell allows
us to write CACHE_MODE_1. Backporters beware: the formula and flushing
incantation differs between Haswell and Broadwell.
v2: Move pma_stall_bits from brw->state to brw itself (requested by
Kristian Høgsberg).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Wed, 22 Oct 2014 15:58:57 +0000 (08:58 -0700)]
i965: Add #defines for Broadwell HiZ workarounds in CACHE_MODE_1.
This patch adds macros needed for the HiZ PMA stall optimization.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Tue, 4 Nov 2014 06:16:13 +0000 (22:16 -0800)]
i965: Update compaction code to handle Skylake like Cherryview.
Matt requested this in review feedback on the original patch, which I
completely missed when pushing this series. Kristian also made this
change, but I grabbed the wrong version of the patch.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Tue, 4 Nov 2014 02:16:41 +0000 (18:16 -0800)]
mesa: Don't call _mesa_ClipControl from glPopAttrib when unsupported.
Otherwise, calling glPopAttrib on drivers that don't support
ARB_clip_control gives you a GL error, which is surprising at best.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Mon, 3 Nov 2014 23:34:56 +0000 (15:34 -0800)]
i965: Disable fast color clears on Skylake for now.
We're not programming the clear values yet, so this won't work.
This patch should be (effectively) reverted eventually.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kristian Høgsberg [Tue, 23 Sep 2014 16:46:28 +0000 (09:46 -0700)]
i965/skl: Use new MOCS for SKL
On Skylake, the MOCS bits are an index into a table of 63 different,
configurable cache configurations. As for previous GENs, we only care about
WB and WT, which are available in the documented default set. Define
SKL_MOCS_WB and SKL_MOCS_WT to the indices for those configucations and use
those for the Skylake MOCS values.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Jordan Justen [Thu, 1 May 2014 18:03:09 +0000 (11:03 -0700)]
i965/skl: Implement workaround for VF Invalidate issue
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Tue, 22 Apr 2014 02:47:07 +0000 (19:47 -0700)]
i965/skl: Update Viewport Z Clip Test Enable bits for Skylake.
Skylake has separate controls for enabling the Z Clip Test for the near
and far planes. For now, maintain the legacy behavior by setting both.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Tue, 22 Apr 2014 02:43:50 +0000 (19:43 -0700)]
i965/skl: Emit extra zeros in 3DSTATE_DS on Skylake.
Skylake's 3DSTATE_DS packet has a few more fields; we don't support
domain shaders yet though.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kristian Høgsberg [Mon, 22 Sep 2014 10:10:34 +0000 (03:10 -0700)]
i965/skl: Init instructions compaction tables for SKL
They are the same as for BDW, so just add a case for SKL to the init switch.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kristian Høgsberg [Sat, 6 Sep 2014 04:19:02 +0000 (21:19 -0700)]
i965/skl: Add fast clear resolve rect multipliers for SKL
SKL updates the resolve rectangle scaling factors again.
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Tue, 29 Apr 2014 22:32:40 +0000 (15:32 -0700)]
i965/skl: Always emit 3DSTATE_BINDING_TABLE_POINTERS_* on Skylake.
On SKL, 3DSTATE_CONSTANT_* command is not committed until we give
the corresponding 3DSTATE_BINDING_TABLE_POINTERS_* command. If we
fail to do so, the constant buffers wont be read and push constants
will be wrong.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Thu, 24 Apr 2014 20:54:14 +0000 (13:54 -0700)]
i965/skl: Allocate 16 DWords for SURFACE_STATE on Skylake.
Otherwise they overlap and horrible things happen. All the new DWords
are for fast color clear values, which we don't do yet.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Thu, 24 Apr 2014 20:40:53 +0000 (13:40 -0700)]
i965/skl: Refactor surface state allocation.
We will need to allocate more DWords on Skylake.
v2: Don't mark brw_context parameter const. It's modified.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Tue, 22 Apr 2014 02:38:18 +0000 (19:38 -0700)]
i965/skl: Emit extra zeros in STATE_BASE_ADDRESS on Skylake.
Skylake introduces a new base address for a feature we don't yet expose.
Setting these to 0 should be safe.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Tue, 22 Apr 2014 02:30:51 +0000 (19:30 -0700)]
i965/skl: Update stencil reference handling for Skylake.
Skylake uploads the stencil reference values in DW3 of the
3DSTATE_WM_DEPTH_STENCIL packet, rather than in COLOR_CALC_STATE.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Mon, 21 Apr 2014 23:37:04 +0000 (16:37 -0700)]
i965/skl: Set mask bits in PIPELINE_SELECT on Skylake.
Skylake has some extra bits in PIPELINE_SELECT, none of which are
interesting for a 3D driver. In order to selectively change them, it
also introduces new "mask bits" in 15:8. We care about the "Pipeline
Selection" bits (1:0), so set the mask to 0x3.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Jordan Justen [Mon, 21 Apr 2014 00:31:30 +0000 (17:31 -0700)]
i965/skl: Set max OpenGL version the same as gen7/8
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Damien Lespiau [Wed, 27 Feb 2013 15:05:25 +0000 (15:05 +0000)]
i965/skl: Update 3DSTATE_SBE for Skylake.
This commands has seen the addition of 2 dwords that allow to specify
which channels of which attributes need to be forwarded to the fragment
shader.
v2: Rebase forward a year (done by Ken).
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Wed, 29 Oct 2014 09:43:29 +0000 (02:43 -0700)]
glsl: Improve the CSE pass debugging output.
The CSE pass now prints out why it thinks a value is not a candidate for
adding to the AE set.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Matt Turner [Wed, 29 Oct 2014 21:21:14 +0000 (14:21 -0700)]
i965/fs: Don't compute_to_mrf() on Gen >= 7.
No differences in shader-db on Haswell (Gen 7.5).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 30 Oct 2014 22:39:36 +0000 (15:39 -0700)]
glsl: Remove now useless dot optimization on basis vect
The optimization in commit
d056863b covers these cases, which were the
first optimizations I added to the GLSL compiler.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Fri, 31 Oct 2014 17:33:17 +0000 (10:33 -0700)]
glsl: Emit mul instead of dot if only one component left.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85683
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85691
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tom Stellard [Mon, 3 Nov 2014 14:14:01 +0000 (09:14 -0500)]
clover: Fix clBuildProgram piglit regression
Should trigger CL_INVALID_VALUE if device_list is NULL and num_devices
is greater than zero.
Introduced by
e5468dfa523be2a7a0d04bb9efcf8ae780957563
Reported by: EdB
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
José Fonseca [Fri, 31 Oct 2014 22:58:52 +0000 (22:58 +0000)]
gallivm: Disable frame-pointer-omission on x86 to ensure right stack alignment.
Between release 3.2 and 3.3 LLVM stopped aligning properly when certain
conditions (no allocas, but large number of vectors causing spills to
the stack, and frame pointer omission enabled).
We were already disabling frame-pointer-omission on several build types,
but we now disable it on all build types.
It's not clear whether this affects 32-bits x86 processes only, or if it
can also affect 64-bits x86_64 processes when AVX registers are
available and used. So disable frame-pointer-omission on both
x86/x86_64 to be on the safe side.
See also:
- http://llvm.org/PR21435
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
José Fonseca [Fri, 31 Oct 2014 23:09:02 +0000 (23:09 +0000)]
gallivm: When disassemble a function, start by printing out its name.
To help recognize what's supposed to do.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Ben Widawsky [Sun, 2 Nov 2014 19:43:24 +0000 (11:43 -0800)]
i965/chv: Increase VS and GS thread counts
AFAICT the number of threads is 80, not 70. I am not sure if Ken knows
something I do not.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Fri, 31 Oct 2014 22:01:25 +0000 (16:01 -0600)]
gallium/docs: fix NRM, NRM4 docs
Need to do a sqrt().
FWIW, the html that Sphinx 1.1.3 generates for the math expressions
looks completely broken.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Fri, 31 Oct 2014 03:02:19 +0000 (21:02 -0600)]
softpipe: use the tgsi_free_tokens() function
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 31 Oct 2014 01:08:59 +0000 (19:08 -0600)]
tgsi: add a tgsi_free_tokens() function
To match tgsi_alloc_tokens().
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 31 Oct 2014 01:45:52 +0000 (19:45 -0600)]
util: simplify u_pstipple.c code
Use the new helper functions in the tgsi_transform.h file to emit
declarations and instructions.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 31 Oct 2014 01:38:09 +0000 (19:38 -0600)]
util: simplify temp register selection in u_pstipple.c
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 31 Oct 2014 01:13:57 +0000 (19:13 -0600)]
util: simplify util_pstipple_create_fragment_shader() params
Pass and return tgsi_token buffers instead of pipe_shader_state.
And update softpipe driver (the only user of this function).
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 31 Oct 2014 01:11:54 +0000 (19:11 -0600)]
softpipe: remove unused softpipe_create_fs_variant_exec() parameter
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 31 Oct 2014 02:45:36 +0000 (20:45 -0600)]
softpipe: check for SP_NEW_STIPPLE when building quad pipeline
Fixes polygon stipple if both DO_PSTIPPLE_IN_DRAW_MODULE and
DO_PSTIPPLE_IN_HELPER_MODULE are zero/off.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Tom Stellard [Fri, 31 Oct 2014 20:26:52 +0000 (16:26 -0400)]
r600g: Fix build with opencl and radeonsi disabled
Tom Stellard [Tue, 21 Oct 2014 14:33:21 +0000 (10:33 -0400)]
clover: Fix bug when binary programs are passed to clBuildProgram() v2
This was a regression introduced by
611d66fe4513e53bde052dd2bab95d448c909a2a
Passing a binary program to clBuildProgram() is legal, but passing one
to clCompileProgram() is not.
v2:
- Code cleanups.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tom Stellard [Tue, 21 Oct 2014 14:31:56 +0000 (10:31 -0400)]
clover: Factor input validation of clCompileProgram into a new function v2
This factors out the validation that is common with clBuildProgram().
v2:
- Code cleanups.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Tom Stellard [Fri, 26 Sep 2014 01:11:24 +0000 (18:11 -0700)]
radeonsi/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2
v2:
- Drop dependency on LLVM >= 3.5.1
- Rename si_create_shader() to si_shader_binary_read()
Tom Stellard [Fri, 26 Sep 2014 01:10:44 +0000 (18:10 -0700)]
r600g/compute: Enable PIPE_SHADER_IR_NATIVE for compute shaders v2
v2:
- Drop dependency on LLVM >= 3.5.1
Tom Stellard [Mon, 29 Sep 2014 16:36:42 +0000 (09:36 -0700)]
gallium/radeon: Add query for symbol specific config information
This adds a query which allows drivers to access the config
information of a specific function within the LLVM generated ELF
binary. This makes it possible for the driver to handle ELF
binaries with multiple kernels / global functions.
Marek Olšák [Thu, 30 Oct 2014 20:57:00 +0000 (21:57 +0100)]
r300g: remove enabled/disabled hyperz and AA compression messages
It's annoying with octave. Reported by Michael Burian.
Cc: 10.2 10.3 <mesa-stable@lists.freedesktop.org>
Dieter Nützel [Thu, 23 Oct 2014 17:59:13 +0000 (19:59 +0200)]
r600g: Delete unused variable 'max_global_size' in 'r600_get_compute_param'
Signed-off-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Chia-I Wu [Wed, 20 Aug 2014 06:40:31 +0000 (14:40 +0800)]
mesa: protect the debug state with a mutex
We are about to change mesa to spawn threads for deferred glCompileShader and
glLinkProgram, and we need to make sure those threads can send compiler
warnings/errors to the debug output safely.
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chia-I Wu [Wed, 20 Aug 2014 06:40:29 +0000 (14:40 +0800)]
glsl: protect glsl_type with a mutex
glsl_type has several static hash tables and a static ralloc context. They
need to be protected by a mutex as they are not thread-safe.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69200
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chia-I Wu [Wed, 20 Aug 2014 06:40:28 +0000 (14:40 +0800)]
glsl: protect anonymous struct id with a mutex
There may be two contexts compiling shaders at the same time, and we want the
anonymous struct id to be globally unique.
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Chia-I Wu [Wed, 20 Aug 2014 06:40:24 +0000 (14:40 +0800)]
util: initialize locale_t with a static object
_mesa_strtod and _mesa_strtof may be called from multiple threads. They need
to be thread-safe.
v2: platform checks are now done in configure.ac
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chia-I Wu [Wed, 20 Aug 2014 06:40:23 +0000 (14:40 +0800)]
configure: check for xlocale.h and strtof
With the assumptions that xlocale.h implies newlocale and strtof_l. SCons is
updated to define HAVE_XLOCALE_H on linux and darwin.
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chia-I Wu [Wed, 20 Aug 2014 06:40:22 +0000 (14:40 +0800)]
util: add _mesa_strtod and _mesa_strtof
Both core mesa and glsl have their own wrappers for strtof_l. Merge
and move them to util/. They are compiled with a C++ compiler so that
we can make them thread-safe in a following commit.
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Kenneth Graunke <kenneth@whiteacpe.org>
Mathias Fröhlich [Sat, 25 Oct 2014 08:17:04 +0000 (10:17 +0200)]
mesa/gallium: Signal _NEW_TRANSFORM from glClipControl.
This removes the need for the gallium rasterizer state
to listen to viewport changes.
Thanks to Marek Olšák <maraeo@gmail.com>.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Mathias Froehlich <Mathias.Froehlich@web.de>
Matt Turner [Thu, 30 Oct 2014 04:38:39 +0000 (21:38 -0700)]
Revert "i965/compaction: Disable compaction on SNB temporarily."
This reverts commit
cabc93c5adc9ea62be901621eff5ce4cb9574791.
Mark thinks the failures on the SNB GT2 in the lab are actually because
of faulty hardware, not instruction compaction. The GT1 didn't see any
problems after changes to the compaction code.
Matt Turner [Sun, 26 Oct 2014 17:31:21 +0000 (10:31 -0700)]
i965/vec4: Perform CSE on MAD instructions with final arguments switched.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Sun, 26 Oct 2014 17:08:40 +0000 (10:08 -0700)]
i965/fs: Perform CSE on MAD instructions with final arguments switched.
Multiplication is commutative.
instructions in affected programs: 48314 -> 47954 (-0.75%)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Sat, 18 Oct 2014 03:32:58 +0000 (20:32 -0700)]
glsl: Drop constant 0.0 components from dot products.
Helps a small number of vertex shaders in the games Dungeon Defenders
and Shank, as well as an internal benchmark.
instructions in affected programs: 2801 -> 2719 (-2.93%)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Sat, 15 Mar 2014 01:53:42 +0000 (18:53 -0700)]
glx/dri3: Implement LIBGL_SHOW_FPS=1 for DRI3/Present.
v2: Use the UST value provided in the PRESENT_COMPLETE_NOTIFY event
rather than gettimeofday(), which gives us the presentation time
instead of the time when SwapBuffers was called. Suggested by
Keith Packard. This relies on the fact that the X DRI3/Present
implementations use microseconds for UST.
v3: Properly ignore PresentCompleteKindMSCNotify; multiply in 64 bits
(caught by Keith Packard).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Keith Packard <keithp@keithp.com> [v3]
Reviewed-by: Marek Olšák <marek.olsak@amd.com> [v1]
Kenneth Graunke [Wed, 29 Oct 2014 00:27:39 +0000 (17:27 -0700)]
i965: Rename brw_vec4_gs.[ch] to brw_gs.[ch].
These source files support actual geometry shaders, so using "gs" for
the name makes a lot of sense. We're going to be adding SIMD8 geometry
shader support as well, at which point "vec4_gs" will be a misnomer.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Wed, 29 Oct 2014 00:18:55 +0000 (17:18 -0700)]
i965: Rename brw_gs{,_emit}.[ch] to brw_ff_gs{,_emit}.[ch].
The brw_gs.[ch] and brw_gs_emit.c source files contain code for
emulating fixed-function unit functionality (VF primitive decomposition
or SOL) using the GS unit. They do not contain code to support proper
geometry shaders.
We've taken to calling that code "ff_gs" (see brw_ff_gs_prog_key,
brw_ff_gs_prog_data, brw_context::ff_gs, brw_ff_gs_compile,
brw_ff_gs_prog). So it makes sense to make the filenames match.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Tue, 28 Oct 2014 08:05:12 +0000 (01:05 -0700)]
i965: Rename intel_bufferobj_* functions to match GL and DD hooks.
The GL functions and driver hooks use corresponding names---for example,
glMapBufferRange and Driver.MapBufferRange. But our implementation was
called "intel_bufferobj_map_range," which has the words "map" and
"buffer" swapped, as well as randomly adding "obj."
FlushMappedBufferRange was even trickier: it ordered the words
3, "obj", 1, 2, 4: intel_bufferobj_flush_mapped_range.
Even though the old names were consistent, I always had trouble
rearranging the jumble of words when searching for a function,
and it took a few tries to eventually land there.
The new names match the word order of GL and the driver hooks;
FlushMappedBufferRange is simply brw_flush_mapped_buffer_range.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Jan Vesely [Tue, 21 Oct 2014 16:19:13 +0000 (12:19 -0400)]
configure: fix typos
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Jan Vesely [Thu, 23 Oct 2014 21:17:07 +0000 (17:17 -0400)]
configure: include llvm systemlibs when using static llvm
v2: drop -WL,--exclude-libs, it's not necessary
fix tabs/spaces
Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70410
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Michel Dänzer [Tue, 28 Oct 2014 02:28:29 +0000 (11:28 +0900)]
radeon/llvm: Dynamically allocate branch/loop stack arrays
This prevents us from silently overflowing the stack arrays, and allows
arbitrary stack depths.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85454
Cc: mesa-stable@lists.freedesktop.org
Reported-and-Tested-by: Nick Sarnie <commendsarnex@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Chris Forbes [Sat, 18 Oct 2014 08:12:07 +0000 (21:12 +1300)]
mesa: Fix order of errors for glDrawTransformFeedbackStream
The OpenGL 4.0 core profile specification, section 2.17.3
Transform Feedback Draw Operations says:
"The error INVALID_VALUE is generated if <stream> is greater
than or equal to the value of MAX_VERTEX_STREAMS.
...
The error INVALID_OPERATION
is generated if EndTransformFeedback has never been called
while the object named by id was bound."
Fixes the piglit test:
ARB_transform_feedback3/arb_transform_feedback3-draw_using_invalid_stream_index
(with the test itself fixed to eliminate an unrelated failure)
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 2 Oct 2014 01:27:24 +0000 (18:27 -0700)]
vc4: Add support for ARL and indirect register access on TGSI_FILE_CONSTANT.
Fixes 14 ARB_vp tests (which had no lowering done), and should improve
performance of indirect uniform array access in GLSL.