Sylvestre Ledru [Thu, 20 Sep 2018 07:58:43 +0000 (07:58 +0000)]
add a quick link to libc++abi
llvm-svn: 342625
Sylvestre Ledru [Thu, 20 Sep 2018 07:57:31 +0000 (07:57 +0000)]
refresh the libc++ homepage
llvm-svn: 342624
Roman Lebedev [Thu, 20 Sep 2018 07:54:49 +0000 (07:54 +0000)]
[NFC][x86][AArch64] Add BEXTR-like test patterns.
Summary: Also, adjust the check prefixes so that we actually get to check the BMI1-only-case.
Reviewers: craig.topper, RKSimon, spatel, javed.absar
Reviewed By: RKSimon
Subscribers: kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D48490
llvm-svn: 342623
Sylvestre Ledru [Thu, 20 Sep 2018 07:43:24 +0000 (07:43 +0000)]
Improve the doc about the initial commit email sent to the ML
llvm-svn: 342622
Bjorn Pettersson [Thu, 20 Sep 2018 06:59:18 +0000 (06:59 +0000)]
[MachineVerifier] Relax checkLivenessAtDef regarding dead subreg defs
Summary:
Consider an instruction that has multiple defs of the same
vreg, but defining different subregs:
%7.sub1:rc, dead %7.sub2:rc = inst
Calling checkLivenessAtDef for the live interval associated
with %7 incorrectly reported "live range continues after a
dead def". The live range for %7 has a dead def at the slot
index for "inst" even if the live range continues (given that
there are later uses of %7.sub1).
This patch adjusts MachineVerifier::checkLivenessAtDef
to allow dead subregister definitions, unless we are checking
a subrange (when tracking subregister liveness).
A limitation is that we do not detect the situation when the
live range continues past an instruction that defines the
full virtual register by multiple dead subreg defines.
I also removed some dead code related to physical register
in checkLivenessAtDef. Wwe only call that method for virtual
registers, so I added an assertion instead.
Reviewers: kparzysz
Reviewed By: kparzysz
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52237
llvm-svn: 342618
Dean Michael Berris [Thu, 20 Sep 2018 05:22:37 +0000 (05:22 +0000)]
[XRay][compiler-rt] FDRLogWriter Abstraction
Summary:
This change introduces an `FDRLogWriter` type which is responsible for
serialising metadata and function records to character buffers. This is
the first step in a refactoring of the implementation of the FDR runtime
to allow for more granular testing of the individual components of the
implementation.
The main contribution of this change is a means of hiding the details of
how specific records are written to a buffer, and for managing the
extents of these buffers. We make use of C++ features (templates and
some metaprogramming) to reduce repetition in the act of writing out
specific kinds of records to the buffer.
In this process, we make a number of changes across both LLVM and
compiler-rt to allow us to use the `Trace` abstraction defined in the
LLVM project in the testing of the runtime implementation. This gives us
a closer end-to-end test which version-locks the runtime implementation
with the loading implementation in LLVM.
We also allow using gmock in compiler-rt unit tests, by adding the
requisite definitions in the `AddCompilerRT.cmake` module. We also add
the terminfo library detection along with inclusion of the appropriate
compiler flags for header include lookup.
Finally, we've gone ahead and updated the FDR logging implementation to
use the FDRLogWriter for the lowest-level record-writing details.
Following patches will isolate the state machine transitions which
manage the set-up and tear-down of the buffers we're using in multiple
threads.
Reviewers: mboerger, eizan
Subscribers: mgorny, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D52220
llvm-svn: 342617
Eric Christopher [Thu, 20 Sep 2018 05:16:29 +0000 (05:16 +0000)]
Temporarily Revert "[New PM] Introducing PassInstrumentation framework"
as it was causing failures in the asan buildbot.
This reverts commit r342597.
llvm-svn: 342616
Maya Madhavan [Thu, 20 Sep 2018 05:11:42 +0000 (05:11 +0000)]
Fix for bug 34002 - label generated before it block is finalized. Differential Revision: https://reviews.llvm.org/D52258
llvm-svn: 342615
QingShan Zhang [Thu, 20 Sep 2018 05:04:57 +0000 (05:04 +0000)]
[PowerPC] [Clang] Add vector int128 pack/unpack builtins
unsigned long long builtin_unpack_vector_int128 (vector int128_t, int);
vector int128_t builtin_pack_vector_int128 (unsigned long long, unsigned long long);
Builtins should behave the same way as in GCC.
Patch By: wuzish (Zixuan Wu)
Differential Revision: https://reviews.llvm.org/D52074
llvm-svn: 342614
Dean Michael Berris [Thu, 20 Sep 2018 04:27:32 +0000 (04:27 +0000)]
[unittests] Do not use llvm::sort in googlemock
Summary:
This reverts r329475 which applied to googlemock. This change makes the
googlemock implementation in LLVM dependent on LLVM unnecessarily.
Reviewers: echristo, mgrang
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52287
llvm-svn: 342612
QingShan Zhang [Thu, 20 Sep 2018 03:09:15 +0000 (03:09 +0000)]
[PowerPC] Fix the assert of combineBVOfConsecutiveLoads when element num is 1
Building a vector out of multiple loads can be converted to a load of the vector type if the loads are consecutive.
But the special condition is that the element number is 1, such as <1 x i128>. So just early exit to fix the assert.
Patch By: wuzish (Zixuan Wu)
Differential Revision: https://reviews.llvm.org/D52072
llvm-svn: 342611
Thomas Lively [Thu, 20 Sep 2018 02:55:28 +0000 (02:55 +0000)]
[WebAssembly] Renumber SIMD ops
Summary:
This change leaves holes in the opcode space where missing
instructions could logically be added later if they were found to be
useful.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52282
llvm-svn: 342610
Eric Fiselier [Thu, 20 Sep 2018 01:15:17 +0000 (01:15 +0000)]
Fix diagnostic regex in variant tests to tolerate older clang versions
llvm-svn: 342609
Yi Kong [Thu, 20 Sep 2018 01:02:13 +0000 (01:02 +0000)]
[builtins] Add __emutls_unregister_key function
This is called by Bionic on dlclose to delete the emutls pthread key.
The return value of pthread_key_delete is unchecked and behaviour of
multiple calls to the method is dependent on the implementation of
pthread_key_delete.
Differential Revision: https://reviews.llvm.org/D52251
llvm-svn: 342608
Aaron Puchert [Thu, 20 Sep 2018 00:39:27 +0000 (00:39 +0000)]
Thread Safety Analysis: warnings for attributes without arguments
Summary:
When thread safety annotations are used without capability arguments,
they are assumed to apply to `this` instead. So we warn when either
`this` doesn't exist, or the class is not a capability type.
This is based on earlier work by Josh Gao that was committed in r310403,
but reverted in r310698 because it didn't properly work in template
classes. See also D36237.
The solution is not to go via the QualType of `this`, which is then a
template type, hence the attributes are not known because it could be
specialized. Instead we look directly at the class in which we are
contained.
Additionally I grouped two of the warnings together. There are two
issues here: the existence of `this`, which requires us to be a
non-static member function, and the appropriate annotation on the class
we are contained in. So we don't distinguish between not being in a
class and being static, because in both cases we don't have `this`.
Fixes PR38399.
Reviewers: aaron.ballman, delesley, jmgao, rtrieu
Reviewed By: delesley
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D51901
llvm-svn: 342605
Sean Fertile [Thu, 20 Sep 2018 00:26:49 +0000 (00:26 +0000)]
[PPC64] Handle ppc64le triple in getBitcodeMachineKind.
Enables lto and thinlto with bitcode targeting ppc64le.
Differential Revision: https://reviews.llvm.org/D52265
llvm-svn: 342604
Sean Fertile [Thu, 20 Sep 2018 00:26:47 +0000 (00:26 +0000)]
[PPC64] Helper for offset from a function's global entry to local entry. [NFC]
The PPC64 elf V2 abi defines 2 entry points for a function. There are a few
places we need to calculate the offset from the global entry to the local entry
and how this is done is not straight forward. This patch adds a helper function
mostly for documentation purposes, explaining how the 2 entry points differ and
why we choose one over the other, as well as documenting how the offsets are
encoded into a functions st_other field.
Differential Revision: https://reviews.llvm.org/D52231
llvm-svn: 342603
Sean Fertile [Thu, 20 Sep 2018 00:26:44 +0000 (00:26 +0000)]
[PPC64] Optimize redundant instructions in global access sequences.
The access sequence for global variables in the medium and large code models use
2 instructions to add an offset to the toc-pointer. If the offset fits whithin
16-bits then the instruction that sets the high 16 bits is redundant.
This patch adds the --toc-optimize option, (on by default) and enables rewriting
of 2 instruction global variable accesses into 1 when the offset from the
TOC-pointer to the variable (or .got entry) fits in 16 signed bits. eg
addis %r3, %r2, 0 --> nop
addi %r3, %r3, -0x8000 --> addi %r3, %r2, -0x8000
This rewriting can be disabled with the --no-toc-optimize flag
Differential Revision: https://reviews.llvm.org/D49237
llvm-svn: 342602
Eugene Zelenko [Thu, 20 Sep 2018 00:02:55 +0000 (00:02 +0000)]
[Clang-tidy] Alphabetical sort of files/checks. Add space after clang-tidy in source code headers.
llvm-svn: 342601
Aaron Puchert [Wed, 19 Sep 2018 23:57:38 +0000 (23:57 +0000)]
Thread safety analysis: Handle ObjCIvarRefExpr in SExprBuilder::translate
Summary:
This imitates the code for MemberExpr.
Fixes PR38896.
Reviewers: aaron.ballman, delesley, lukasza, rjmccall
Reviewed By: delesley
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D52200
llvm-svn: 342600
Volodymyr Sapsai [Wed, 19 Sep 2018 23:31:34 +0000 (23:31 +0000)]
Revert "Implement LWG 2221 - No formatted output operator for nullptr."
This reverts r342566 as it causes on bots linker errors like
> Undefined symbols for architecture i386:
> "std::__1::basic_ostream<char, std::__1::char_traits<char> >::operator<<(std::nullptr_t)", referenced from:
llvm-svn: 342599
Michael Berg [Wed, 19 Sep 2018 22:56:14 +0000 (22:56 +0000)]
[WEB] add new flags to a DebugInfo lit test
llvm-svn: 342598
Fedor Sergeev [Wed, 19 Sep 2018 22:42:57 +0000 (22:42 +0000)]
[New PM] Introducing PassInstrumentation framework
Pass Execution Instrumentation interface enables customizable instrumentation
of pass execution, as per "RFC: Pass Execution Instrumentation interface"
posted 06/07/2018 on llvm-dev@
The intent is to provide a common machinery to implement all
the pass-execution-debugging features like print-before/after,
opt-bisect, time-passes etc.
Here we get a basic implementation consisting of:
* PassInstrumentationCallbacks class that handles registration of callbacks
and access to them.
* PassInstrumentation class that handles instrumentation-point interfaces
that call into PassInstrumentationCallbacks.
* Callbacks accept StringRef which is just a name of the Pass right now.
There were some ideas to pass an opaque wrapper for the pointer to pass instance,
however it appears that pointer does not actually identify the instance
(adaptors and managers might have the same address with the pass they govern).
Hence it was decided to go simple for now and then later decide on what the proper
mental model of identifying a "pass in a phase of pipeline" is.
* Callbacks accept llvm::Any serving as a wrapper for const IRUnit*, to remove direct dependencies
on different IRUnits (e.g. Analyses).
* PassInstrumentationAnalysis analysis is explicitly requested from PassManager through
usual AnalysisManager::getResult. All pass managers were updated to run that
to get PassInstrumentation object for instrumentation calls.
* Using tuples/index_sequence getAnalysisResult helper to extract generic AnalysisManager's extra
args out of a generic PassManager's extra args. This is the only way I was able to explicitly
run getResult for PassInstrumentationAnalysis out of a generic code like PassManager::run or
RepeatedPass::run.
TODO: Upon lengthy discussions we agreed to accept this as an initial implementation
and then get rid of getAnalysisResult by improving RepeatedPass implementation.
* PassBuilder takes PassInstrumentationCallbacks object to pass it further into
PassInstrumentationAnalysis. Callbacks registration should be performed directly
through PassInstrumentationCallbacks.
* new-pm tests updated to account for PassInstrumentationAnalysis being run
* Added PassInstrumentation tests to PassBuilderCallbacks unit tests.
Other unit tests updated with registration of the now-required PassInstrumentationAnalysis.
Reviewers: chandlerc, philip.pfaffe
Differential Revision: https://reviews.llvm.org/D47858
llvm-svn: 342597
Evgeniy Stepanov [Wed, 19 Sep 2018 22:29:56 +0000 (22:29 +0000)]
Revert "[XRay][compiler-rt] FDRLogWriter Abstraction" and 1 more.
Revert the following 2 commits to fix standalone compiler-rt build:
* r342523 [XRay] Detect terminfo library
* r342518 [XRay][compiler-rt] FDRLogWriter Abstraction
llvm-svn: 342596
Sanjay Patel [Wed, 19 Sep 2018 22:00:56 +0000 (22:00 +0000)]
[x86] add test for 256-bit andn (PR37749); NFC
llvm-svn: 342595
Sanjay Patel [Wed, 19 Sep 2018 21:48:30 +0000 (21:48 +0000)]
[SelectionDAG] allow vector types with isBitwiseNot()
The test diff in not-and-simplify.ll is from a use in SimplifyDemandedBits,
and the test diff in add.ll is from a DAGCombiner transform.
llvm-svn: 342594
Juergen Ributzka [Wed, 19 Sep 2018 21:36:26 +0000 (21:36 +0000)]
Fix the build when LLVM_TARGETS_TO_BUILD is empty.
Using LLVMTestingSupport in the LLVM_LINK_COMPONENTS breaks the build when
LLVM_TARGETS_TO_BUILD is set to empty.
Libraries that depend on LLVMTestingSupport need to use
target_link_libraries(<target> PRIVATE LLVMTestingSupport) instead.
This required change was already commited by r341899 to fix another build
issue.
This fixes rdar://problem/
44615064.
llvm-svn: 342593
Sanjay Patel [Wed, 19 Sep 2018 21:28:39 +0000 (21:28 +0000)]
[x86] add test for add+not vector fold; NFC
The fold uses 'isBitwiseNot()', but that's not vector-friendly currently.
llvm-svn: 342592
Matthias Braun [Wed, 19 Sep 2018 20:50:51 +0000 (20:50 +0000)]
AArch64: Add FuseCryptoEOR fusion rules
There's some additional rules available on newer apple CPUs.
rdar://
41235346
llvm-svn: 342590
Matthias Braun [Wed, 19 Sep 2018 20:50:49 +0000 (20:50 +0000)]
MachineScheduler: Add -misched-print-dags flag
Add a flag to dump the schedule DAG to the debug stream. This will be
used in upcoming commits to test schedule DAG mutations such as macro
fusion.
llvm-svn: 342589
Chandler Carruth [Wed, 19 Sep 2018 20:45:09 +0000 (20:45 +0000)]
Workaround a limitation of llvm::Any when used with types that have
a converting constructor from llvm::Any like gmock matchers. This issue
has come up elsewhere as well and the workaround here is being
considered for use in the standard long-term, but we can pretty cheaply
experiment with it to see if anything ends up going wrong.
llvm-svn: 342588
Shuai Wang [Wed, 19 Sep 2018 20:27:25 +0000 (20:27 +0000)]
[NFC] Declare instead of define non-void functions in unit tests.
llvm-svn: 342586
Evandro Menezes [Wed, 19 Sep 2018 19:51:29 +0000 (19:51 +0000)]
[ARM] Adjust the feature set for Exynos
Fine tune the cost model for all Exynos processors.
llvm-svn: 342585
Kostya Kortchinsky [Wed, 19 Sep 2018 19:50:35 +0000 (19:50 +0000)]
[sanitizer][fuchsia] Fix VMAR leak
Summary:
Destroy and close a range's vmar if all its memory was unmapped.
This addresses some performance regression due to the proliferation of vmars
when Secondary backed allocations are concerned with Scudo on Fuchsia.
When a Secondary backed allocation was freed, the associated
`ReservedAddressRange` was going away after unmapping the entirety of the
mapping, but without getting rid of the associated vmar properly (which
was created specifically for that mapping). This resulted in an increase of
defunct vmars, that in turn slowed down further new vmar allocations.
This appears to solve ZX-2560/ZX-2642, at least on QEMU.
Reviewers: flowerhack, mcgrathr, phosek, mseaborn
Reviewed By: mcgrathr
Subscribers: kubamracek, delcypher, #sanitizers, llvm-commits
Differential Revision: https://reviews.llvm.org/D52242
llvm-svn: 342584
Evandro Menezes [Wed, 19 Sep 2018 19:43:23 +0000 (19:43 +0000)]
[ARM] Refactor Exynos feature set (NFC)
Since all Exynos processors share the same feature set, fold them in the
implied fatures list for the subtarget.
llvm-svn: 342583
Matt Morehouse [Wed, 19 Sep 2018 19:37:24 +0000 (19:37 +0000)]
[InstCombine] Disable strcmp->memcmp transform for MSan.
Summary:
The strcmp->memcmp transform can make the resulting memcmp read
uninitialized data, which MSan doesn't like.
Resolves https://github.com/google/sanitizers/issues/993.
Reviewers: eugenis, xbolva00
Reviewed By: eugenis
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D52272
llvm-svn: 342582
Saleem Abdulrasool [Wed, 19 Sep 2018 19:20:30 +0000 (19:20 +0000)]
test: actually fix the condition properly
I had locally changed the test to add an explicit triple to figure out the issue
with the SCEI buildbots, and that hid the error. This now works with and
without the explicit triple.
llvm-svn: 342581
Simon Pilgrim [Wed, 19 Sep 2018 18:59:08 +0000 (18:59 +0000)]
[X86] Handle COPYs of physregs better (regalloc hints)
Enable enableMultipleCopyHints() on X86.
Original Patch by @jonpa:
While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling.
Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates.
Differential Revision: https://reviews.llvm.org/D38128
llvm-svn: 342578
Michael Berg [Wed, 19 Sep 2018 18:52:08 +0000 (18:52 +0000)]
Copy utilities updated and added for MI flags
Summary: This patch adds a GlobalIsel copy utility into MI for flags and updates the instruction emitter for the SDAG path. Some tests show new behavior and I added one for GlobalIsel which mirrors an SDAG test for handling nsw/nuw.
Reviewers: spatel, wristow, arsenm
Reviewed By: arsenm
Subscribers: wdng
Differential Revision: https://reviews.llvm.org/D52006
llvm-svn: 342576
Sanjay Patel [Wed, 19 Sep 2018 18:52:00 +0000 (18:52 +0000)]
[x86] change names of vector splitting helper functions; NFC
As the code comments suggest, these are about splitting, and they
are not necessarily limited to lowering, so that misled me.
There's nothing that's actually x86-specific in these either, so
they might be better placed in a common header so any target can
use them.
llvm-svn: 342575
Vitaly Buka [Wed, 19 Sep 2018 18:51:42 +0000 (18:51 +0000)]
[ThinLTO] Write TYPE_IDs for types used in functions imported by aliases
Summary:
ThinLTO imports alias as a copy of a aliasee, so when we import such functions with type tests we will
need type ids used by function. However after D49565 we pick types only during processing of
FunctionSummary which is not happening for such aliesees.
Example:
Unit U1 with a type, a functions F with the type check, and an alias A to the function.
Unit U2 with only call to the alias A.
In particular, this happens when we use -mconstructor-aliases, which is default.
So if c++ unit only creates instance of the class, without calling any other methods it will lack of
necessary type ids, which will result in false CFI reports.
Reviewers: tejohnson, eugenis
Subscribers: pcc, mehdi_amini, inglorion, eraman, hiraditya, steven_wu, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D52201
llvm-svn: 342574
Vitaly Buka [Wed, 19 Sep 2018 18:51:25 +0000 (18:51 +0000)]
[ThinLTO] Extract getReferencedTypeIds from [NFC]
Summary: Refactoring before D52201
Reviewers: eugenis, tejohnson
Subscribers: pcc, inglorion, hiraditya, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D52203
llvm-svn: 342573
Simon Atanasyan [Wed, 19 Sep 2018 18:46:29 +0000 (18:46 +0000)]
[mips][microMIPS] Extending size reduction pass with MOVEP
The patch extends size reduction pass for MicroMIPS. Two MOVE
instructions are transformed into one MOVEP instrucition.
Patch by Milena Vujosevic Janicic.
Differential revision: https://reviews.llvm.org/D52037
llvm-svn: 342572
Simon Atanasyan [Wed, 19 Sep 2018 18:46:21 +0000 (18:46 +0000)]
[mips][microMIPS] Fix the definition of MOVEP instruction
The patch fixes definition of MOVEP instruction. Two registers are used
instead of register pairs. This is necessary as machine verifier cannot
handle register pairs.
Patch by Milena Vujosevic Janicic.
Differential revision: https://reviews.llvm.org/D52035
llvm-svn: 342571
Saleem Abdulrasool [Wed, 19 Sep 2018 18:41:07 +0000 (18:41 +0000)]
test: improve condition for the check
When the type of `wint_t` is `int`, the promotion will allow this to pass.
Check this explicitly rather than using the size.
llvm-svn: 342569
Sylvestre Ledru [Wed, 19 Sep 2018 18:39:15 +0000 (18:39 +0000)]
redirecting to llvm.org/devmtg
llvm-svn: 342568
Chris Bieneman [Wed, 19 Sep 2018 18:29:58 +0000 (18:29 +0000)]
[LLJIT] Add API to expose linking layer from LLJIT classes
Summary: This patch just surfaces the object linking layer from the LLJIT classes so that clients can take advantage of the changes implemented in r341154.
Reviewers: lhames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51551
llvm-svn: 342567
Marshall Clow [Wed, 19 Sep 2018 18:29:57 +0000 (18:29 +0000)]
Implement LWG 2221 - No formatted output operator for nullptr. Reviewed as https://reviews.llvm.org/D44263
llvm-svn: 342566
Saleem Abdulrasool [Wed, 19 Sep 2018 18:13:34 +0000 (18:13 +0000)]
Sema: handle `wint_t` more carefully for printf checking
In the case that `win_t` is an `unsigned short` (e.g. on Windows), we would
previously incorrectly diagnose the conversion because we would immediately
promote the argument type from `wint_t` (aka `unsigned short`) to `int` before
checking if the type matched. This should repair the Windows hosted bots.
llvm-svn: 342565
Simon Pilgrim [Wed, 19 Sep 2018 18:11:34 +0000 (18:11 +0000)]
[X86] Add initial SimplifyDemandedVectorEltsForTargetNode support
This patch adds an initial x86 SimplifyDemandedVectorEltsForTargetNode implementation to handle target shuffles.
Currently the patch only decodes a target shuffle, calls SimplifyDemandedVectorElts on its input operands and removes any shuffle that reduces to undef/zero/identity.
Future work will need to integrate this with combineX86ShufflesRecursively, add support for other x86 ops, etc.
NOTE: There is a minor regression that appears to be affecting further (extractelement?) combines which I haven't been able to solve yet - possibly something to do with how nodes are added to the worklist after simplification.
Differential Revision: https://reviews.llvm.org/D52140
llvm-svn: 342564
Shafik Yaghmour [Wed, 19 Sep 2018 18:07:05 +0000 (18:07 +0000)]
[DataFormatters] Add formatter for C++17 std::variant
rdar://problem/
43691454
Patch by Shafik Yaghmour.
Differential Revision: https://reviews.llvm.org/D51520
llvm-svn: 342563
Shuai Wang [Wed, 19 Sep 2018 18:00:55 +0000 (18:00 +0000)]
[analyzer] Fix nullptr access when processing instantiated function in ExprMutationAnalyzer.
llvm-svn: 342562
Andrea Di Biagio [Wed, 19 Sep 2018 17:54:01 +0000 (17:54 +0000)]
Attempt to unbreak buidlbot lld-x86_64-darwin13 after r342555.
The reason why build #25777 might have failed is because the SmallVector move
constructor is _not_ noexcept, and the stl implementation used by that buildbot
calls _VSTD::move_if_noexcept() (according to the backtrace).
OpcodeInfo has a default move constructor, and the copy constructor is deleted.
However, as far as I can see, SmallVector doesn't declare a noexcept move
constructor. So, what I believe it is happening here is that,
_VSTD::move_if_noexcept() returns an lvalue reference and not an rvalue
reference.
This eventually triggers a copy that fails to compile.
Hopefully, using a std::vector instead of SmallVector (as it was originally
suggested by Simon in the code review) should be enough to unbreak the buildbot.
llvm-svn: 342561
Eric Fiselier [Wed, 19 Sep 2018 17:53:21 +0000 (17:53 +0000)]
Don't require relops on variant alternatives to all return the same
type.
Libc++ correctly asserts that a set of visitors for a variant all
return the same type. However, we use the visitation machinary to
perform relational operations. This causes a static assertion when
some of the alternatives relops return a UDT which is implicitly
convertible to bool instead of 'bool' exactly.
llvm-svn: 342560
Carl Ritson [Wed, 19 Sep 2018 16:32:12 +0000 (16:32 +0000)]
[AMDGPU] Add instruction selection for i1 to f16 conversion
Summary:
This is required for GPUs with 16 bit instructions where f16 is a
legal register type and hence int_to_fp i1 to f16 is not lowered
by legalizing.
Reviewers: arsenm, nhaehnle
Reviewed By: nhaehnle
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D52018
Change-Id: Ie4c0fd6ced7cf10ad612023c6879724d9ded5851
llvm-svn: 342558
Saleem Abdulrasool [Wed, 19 Sep 2018 16:18:55 +0000 (16:18 +0000)]
Basic: correct `__WINT_TYPE__` on Windows
Windows uses `unsigned short` for `wint_t`. Correct the type definition as
vended by the compiler. This type is defined in corecrt.h and is
unconditionally typedef'ed. cl does not have an equivalent to `__WINT_TYPE__`
which is why this was never detected.
llvm-svn: 342557
Yonghong Song [Wed, 19 Sep 2018 16:04:13 +0000 (16:04 +0000)]
[bpf] Symbol sizes and types in object file
Clang-compiled object files currently don't include the symbol sizes and
types. Some tools however need that information. For example, ctfconvert
uses that information to generate FreeBSD's CTF representation from ELF
files.
With this patch, symbol sizes and types are included in object files.
Signed-off-by: Paul Chaignon <paul.chaignon@orange.com>
Reported-by: Yutaro Hayakawa <yhayakawa3720@gmail.com>
llvm-svn: 342556
Andrea Di Biagio [Wed, 19 Sep 2018 15:57:45 +0000 (15:57 +0000)]
[TableGen][SubtargetEmitter] Add the ability for processor models to describe dependency breaking instructions.
This patch adds the ability for processor models to describe dependency breaking
instructions.
Different processors may specify a different set of dependency-breaking
instructions.
That means, we cannot assume that all processors of the same target would use
the same rules to classify dependency breaking instructions.
The main goal of this patch is to provide the means to describe dependency
breaking instructions directly via tablegen, and have the following
TargetSubtargetInfo hooks redefined in overrides by tabegen'd
XXXGenSubtargetInfo classes (here, XXX is a Target name).
```
virtual bool isZeroIdiom(const MachineInstr *MI, APInt &Mask) const {
return false;
}
virtual bool isDependencyBreaking(const MachineInstr *MI, APInt &Mask) const {
return isZeroIdiom(MI);
}
```
An instruction MI is a dependency-breaking instruction if a call to method
isDependencyBreaking(MI) on the STI (TargetSubtargetInfo object) evaluates to
true. Similarly, an instruction MI is a special case of zero-idiom dependency
breaking instruction if a call to STI.isZeroIdiom(MI) returns true.
The extra APInt is used for those targets that may want to select which machine
operands have their dependency broken (see comments in code).
Note that by default, subtargets don't know about the existence of
dependency-breaking. In the absence of external information, those method calls
would always return false.
A new tablegen class named STIPredicate has been added by this patch to let
processor models classify instructions that have properties in common. The idea
is that, a MCInstrPredicate definition can be used to "generate" an instruction
equivalence class, with the idea that instructions of a same class all have a
property in common.
STIPredicate definitions are essentially a collection of instruction equivalence
classes.
Also, different processor models can specify a different variant of the same
STIPredicate with different rules (i.e. predicates) to classify instructions.
Tablegen backends (in this particular case, the SubtargetEmitter) will be able
to process STIPredicate definitions, and automatically generate functions in
XXXGenSubtargetInfo.
This patch introduces two special kind of STIPredicate classes named
IsZeroIdiomFunction and IsDepBreakingFunction in tablegen. It also adds a
definition for those in the BtVer2 scheduling model only.
This patch supersedes the one committed at r338372 (phabricator review: D49310).
The main advantages are:
- We can describe subtarget predicates via tablegen using STIPredicates.
- We can describe zero-idioms / dep-breaking instructions directly via
tablegen in the scheduling models.
In future, the STIPredicates framework can be used for solving other problems.
Examples of future developments are:
- Teach how to identify optimizable register-register moves
- Teach how to identify slow LEA instructions (each subtarget defining its own
concept of "slow" LEA).
- Teach how to identify instructions that have undocumented false dependencies
on the output registers on some processors only.
It is also (in my opinion) an elegant way to expose knowledge to both external
tools like llvm-mca, and codegen passes.
For example, machine schedulers in LLVM could reuse that information when
internally constructing the data dependency graph for a code region.
This new design feature is also an "opt-in" feature. Processor models don't have
to use the new STIPredicates. It has all been designed to be as unintrusive as
possible.
Differential Revision: https://reviews.llvm.org/D52174
llvm-svn: 342555
Sanjay Patel [Wed, 19 Sep 2018 15:57:40 +0000 (15:57 +0000)]
[DAGCombiner][x86] add transform/hook to decompose integer multiply into shift/add
This is an alternative to D37896. I don't see a way to decompose multiplies
generically without a target hook to tell us when it's profitable.
ARM and AArch64 may be able to remove some duplicate code that overlaps with
this transform.
As a first step, we're only getting the most clear wins on the vector examples
requested in PR34474:
https://bugs.llvm.org/show_bug.cgi?id=34474
As noted in the code comment, it's likely that the x86 constraints are tighter
than necessary, but it may not always be a win to replace a pmullw/pmulld.
Differential Revision: https://reviews.llvm.org/D52195
llvm-svn: 342554
Dan Liew [Wed, 19 Sep 2018 15:27:00 +0000 (15:27 +0000)]
[UBSan] Fix typo in CMake conditional that checked if the architecture
of a darwin platform was in the list of `UBSAN_SUPPORTED_ARCH`.
This is a follow up to r341306.
The typo meant that if an architecture was a prefix to another
architecture in the list (e.g. `armv7` is a prefix of `armv7k`) then
this would trigger a match which is not the intended behaviour.
rdar://problem/
41126835
llvm-svn: 342553
Fedor Sergeev [Wed, 19 Sep 2018 14:54:48 +0000 (14:54 +0000)]
Revert rL342544: [New PM] Introducing PassInstrumentation framework
A bunch of bots fail to compile unittests. Reverting.
llvm-svn: 342552
Simon Pilgrim [Wed, 19 Sep 2018 14:52:34 +0000 (14:52 +0000)]
Fix -Wsign-compare warnings. NFCI
llvm-svn: 342551
Alex Bradbury [Wed, 19 Sep 2018 14:51:42 +0000 (14:51 +0000)]
[AtomicExpandPass]: Add a hook for custom cmpxchg expansion in IR
This involves changing the shouldExpandAtomicCmpXchgInIR interface, but I have
updated the in-tree backends using this hook (ARM, AArch64, Hexagon) so they
will see no functional change. Previously this hook returned bool, but it now
returns AtomicExpansionKind.
This hook allows targets to select how a given cmpxchg is to be expanded.
D48131 uses this to expand part-word cmpxchg to a target-specific intrinsic.
See my associated RFC for more info on the motivation for this change
<http://lists.llvm.org/pipermail/llvm-dev/2018-June/123993.html>.
Differential Revision: https://reviews.llvm.org/D48130
llvm-svn: 342550
Martin Storsjo [Wed, 19 Sep 2018 14:30:45 +0000 (14:30 +0000)]
[benchmark] Cherrypick fix for MinGW/ARM from upstream
This fixes building for Windows on ARM, with MinGW headers.
(Building for Windows on ARM with Windows SDK still is unsupported
by the benchmark library.)
Differential Revision: https://reviews.llvm.org/D52262
llvm-svn: 342549
Roman Lebedev [Wed, 19 Sep 2018 13:35:46 +0000 (13:35 +0000)]
[InstCombine] foldICmpWithLowBitMaskedVal(): handle uncanonical ((-1 << y) >> y) mask
Summary:
The last low-bit-mask-pattern-producing-pattern i can think of.
https://rise4fun.com/Alive/UGzE <- non-canonical
But we can not canonicalize it because of extra uses.
https://bugs.llvm.org/show_bug.cgi?id=38123
Reviewers: spatel, craig.topper, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52148
llvm-svn: 342548
Roman Lebedev [Wed, 19 Sep 2018 13:35:40 +0000 (13:35 +0000)]
[InstCombine] foldICmpWithLowBitMaskedVal(): handle uncanonical ((1 << y)+(-1)) mask
Summary:
Same as to D52146.
`((1 << y)+(-1))` is simply non-canoniacal version of `~(-1 << y)`: https://rise4fun.com/Alive/0vl
We can not canonicalize it due to the extra uses. But we can handle it here.
Reviewers: spatel, craig.topper, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52147
llvm-svn: 342547
Roman Lebedev [Wed, 19 Sep 2018 13:35:27 +0000 (13:35 +0000)]
[InstCombine] foldICmpWithLowBitMaskedVal(): handle ~(-1 << y) mask
Summary:
Two folds are happening here:
1. https://rise4fun.com/Alive/oaFX
2. And then `foldICmpWithHighBitMask()` (D52001): https://rise4fun.com/Alive/wsP4
This change doesn't just add the handling for eq/ne predicates,
it actually builds upon the previous `foldICmpWithLowBitMaskedVal()` work,
so **all** the 16 fold variants* are immediately supported.
I'm indeed only testing these two predicates.
I do not feel like re-proving all 16 folds*, because they were already proven
for the general case of constant with all-ones in low bits. So as long as
the mask produces all-ones in low bits, i'm pretty sure the fold is valid.
But required, i can re-prove, let me know.
* eq/ne are commutative - 4 folds; ult/ule/ugt/uge - are not commutative (the commuted variant is InstSimplified), 4 folds; slt/sle/sgt/sge are not commutative - 4 folds. 12 folds in total.
https://bugs.llvm.org/show_bug.cgi?id=38123
https://bugs.llvm.org/show_bug.cgi?id=38708
Reviewers: spatel, craig.topper, RKSimon
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52146
llvm-svn: 342546
Oliver Stannard [Wed, 19 Sep 2018 13:25:31 +0000 (13:25 +0000)]
[ARM] Fix unwind information for floating point registers
Fixes the unwind information generated for floating-point registers.
Previously, all padding registers were assumed to be four bytes wide. Now, the
width of the register is used to specify the amount of padding.
Patch by Jackson Woodruff!
Differential revision: https://reviews.llvm.org/D51494
llvm-svn: 342545
Fedor Sergeev [Wed, 19 Sep 2018 12:25:52 +0000 (12:25 +0000)]
[New PM] Introducing PassInstrumentation framework
Summary:
Pass Execution Instrumentation interface enables customizable instrumentation
of pass execution, as per "RFC: Pass Execution Instrumentation interface"
posted 06/07/2018 on llvm-dev@
The intent is to provide a common machinery to implement all
the pass-execution-debugging features like print-before/after,
opt-bisect, time-passes etc.
Here we get a basic implementation consisting of:
* PassInstrumentationCallbacks class that handles registration of callbacks
and access to them.
* PassInstrumentation class that handles instrumentation-point interfaces
that call into PassInstrumentationCallbacks.
* Callbacks accept StringRef which is just a name of the Pass right now.
There were some ideas to pass an opaque wrapper for the pointer to pass instance,
however it appears that pointer does not actually identify the instance
(adaptors and managers might have the same address with the pass they govern).
Hence it was decided to go simple for now and then later decide on what the proper
mental model of identifying a "pass in a phase of pipeline" is.
* Callbacks accept llvm::Any serving as a wrapper for const IRUnit*, to remove direct dependencies
on different IRUnits (e.g. Analyses).
* PassInstrumentationAnalysis analysis is explicitly requested from PassManager through
usual AnalysisManager::getResult. All pass managers were updated to run that
to get PassInstrumentation object for instrumentation calls.
* Using tuples/index_sequence getAnalysisResult helper to extract generic AnalysisManager's extra
args out of a generic PassManager's extra args. This is the only way I was able to explicitly
run getResult for PassInstrumentationAnalysis out of a generic code like PassManager::run or
RepeatedPass::run.
TODO: Upon lengthy discussions we agreed to accept this as an initial implementation
and then get rid of getAnalysisResult by improving RepeatedPass implementation.
* PassBuilder takes PassInstrumentationCallbacks object to pass it further into
PassInstrumentationAnalysis. Callbacks registration should be performed directly
through PassInstrumentationCallbacks.
* new-pm tests updated to account for PassInstrumentationAnalysis being run
* Added PassInstrumentation tests to PassBuilderCallbacks unit tests.
Other unit tests updated with registration of the now-required PassInstrumentationAnalysis.
Reviewers: chandlerc, philip.pfaffe
Differential Revision: https://reviews.llvm.org/D47858
llvm-svn: 342544
Simon Pilgrim [Wed, 19 Sep 2018 12:23:50 +0000 (12:23 +0000)]
[TableGen] CodeGenDAGPatterns::GenerateVariants - use BitVector::set() where possible. NFCI.
In these cases we are always setting to true.
llvm-svn: 342543
Benjamin Kramer [Wed, 19 Sep 2018 12:01:38 +0000 (12:01 +0000)]
[InstCombine] Don't transform sin/cos -> tanl if for half types
This is still unsafe for long double, we will transform things into tanl
even if tanl is for another type. But that's for someone else to fix.
llvm-svn: 342542
Arnaud A. de Grandmaison [Wed, 19 Sep 2018 11:56:20 +0000 (11:56 +0000)]
[compiler-rt][TSan] Add TSan runtime support for Go on linux-aarch64.
Summary:
This patch adds TSan runtime support for Go on linux-aarch64
platforms. This enables people working on golang to implement their
platform/language part of the TSan support.
Basic testing is done with lib/tsan/go/buildgo.sh. Additional testing will be
done as part of the work done in the Go project.
It is intended to support other VMA sizes, except 39 which does not
have enough bits to support the Go heap requirements.
Patch by Fangming Fang <Fangming.Fang@arm.com>.
Reviewers: kubamracek, dvyukov, javed.absar
Subscribers: mcrosier, dberris, mgorny, kristof.beyls, delcypher, #sanitizers, llvm-commits
Differential Revision: https://reviews.llvm.org/D52167
llvm-svn: 342541
Andi-Bogdan Postelnicu [Wed, 19 Sep 2018 11:52:20 +0000 (11:52 +0000)]
[clang-tidy] run-clang-tidy.py - fails using python 3.7
Differential Revision: https://reviews.llvm.org/D51220
llvm-svn: 342540
Calixte Denizet [Wed, 19 Sep 2018 11:26:20 +0000 (11:26 +0000)]
Verify commit access in fixing typo
llvm-svn: 342538
Simon Pilgrim [Wed, 19 Sep 2018 11:18:49 +0000 (11:18 +0000)]
[TableGen] CodeGenDAGPatterns::GenerateVariants - use BitVector::push_back()
As mentioned on D52236, this saves 10secs in debug builds of x86 -gen-dag-isel
llvm-svn: 342536
Simon Pilgrim [Wed, 19 Sep 2018 11:08:54 +0000 (11:08 +0000)]
[ADT][BitVector] Add push_back()
Add a higher performance alternative to calling resize() every time which performs a lot of clearing to zero - when we're adding a single bit most of the time this will be completely unnecessary.
Differential Revision: https://reviews.llvm.org/D52236
llvm-svn: 342535
Alex Bradbury [Wed, 19 Sep 2018 10:54:22 +0000 (10:54 +0000)]
[RISCV] Codegen for i8, i16, and i32 atomicrmw with RV32A
Introduce a new RISCVExpandPseudoInsts pass to expand atomic
pseudo-instructions after register allocation. This is necessary in order to
ensure that register spills aren't introduced between LL and SC, thus breaking
the forward progress guarantee for the operation. AArch64 does something
similar for CmpXchg (though only at O0), and Mips is moving towards this
approach (see D31287). See also [this mailing list
post](http://lists.llvm.org/pipermail/llvm-dev/2016-May/099490.html) from
James Knight, which summarises the issues with lowering to ll/sc in IR or
pre-RA.
See the [accompanying RFC
thread](http://lists.llvm.org/pipermail/llvm-dev/2018-June/123993.html) for an
overview of the lowering strategy.
Differential Revision: https://reviews.llvm.org/D47882
llvm-svn: 342534
Kadir Cetinkaya [Wed, 19 Sep 2018 10:16:44 +0000 (10:16 +0000)]
[clangd] Add option to enable/disable function argument snippets.
Summary:
Currently LSP clients cannot directly change EnableFunctionArgSnippets parameter.
This patch is to provide them with a way to enable/disable that functionality.
Reviewers: hokein, ioeric, ilya-biryukov
Reviewed By: ilya-biryukov
Subscribers: sammccall, MaskRay, jkorous, arphaman, cfe-commits
Differential Revision: https://reviews.llvm.org/D51214
llvm-svn: 342533
Hans Wennborg [Wed, 19 Sep 2018 09:58:30 +0000 (09:58 +0000)]
[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables
The 0x800 bit in @feat.00 needs to be set in order to make LLD pick up
the .gfid$y table. I believe this is fine to set even if we don't emit
the instrumentation.
We haven't emitted @feat.00 on 64-bit before. I see that MSVC does emit
it, but I'm not entirely sure what the default value should be. I went
with zero since that seems as safe as not emitting the symbol in the
first place.
Differential Revision: https://reviews.llvm.org/D52235
llvm-svn: 342532
Simon Pilgrim [Wed, 19 Sep 2018 09:50:32 +0000 (09:50 +0000)]
[X86][SSE] Update extractelement test in preparation for D52140
SimplifyDemandedVectorEltsForTargetNode will remove most of this test unless get rid of the undefs - still testing for align 1 which was the point of the test
Removed out of date comment as well
llvm-svn: 342531
Eric Liu [Wed, 19 Sep 2018 09:35:04 +0000 (09:35 +0000)]
[clangd] Store preamble macros in dynamic index.
Summary:
Pros:
o Loading macros from preamble for every completion is slow (see profile).
o Calculating macro USR is also slow (see profile).
o Sema can provide a lot of macro completion results (e.g. when filter is empty,
60k for some large TUs!).
Cons:
o Slight memory increase in dynamic index (~1%).
o Some extra work during preamble build (should be fine as preamble build and
indexAST is way slower).
Before:
{
F7195645}
After:
{
F7195646}
Reviewers: ilya-biryukov, sammccall
Reviewed By: sammccall
Subscribers: MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D52078
llvm-svn: 342529
Eric Liu [Wed, 19 Sep 2018 09:34:55 +0000 (09:34 +0000)]
[Sema] Do not load macros from preamble when LoadExternal is false.
Reviewers: ilya-biryukov
Reviewed By: ilya-biryukov
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D52079
llvm-svn: 342528
Carlos Alberto Enciso [Wed, 19 Sep 2018 08:16:56 +0000 (08:16 +0000)]
[DebugInfo][Dexter] Speculated BB presents illegal variable value to debugger.
When SimplifyCFG changes the PHI node into a select instruction, the debug information becomes ambiguous. It causes the debugger to display wrong variable value.
Differential Revision: https://reviews.llvm.org/D51976
llvm-svn: 342527
Jonas Devlieghere [Wed, 19 Sep 2018 08:08:13 +0000 (08:08 +0000)]
[DWARF Verifier] Add helper function to dump DIEs. [NFC]
It's pretty common for the verifier to dump the relevant DIE when it
finds an issue. This tends to be relatively verbose and error prone
because we have to pass the DIDumpOptions to the DIE's dump method. This
patch adds a helper function to the verifier to make this easier.
llvm-svn: 342526
Shuai Wang [Wed, 19 Sep 2018 03:50:03 +0000 (03:50 +0000)]
[NFC] Fix uncompilable test cases of ExprMutationAnalyzer.
And ensure future test cases doesn't have compile errors.
llvm-svn: 342525
Marshall Clow [Wed, 19 Sep 2018 02:27:44 +0000 (02:27 +0000)]
Remove unused include of "verbose_assert.h"
llvm-svn: 342524
Dean Michael Berris [Wed, 19 Sep 2018 01:35:52 +0000 (01:35 +0000)]
[XRay] Detect terminfo library
Instead of assuming `-ltinfo` works, check whether there's terminfo
support on the host where LLVMSupport is compiled.
Follow-up to D52220.
llvm-svn: 342523
Thomas Lively [Wed, 19 Sep 2018 00:54:20 +0000 (00:54 +0000)]
[WebAssembly][NFC] Remove extra space in WebAssemblyInstrSIMD.td
llvm-svn: 342522
Matthias Braun [Wed, 19 Sep 2018 00:23:37 +0000 (00:23 +0000)]
AArch64MacroFusion: Factor out some opcode handling code; NFC
llvm-svn: 342521
Matthias Braun [Wed, 19 Sep 2018 00:23:35 +0000 (00:23 +0000)]
ScheduleDAG: Cleanup dumping code; NFC
- Instead of having both `SUnit::dump(ScheduleDAG*)` and
`ScheduleDAG::dumpNode(ScheduleDAG*)`, just keep the latter around.
- Add `ScheduleDAG::dump()` and avoid code duplication in several
places. Implement it for different ScheduleDAG variants.
- Add `ScheduleDAG::dumpNodeName()` in favor of the `SUnit::print()`
functions. They were only ever used for debug dumping and putting the
function into ScheduleDAG is consistent with the `dumpNode()` change.
llvm-svn: 342520
Aaron Puchert [Wed, 19 Sep 2018 00:19:38 +0000 (00:19 +0000)]
Thread safety analysis: Fix crash for function pointers
For function pointers, the FunctionDecl of the callee is unknown, so
getDirectCallee will return nullptr. We have to catch that case to avoid
crashing. We assume there is no attribute then.
llvm-svn: 342519
Dean Michael Berris [Tue, 18 Sep 2018 23:59:32 +0000 (23:59 +0000)]
[XRay][compiler-rt] FDRLogWriter Abstraction
Summary:
This change introduces an `FDRLogWriter` type which is responsible for
serialising metadata and function records to character buffers. This is
the first step in a refactoring of the implementation of the FDR runtime
to allow for more granular testing of the individual components of the
implementation.
The main contribution of this change is a means of hiding the details of
how specific records are written to a buffer, and for managing the
extents of these buffers. We make use of C++ features (templates and
some metaprogramming) to reduce repetition in the act of writing out
specific kinds of records to the buffer.
In this process, we make a number of changes across both LLVM and
compiler-rt to allow us to use the `Trace` abstraction defined in the
LLVM project in the testing of the runtime implementation. This gives us
a closer end-to-end test which version-locks the runtime implementation
with the loading implementation in LLVM.
We also allow using gmock in compiler-rt unit tests, by adding the
requisite definitions in the `AddCompilerRT.cmake` module.
Finally, we've gone ahead and updated the FDR logging implementation to
use the FDRLogWriter for the lowest-level record-writing details.
Following patches will isolate the state machine transitions which
manage the set-up and tear-down of the buffers we're using in multiple
threads.
Reviewers: mboerger, eizan
Subscribers: mgorny, jfb, llvm-commits
Differential Revision: https://reviews.llvm.org/D52220
llvm-svn: 342518
Volodymyr Sapsai [Tue, 18 Sep 2018 23:27:02 +0000 (23:27 +0000)]
Add a callback for `__has_include` and use it for dependency scanning.
This adds a preprocessor callback for the `__has_include` and
`__has_include_next` directives.
Successful checking for the presence of a header should add it to the list of
header dependencies so this overrides the callback in the dependency scanner.
Patch by Pete Cooper with some additions by me.
rdar://problem/
39545636
Differential Revision: https://reviews.llvm.org/D30882
llvm-svn: 342517
Reid Kleckner [Tue, 18 Sep 2018 23:16:30 +0000 (23:16 +0000)]
[MS] Defer dllexport inline friend functions like other inline methods
This special case was added in r264841, but the code breaks our
invariants by calling EmitTopLevelDecl without first creating a
HandlingTopLevelDeclRAII scope.
This fixes the PCH crash in https://crbug.com/884427. I was never able
to make a satisfactory reduction, unfortunately. I'm not very worried
about this regressing since this change makes the code simpler while
passing the existing test that shows we do emit dllexported friend
function definitions. Now we just defer their emission until the tag is
fully complete, which is generally good.
llvm-svn: 342516
Saleem Abdulrasool [Tue, 18 Sep 2018 22:14:50 +0000 (22:14 +0000)]
Driver: extract a local variable for the Toolchain (NFC)
Create and store a reference to the current toolchain rather than calling
`getToolChain` throughout the function. NFC.
llvm-svn: 342515
Artem Belevich [Tue, 18 Sep 2018 21:51:02 +0000 (21:51 +0000)]
[clang-tidy] Replace redundant checks with an assert().
findStyleKind is only called if D is an explicit identifier with a name,
so the checks for operators will never return true. The explicit assert()
enforces this invariant.
Differential Revision: https://reviews.llvm.org/D52179
llvm-svn: 342514
Thomas Lively [Tue, 18 Sep 2018 21:45:12 +0000 (21:45 +0000)]
[WebAssembly] v4f32.abs and v2f64.abs
Summary: implement lowering of @llvm.fabs for vector types.
Reviewers: aheejin, dschuff
Subscribers:
llvm-svn: 342513
Saleem Abdulrasool [Tue, 18 Sep 2018 21:12:39 +0000 (21:12 +0000)]
Driver: hoist `-mlimit-float-precision` (NFC)
Move the floating point argument handling into the RenderFloatingPointOptions
helper. This relocation just puts the floating point related options into a
single location.
llvm-svn: 342512
Saleem Abdulrasool [Tue, 18 Sep 2018 20:33:01 +0000 (20:33 +0000)]
build: clean up some unnecessary cached variables
The CMAKE_<LANG>_ARCHIVE_FINISH rule doesn't need to be cleared for Darwin
static libraries. Avoid resetting the variables in the SIP case. If
CMAKE_RANLIB is cached, then CMake's Ninja generator will invoke ranlib during
installation, not due to the CMAKE_<LANG>_ARCHIVE_FINISH rule.
llvm-svn: 342511
David Blaikie [Tue, 18 Sep 2018 20:11:45 +0000 (20:11 +0000)]
Fix fomit-frame-pointe+pg error
llvm-svn: 342510