Craig Topper [Sun, 21 Oct 2018 21:08:37 +0000 (21:08 +0000)]
Revert r344873 "foo"
Rebase gone wrong left this in my tree.
llvm-svn: 344875
Craig Topper [Sun, 21 Oct 2018 21:07:27 +0000 (21:07 +0000)]
[X86] Remove SDIVREM8_SEXT_HREG/UDIVREM8_ZEXT_HREG and their associated DAG combine and target bits support. Use a post isel peephole instead.
Summary:
These nodes exist to overcome an isel problem where we can generate a zero extend of an AH register followed by an extract subreg, and another zero extend. The first zero extend exists to avoid a partial register update copying the AH register into the low 8-bits. The second zero extend exists if the user wanted the remainder zero extended.
To make this work we had a DAG combine to morph the DIVREM opcode to a special opcode that included the extend. But then we had to add the new node to computeKnownBits and computeNumSignBits to process the extension portion.
This patch instead removes all of that and adds a late peephole to detect the two extends.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53449
llvm-svn: 344874
Craig Topper [Sun, 21 Oct 2018 21:07:25 +0000 (21:07 +0000)]
foo
llvm-svn: 344873
Sanjay Patel [Sun, 21 Oct 2018 20:13:29 +0000 (20:13 +0000)]
[DAGCombiner] reduce insert+bitcast+extract vector ops to truncate (PR39016)
This is a late backend subset of the IR transform added with:
D52439
We can confirm that the conversion to a 'trunc' is correct by running:
$ opt -instcombine -data-layout="e"
(assuming the IR transforms are correct; change "e" to "E" for big-endian)
As discussed in PR39016:
https://bugs.llvm.org/show_bug.cgi?id=39016
...the pattern may emerge during legalization, so that's we are waiting for an
insertelement to become a scalar_to_vector in the pattern matching here.
The DAG allows for fun variations that are not possible in IR. Result types for
extracts and scalar_to_vector don't necessarily match input types, so that means
we have to be a bit more careful in the transform (see code comments).
The tests show that we don't handle cases that require a shift (as we did in the
IR version). I've left that as a potential follow-up because I'm not sure if
that's a real concern at this late stage.
Differential Revision: https://reviews.llvm.org/D53201
llvm-svn: 344872
Miklos Vajna [Sun, 21 Oct 2018 19:16:25 +0000 (19:16 +0000)]
[clang-tidy] add IgnoreMacros option to readability-redundant-smartptr-get
And also enable it by default to be consistent with e.g. modernize-use-using.
This helps e.g. when running this check on client code where the macro is
provided by the system, so there is no easy way to modify it.
Reviewed By: JonasToth
Differential Revision: https://reviews.llvm.org/D53454
llvm-svn: 344871
Kristof Umann [Sun, 21 Oct 2018 18:19:32 +0000 (18:19 +0000)]
[analyzer][NFC] Fix inconsistencies in AnalyzerOptions
I'm in the process of refactoring AnalyzerOptions. The main motivation behind
here is to emit warnings if an invalid -analyzer-config option is given from the
command line, and be able to list them all.
This first NFC patch contains small modifications to make AnalyzerOptions.cpp a
little more consistent.
Differential Revision: https://reviews.llvm.org/D53274
llvm-svn: 344870
Aditya Kumar [Sun, 21 Oct 2018 18:11:56 +0000 (18:11 +0000)]
Schedule Hot Cold Splitting pass after most optimization passes
Summary:
In the new+old pass manager, hot cold splitting was schedule too early.
Thanks to Vedant for pointing this out.
Reviewers: sebpop, vsk
Reviewed By: sebpop, vsk
Subscribers: mehdi_amini, llvm-commits
Differential Revision: https://reviews.llvm.org/D53437
llvm-svn: 344869
Simon Pilgrim [Sun, 21 Oct 2018 17:07:50 +0000 (17:07 +0000)]
[X86][AVX] Enable lowerVectorShuffleAsLanePermuteAndPermute v16i16/v32i8 unary shuffle lowering
llvm-svn: 344868
Simon Pilgrim [Sun, 21 Oct 2018 11:55:56 +0000 (11:55 +0000)]
[X86] Only extract constant pool shuffle mask data with zero offsets
D53306 exposes an issue where we sometimes use constant pool data from bigger vectors than the target shuffle mask. This should be safe to do, but we have to be certain that we're using the bottom most part of the vector as the shuffle mask decoders have no way to peek into subvectors with non-zero offsets.
llvm-svn: 344867
Heejin Ahn [Sun, 21 Oct 2018 11:16:50 +0000 (11:16 +0000)]
[WebAssembly] Change tabs to spaces in basic-assembly.s
llvm-svn: 344866
Aleksei Sidorin [Sat, 20 Oct 2018 22:49:23 +0000 (22:49 +0000)]
[AST, analyzer] Transform rvalue cast outputs to lvalues (fheinous-gnu-extensions)
Despite the fact that cast expressions return rvalues, GCC still
handles such outputs as lvalues when compiling inline assembler.
In this commit, we are treating it by removing LValueToRValue
casts inside GCCAsmStmt outputs.
Differential Revision: https://reviews.llvm.org/D45416
llvm-svn: 344864
Lang Hames [Sat, 20 Oct 2018 20:39:53 +0000 (20:39 +0000)]
[ORC] Add some more basic sanity tests for the LLJIT.
minimal.ll contains a main function that returns zero, and
single-function-call.ll contains a main function that calls a foo function that
returns zero. These minimal tests can help to rule out some trivial JIT bugs
when other tests fail.
This commit also renames hello.ll to global-ctors-and-dtors.ll, which better
reflects what it is actually testing.
llvm-svn: 344863
Craig Topper [Sat, 20 Oct 2018 19:28:52 +0000 (19:28 +0000)]
[X86] Add more intrinsics to match icc.
This adds
_mm_loadu_epi8, _mm256_loadu_epi8, _mm512_loadu_epi8
_mm_loadu_epi16, _mm256_loadu_epi16, _mm512_loadu_epi16
_mm_storeu_epi8, _mm256_storeu_epi8, _mm512_storeu_epi8
_mm_storeu_epi16, _mm256_storeu_epi16, _mm512_storeu_epi16
llvm-svn: 344862
Craig Topper [Sat, 20 Oct 2018 19:28:50 +0000 (19:28 +0000)]
[X86] Add missing intrinsics to match icc.
This adds
_mm_and_epi32, _mm_and_epi64
_mm_andnot_epi32, _mm_andnot_epi64
_mm_or_epi32, _mm_or_epi64
_mm_xor_epi32, _mm_xor_epi64
_mm256_and_epi32, _mm256_and_epi64
_mm256_andnot_epi32, _mm256_andnot_epi64
_mm256_or_epi32, _mm256_or_epi64
_mm256_xor_epi32, _mm256_xor_epi64
_mm_loadu_epi32, _mm_loadu_epi64
_mm_load_epi32, _mm_load_epi64
_mm256_loadu_epi32, _mm256_loadu_epi64
_mm256_load_epi32, _mm256_load_epi64
_mm512_loadu_epi32, _mm512_loadu_epi64
_mm512_load_epi32, _mm512_load_epi64
_mm_storeu_epi32, _mm_storeu_epi64
_mm_store_epi32, _mm_load_epi64
_mm256_storeu_epi32, _mm256_storeu_epi64
_mm256_store_epi32, _mm256_load_epi64
_mm512_storeu_epi32, _mm512_storeu_epi64
_mm512_store_epi32,V _mm512_load_epi64
llvm-svn: 344861
Sanjay Patel [Sat, 20 Oct 2018 18:18:55 +0000 (18:18 +0000)]
[InstCombine] add test for possible shuffle fold; NFC
llvm-svn: 344860
Fangrui Song [Sat, 20 Oct 2018 17:53:42 +0000 (17:53 +0000)]
Use llvm::{all,any,none}_of instead std::{all,any,none}_of. NFC
llvm-svn: 344859
Sam McCall [Sat, 20 Oct 2018 17:40:12 +0000 (17:40 +0000)]
[clangd] Fix unqualified make_unique after r344850. NFC
llvm-svn: 344858
Simon Pilgrim [Sat, 20 Oct 2018 17:38:33 +0000 (17:38 +0000)]
[CostModel][X86] Add some initial extract/insert subvector shuffle cost tests
Just f64/i64 tests initially to demonstrate PR39368
llvm-svn: 344857
Akira Hatanaka [Sat, 20 Oct 2018 17:35:50 +0000 (17:35 +0000)]
Check that __MAC_OS_X_VERSION_MIN_REQUIRED is defined before checking
whether it is too old.
llvm-svn: 344856
Sanjay Patel [Sat, 20 Oct 2018 17:15:57 +0000 (17:15 +0000)]
[InstCombine] use 'match' to simplify code; NFC
llvm-svn: 344855
Sanjay Patel [Sat, 20 Oct 2018 16:58:27 +0000 (16:58 +0000)]
[InstCombine] make code more flexible with lambda; NFC
I couldn't tell from svn history when these checks were added,
but it pre-dates the split of instcombine into its own directory
at rL92459.
The motivation for changing the check is partly shown by the
code in PR34724:
https://bugs.llvm.org/show_bug.cgi?id=34724
There are also existing regression tests for SLPVectorizer with
sequences of extract+insert that are likely assumed to become
shuffles by the vectorizer cost models.
llvm-svn: 344854
Sanjay Patel [Sat, 20 Oct 2018 16:25:55 +0000 (16:25 +0000)]
[InstCombine] add explanatory comment for strange vector logic; NFC
llvm-svn: 344852
Sam McCall [Sat, 20 Oct 2018 15:30:37 +0000 (15:30 +0000)]
[clangd] Namespace style cleanup in cpp files. NFC.
Standardize on the most common namespace setup in our *.cpp files:
using namespace llvm;
namespace clang {
namespace clangd {
void foo(StringRef) { ... }
And remove redundant llvm:: qualifiers. (Except for cases like
make_unique where this causes problems with std:: and ADL).
This choice is pretty arbitrary, but some broad consistency is nice.
This is going to conflict with everything. Sorry :-/
Squash the other configurations:
A)
using namespace llvm;
using namespace clang;
using namespace clangd;
void clangd::foo(StringRef);
This is in some of the older files. (It prevents accidentally defining a
new function instead of one in the header file, for what that's worth).
B)
namespace clang {
namespace clangd {
void foo(llvm::StringRef) { ... }
This is fine, but in practice the using directive often gets added over time.
C)
namespace clang {
namespace clangd {
using namespace llvm; // inside the namespace
This was pretty common, but is a bit misleading: name lookup preferrs
clang::clangd::foo > clang::foo > llvm:: foo (no matter where the using
directive is).
llvm-svn: 344850
Simon Pilgrim [Sat, 20 Oct 2018 15:17:27 +0000 (15:17 +0000)]
[SLPVectorizer][X86] Add mul/and/or/xor unrolled reduction tests
We miss arithmetic reduction for everything but Add/FAdd (I assume because that's the only cases which x86 has horizontal ops for.....)
llvm-svn: 344849
Sanjay Patel [Sat, 20 Oct 2018 14:53:07 +0000 (14:53 +0000)]
[SLPVectorizer] regenerate test checks; NFC
llvm-svn: 344848
Aleksei Sidorin [Sat, 20 Oct 2018 14:47:37 +0000 (14:47 +0000)]
[NFC][Test commit] Fix typos in a comment
llvm-svn: 344847
Simon Pilgrim [Sat, 20 Oct 2018 14:29:59 +0000 (14:29 +0000)]
[CostModel][X86] Add integer vector reduction cost tests
llvm-svn: 344846
Simon Pilgrim [Sat, 20 Oct 2018 13:20:26 +0000 (13:20 +0000)]
Fix MSVC "truncation from 'double' to 'float'" warning. NFCI.
llvm-svn: 344845
Simon Pilgrim [Sat, 20 Oct 2018 13:18:49 +0000 (13:18 +0000)]
Fix MSVC "not all control paths return a value" warning. NFCI.
llvm-svn: 344844
Simon Pilgrim [Sat, 20 Oct 2018 13:16:31 +0000 (13:16 +0000)]
Replace setFeature macro with lambda to fix MSVC "shift count negative or too big" warnings. NFCI.
llvm-svn: 344843
Alexander Richardson [Sat, 20 Oct 2018 11:12:50 +0000 (11:12 +0000)]
Add an addAbsolute static function to Writer.cpp
Summary:
SymbolTable::addAbsolute() was removed in rL344305.
To me this is more readable than the lambda named `Add` and in our
out-of-tree CHERI target we use addAbsolute() in another function.
Reviewers: ruiu, espindola
Reviewed By: ruiu
Subscribers: kristina, emaste, llvm-commits
Differential Revision: https://reviews.llvm.org/D53393
llvm-svn: 344842
David Blaikie [Sat, 20 Oct 2018 09:16:49 +0000 (09:16 +0000)]
DebugInfo: Use base address specifiers more aggressively
Using a base address specifier even for a single-element range is a size
win for object files (7 words versus 8 words - more significant savings
if the debug info is compressed (since it's 3 words of uncompressable
reloc + 4 compressable words compared to 6 uncompressable reloc + 2
compressable words) - does trade off executable size increase though.
llvm-svn: 344841
Stephen Kelly [Sat, 20 Oct 2018 09:13:59 +0000 (09:13 +0000)]
[clang-query] Add option to print matcher expression
Summary:
This is useful if using clang-query -f with a file containing multiple
matchers.
Reviewers: aaron.ballman
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D52859
llvm-svn: 344840
David Blaikie [Sat, 20 Oct 2018 08:55:51 +0000 (08:55 +0000)]
Add missed file from previous commit (r344838)
llvm-svn: 344839
David Blaikie [Sat, 20 Oct 2018 08:54:05 +0000 (08:54 +0000)]
DebugInfo: Use DW_OP_addrx in DWARFv5
Reuse addresses in the address pool, even in non-split cases.
llvm-svn: 344838
David Blaikie [Sat, 20 Oct 2018 08:12:36 +0000 (08:12 +0000)]
DebugInfo: Implement debug_rnglists.dwo
Save space/relocations in .o files by keeping dwo ranges in the dwo
file rather than the .o file.
llvm-svn: 344837
David Blaikie [Sat, 20 Oct 2018 07:36:39 +0000 (07:36 +0000)]
DebugInfo: Use address pool forms in debug_rnglists
Save no relocations by reusing addresses from the address pool.
llvm-svn: 344836
David Blaikie [Sat, 20 Oct 2018 06:16:25 +0000 (06:16 +0000)]
llvm-dwarfdump: Support RLE_addressx and RLE_startx_length in .debug_rnglists
llvm-svn: 344835
David Blaikie [Sat, 20 Oct 2018 06:02:15 +0000 (06:02 +0000)]
DebugInfo: Use debug_addr for non-dwo addresses in DWARF 5
Putting addresses in the address pool, even with non-fission, can reduce
relocations - reusing the addresses from debug_info and debug_rnglists
(the latter coming soon)
llvm-svn: 344834
Akira Hatanaka [Sat, 20 Oct 2018 05:45:01 +0000 (05:45 +0000)]
[CodeGen] Use the mangle context owned by CodeGenModule to correctly
mangle types of lambda objects captured by a block instead of creating a
new mangle context everytime a captured field type is mangled.
This fixes a bug in IRGen's block helper merging code that was
introduced in r339438 where two blocks capturing two distinct lambdas
would end up sharing helper functions and the block descriptor. This
happened because the ID number used to distinguish lambdas defined
in the same context is reset everytime a mangled context is created.
rdar://problem/
45314494
llvm-svn: 344833
Craig Topper [Sat, 20 Oct 2018 03:51:52 +0000 (03:51 +0000)]
[X86] Add support for more than 32 features for __builtin_cpu_is
libgcc supports more than 32 features by adding a new 32-bit variable __cpu_features2.
This adds the clang support for checking these feature bits.
Patches for compiler-rt and llvm to support this are coming as well.
Probably still need an additional patch for target multiversioning in clang.
Differential Revision: https://reviews.llvm.org/D53458
llvm-svn: 344832
Craig Topper [Sat, 20 Oct 2018 03:51:43 +0000 (03:51 +0000)]
[X86] Add additional CPUs and features to Host.cpp and X86TargetParser.def to match compiler-rt and enable __builtin_cpu_supports/__builtin_cpu_is support in clang
Summary: This matches LLVM to D53461 for compiler-rt.
Reviewers: echristo, erichkeane
Reviewed By: echristo
Subscribers: dberris, llvm-commits
Differential Revision: https://reviews.llvm.org/D53462
llvm-svn: 344831
Craig Topper [Sat, 20 Oct 2018 03:49:04 +0000 (03:49 +0000)]
[X86][compiler-rt] Add additional CPUs and features to the cpu detection to match libgcc
Summary: This patch adds additional features and cpus from libgcc. Unfortunately we've overflowed the existing 32-bits of features so we had to add a new __cpu_features2 variable to hold the additional bits. This matches libgcc as far as I can tell.
Reviewers: echristo
Reviewed By: echristo
Subscribers: dberris, llvm-commits
Differential Revision: https://reviews.llvm.org/D53461
llvm-svn: 344830
Billy Robert O'Neal III [Sat, 20 Oct 2018 03:35:45 +0000 (03:35 +0000)]
[libcxx] [test] Don't detect Windows' UCRT with TEST_COMPILER_C1XX
The test is trying to avoid saying aligned_alloc on Windows' UCRT, which does not (and can not) implement aligned_alloc. However, it's testing for c1xx, meaning clang on Windows will fail this test when using the UCRT.
llvm-svn: 344829
Richard Trieu [Sat, 20 Oct 2018 02:15:58 +0000 (02:15 +0000)]
Make -Wfor-loop-analysis work with C++17
For now, disable the "variable in loop condition not modified" warning to not
be emitted when there is a structured binding variable in the loop condition.
https://bugs.llvm.org/show_bug.cgi?id=39285
llvm-svn: 344828
Akira Hatanaka [Sat, 20 Oct 2018 02:11:45 +0000 (02:11 +0000)]
Disable unittests/clangd/JSONTransportTests.cpp on versions of macosx
earlier than 10.13.
rdar://problem/
45310173
llvm-svn: 344827
Thomas Lively [Sat, 20 Oct 2018 01:35:23 +0000 (01:35 +0000)]
[WebAssembly] Implement vector sext_inreg and tests with comparisons
Summary: Depends on D53251.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53252
llvm-svn: 344826
Thomas Lively [Sat, 20 Oct 2018 01:31:18 +0000 (01:31 +0000)]
[WebAssembly] Custom lower i64x2 constant shifts to avoid wrap
Summary: Depends on D53057.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53251
llvm-svn: 344825
Craig Topper [Sat, 20 Oct 2018 01:30:00 +0000 (01:30 +0000)]
[X86] When checking the bits in cpu_features for function multiversioning dispatcher in the resolver, make sure all the required bits are set. Not just one of them
Summary:
The multiversioning code repurposed the code from __builtin_cpu_supports for checking if a single feature is enabled. That code essentially performed (_cpu_features & (1 << C)) != 0. But with the multiversioning path, the mask is no longer guaranteed to be a power of 2. So we return true anytime any one of the bits in the mask is set not just all of the bits.
The correct check is (_cpu_features & mask) == mask
Reviewers: erichkeane, echristo
Reviewed By: echristo
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D53460
llvm-svn: 344824
Artem Dergachev [Sat, 20 Oct 2018 00:29:24 +0000 (00:29 +0000)]
[analyzer] Be more plugin-friendly by moving static locals into .cpp files.
The GDMIndex functions return a pointer that's used as a key for looking up
data, but addresses of local statics defined in header files aren't the same
across shared library boundaries and the result is that analyzer plugins
can't access this data.
Event types are uniqued by using the addresses of a local static defined
in a header files, but it isn't the same across shared library boundaries
and plugins can't currently handle ImplicitNullDerefEvents.
Patches by Joe Ranieri!
Differential Revision: https://reviews.llvm.org/D52905
Differential Revision: https://reviews.llvm.org/D52906
llvm-svn: 344823
Roman Tereshin [Sat, 20 Oct 2018 00:06:15 +0000 (00:06 +0000)]
[MachineCSE][GlobalISel] Making sure MachineCSE works mid-GlobalISel (again)
Change of approach, it looks like it's a much better idea to deal with
the vregs that have LLTs and reg classes both properly, than trying to
avoid creating those across all GlobalISel passes and all targets.
The change mostly touches MachineRegisterInfo::constrainRegClass,
which is apparently only used by MachineCSE. The changes are NFC for
any pipeline but one that contains MachineCSE mid-GlobalISel.
NOTE on isCallerPreservedOrConstPhysReg change in MachineCSE:
There is no test covering it as the only way to insert a new pass
(MachineCSE) from a command line I know of is llc's -run-pass option,
which only works with MIR, but MIRParser freezes reserved registers upon
MachineFunctions creation, making it impossible to reproduce the state
that exposes the issue.
Reviwed By: aditya_nandakumar
Differential Revision: https://reviews.llvm.org/D53144
llvm-svn: 344822
Billy Robert O'Neal III [Fri, 19 Oct 2018 23:49:15 +0000 (23:49 +0000)]
[libcxx] [test] Add missing <stdexcept> to map at tests.
Reviewed as https://reviews.llvm.org/D50551
llvm-svn: 344821
Billy Robert O'Neal III [Fri, 19 Oct 2018 23:45:45 +0000 (23:45 +0000)]
Repair thread-unsafe modifications of n_alive in F.pass.cpp
In this example, the ctor of G runs in the main thread in the expression G(), and also in the copy ctor of G() in the DECAY_COPY inside std::thread. The main thread destroys the G() instance at the semicolon, and the started thread destroys the G() after it returns. Thus there is a race between the threads on the n_alive variable.
The fix is to join with the background thread before attempting to destroy the G in the main thread.
llvm-svn: 344820
Petar Jovanovic [Fri, 19 Oct 2018 22:16:49 +0000 (22:16 +0000)]
[llvm-objdump] Fix --file-headers (-f) option
Changed the format call to match the surrounding code. Previously it was
printing an unsigned int while the return type being printed was
long unsigned int or wider. This caused problems for big-endian systems
which were discovered on mips64.
Also, the printed address had less characters than it should because the
character count was directly obtained from the number of bytes in the
address.
The tests were adapted to fit this fix and now use longer addresses.
Patch by Milos Stojanovic.
Differential Revision: https://reviews.llvm.org/D53403
llvm-svn: 344818
Thomas Lively [Fri, 19 Oct 2018 21:11:43 +0000 (21:11 +0000)]
[LoopVectorize] Loop vectorization for minimum and maximum
Summary: Depends on D52766.
Reviewers: aheejin, dschuff
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52767
llvm-svn: 344816
Changpeng Fang [Fri, 19 Oct 2018 21:09:21 +0000 (21:09 +0000)]
AMDGPU: Add support pattern for SUB of one bit
Summary:
Add selection patterns to support one bit Sub.
Reviewers:
rampitec, arsenm
Differential Revision:
https://reviews.llvm.org/D52946
llvm-svn: 344815
Evandro Menezes [Fri, 19 Oct 2018 20:57:45 +0000 (20:57 +0000)]
[NFC][InstCombine] Undo stray change
Undo stray change introduced by r344725.
llvm-svn: 344814
Craig Topper [Fri, 19 Oct 2018 20:44:33 +0000 (20:44 +0000)]
[X86] Remove some left over code from when MVT:i1 was a legal type for AVX512.
llvm-svn: 344813
Matt Arsenault [Fri, 19 Oct 2018 20:17:05 +0000 (20:17 +0000)]
Fix typos in assert message
llvm-svn: 344812
Aditya Nandakumar [Fri, 19 Oct 2018 20:11:52 +0000 (20:11 +0000)]
[GISel]: Allow PHIs to be DCEd
https://reviews.llvm.org/D53304
Currently dead phis are not cleaned up during DCE. This patch allows
dead PHI and G_PHI insts to be deleted.
Reviewed by: dsanders
llvm-svn: 344811
Aaron Smith [Fri, 19 Oct 2018 19:30:59 +0000 (19:30 +0000)]
[PDB] Test variadic function type in PDB
This adds back the test case reverted in commit:
d260a269200824c5c1c8c6de531fd5aa63db9c35
llvm-svn: 344809
Craig Topper [Fri, 19 Oct 2018 19:24:42 +0000 (19:24 +0000)]
[X86] In PostprocessISelDAG, start from allnodes_end, not the root.
There is no guarantee the root is at the end if isel created any nodes without morphing them. This includes the nodes created by manual isel from C++ code in X86ISelDAGToDAG.
This is similar to r333415 from PowerPC which is where I originally stole the peephole loop from.
I don't have a test case, but without this a future patch doesn't work which is how I found it.
llvm-svn: 344808
Wolfgang Pieb [Fri, 19 Oct 2018 19:23:16 +0000 (19:23 +0000)]
[DWARF] Make llvm-dwarfdump display location lists in a .dwp file correctly. Fixes PR38990.
Considers the index when extracting location lists from a .dwp file.
Majority of the patch by David Blaikie.
Reviewers: dblaikie
Differential revision: https://reviews.llvm.org/D53155
llvm-svn: 344807
Dan Albert [Fri, 19 Oct 2018 19:23:01 +0000 (19:23 +0000)]
Revert "[Driver] Reland: Default Android toolchains to libc++."
This reverts commit
84677d5009d613232d360fda27e6e41fb5cb6700.
llvm-svn: 344806
Thomas Lively [Fri, 19 Oct 2018 19:08:06 +0000 (19:08 +0000)]
[WebAssembly] Handle undefined lane indices in SIMD patterns
Summary:
Undefined indices in shuffles can be used when not all lanes of the
output vector will be used. This happens for example in the expansion
of vector reduce operations. Regardless, undefs are legal as lane
indices in IR and should be supported.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53057
llvm-svn: 344803
Krzysztof Pszeniczny [Fri, 19 Oct 2018 19:02:16 +0000 (19:02 +0000)]
Fix a use-after-RAUW bug in large GEP splitting
Summary:
Large GEP splitting, introduced in rL332015, uses a `DenseMap<AssertingVH<Value>, ...>`. This causes an assertion to fail (in debug builds) or undefined behaviour to occur (in release builds) when a value is RAUWed.
This manifested itself in the 7zip benchmark from the llvm test suite built on ARM with `-fstrict-vtable-pointers` enabled while RAUWing invariant group launders and splits in CodeGenPrepare.
This patch merges the large offsets of the argument and the result of an invariant.group strip/launder intrinsic before RAUWing.
Reviewers: Prazek, javed.absar, haicheng, efriedma
Reviewed By: Prazek, efriedma
Subscribers: kristof.beyls, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D51936
llvm-svn: 344802
Richard Smith [Fri, 19 Oct 2018 19:01:34 +0000 (19:01 +0000)]
PR24164, PR39336: init-captures are not distinct full-expressions.
Rather, they are subexpressions of the enclosing lambda-expression, and
any temporaries in them are destroyed at the end of that
full-expression, or when the corresponding lambda-expression is
destroyed if they are lifetime-extended.
llvm-svn: 344801
Richard Smith [Fri, 19 Oct 2018 19:01:31 +0000 (19:01 +0000)]
Add basic test that we perform lifetime extension in the expected
situations.
llvm-svn: 344800
Thomas Lively [Fri, 19 Oct 2018 19:01:26 +0000 (19:01 +0000)]
[InstCombine] InstCombine and InstSimplify for minimum and maximum
Summary: Depends on D52765
Reviewers: aheejin, dschuff
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52766
llvm-svn: 344799
Aaron Smith [Fri, 19 Oct 2018 18:58:24 +0000 (18:58 +0000)]
[lldb] Add support in Status::AsCString to retrieve win32 system error strings
Reviewers: rnk, zturner, aleksandr.urakov
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D53092
llvm-svn: 344798
Andrea Di Biagio [Fri, 19 Oct 2018 18:39:29 +0000 (18:39 +0000)]
[llvm-mca] Remove a stale TODO comment. NFC
Starting from revision r344334, we can now describe optimizable
register-register moves in the machine scheduling models.
llvm-svn: 344797
Thomas Lively [Fri, 19 Oct 2018 18:15:32 +0000 (18:15 +0000)]
[ConstantFolding] Constant fold minimum and maximum intrinsics
Summary: Depends on D52764
Reviewers: aheejin, dschuff
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D52765
llvm-svn: 344796
Dan Albert [Fri, 19 Oct 2018 18:06:02 +0000 (18:06 +0000)]
[Driver] Reland: Default Android toolchains to libc++.
The sanitizer builder that was broken by this should now be fixed.
Original review was https://reviews.llvm.org/D53109
llvm-svn: 344795
Jonas Devlieghere [Fri, 19 Oct 2018 17:57:53 +0000 (17:57 +0000)]
[dwarfdump] Hide ranges in diff-mode.
llvm-dwarfdump --diff should not print DW_AT_ranges. This patch fixes
that.
Differential revision: https://reviews.llvm.org/D53353
llvm-svn: 344794
Sanjay Patel [Fri, 19 Oct 2018 17:54:53 +0000 (17:54 +0000)]
[InstCombine] use m_Neg() in dyn_castNegVal() to match vectors with undef elts
llvm-svn: 344793
Krzysztof Parzyszek [Fri, 19 Oct 2018 17:31:11 +0000 (17:31 +0000)]
[Hexagon] Remove support for V4
llvm-svn: 344791
Sanjay Patel [Fri, 19 Oct 2018 17:26:22 +0000 (17:26 +0000)]
[InstCombine] move/add tests for sub/neg; NFC
These should all be handled using "dyn_castNegVal",
but that misses vectors with undef elements.
llvm-svn: 344790
Hans Wennborg [Fri, 19 Oct 2018 16:19:52 +0000 (16:19 +0000)]
Java annotation declaration being handled correctly
Previously, Java annotation declarations (@interface AnnotationName) were being
handled as ObjC interfaces. This caused the brace formatting to mess up, so
that when you had a class with an interface defined in it, it would indent the
final brace of the class.
It used to format this class like so:
class A {
@interface B {}
}
But will now just skip the @interface and format it like so:
class A {
@interface B {}
}
Patch by Sam Maier!
Differential Revision: https://reviews.llvm.org/D53434
llvm-svn: 344789
Stella Stamenova [Fri, 19 Oct 2018 16:00:58 +0000 (16:00 +0000)]
[lldbsuite, windows] Disable two tail call frames tests that fail on Windows
Summary: These tests fail on Windows because of known limitations (a.k.a. bugs) with the current implementation of GetFrameAtIndex
Reviewers: asmith, vsk
Reviewed By: vsk
Subscribers: abidh, lldb-commits
Differential Revision: https://reviews.llvm.org/D53415
llvm-svn: 344788
Sam McCall [Fri, 19 Oct 2018 15:42:23 +0000 (15:42 +0000)]
[clangd] Set workspace root when initializing ClangdServer, disallow mutation.
Summary:
Rename instance variable to WorkspaceRoot to match what we call it internally.
Add fixme to set it automatically. Don't do it yet, clients have assumptions
that the constructor won't access the FS.
Don't second-guess the provided root.
Reviewers: ioeric
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D53404
llvm-svn: 344787
Krzysztof Parzyszek [Fri, 19 Oct 2018 15:36:45 +0000 (15:36 +0000)]
[Hexagon] Remove support for V4
llvm-svn: 344786
Marek Kurdej [Fri, 19 Oct 2018 15:26:17 +0000 (15:26 +0000)]
[clang-tidy] Resolve readability-else-after-return false positive for constexpr if.
Summary:
It fixes the false positive when using constexpr if and where else cannot be removed:
Example:
```
if constexpr (sizeof(int) > 4)
// ...
return /* ... */;
else // This else cannot be removed.
// ...
return /* ... */;
```
Reviewers: alexfh, aaron.ballman
Reviewed By: aaron.ballman
Subscribers: lebedev.ri, xazax.hun, cfe-commits
Differential Revision: https://reviews.llvm.org/D53372
llvm-svn: 344785
Balazs Keri [Fri, 19 Oct 2018 15:16:51 +0000 (15:16 +0000)]
[ASTImporter] Removed uneeded default case label.
llvm-svn: 344784
Balazs Keri [Fri, 19 Oct 2018 13:32:20 +0000 (13:32 +0000)]
[ASTImporter] Added error handling for AST import.
Summary:
The goal of this change is to make the ASTImporter::Import functions return
llvm::Expected instead of the imported type.
As first part the ASTNodeImporter visit functions are updated to return with
llvm::Expected. Various `import` functions are added to ASTNodeImporter to
simplify the code and have a common place for interface towards ASTImporter
(from ASTNodeImporter). There is some temporary code that is needed before
ASTImporter is updated.
Reviewers: a.sidorin, a_sidorin, xazax.hun
Reviewed By: a_sidorin
Subscribers: dkrupp, Szelethus, rnkovacs, martong, jfb, cfe-commits
Differential Revision: https://reviews.llvm.org/D51633
llvm-svn: 344783
Clement Courbet [Fri, 19 Oct 2018 12:24:49 +0000 (12:24 +0000)]
[llvm-exegesis] Mark second-form X87 instructions as unsupported.
Summary:
We only support the first form because we rely on information that is
only available there.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53430
llvm-svn: 344782
Kristina Brooks [Fri, 19 Oct 2018 12:14:30 +0000 (12:14 +0000)]
[MC][DWARF][AsmParser] Ensure nested CFI frames are diagnosed.
This avoids a crash (with asserts) or bad codegen (without asserts)
in Dwarf streamer later on. This patch fixes this condition in
MCStreamer and propogates SMLoc down when it's available with an
added bonus of source locations for those specific types of errors.
Further patches could use similar improvements as currently most
non-Windows CFI directives lack an SMLoc parameter.
Modified an existing test to verify source location propogation and
added an object-file version of it to verify that it does not crash in
addition to a standalone test to only ensure it does not crash.
Differential Revision: https://reviews.llvm.org/D51695
llvm-svn: 344781
Clement Courbet [Fri, 19 Oct 2018 12:08:05 +0000 (12:08 +0000)]
[llvm-exegesis] Re-enable liveliness tracker.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53429
llvm-svn: 344780
Clement Courbet [Fri, 19 Oct 2018 09:56:54 +0000 (09:56 +0000)]
[llvm-exegesis] X87 RFP setup code.
Summary:
This was lost during refactoring in rL342644.
Fix and simplify simplify value size handling: always go through a 80 bit value,
because the value can be 1 byte). Add unit tests.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53423
llvm-svn: 344779
Marco Antognini [Fri, 19 Oct 2018 09:01:37 +0000 (09:01 +0000)]
[OpenCL] Remove unwanted signedness conversion from tests
The get_kernel_* functions used in cl20-device-side-enqueue.cl all return
unsigned integers. This patch avoids undesired implicit conversions on the
returned values.
Differential Revision: https://reviews.llvm.org/D52873
llvm-svn: 344778
Haojian Wu [Fri, 19 Oct 2018 08:35:24 +0000 (08:35 +0000)]
[clangd] Remove the overflow log.
Summary:
LLVM codebase has generated files (all are build/Target/XXX/*.inc) that
exceed the MaxLine & MaxColumn. Printing these log would be noisy.
Reviewers: sammccall
Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D53400
llvm-svn: 344777
Martin Storsjo [Fri, 19 Oct 2018 06:39:36 +0000 (06:39 +0000)]
[COFF] Fix error handling on duplicates for import library symbols
Normally one wouldn't run into that case, but it is possible with
a little creative ordering of special libraries.
Differential Revision: https://reviews.llvm.org/D53388
llvm-svn: 344776
Fangrui Song [Fri, 19 Oct 2018 06:20:01 +0000 (06:20 +0000)]
[pipeliner] Fix test added in rL344748 to require asserts
llvm-svn: 344775
Fangrui Song [Fri, 19 Oct 2018 06:12:02 +0000 (06:12 +0000)]
Use llvm::{all,any,none}_of instead std::{all,any,none}_of. NFC
llvm-svn: 344774
Krasimir Georgiev [Fri, 19 Oct 2018 06:05:32 +0000 (06:05 +0000)]
[clangd] Fix msan failure after r344735 by initializing bitfields
That revision changed integer members to bitfields; the integers were
default initialized before and the bitfields lost that default
initialization. This started causing msan use-of-uninitialized memory in
clangd tests.
llvm-svn: 344773
Roman Lebedev [Fri, 19 Oct 2018 06:04:07 +0000 (06:04 +0000)]
[clang-tidy] readability-uppercase-literal-suffix: specify target for ms test too
Apparently the bots were still failing with this.
Sadly, i did not see *this* failure when i last looked.
llvm-svn: 344772
Douglas Yung [Fri, 19 Oct 2018 04:09:32 +0000 (04:09 +0000)]
Revert commit r344670 as the test fails on a bot lab.llvm.org:8011/builders/clang-cmake-armv7-full/builds/2683/.
llvm-svn: 344771
Hsiangkai Wang [Fri, 19 Oct 2018 01:52:54 +0000 (01:52 +0000)]
[CodeGen] Fix for PR39094.
When using MachineInstr to get SlotIndex, the MI could not be a debug
instruction. mi2iMap does not contain debug instructions in it.
After enabling DBG_LABEL in the generated code, the first instruction in
the bundle may be a debug instruction. In this patch, I use the first
non-debug instruction in the bundle to query SlotIndex in mi2iMap.
Bugzilla report: https://bugs.llvm.org/show_bug.cgi?id=39094
Differential revision: https://reviews.llvm.org/D52927
llvm-svn: 344770
Chandler Carruth [Fri, 19 Oct 2018 00:22:37 +0000 (00:22 +0000)]
[TI removal] Remove `TerminatorInst` from the IR type system!
llvm-svn: 344769
Chandler Carruth [Fri, 19 Oct 2018 00:22:10 +0000 (00:22 +0000)]
[TI removal] Switch some newly added code over to use `Instruction`
directly.
llvm-svn: 344768
Mandeep Singh Grang [Fri, 19 Oct 2018 00:05:26 +0000 (00:05 +0000)]
[COFF, ARM64] Enable unit test arm64-microsoft-status-reg.cpp only for aarch64 target
This should unbreak bots broken here:
http://lab.llvm.org:8011/builders/clang-cmake-x86_64-sde-avx512-linux/builds/14391
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/38288
llvm-svn: 344767