Xinliang David Li [Mon, 11 Apr 2016 17:13:08 +0000 (17:13 +0000)]
Add code comment/NFC
llvm-svn: 265966
Sanjay Patel [Mon, 11 Apr 2016 17:11:55 +0000 (17:11 +0000)]
[InstCombine] use canEvaluateShiftedShift() to handle the lshr case (NFCI)
We need just a couple of logic tweaks to consolidate the shl and lshr cases.
This is step 5 of refactoring to solve PR26760:
https://llvm.org/bugs/show_bug.cgi?id=26760
llvm-svn: 265965
Michael Zuckerman [Mon, 11 Apr 2016 17:04:21 +0000 (17:04 +0000)]
[Clang][AVX512][BuiltIn] Adding avx512 ( psll{d|q}512,psllv{16si|8di},psra{d|q}512,psrav{16si|8di},pternlog{d|q}{128|256|512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18926
llvm-svn: 265964
Reid Kleckner [Mon, 11 Apr 2016 17:02:34 +0000 (17:02 +0000)]
Update getting started docs
compiler-rt is optional. We often get email from users with compiler-rt
build errors who don't actually need compiler-rt. Marking it optional
should help them avoid those potential problems.
While I'm here, update a reference to the build directory and remove an
obsolete reference to llvm-gcc. Nobody today is under the impression
that Clang depends on GCC.
llvm-svn: 265963
Adrian Prantl [Mon, 11 Apr 2016 16:58:40 +0000 (16:58 +0000)]
Make the distinct DISubprogram in this testcase really distinct.
llvm-svn: 265962
Adrian Prantl [Mon, 11 Apr 2016 16:58:35 +0000 (16:58 +0000)]
Update discriminator testcases to use proper NoDebug CUs instead of omitting
!llvm.dbg.cu.
llvm-svn: 265961
Sanjay Patel [Mon, 11 Apr 2016 16:50:32 +0000 (16:50 +0000)]
[InstCombine] don't try to shift an illegal amount (PR26760)
This is the straightforward fix for PR26760:
https://llvm.org/bugs/show_bug.cgi?id=26760
But we still need to make some changes to generalize this helper function
and then send the lshr case into here.
llvm-svn: 265960
Pavel Labath [Mon, 11 Apr 2016 16:50:08 +0000 (16:50 +0000)]
Mark TestPrintStackTraces as flaky on android arm
llvm-svn: 265959
Pavel Labath [Mon, 11 Apr 2016 16:40:09 +0000 (16:40 +0000)]
[Driver] Fix a segfault in signal handlers
Summary:
If we recieve a SIGCONT or SIGTSTP, while the driver is shutting down (which, sometimes, we do,
for reasons which are not completely clear to me), we would crash to due a null pointer
dereference. Guard against this situation.
Reviewers: clayborg
Subscribers: lldb-commits
Differential Revision: http://reviews.llvm.org/D18965
llvm-svn: 265958
Peter Collingbourne [Mon, 11 Apr 2016 16:40:08 +0000 (16:40 +0000)]
ELF: Set FDE count in .eh_frame_hdr correctly.
It is possible to have FDEs with duplicate PCs if ICF was able to merge
functions with FDEs, or if the input files for some reason contained duplicate
FDEs. We previously weren't handling this correctly when producing the
contents of the .eh_frame_hdr section; we were dropping entries and leaving
null entries at the end of the section, which confused consumers of unwind
data, such as the backtrace() function.
Fix the bug by setting the FDE count to the number of FDEs actually emitted
into .eh_frame_hdr, rather than the number of FDEs in .eh_frame.
Differential Revision: http://reviews.llvm.org/D18911
llvm-svn: 265957
Peter Collingbourne [Mon, 11 Apr 2016 16:39:43 +0000 (16:39 +0000)]
ELF: Implement basic support for module asm in bitcode files.
Differential Revision: http://reviews.llvm.org/D18872
llvm-svn: 265956
Tom Stellard [Mon, 11 Apr 2016 16:21:12 +0000 (16:21 +0000)]
TargetRegisterInfo: Add getRegAsmName()
Summary:
The motivation for this new function is to move an invalid assumption
about the relationship between the names of register definitions in
tablegen files and their assembly names into TargetRegisterInfo, so that
we can begin working on fixing this assumption.
The current problem is that if you have a register definition in
TableGen like:
def MYReg0 : Register<"r0", 0>;
The function TargetLowering::getRegForInlineAsmConstraint() derives the
assembly name from the tablegen name: "MyReg0" rather than the given
assembly name "r0". This is working, because on most targets the
tablegen name and the assembly names are case insensitive matches for
each other (e.g. def EAX : X86Reg<"eax", ...>
getRegAsmName() will allow targets to override this default assumption and
return the correct assembly name.
Reviewers: echristo, hfinkel
Subscribers: SamWot, echristo, hfinkel, llvm-commits
Differential Revision: http://reviews.llvm.org/D15614
llvm-svn: 265955
Sanjay Patel [Mon, 11 Apr 2016 16:11:07 +0000 (16:11 +0000)]
[InstCombine] rename variables in shifted-shift helper function (NFCI)
This is step 3 of refactoring to solve PR26760:
https://llvm.org/bugs/show_bug.cgi?id=26760
llvm-svn: 265954
Adrian Prantl [Mon, 11 Apr 2016 15:53:44 +0000 (15:53 +0000)]
More upgrading of old- and very-old-style debug info in testcases.
llvm-svn: 265953
Michael Zuckerman [Mon, 11 Apr 2016 15:46:39 +0000 (15:46 +0000)]
[CLANG] [AVX512] [BUILTIN] Adding PSRA{Q|D|QI|DI}{128|256|512} builtin
Differential Revision: http://reviews.llvm.org/D17693
llvm-svn: 265952
Sanjay Patel [Mon, 11 Apr 2016 15:43:41 +0000 (15:43 +0000)]
[InstCombine] add helper function for shift-shift optimization (NFCI)
This is step 2 of refactoring to solve PR26760:
https://llvm.org/bugs/show_bug.cgi?id=26760
llvm-svn: 265951
Sanjoy Das [Mon, 11 Apr 2016 15:26:18 +0000 (15:26 +0000)]
This reverts commit r265913 and r265912
See PR27315
r265913: "[IndVars] Eliminate op.with.overflow when possible"
r265912: "[SCEV] See through op.with.overflow intrinsics"
llvm-svn: 265950
Petar Jovanovic [Mon, 11 Apr 2016 15:24:23 +0000 (15:24 +0000)]
[mips] Make Static a default relocation model for MIPS codegen
This change follows up defaults for GCC and Clang, so LLVM does not differ
from them. While number of the test files are touched with this change, they
all keep the old (expected) behaviour with the explicit option:
"-relocation-model=pic"
The tests that have not been touched are insensitive to relocation model.
Differential Revision: http://reviews.llvm.org/D17995
llvm-svn: 265949
Adrian McCarthy [Mon, 11 Apr 2016 15:21:01 +0000 (15:21 +0000)]
Retry deletion of temporary files to avoid race conditions on Windows.
Differential Revision: http://reviews.llvm.org/D18912
llvm-svn: 265948
Daniel Sanders [Mon, 11 Apr 2016 15:20:40 +0000 (15:20 +0000)]
[mips] Trivial corrections to range checked immediates.
Summary:
SYNC has a 5-bit unsigned immediate.
Move MIPS16-specific pcrel16 operand to Mips16 files.
Reviewers: vkalintiris
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D18755
llvm-svn: 265947
Sanjay Patel [Mon, 11 Apr 2016 15:19:44 +0000 (15:19 +0000)]
[InstCombine] replace test that no longer works as intended
This is step 1 of refactoring to solve PR26760:
https://llvm.org/bugs/show_bug.cgi?id=26760
llvm-svn: 265946
Teresa Johnson [Mon, 11 Apr 2016 14:59:07 +0000 (14:59 +0000)]
[ThinLTO] BitcodeWriter still requires Analysis library
This should fix bot failure:
http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/9873
The bitcode writer unfortunately still needs the Analysis library, as it
replaces old dependence on BFI etc with dependence on new
ModuleSummaryAnalysis pass.
llvm-svn: 265945
Ulrich Weigand [Mon, 11 Apr 2016 14:38:47 +0000 (14:38 +0000)]
[SystemZ] README: remove an implemented idea, add some new ones
The note about conditional returns can now be removed, as they are
implemented. Let's also add 2 new ones in exchange.
Author: koriakin
Differential Revision: http://reviews.llvm.org/D18962
llvm-svn: 265944
Ulrich Weigand [Mon, 11 Apr 2016 14:35:39 +0000 (14:35 +0000)]
[SystemZ] Add SVC instruction
This is going to be useful for inline assembly only.
Author: koriakin
Differential Revision: http://reviews.llvm.org/D18952
llvm-svn: 265943
Michael Kruse [Mon, 11 Apr 2016 14:34:08 +0000 (14:34 +0000)]
Allow overflow of indices with constant dim-sizes.
Allow overflow of indices into the next higher dimension if it has
constant size. E.g.
float A[32][2];
((float*)A)[5];
is effectively the same as
A[2][1];
This can happen since r265379 as a side effect if ScopDetection
recognizes an access as affine, but ScopInfo rejects the GetElementPtr.
Differential Revision: http://reviews.llvm.org/D18878
llvm-svn: 265942
Teresa Johnson [Mon, 11 Apr 2016 13:58:45 +0000 (13:58 +0000)]
[ThinLTO] Move summary computation from BitcodeWriter to new pass
Summary:
This is the first step in also serializing the index out to LLVM
assembly.
The per-module summary written to bitcode is moved out of the bitcode
writer and to a new analysis pass (ModuleSummaryIndexWrapperPass).
The pass itself uses a new builder class to compute index, and the
builder class is used directly in places where we don't have a pass
manager (e.g. llvm-as).
Because we are computing summaries outside of the bitcode writer, we no
longer can use value ids created by the bitcode writer's
ValueEnumerator. This required changing the reference graph edge type
to use a new ValueInfo class holding a union between a GUID (combined
index) and Value* (permodule index). The Value* are converted to the
appropriate value ID during bitcode writing.
Also, this enables removal of the BitWriter library's dependence on the
Analysis library that was previously required for the summary computation.
Reviewers: joker.eph
Subscribers: joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D18763
llvm-svn: 265941
Rafael Espindola [Mon, 11 Apr 2016 13:51:23 +0000 (13:51 +0000)]
Mark OffsetSec const. NFC.
llvm-svn: 265940
Rafael Espindola [Mon, 11 Apr 2016 13:47:35 +0000 (13:47 +0000)]
Remove initializer that are always set by the constructor.
llvm-svn: 265939
Rafael Espindola [Mon, 11 Apr 2016 13:44:05 +0000 (13:44 +0000)]
Mark a few methods const.
llvm-svn: 265938
Michael Kruse [Mon, 11 Apr 2016 13:24:29 +0000 (13:24 +0000)]
Do not bind a non-const reference to a rvalue. NFC.
MSVC warns with:
warning C4239: nonstandard extension used: 'initializing': conversion from 'llvm::DebugLoc' to 'llvm::DebugLoc &'
note: A non-const reference may only be bound to an lvalue
Change the reference to a const reference.
llvm-svn: 265937
Oliver Stannard [Mon, 11 Apr 2016 13:06:28 +0000 (13:06 +0000)]
[ARM] Avoid switching ARM/Thumb mode on .arch/.cpu directive
When we see a .arch or .cpu directive, we should try to avoid switching
ARM/Thumb mode if possible.
If we do have to switch modes, we also need to emit the correct mapping
symbol for the new ISA. We did not do this previously, so could emit
ARM code with Thumb mapping symbols (or vice-versa).
The GAS behaviour is to always stay in the same mode, and to emit an
error on any instructions seen when the current mode is not available on
the current target. We can't represent that situation easily (we assume
that Thumb mode is available if ModeThumb is set), so we differ from the
GAS behaviour when switching to a target that can't support the old
mode. I've added a warning for when this implicit mode-switch occurs.
Differential Revision: http://reviews.llvm.org/D18955
llvm-svn: 265936
Michael Zuckerman [Mon, 11 Apr 2016 12:32:31 +0000 (12:32 +0000)]
[Clang][AVX512][BuiltIn] Adding avx512 ( punpck{h|l}{dq|qdq}{128|256|512},rndscale{ss|sd}, {scalef{ss|sd|pd512|ps512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18929
llvm-svn: 265935
Benjamin Kramer [Mon, 11 Apr 2016 12:19:19 +0000 (12:19 +0000)]
[clang-format] Walk backwards from end() instead of forwards from rend().
This should've been forwards from rbegin(), reverse iterators are just
too confusing to be used by mere mortals. Fixes out-of-bounds walks over
the list.
llvm-svn: 265934
Ulrich Weigand [Mon, 11 Apr 2016 12:12:32 +0000 (12:12 +0000)]
[SystemZ] Support conditional indirect sibling calls via BCR
This adds a conditional variant of CallBR instruction, CallBCR. Also,
it can be fused with integer comparisons, resulting in one of the new
C*BCall instructions.
In addition to CallBRCL limitations, this has another one: it won't
trigger if the function to call isn't already in %r1 - see f22 in the
test for an example (it's also why the loads in tests are volatile).
Author: koriakin
Differential Revision: http://reviews.llvm.org/D18928
llvm-svn: 265933
Ulrich Weigand [Mon, 11 Apr 2016 12:03:30 +0000 (12:03 +0000)]
[SystemZ] Remove incorrect CC use for C*BReturn instructions
These are fused compare-and-branches, so they obviously don't use CC.
Author: koriakin
Differential Revision: http://reviews.llvm.org/D18927
llvm-svn: 265932
Bhushan D. Attarde [Mon, 11 Apr 2016 11:19:37 +0000 (11:19 +0000)]
Remove unintentional return
llvm-svn: 265931
Simon Pilgrim [Mon, 11 Apr 2016 11:10:36 +0000 (11:10 +0000)]
[X86] Added extra widening tests for and/xor/or bit operations
Add tests for bitcasting an illegal vector to/from a legal scalar
Additional tests requested for D18944
llvm-svn: 265930
Simon Pilgrim [Mon, 11 Apr 2016 10:58:52 +0000 (10:58 +0000)]
[X86] Added extra widening tests for and/xor/or bit operations
To make sure we're dealing with both cases of legal/illegal number of vector elements and legal/illegal vector element types
llvm-svn: 265929
Michael Zuckerman [Mon, 11 Apr 2016 10:22:07 +0000 (10:22 +0000)]
[Clang][AVX512][BuiltIn] Adding avx512 ( ptest{n}m{b|w}{128|256|512} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18924
llvm-svn: 265928
Simon Pilgrim [Mon, 11 Apr 2016 10:22:05 +0000 (10:22 +0000)]
[X86] Regenerated sdglue test checks
llvm-svn: 265927
Benjamin Kramer [Mon, 11 Apr 2016 10:16:37 +0000 (10:16 +0000)]
Don't clutter the test directory with temporary IR files.
-emit-llvm emits a file, -emit-llvm-only doesn't.
llvm-svn: 265926
Simon Pilgrim [Mon, 11 Apr 2016 10:16:27 +0000 (10:16 +0000)]
[X86] Added widening tests for and/xor/or bit operations
Part of additional tests requested for D18944
llvm-svn: 265925
Andrey Turetskiy [Mon, 11 Apr 2016 10:07:36 +0000 (10:07 +0000)]
[X86] Restrict max long nop length for Lakemont.
Restrict the max length of long nops for Lakemont to 7. Experiments on MCU
benchmarks (Dhrystone, Coremark) show that this is the most optimal length.
Differential Revision: http://reviews.llvm.org/D18897
llvm-svn: 265924
Kuba Brecka [Mon, 11 Apr 2016 09:27:09 +0000 (09:27 +0000)]
[sanitizer] Restore stderr when using forkpty() to spawn external symbolizer
In `AtosSymbolizer`, we're using `forkpty()` to create a new pseudo-terminal to communicate with the `atos` tool (we need that to avoid output buffering in interactive mode). This however redirects both stdout and stderr into a single stream, so when we read the output, we can't distinguish between errors and standard replies. Let's save&restore stderr to avoid that.
Differential Revision: http://reviews.llvm.org/D15073
llvm-svn: 265923
Martin Probst [Mon, 11 Apr 2016 09:17:57 +0000 (09:17 +0000)]
clang-format: [JS] Test for parameter annotations.
Summary: Just to ensure no regressions, this already works fine.
Reviewers: djasper
Subscribers: cfe-commits, klimek
Differential Revision: http://reviews.llvm.org/D18950
llvm-svn: 265922
Tamas Berghammer [Mon, 11 Apr 2016 08:54:57 +0000 (08:54 +0000)]
Fix makefile for TestMiThreadInfo after rL265858 (2nd try)
llvm-svn: 265921
Tamas Berghammer [Mon, 11 Apr 2016 08:45:01 +0000 (08:45 +0000)]
Fix makefile for TestMiThreadInfo after rL265858
The makefile was explicitly setting LDFLAGS what is breaking some rules
in the global makefile.
llvm-svn: 265920
Kuba Brecka [Mon, 11 Apr 2016 08:38:35 +0000 (08:38 +0000)]
[tsan] Replace 'not' with '%deflake' in gcd-apply-race.mm Darwin test.
llvm-svn: 265919
Benjamin Kramer [Mon, 11 Apr 2016 08:26:13 +0000 (08:26 +0000)]
Remove redundant conditions of the form (A || (!A && B)) -> (A || B)
Found by cppcheck! PR27286 PR27287 PR27288 PR27289
llvm-svn: 265918
Dmitry Polukhin [Mon, 11 Apr 2016 07:48:59 +0000 (07:48 +0000)]
[GCC] Attribute ifunc support in clang
This patch add support for GCC attribute((ifunc("resolver"))) for
targets that use ELF as object file format. In general ifunc is a
special kind of function alias with type @gnu_indirect_function. LLVM
patch http://reviews.llvm.org/D15525
Differential Revision: http://reviews.llvm.org/D15524
llvm-svn: 265917
Martin Probst [Mon, 11 Apr 2016 07:35:57 +0000 (07:35 +0000)]
clang-format: [JS] do not insert semicolons after wrapped annotations.
Reviewers: djasper
Subscribers: klimek
Differential Revision: http://reviews.llvm.org/D18943
llvm-svn: 265916
Michael Zuckerman [Mon, 11 Apr 2016 07:15:34 +0000 (07:15 +0000)]
[Clang][AVX512][BuiltIn] Adding avx512 ( vperm{i|t}2var, vpermil{var}{ps|pd}{256|512} ) builtin to clang.
Differential Revision: http://reviews.llvm.org/D18933
llvm-svn: 265915
Marshall Clow [Mon, 11 Apr 2016 03:54:53 +0000 (03:54 +0000)]
Implement LWG#680, which was missed lo these many moons ago, and was reported as bug #27259. As a drive-by fix, replace the hand-rolled equivalent to addressof in __wrap_iter with the real thing.
llvm-svn: 265914
Sanjoy Das [Sun, 10 Apr 2016 22:50:31 +0000 (22:50 +0000)]
[IndVars] Eliminate op.with.overflow when possible
Summary:
If we can prove that an op.with.overflow intrinsic does not overflow, we
can get rid of the intrinsic, and replace it with non-wrapping
arithmetic.
Reviewers: atrick, regehr
Subscribers: sanjoy, mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D18685
llvm-svn: 265913
Sanjoy Das [Sun, 10 Apr 2016 22:50:26 +0000 (22:50 +0000)]
[SCEV] See through op.with.overflow intrinsics
Summary:
This change teaches SCEV to see reduce `(extractvalue
0 (op.with.overflow X Y))` into `op X Y` (with a no-wrap tag if
possible).
Reviewers: atrick, regehr
Subscribers: mcrosier, mzolotukhin, llvm-commits
Differential Revision: http://reviews.llvm.org/D18684
llvm-svn: 265912
Davide Italiano [Sun, 10 Apr 2016 22:19:50 +0000 (22:19 +0000)]
Remove leftovers from previous linker experiments.
llvm-svn: 265911
Simon Atanasyan [Sun, 10 Apr 2016 21:48:55 +0000 (21:48 +0000)]
[ELF] Do not skip relocation scanning checking if the symbol gets dynamic COPY relocation already
It is possible that the same symbol referenced by two kinds of
relocations at the same time. The first type requires say GOT entry
creation, the second type requires dynamic copy relocation. For MIPS
targets they might be R_MIPS_GOT16 and R_MIPS_HI16 relocations. For X86
target they might be R_386_GOT32 and R_386_32 respectively.
Now LLD never creates GOT entry for a symbol if this symbol already has
related copy relocation. This patch solves this problem.
Differential Revision: http://reviews.llvm.org/D18862
llvm-svn: 265910
Mehdi Amini [Sun, 10 Apr 2016 21:07:19 +0000 (21:07 +0000)]
Plumb the option to emit the `ModuleHash` in the bitcode through the bitcode writer APIs
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 265907
Kuba Brecka [Sun, 10 Apr 2016 19:29:40 +0000 (19:29 +0000)]
Add a ThreadSanitizer testcase that tests multiple reported issues.
llvm-svn: 265906
Kuba Brecka [Sun, 10 Apr 2016 18:57:38 +0000 (18:57 +0000)]
Provide more information in ThreadSanitizer's JSON data. Move remaining TSan logic from SBThread to InstrumentationRuntime plugin.
llvm-svn: 265905
Michael Zuckerman [Sun, 10 Apr 2016 17:24:03 +0000 (17:24 +0000)]
[Clang][AVX512][BuiltIn] Adding avx512 ( vcvt ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18932
llvm-svn: 265904
Simon Pilgrim [Sun, 10 Apr 2016 17:14:26 +0000 (17:14 +0000)]
[X86][AVX512] Add vector integer division by constant tests
Added sdiv/srem and udiv/urem tests cases for 512 bit vectors.
llvm-svn: 265903
Simon Pilgrim [Sun, 10 Apr 2016 17:02:48 +0000 (17:02 +0000)]
[X86][AVX512BW] Add support for v64i8 multiplies
Extend the existing lowering of vXi8 multiplies to support v64i8 on avx512bw targets.
I added the Lower512IntArith helper function to help with this - not sure how often this could be used in the future, but it seemed better than putting all that logic inside LowerMUL.
Differential Revision: http://reviews.llvm.org/D18937
llvm-svn: 265902
Elena Demikhovsky [Sun, 10 Apr 2016 16:53:19 +0000 (16:53 +0000)]
Loop vectorization with uniform load
Vectorization cost of uniform load wasn't correctly calculated.
As a result, a simple loop that loads a uniform value wasn't vectorized.
Differential Revision: http://reviews.llvm.org/D18940
llvm-svn: 265901
Teresa Johnson [Sun, 10 Apr 2016 15:17:26 +0000 (15:17 +0000)]
[ThinLTO] Remove unused parameter (NFC)
llvm-svn: 265900
Saleem Abdulrasool [Sun, 10 Apr 2016 14:29:55 +0000 (14:29 +0000)]
Correct pg instrumentation for AArch64
It seems that there was a miscommunication between Renato and I, and the
original behaviour of AArch64 was to be preserved and not to mirror the new
behaviour. Restore the original behaviour for AArch64. Addresses post-commit
review comments from Renato Golin.
llvm-svn: 265899
Simon Pilgrim [Sun, 10 Apr 2016 14:16:03 +0000 (14:16 +0000)]
[X86][AVX512] Regenerated mask op tests
llvm-svn: 265898
Jeroen Ketema [Sun, 10 Apr 2016 13:55:53 +0000 (13:55 +0000)]
[OCaml] Expose the LLVM diagnostic handler
Differential Revision: http://reviews.llvm.org/D18891
llvm-svn: 265897
Michael Zuckerman [Sun, 10 Apr 2016 12:54:23 +0000 (12:54 +0000)]
Adding avx512 (unpck{h|l}{pd|ps}, rcp14{pd|ps}{128|256},vplzcnt{d|q} ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18931
llvm-svn: 265896
Michael Zuckerman [Sun, 10 Apr 2016 10:51:04 +0000 (10:51 +0000)]
[Clang][AVX512][BuiltIn] Adding avx512 ( store ) builtin to clang
Differential Revision: http://reviews.llvm.org/D18925
llvm-svn: 265895
Johannes Doerfert [Sun, 10 Apr 2016 09:50:10 +0000 (09:50 +0000)]
Allow pointer expressions in SCEVs again.
In r247147 we disabled pointer expressions because the IslExprBuilder did not
fully support them. This patch reintroduces them by simply treating them as
integers. The only special handling for pointers that is left detects the
comparison of two address_of operands and uses an unsigned compare.
llvm-svn: 265894
Craig Topper [Sun, 10 Apr 2016 05:39:32 +0000 (05:39 +0000)]
[X86] Use for loops over types to reduce code for setting up operation actions.
llvm-svn: 265893
Craig Topper [Sun, 10 Apr 2016 05:39:28 +0000 (05:39 +0000)]
[X86] Remove unnecessary setOperationAction for SRA v2i64/v4i64 when VLX is suppored. This is already done for SSE2/AVX2 which VLX implies. NFC
llvm-svn: 265892
Xinliang David Li [Sun, 10 Apr 2016 05:31:29 +0000 (05:31 +0000)]
Fix asan test failure
llvm-svn: 265891
Xinliang David Li [Sun, 10 Apr 2016 03:32:02 +0000 (03:32 +0000)]
[PGO] Fix deserialize bug
Raw function pointer collected by value
profile data may be from external functions
that are not instrumented. They won't have
mapping data to be used by the deserializer.
Force the value to be 0 in this case.
llvm-svn: 265890
Saleem Abdulrasool [Sun, 10 Apr 2016 03:31:09 +0000 (03:31 +0000)]
test: add additional tests for SVN r265888
Add test cases for AArch64 as well as that was changed as part of that change.
llvm-svn: 265889
Saleem Abdulrasool [Sun, 10 Apr 2016 03:19:47 +0000 (03:19 +0000)]
Add support for __gnu_mcount_nc as the pg interface
This adds support to optionally support using `__gnu_mcount_nc` as the mcount
interface rather than `mcount` for Linux and EABI. The other targets do not
provide an implementation for `__gnu_mcount_nc`. This can be activated via the
`-meabi gnu` flag.
Resolves PR23969.
llvm-svn: 265888
Xinliang David Li [Sun, 10 Apr 2016 02:35:53 +0000 (02:35 +0000)]
Clean up test case
llvm-svn: 265887
Charles Davis [Sat, 9 Apr 2016 23:34:42 +0000 (23:34 +0000)]
[CodeGen] Don't assume that fixed stack objects are aligned in a stack-realigned function.
Summary:
After we make the adjustment, we can assume that for local allocas, but
not for stack parameters, the return address, or any other fixed stack
object (which has a negative offset and therefore lies prior to the
adjusted SP).
Fixes PR26662.
Reviewers: hfinkel, qcolombet, rnk
Subscribers: rnk, llvm-commits
Differential Revision: http://reviews.llvm.org/D18471
llvm-svn: 265886
Davide Italiano [Sat, 9 Apr 2016 23:00:31 +0000 (23:00 +0000)]
[COFF] SmallVector<char, 0> -> SmallString<0>.
This way we're consistent between ELF and COFF.
llvm-svn: 265885
Johannes Doerfert [Sat, 9 Apr 2016 21:57:13 +0000 (21:57 +0000)]
[FIX] Do not allow select as a base pointer in the SCoP region
llvm-svn: 265884
Johannes Doerfert [Sat, 9 Apr 2016 21:55:58 +0000 (21:55 +0000)]
Do not allow exception handling code in SCoPs
llvm-svn: 265883
Johannes Doerfert [Sat, 9 Apr 2016 21:55:23 +0000 (21:55 +0000)]
Add __isl_give annotations to return types [NFC]
llvm-svn: 265882
Davide Italiano [Sat, 9 Apr 2016 20:32:33 +0000 (20:32 +0000)]
[MC] support TLSDESC and TLSCALL / GNU2 tls dialect
Differential Revision: http://reviews.llvm.org/D18885
llvm-svn: 265881
JF Bastien [Sat, 9 Apr 2016 20:25:02 +0000 (20:25 +0000)]
Fix hash_integer_value
Broken in D18938 because underlying_type only works for enums and not all stdlibs are sad when given a non-enum. Bots error out with 'only enumeration types have underlying types'.
There's probably a clever enable_if-ism that I can do with underlying_type and the actual integer value, but is_integral_or_enum also accepts implicit conversion so I need to ponder my life choices a bit before committing to template magic. A quick fix for now.
llvm-svn: 265880
JF Bastien [Sat, 9 Apr 2016 20:04:34 +0000 (20:04 +0000)]
is_integral_or_enum ❥ enum class ⇒ hashable enum class
Summary:
As discussed in D18775 making AtomicOrdering an enum class makes it non-hashable, which shouldn't be the case. Hashing.h defines hash_value for all is_integral_or_enum, but type_traits.h's definition of is_integral_or_enum only checks for *inplicit* conversion to integral types which leaves enum classes out and is very confusing because is_enum is true for enum classes.
This patch:
- Adds a check for is_enum when determining is_integral_or_enum.
- Explicitly converts the value parameter in hash_value to handle enum class hashing.
Note that the warning at the top of Hashing.h still applies: each execution of the program has a high probability of producing a different hash_code for a given input. Thus their values are not stable to save or persist, and should only be used during the execution for the construction of hashing datastructures.
Reviewers: dberlin, chandlerc
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D18938
llvm-svn: 265879
Saleem Abdulrasool [Sat, 9 Apr 2016 19:09:25 +0000 (19:09 +0000)]
Basic: thread TargetOptions into TargetInfo
This threads TargetOptions into the TargetInfo hierarchy. This is a rework of
the original attempt to thread additional information into the TargetInfo to
make decisions based on additional ABI related options.
llvm-svn: 265878
Manman Ren [Sat, 9 Apr 2016 18:59:48 +0000 (18:59 +0000)]
ObjC kindof: check the context when inserting methods to global pool.
To make kindof lookup work, we need to insert methods with different
context into the global pool, even though they have the same siganture.
Since diagnosis of availability is performed on the best candidate,
which is often the first candidate from the global pool, we prioritize
the methods that are unavaible or deprecated to the head of the list.
Since we now have more methods in the global pool, we need to watch
out for performance impact.
rdar://
25635831
llvm-svn: 265877
Adrian Prantl [Sat, 9 Apr 2016 18:10:22 +0000 (18:10 +0000)]
Drop debug info for DISubprograms that are not referenced by anything
This patch drops the debug info for all DISubprograms that are
(a) not attached to an llvm::Function and
(b) not indirectly reachable via inline scopes from any surviving Function and
(c) not reachable from a type (i.e.: member functions).
Background: I'm currently working on a patch to reverse the pointers
between DICompileUnit and DISubprogram (for more info check Duncan's RFC
on lazy-loading of debug info metadata
http://lists.llvm.org/pipermail/llvm-dev/2016-March/097419.html).
The idea is to remove the list of subprograms from DICompileUnit and
instead point to the owning compile unit from each DISubprogram.
After doing this all DISubprograms fulfilling the above criteria will be
implicitly dropped unless we go through an extra effort to preserve them.
http://reviews.llvm.org/D18477
<rdar://problem/
25256815>
llvm-svn: 265876
Sanjay Patel [Sat, 9 Apr 2016 16:02:52 +0000 (16:02 +0000)]
[x86] use BMI 'andn' for logic + compare ops
With BMI, we can use 'andn' to save an instruction when the result is only used in a compare.
This is related to one of the potential sequences to check 'isfinite' in:
https://llvm.org/bugs/show_bug.cgi?id=27164
Differential Revision: http://reviews.llvm.org/D18910
llvm-svn: 265875
Simon Pilgrim [Sat, 9 Apr 2016 14:51:26 +0000 (14:51 +0000)]
[X86][XOP] Support for VPPERM 2-input shuffle mask decoding
This patch adds support for decoding XOP VPPERM instruction when it represents a basic shuffle.
The mask decoding required the existing MCInstrLowering code to be updated to support binary shuffles - the implementation now matches what is done in X86InstrComments.cpp.
Differential Revision: http://reviews.llvm.org/D18441
llvm-svn: 265874
Johannes Doerfert [Sat, 9 Apr 2016 14:30:11 +0000 (14:30 +0000)]
[FIX] Do not recompute SCEVs but pass them to subfunctions
This reverts commit
2879c53e80e05497f408f21ce470d122e9f90f94.
Additionally, it adds SDiv and SRem instructions to the set of values
discovered by the findValues function even if we add the operands to
be able to recompute the SCEVs. In subfunctions we do not want to
recompute SDiv and SRem instructions but pass them instead as they
might have been created through the IslExprBuilder and are more
complicated than simple SDiv/SRem instructions in the code.
llvm-svn: 265873
Michael Kruse [Sat, 9 Apr 2016 14:09:08 +0000 (14:09 +0000)]
Fix: Always honor LLVM_LIBDIR_SUFFIX.
Static libraries where installed into "lib${LLVM_LIBDIR_SUFFIX}" while
shared ones into "lib". I found no justification for this behaviour.
This patch changes both types of libraries to be install into
"lib${LLVM_LIBDIR_SUFFIX}". LLVM and clang use the same behaviour.
This fixes llvm.org/PR27305.
llvm-svn: 265872
Craig Topper [Sat, 9 Apr 2016 06:31:02 +0000 (06:31 +0000)]
[X86] Use for loops over types to reduce code for setting up operation actions. NFC
llvm-svn: 265871
Craig Topper [Sat, 9 Apr 2016 05:53:48 +0000 (05:53 +0000)]
[X86] Remove calls to setOperationAction that set CTLZ_ZERO_UNDEF for some vector types to Expand. Expand is already set for all operations for all vector types earlier so this is redundant. NFC
llvm-svn: 265870
Oleksiy Vyalov [Sat, 9 Apr 2016 03:08:02 +0000 (03:08 +0000)]
Fix TestBreakpointSetRestart failure on Android.
llvm-svn: 265869
Nathan Wilson [Sat, 9 Apr 2016 02:55:27 +0000 (02:55 +0000)]
[Concepts] Implement subsection [dcl.spec.concept]p7 of the Concepts TS
Summary: A program shall not declare an explicit instantiation (14.8.2), an explicit specialization (14.8.3), or a partial specialization of a concept definition.
Reviewers: rsmith, hubert.reinterpretcast, faisalv, aaron.ballman
Subscribers: cfe-commits
Differential Revision: http://reviews.llvm.org/D18221
llvm-svn: 265868
Sanjoy Das [Sat, 9 Apr 2016 00:22:59 +0000 (00:22 +0000)]
Maintain calling convention when inling calls to llvm.deoptimize
The behavior here was buggy -- we'd forget the calling convention after
inlining a callsite calling llvm.deoptimize.
llvm-svn: 265867
Mike Aizatsky [Fri, 8 Apr 2016 23:32:24 +0000 (23:32 +0000)]
[libfuzzer] defensive assert
llvm-svn: 265866
Enrico Granata [Fri, 8 Apr 2016 22:49:31 +0000 (22:49 +0000)]
Remove what I believe are the last known instances of formatters that run code
llvm-svn: 265865