review.tizen.org Git - platform/upstream/mesa.git/log

anv: remove unused gfx7 code

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>

anv: remove support for gfx7/8

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>

anv: silence fedora build warning

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>

hasvk: remove mesh code

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>

hasvk: remove ray tracing code

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>

hasvk: remove acceleration structure code

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>

hasvk: stop advertising Vk 1.3 on non-softpin

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>

hasvk: remove entrypoints for gfx9+

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>

intel: add a hasvk vulkan driver

This new driver is a copy of the current Anv code, it will only load
on gfx7/8 platforms though.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>

pvr: remove image pointer from image view struct

A pointer is also stored in the base vk_image_view struct, so we can use this
one instead.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18373>

intel/pci_ids: Add dg2 0x5698 pci-id

This motherboard-down pci-id was added in kernel commit 8618b8489ba6
("drm/i915: DG2 and ATS-M device ID updates").

Ref: bspec 44477
Ref: https://patchwork.freedesktop.org/patch/msgid/20220701152231.529511-2-matthew.d.roper@intel.com
Fixes: ad565f6b70d ("intel/dev: Enable first set of DG2 PCI IDs")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18385>

radeonsi/ci: trigger radeonsi-raven-skqp for any RADV changes

Otherwise SKQP VK won't be run.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7120
Co-authored-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18316>

intel/pci_ids: Update DG2 device names

Ref: bspec 44477
Ref: https://www.intel.com/content/www/us/en/products/details/discrete-gpus/arc/arc-a-series.html
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18303>

intel/pci_ids: Update ATS-M device names

Ref: bspec 44477
Ref: https://www.intel.com/content/www/us/en/products/details/discrete-gpus/data-center-gpu/flex-series/products.html
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18303>

meson: Only draw with llvm depends on native directly
Tests, softpipe or AMD drivers don't depend on it directly

Fixes: 3955dd07 ("meson/gallium: Add an option to not use LLVM for gallium draw module")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6817

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17675>

ci/fedora: Re-enable vulkan-layers=device-select,overlay

Fixes: ace13203f30 ("ci: remove broken device-select-layer from build")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18044>

ci: Add debian-clang-release build pipeline

As the default build type is debug according to
.gitlab-ci/meson/build.sh, the specified line is:
-D buildtype=${BUILDTYPE:-debug}

So we use release for building optimized version for testing
if the compiler optimization are fine.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18044>

ci: Enable all possible meson build options for clang

By doing this to makes more code be compiled with clang and guarded by bot

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18044>

ci: Enable GALLIUM_DUMP_CPU=true only in the clang job

This is used to show the cpu caps when running unit tests.
As clang have optimization bug about util_get_cpu_caps before, so
we monitor it by using GALLIUM_DUMP_CPU=true

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18044>

ci: EXTRA_OPTIONS -> EXTRA_OPTION for debian-clang

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18044>

util: Add macro util_get_cpu_caps in u_cpu_detect.c for avoid accidentally call it in u_cpu_detect.c

Signed-off-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>

docs: document LP_NATIVE_VECTOR_WIDTH GALLIUM_OVERRIDE_CPU_CAPS GALLIUM_NOSSE LP_FORCE_SSE2

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>

llvmpipe: Enable avx512 support in llvm

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>

llvmpipe: Always using util_get_cpu_caps to get cpu caps for llvm on x86

As we can override cpu features with environment variables, so always using util_get_cpu_caps
instead llvm::sys::getHostCPUFeatures to get cpu features is a better option

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>

util: add support for detecting avx512 vector bit size

Default to 256 until we're confident llvmpipe with 512 is
as correct and not slower than 256

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>

util: Move the detect of max_vector_bits into u_cpu_detect.c

has_avx2 implies has_avx, so have no need check then both

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>

util: Add ssse3 and avx cpu caps override option

llvmpipe can use these options to testing ssse3 and avx on cpus that support for avx512

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>

util: Refactoring check_cpu_caps_override out

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>

meson: bump the minimal required llvm version to 5.0.0

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>

llvmpipe: Remove llvm version guard LLVM_VERSION_MAJOR <=> 4

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>

venus: Fix dEQP-VK.pipeline.timestamp.calibrated.host_domain_test failure

The current implementation is getting its clock value from the host
and this value is not guaranteed to be the same as the VM guest.

This commit implements the CLOCK_MONOTONIC[_RAW] natively.

Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18281>

radv: anv: Use the new vk_clock_gettime and vk_time_max_deviation
functions

Removes the duplicated code and start using the new common
code.

v2: split anv/radv parts to separate commits

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18281>

vulkan: Add vk_clock_gettime and vk_time_max_deviation

These two new function are based on {anv,radv}_clock_gettime
and some other common code between radv and anv.

These new functions allow these drivers to share code and
more drivers can use it in the future.

v2: Drop the anv/radv changes in this commit (Yiwei Zhang)
v3: Add #ifndef _WIN32

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18281>

freedreno: get cpu timestamp again after FD_TIMESTAMP

Same as commit 91a0411d2ab ("turnip: improve perfetto sync_timestamp"),
but for freedreno.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18379>

vulkan: initialize a variable

../src/vulkan/runtime/vk_fence.c: In function ‘vk_common_CreateFence’:
../src/vulkan/runtime/vk_fence.c:160:12: warning: ‘fence’ may be used uninitialized [-Wmaybe-uninitialized]
  160 |    *pFence = vk_fence_to_handle(fence);
      |    ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~
../src/vulkan/runtime/vk_fence.c:154:21: note: ‘fence’ was declared here
  154 |    struct vk_fence *fence;

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18119>

zink: don't emit illegal interpolation

this is not valid for vertex inputs or fragment outputs

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18365>

zink: don't set MUTABLE by default

this is only used by texture views, so use the same mechanism as STORAGE
to add the flag only as-needed

the mutable flag must be set before create_ivci is called for the imageview,
so zink_resource_object_init_mutable() is moved out to the callers of
zink_get_surface instead of being conveniently located in that function

fixes #7174

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18358>

zink: avoid needing mutable for z/s sampling

the aspect flags should be sufficient to determine which component the
imageview is created for, which means this can avoid changing the format
here to retain the immutable format

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18358>

zink: only add srgb mutable for images with modifiers

these are supposed to be for dmabuf handling, so checking for mutable
swapchain is both pointless and wrong

Fixes: 28ee911ad67 ("zink: handle mutable swapchain images with dmabuf")

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18358>

zink: store VkImageViewUsageCreateInfo for surface creation

this otherwise breaks surface rebinds if used since the pointer
will be a garbage stack value

cc: mesa-stable

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18358>

zink: explicitly use unsigned types for bit shifts

fixes some ubsan errors

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18358>

turnip: Enable lowering of mediump temps/CS shared to 16-bit.

In Aztec Ruins, we end up storing some big shared-mem arrays as 16-bit,
cutting shared mem size in half across many shaders while also reducing
conversions. gfxbench vk-5-normal perf +0.364983% +/- 0.189764% (n=4).

fossil-db:
Totals from 448 (2.99% of 14988) affected shaders:
MaxWaves: 6154 -> 6390 (+3.83%); split: +3.96%, -0.13%
Instrs: 174554 -> 165045 (-5.45%); split: -6.45%, +1.01%
CodeSize: 364224 -> 345558 (-5.12%); split: -6.03%, +0.90%
NOPs: 48224 -> 48024 (-0.41%); split: -3.33%, +2.91%
MOVs: 6985 -> 6104 (-12.61%); split: -19.11%, +6.50%
Full: 4577 -> 4101 (-10.40%); split: -11.08%, +0.68%
(ss): 3428 -> 3335 (-2.71%); split: -4.17%, +1.46%
(sy): 1250 -> 1205 (-3.60%); split: -4.72%, +1.12%
(ss)-stall: 14695 -> 14528 (-1.14%); split: -2.25%, +1.12%
(sy)-stall: 19565 -> 17998 (-8.01%); split: -9.55%, +1.54%
STPs: 1086 -> 870 (-19.89%)
LDPs: 162 -> 108 (-33.33%)
Cat0: 51400 -> 51120 (-0.54%); split: -3.31%, +2.76%
Cat1: 16861 -> 14688 (-12.89%); split: -18.18%, +5.30%
Cat2: 71161 -> 68454 (-3.80%); split: -4.52%, +0.72%
Cat3: 29572 -> 25306 (-14.43%); split: -14.49%, +0.06%
Cat4: 3128 -> 3131 (+0.10%)
Cat5: 1502 -> 1506 (+0.27%)
Cat6: 840 -> 750 (-10.71%)

aztec ruins is a big winner with the ldp/stp reductions. summoners_war
racks up an astounding 41% reduction in instructions and +15% max_waves.
Most affected apps show a minor win in instrs, with
fallout_shelter_online, and aztec ruins on ANGLE taking minor hits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18259>

spirv: Mark phis as mediump instead of directly lowering them to 16 bit.

This reverts commit 6f25d45877a1e1a7ac6250a7d051d33485e0cba7, replacing it
with GLSL_PRECISION_MEDIUM. The previous commit ended up not being the
right approach, as it affected only nir vars for spirv phis and not other
nir vars, and we want a tool that does both. The new
nir_lower_mediump_vars pass can do that for you.

No fossil-db change for my angle fossils run on radv.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18259>

nir: Add a pass to lower mediump temps and shared mem.

SPIRV and GLSL are reasonable at converting ALU ops to mediump, but
variable storage would be wrapped in a 2f32/2mp on store/load, and if
nir_vars_to_ssa doesn't make that storage go away then you'd have extra
conversions. For compute shader shared mem, you'd waste memory too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18259>

ail: Add unit tests for miptree layouts

The equations for calculating miptree offsets are complicated,
nonobvious, and full of subtle footguns. Worse, the driver doesn't
control the offsets -- it must simply agree with the offsets
implicitly calculated in the hardware. The CTS doesn't adequately
exercise all the corner cases. Make sure we have unit tests that do.

The tests themselves are generated by instrumenting agxdecode to scan
GPU memory after uploading test patterns in a variety of layout with a
Metal application.

Thank you to Asahi Lina and Dougall Johnson for the reverse-engineering
that led to this. The tests selected here are a subset of those used for
the reverse-engineering. The full set may be found in Lina's tilecalc
repo:

https://github.com/asahilina/tilecalc

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

asahi: Rename our fake twiddled DRM modifier

To account for non-64x64 tile sizes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

asahi: Advertise ASTC formats

Now that we have layout and tiling code that can handle block-compressed
formats, including the non-square blocks found with some ASTC formats,
we can advertise ASTC formats. Passes dEQP-GLES3.*astc* which
exercises everything here. (These tests passed before by decompressing
the textures to RGBA8 UNORM in the frontend, but it's much more
efficient to use real ASTC textures as done here.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

asahi: Advertise ETC1

ETC2 is backwards compatible with ETC1, we just need to declare the
format mapping.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

asahi: Fix is_format_supported returns

Gallium can test multiple binds at once, we need to return the logical
AND, not the OR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

asahi: Handle 2-channel sRGB textures

I'm not sure why we need to set this magic bit, but this fixes the
non-depth_component portion of
dEQP-GLES3.functional.texture.format.sized.*, e.g

dEQP-GLES3.functional.texture.format.sized.cube.srgb_rg8_pot

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

ail: Rewrite tiled memcpy for correctness

Move tiling.c into ail, using ail data structures and helpers to manage
the tiling. This fixes a staggering number of issues with the tiling
routines:

* NPOT block sizes defeatured. The hardware only supports POT block
  sizes. There's no need to handle anything else.

* Use ail to determine tile sizes, instead of the broken
  agx_select_tile_shift routine that didn't work for non-square tile
  sizes (for instance).

* Handle up to 128x128 tiles, as required by 8bpp textures.

* Handle non-square tiles. If the block size is not a multiple of 4, the
  tile size will be of the form 2n x n. This is easy with the ail_tile
  data structure, but not possible architecturally with
  agx_select_tile_shift. This is required for 16bpp and 64bpp textures.

* Express in terms of elements instead of pixels, using unit
  suffixes to make the dimensional analysis obvious. In particular this
  handles tiling of block-compressed textures by tiling the blocks
  themselves. This is required for block-compressed textures (internally handled
  like smaller 64bpp textures).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

ail: Introduce image layout module

Introduce ail, a small library for working with the image (and buffer)
layouts encountered with AGX hardware. Its design is inspired by isl. In
particular, ail strives to use isl unit suffixes and to represent
quantities in a canonical, API-agnostic fashion [1].

ail replaces the old miptree code (based on some ad hoc heuristics that
passed a few dEQP tests). It is based on a thorough reverse-engineering
of AGX's twiddled format, courtesy of Asahi Lina, Dougall Johnson, and
me. This corrects our handling of many common cases that were totally
wrong in the old code, leading to GPU faults.

Unlike the code, ail differentiates between pixels and elements
consistently, allowing block-compressed formats like ETC2 to be
supported correctly. These formats will be enabled later in the series.

This commit fixes Inochi2D, glmark2 -brefract and -bterrain, and who
knows what else.

ail stands for { Asahi, AGX } Image { Layout, Library } at your
convenience. ail is best served warm.

Liberal use of ail is recommended. Yum!

[1] https://docs.mesa3d.org/isl/units.html

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

asahi: Fix ASTC enums

The ASTC enum only encodes the block width/height. By contrast the
LDR/HDR/sRGB distinction is encoded as UNORM/Float and via the sRGB bit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

asahi: Fix bind sizes

Otherwise we get a nonsensical count of 129 in one Metal sample. Exact
size still not known but this bounds somewhat.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

asahi: Add XML for multisampled textures

Metal supports MSAA 2x and MSAA 4x, neither at the same time as
mipmapping. That matches the GL spec requirement.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

asahi: Rename 'tiled 64x64' to 'twiddled'

To account for non-64x64 tile sizes, as well as the other forms of
tiling that may come up with compression.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

asahi: Identify compressed render target fields

We won't be implementing AGX compression for a while, but this gets some
unknowns out of the way when looking at dumps from Metal that use it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

docs/asahi: Document image layouts

There are many subtleties to laying out twiddled images on AGX. Document
the known ones in a central place. Many of the hairy details of
twiddling were discovered by Asahi Lina and Dougall Johnson, many thanks
to them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>

zink: check the variable mode before taking samplemask path in ntv

this otherwise may break for function temps

cc: mesa-stable

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18375>

zink: don't emit entrypoints for function temp variables

UNASSIGNED-CoreValidation-Shader-InconsistentSpirv(ERROR / SPEC): msgNum: 7060244 - Validation Error: [ UNASSIGNED-CoreValidation-Shader-InconsistentSpirv ] Object 0: handle = 0x3c8a1d0, type = VK_OBJECT_TYPE_DEVICE; | MessageID = 0x6bbb14 | SPIR-V module not valid: OpEntryPoint interfaces should only list global variables

cc: mesa-stable

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18375>

pan/bi: Assert that vectors are sufficiently small

There is a limit to how vector widths (eg due to RA), larger vectors should be
broken up in NIR so we shouldn't ever see such vectors.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17220>

pan/bi: Implement nir_op_vec8 and nir_op_vec16

These are used with OpenCL, particularly with 8-bit types. Luckily, they are
pretty easy to implement with our existing infrastructure. We just need to hit
backspace enough times and we're good to go.

Fixes a subtest of test_basic hiloeo.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17220>

pan/va: Handle 8-bit lane when lowering constants

We need to be careful to ensure the output of constant lowering still selects a
single lane, otherwise we lower something like:

44 = MKVEC.v2i8 43.b1, #0x0.b0, #0x0

to

44 = MKVEC.v2i8 24.b1, u256, u256

which loses the .b0 swizzle, and thus renders the MKVEC.v2i8 unable to pack.
Similarly, we need to allow zero-extension with fields marked "lane". Currently
only MKVEC.v2i8 hits this path, as the other instructions using "lane"
modifiers are unary and therefore will have been constant folded.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17220>

pan/bi: Implement general 8-bit vector construction

Refactor the 16-bit vector construction code to separate the collect of separate
32-bit words from the construction of single 32-bit vectors from sub-32-bit
parts. Then add a path to combine (up to 4) bytes into a 32-bit word using
Valhall's MKVEC.v2i8 instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17220>

vulkan,docs: Add documentation Vulkan command pools

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

lvp: Move to the common command pool framework

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

tu: Move to the common command pool framework

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

radv: Move to the common command pool framework

Now the common code support reuse, port radv over to using it.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

vulkan: Recycle command buffers in vk_command_pool

This is similar to what RADV and several other drivers have been doing
for quite some time. It's good to have it common.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

vulkan: Add a common vkAllocateCommandBuffers() implementation

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

vulkan: Add a common vkResetCommandBuffer() implementation

This is little more than a wrapper around a function pointer at present
so it doesn't really gain the driver much to use it. The new callback
will, however, be put to good use in the next commit.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

vulkan: Add a vk_command_buffer_ops struct

This is the standard pattern in the kernel for providing vfunc tables
for C objects. We're using it in the pipeline cache code but we're
about to start adding more stuff and so it really helps if we have it
for command buffers as well.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

vulkan: Re-order arguments to vk_command_buffer_init

Most other init functions follow the Vulkan API convention of putting
the parent object first.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

vulkan: Re-order arguments to vk_command_pool_init

Most other init functions follow the Vulkan API convention of putting
the parent object first.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

vulkan: Add a concept of recycling an object

This is not necessarily a full re-initialization of the object but is
whatever is necessary/expedient for the client to see it as a new object
and not the one it has seen before. For vk_base_object, this removes
any private data and resets the object name to NULL.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>

turnip: add some cpu tracepionts

Add tracepoints for pipeline creations and queue submits.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18262>

vulkan/wsi: add cpu tracepoints for internal waits

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18262>

vulkan/wsi: add cpu tracepoints to swapchain functions

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18262>

tu/lrz: Fix multiple depth attachment case with secondaries

This is a counterpart to the previous commit. When we have multiple
depth attachments, in the secondary we currently don't disable LRZ and
so we may need a valid LRZ fast-clear base.

Fixes: 4b5f0d98 ("tu: Overhaul LRZ, implement on-GPU dir tracking and LRZ fast-clear")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18369>

tu/lrz: Fix multiple subpass case with secondaries

In
dEQP-VK.renderpass.dedicated_allocation.attachment_allocation.input_output.94
we have the following:

- There is more than one subpass, but only one depth attachment.
- The first subpass doesn't use depth.
- The subpass that does use depth has a draw call in a secondary.

We wouldn't hit the case where there's more than one depth attachment,
but because tu_begin_resumed_renderpass() only looked at the first
subpass it wouldn't find the depth attachment and would leave LRZ
invalid and thus a NULL LRZ fast-clear base. Then
tu_begin_secondary_cmdbuf() would leave LRZ enabled and the draw would
have LRZ enabled, leading to a hang.

Fix this by making tu_begin_resumed_renderpass() match
tu_begin_renderpass() with how it finds the depth attachment.

Fixes: 4b5f0d98 ("tu: Overhaul LRZ, implement on-GPU dir tracking and LRZ fast-clear")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18369>

radv: constify radv_shader_info where it's missing

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: determine as_ls/as_es in radv_link_shaders_info()

This is a link shader info step somehow.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: remove unused parameters in radv_fill_shader_info()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: add and use a helper that merges shader info for merged stages on GFX9+

It looks much cleaner and it's pretty small.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: cleanup computing the workgroup size for all stages

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: simplify determining if NGG passthrough can be enabled

NGG can't be enabled with XFB, so this check is redundant now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: move determining other NGG settings in radv_link_shaders_info()

At least, everything is at the same place now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: refactor radv_nir_shader_info_link()

To use the similar producer/consumer logic we do when linking shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: move computing NGG info and GS info to radv_nir_shader_info_link()

It's a link step somehow, except for VS only on GFX10+ but keep it
there anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: move computing wave_size/ballot_bit_size to the shader info pass

NGG helpers need to know this information.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: cleanup helpers that compute NGG info and GS info on GFX9+

Before moving them to the shader info link step.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: stop setting esgs_itemsize to the GS stage

It's never read.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: stop setting num_tess_patches for the GS stage

It's never read.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: stop setting as_es for the GS stage

This doesn't make sense and it was assigned because the shader info
stuff was a complete mess.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: stop setting as_ls for the TCS stage

This doesn't make sense and it was assigned because the shader info
stuff was a complete mess. LS is only a thing on GFX6-8, on GFX9+
it's a merged VS+TCS to HS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

aco: remove unused isel_context::tcs_num_patches

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18278>

radv: fix bogus assertion with RADV_FORCE_VRS

It supports VS, TES and GS.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18345>

radv: Free geometry infos in radv_CmdBuildAccelerationStructuresKHR

Fixes: 97ffaea5 ("radv: Add Radeon Raytracing Analyzer capturing layer")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18370>

radv: Use radv_CmdUpdateBuffer instead of radv_update_buffer_cp for geometry info writes

This fixes some hangs and avoids an assert if geometry infos are bigger than 1KB.

Fixes: 97ffaea5 ("radv: Add Radeon Raytracing Analyzer capturing layer")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18370>