Rainer Orth [Mon, 6 Feb 2023 08:30:36 +0000 (09:30 +0100)]
[Release] Increase test-release.sh verbosity
`test-release.sh` is too silent in some cases:
- Only the build proper is run verbosely, but `check-all` is not.
- `lit` is run without `-v`, so in case of failures one cannot see what's
actually wrong.
This patch fixes both issues, running all `${MAKE}` invocations with
`$Verbose` (except for `${MAKE} install` where it would only add noise),
and running `lit` with `-v`.
Tested on `x86_64-pc-linux-gnu` and `arm64-apple-darwin21.6`.
Differential Revision: https://reviews.llvm.org/D143249
Jean Perier [Mon, 6 Feb 2023 07:53:57 +0000 (08:53 +0100)]
[flang][hlfir] Lower asInquired intrinsic arguments
Differential Revision: https://reviews.llvm.org/D143272
Jean Perier [Mon, 6 Feb 2023 07:51:56 +0000 (08:51 +0100)]
[flang][hlfir] Turn fir.char<1> results into hlfir.expr<fir.char<1>>
This gets rid of a special case with CHAR() intrinsic and BIND(C) results.
I tested this has no impact on the LLVM assembly when LLVM opt -01 or
more is run.
See comment in the patch for more details.
Differential Revision: https://reviews.llvm.org/D143270
Craig Topper [Mon, 6 Feb 2023 07:12:22 +0000 (23:12 -0800)]
[RISCV] Use uint32_t intead of uint64_t for instruction fields in RISCVDisassembler.cpp. NFC
The tablegen generated code is templated based on the type of Insn
passed to decodeInstruction which is currently uint32_t. All of the
fields extracted will this type.
Craig Topper [Mon, 6 Feb 2023 06:42:57 +0000 (22:42 -0800)]
[RISCV] Simplify some code in RISCVDisassembler. NFC
Create X0 register directly instead of passing 0 to DecodeGPRRegisterClass.
Ruiling Song [Thu, 2 Feb 2023 05:59:59 +0000 (13:59 +0800)]
AMDGPU: Mark control flow intrinsics non-duplicable
This is used to help get simplified CFG for divergent regions as well as
get better code generation in some cases.
For example, with below IR:
```
define amdgpu_kernel void @test() {
bb:
br label %bb1
bb1:
%tmp = phi i32 [ 0, %bb ], [ %tmp5, %bb4 ]
%tid = call i32 @llvm.amdgcn.workitem.id.x()
%cnd = icmp eq i32 %tid, 0
br i1 %cnd, label %bb4, label %bb2
bb2:
%tmp3 = add nsw i32 %tmp, 1
br label %bb4
bb4:
%tmp5 = phi i32 [ %tmp3, %bb2 ], [ %tmp, %bb1 ]
store volatile i32 %tmp5, ptr addrspace(1) undef
br label %bb1
}
```
We got below assembly before the change:
```
v_mov_b32_e32 v1, 0
v_cmp_eq_u32_e32 vcc, 0, v0
s_branch .LBB0_2
.LBB0_1: ; %bb4
; in Loop: Header=BB0_2 Depth=1
s_mov_b32 s2, -1
s_mov_b32 s3, 0xf000
buffer_store_dword v1, off, s[0:3], 0
s_waitcnt vmcnt(0)
.LBB0_2: ; %bb
; =>This Inner Loop Header: Depth=1
s_and_saveexec_b64 s[0:1], vcc
s_xor_b64 s[0:1], exec, s[0:1]
; kill: def $sgpr0_sgpr1 killed $sgpr0_sgpr1 killed $exec
s_cbranch_execnz .LBB0_1
; %bb.3: ; %bb2
; in Loop: Header=BB0_2 Depth=1
s_or_b64 exec, exec, s[0:1]
s_waitcnt expcnt(0)
v_add_i32_e64 v1, s[0:1], 1, v1
s_branch .LBB0_1
```
After the change:
```
s_mov_b32 s0, 0
v_cmp_eq_u32_e32 vcc, 0, v0
s_mov_b32 s2, -1
s_mov_b32 s3, 0xf000
v_mov_b32_e32 v0, s0
s_branch .LBB0_2
.LBB0_1: ; %bb4
; in Loop: Header=BB0_2 Depth=1
buffer_store_dword v0, off, s[0:3], 0
s_waitcnt vmcnt(0)
.LBB0_2: ; %bb1
; =>This Inner Loop Header: Depth=1
s_and_saveexec_b64 s[0:1], vcc
s_cbranch_execnz .LBB0_1
; %bb.3: ; %bb2
; in Loop: Header=BB0_2 Depth=1
s_or_b64 exec, exec, s[0:1]
s_waitcnt expcnt(0)
v_add_i32_e64 v0, s[0:1], 1, v0
s_branch .LBB0_1
```
We are using one less VGPR, one less s_xor_, and better LICM with one
additional branch after the change. Please note the experiment
was done with reverting the workaround D139780, as it will stop the
tail-duplication completely for this case.
Reviewed by: arsenm
Differential Revision: https://reviews.llvm.org/D118250
Adrian Kuegel [Mon, 6 Feb 2023 07:02:28 +0000 (08:02 +0100)]
[mlir] Use mlir::TypedValue to avoid compiler bug in MSVC.
Kazu Hirata [Mon, 6 Feb 2023 06:45:46 +0000 (22:45 -0800)]
Revert "[lldb] Fix warning about unhandled enum value `WasmExternRef` (NFC)."
This reverts commit
b27e4f72213e78cacf0ce5bfd127261ec0b9309b.
bccf5999d38f14552f449618c1d72d18613f4285 necessitates this revert.
Vitaly Buka [Mon, 6 Feb 2023 05:26:19 +0000 (21:26 -0800)]
Revert "[clang][WebAssembly] Initial support for reference type externref in clang"
Very likely breaks stage 3 of msan build bot.
Good:
764c88a50ac76a2df2d051a0eb5badc6867aabb6 https://lab.llvm.org/buildbot/#/builders/74/builds/17058
Looks unrelated:
48b5a06dfcab12cf093a1a3df42cb5b684e2be4c
Bad:
48b5a06dfcab12cf093a1a3df42cb5b684e2be4c https://lab.llvm.org/buildbot/#/builders/74/builds/17059
This reverts commit
eb66833d19573df97034a81279eda31b8d19815b.
Ganesh Gopalasubramanian [Mon, 6 Feb 2023 04:16:12 +0000 (09:46 +0530)]
[X86] Add RMPQUERY to SNP instructions
Add RMPQUERY to the list of SNP instructions.
Tech Documentation: https://www.amd.com/system/files/TechDocs/24594.pdf
Reviewed By: RKSimon, craig.topper
Differential Revision: https://reviews.llvm.org/D141458
Siva Chandra Reddy [Tue, 10 Jan 2023 08:01:51 +0000 (08:01 +0000)]
[bootstrap build] Add libc-hdrgen as a build dep for libc bootstrap build.
With this change, libc-hdrgen is built like a host build tool like clang and used
to build libc for the target.
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D141460
Craig Topper [Mon, 6 Feb 2023 01:36:03 +0000 (17:36 -0800)]
[RISCV] Use decodeSImmNonZeroOperand for simm6nonzero and decodeUImmNonZeroOperand for uimmlog2xlennonzero.
Roland McGrath [Mon, 6 Feb 2023 02:15:10 +0000 (18:15 -0800)]
[RISCV] Default to -fsanitize=shadow-call-stack for Fuchsia
The ShadowCallStack is the preferred and default ABI for Fuchsia.
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D143357
Petr Hosek [Mon, 6 Feb 2023 02:47:31 +0000 (02:47 +0000)]
Revert "[CMake] Support runtimes targets without specifying triple"
This reverts commit
e6975c4ced27fe93945393603df79557aeb23d83 since it
broke the bootstrapping build on Windows.
Roland McGrath [Mon, 6 Feb 2023 02:29:55 +0000 (18:29 -0800)]
[RISCV] Default to -ffixed-x18 for Fuchsia
Fuchsia's ABI always reserves the x18 (s2) register for the
ShadowCallStack ABI, even when -fsanitize=shadow-call-stack is
not enabled.
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D143355
Roland McGrath [Mon, 6 Feb 2023 02:09:20 +0000 (18:09 -0800)]
[RISCV] Use OS-specific stack-guard ABI for Fuchsia
Fuchsia provides a slot relative to tp for the stack-guard value,
which is cheaper to materialize than the default GOT load.
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D143353
Fangrui Song [Mon, 6 Feb 2023 02:26:07 +0000 (18:26 -0800)]
[RISCV] clang-format #include. NFC
sstwcw [Mon, 6 Feb 2023 00:57:03 +0000 (00:57 +0000)]
[clang-format] Recognize Verilog non-blocking assignment
Reviewed By: HazardyKnusperkeks, owenpan
Differential Revision: https://reviews.llvm.org/D142891
Fangrui Song [Mon, 6 Feb 2023 00:34:22 +0000 (16:34 -0800)]
[docs] Replace deprecated -target with --target=
Rahul Kayaith [Sun, 5 Feb 2023 23:57:50 +0000 (18:57 -0500)]
[flang] Fix driver option tests after
90094ab8
David Turner [Sun, 5 Feb 2023 21:19:11 +0000 (13:19 -0800)]
[clang-format] Fix inconsistent annotation of operator&
Token annotator incorrectly annotates operator& as a reference type in
situations like Boost serialization archives:
https://www.boost.org/doc/libs/1_81_0/libs/serialization/doc/tutorial.html
Add annotation rules for standalone and chained operator& instances while
preserving behavior for reference declarations at class scope. Add tests to
validate annotation and formatting behavior.
Differential Revision: https://reviews.llvm.org/D141959
David Green [Sun, 5 Feb 2023 20:59:49 +0000 (20:59 +0000)]
[ARM] Remove FlattenVectorShuffle and add PerformVQDMULHCombine.
This removes the FlattenVectorShuffle that folds shuffles through certain
binops. This is now handled by generic DAG combines for all but ARMISD::VQDMULH
where a PerformVQDMULHCombine is added to compensate. It pushes identical
shuffles down through the operation, in a similar way to the other combines in
DAG.
Craig Topper [Sun, 5 Feb 2023 20:31:36 +0000 (12:31 -0800)]
[RISCV] Fix bug where C_ADDI_HINT_IMM_ZERO was incorrectly disassembled as C_ADDI.
And was then printed as 'mv'.
Stanislav Mekhanoshin [Fri, 3 Feb 2023 23:21:31 +0000 (15:21 -0800)]
[AMDGPU] Fix liveness in the SIOptimizeExecMaskingPreRA.cpp
If a condition register def happens past the newly created use
we do not properly update LIS. It has two problems:
1) We do not extend defining segment to the end of its block
marking it a live-out (this is regression after
https://reviews.llvm.org/rG09d38dd7704a52e8ad2d5f8f39aaeccf107f4c56)
2) We do not extend use segment to the beginning of the use block
marking it a live-in.
Fixes: SWDEV-379563
Differential Revision: https://reviews.llvm.org/D143302
Simon Pilgrim [Sun, 5 Feb 2023 20:16:32 +0000 (20:16 +0000)]
[X86] combineX86ShufflesRecursively - peek through free extract_subvector nodes
If we're shuffling an op that is extracted from the lowest subvector of a larger vector then we should try to peek through as much as possible without exceeding the root size
Another step towards removing the widenSubVector call from combineX86ShufflesRecursively (Issue #45319)
Simon Pilgrim [Sun, 5 Feb 2023 19:21:40 +0000 (19:21 +0000)]
[SLP] Use allConstant helper. NFCI.
Fangrui Song [Sun, 5 Feb 2023 18:46:43 +0000 (10:46 -0800)]
[AArch64] Unconditionally use DW_EH_PE_indirect|DW_EH_PE_pcrel personality/lsda/ttype encodings
For -fno-pic, without DW_EH_PE_indirect, the personality routine pointer in a
CIE needs an R_AARCH64_ABS64 relocation. In common configurations that
`__gcc_personality_v0` is defined in a shared object, this will lead to a
discouraged canonical PLT entry, or, if `ld.lld -z notext` (betwen D122459 and
D143136), a dynamic R_AARCH64_ABS64 relocation with an incorrect offset:
https://github.com/llvm/llvm-project/issues/60392
Since GCC uses DW_EH_PE_indirect for -fno-pic code (the behavior hasn't changed
since the initial port in 2012), let's follow suit by simplifying the code.
(
For tiny and small code models, we use DW_EH_PE_sdata8 instead of GCC's
DW_EH_PE_sdata4. This is a deliberate choice to support personality-.eh_frame
offset > 2GiB. This is unneeded for small code model since "Max text segment
size < 2GiB" but making `-fno-pic -mcmodel={tiny,small}` different seems
unnecessary: the scenarios that uses both -fno-pic and C++ exceptions have been
increasingly rare now, so there is little advantage optimizing for the little
size saving with code complexity.
)
---
Two clang/test/Interpreter tests would fail without
6747fc07d1aa94e22622e278e5a02ba70675ac9b
([ORC] Use JITLink as the default linker for LLJIT on Linux/arm64.)
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D143039
Fangrui Song [Sun, 5 Feb 2023 18:29:58 +0000 (10:29 -0800)]
[Driver] Add -mllvm= as an alias for -mllvm
Similar to D131455 (-Xclang=). As well as making it convenient for some build
systems, this allows `-Xarch_device '-mllvm=--inline-threshold=100'` (and
`-Xarch_host`; so we don't need to allow space separators which are uncommon in
driver code).
Bear in mind that -mllvm options are unstable and should be avoided if possible.
Reviewed By: jhuber6, yaxunl
Differential Revision: https://reviews.llvm.org/D143325
Matt Arsenault [Tue, 31 Jan 2023 18:23:56 +0000 (14:23 -0400)]
DAG: Fix broken lowering of is.fplcass fcZero with DAZ
is.fpclass x, fcZero is not equivalent to fcmp with 0 if
denormals are treated as 0. It would be equivalent to fcZero|fcSubnormal
which can be done separately; this is the minimal correctness fix.
The same optimization was not ported to the GlobalISel version.
Matt Arsenault [Sun, 11 Dec 2022 21:43:46 +0000 (16:43 -0500)]
InstCombine: Fold is.fpclass (fabs x), mask -> is.fpclass x, (fabs mask)
Matt Arsenault [Sun, 11 Dec 2022 20:23:26 +0000 (15:23 -0500)]
InstCombine: Fold is.fpclass (fneg x) into the test mask
Matt Arsenault [Thu, 17 Nov 2022 04:51:40 +0000 (20:51 -0800)]
InstCombine: Fold out is_fpclass inf checks from test mask for known finite sources
Make the partner transform already done for nnan sources.
Simon Pilgrim [Sun, 5 Feb 2023 13:07:20 +0000 (13:07 +0000)]
[X86] combineINSERT_SUBVECTOR - fold (insert_subvector X, (insert_subvector undef, Y, 0), Idx) -> (insert_subvector X, Y, Idx)
Helps some shuffle combines that do a poor job of peeking through (insert_subvector undef, Y, 0) vector widening patterns
Matt Arsenault [Fri, 11 Nov 2022 00:15:34 +0000 (16:15 -0800)]
InstCombine: Perform basic isnan combines on llvm.is.fpclass
is.fpclass(x, qnan|snan) -> fcmp uno x, 0.0
is.fpclass(nnan x, qnan|snan|other) -> is.fpclass(x, other)
Start porting the existing combines from llvm.amdgcn.class to the
generic intrinsic. Start with the ones which aren't dependent on the
FP mode.
Paul Walker [Sun, 15 Jan 2023 15:21:20 +0000 (15:21 +0000)]
[SVE][Builtins] Lower X forms of binop arithmetic builtins to dedicated intrinsics.
This patch changes the lowering for the following builtins to emit
calls to the new aarch64.sve.###.u intrinsics.
svabd_x
svabd_n_x
svadd_x
svadd_n_x
svasr_x
svasr_n_x
svdiv_x
svdiv_n_x
svdivr_x
svdivr_n_x
svlsl_x
svlsl_n_x
svlsr_x
svlsr_n_x
svmax_x
svmax_n_x
svmin_x
svmin_n_x
svmul_x
svmul_n_x
svmulh_x
svmulh_n_x
svsub_x
svsub_n_x
svsubr_x
svsubr_n_x
Depends on D141938
Differential Revision: https://reviews.llvm.org/D141939
Matt Arsenault [Tue, 6 Dec 2022 14:16:27 +0000 (09:16 -0500)]
LangRef: Clarify behavior of llvm.is.fpclass with "denormal-fp-math"
This does not read canonicalized values, which matches the behavior of
the basic DAG expansion using integer operations. There is a buggy
expansion using FP-operations if legal which needs to be adjusted to
account for this. We need to be aware of the denormal mode to switch
between is.fpclass calls and fcmp.
There's no real spec for denormal handling anywhere, but I believe
this is the most harmonious way to deal with the question considering
the requirement to not quiet input signaling nans.
This matches the behavior of MSVC's _fpclass and AMDGPU's
v_cmp_class_f32. fpclassify currently does not use this, and has
inconsistent behavior for denormals under DAZ on different platforms
(i.e. clang and gcc report FP_ZERO return FP_ZERO for a denormal under
DAZ, MSVC reports FP_SUBNORMAL).
Matt Arsenault [Thu, 5 Jan 2023 16:00:35 +0000 (11:00 -0500)]
IROutliner: Fix another assert with non-0 alloca addrspaces
Code is inserting an addrspacecast it shouldn't be, but
that's a separate CodeExtractor bug.
This also stops caring about typed pointers.
David Green [Sun, 5 Feb 2023 10:28:54 +0000 (10:28 +0000)]
[DAG] Add visitABD optimizations
This adds basic a visitABD to optimize ABDS and ABDU nodes, similar to the
existing visitAVG method.
The fold I was initially interested in was folding shuffles though the binop.
This also:
- Marks ABDS and ABDU as commutative binops (https://alive2.llvm.org/ce/z/oCDogb
and https://alive2.llvm.org/ce/z/7zrs86).
- Add reassociative folds.
- Add constant folding using max(x,y)-min(x,y)
- Canonicalizes constants to the RHS
- Folds abds x, 0 -> abs(x) (https://alive2.llvm.org/ce/z/4ZEibv)
- Folds abdu x, 0 -> x (https://alive2.llvm.org/ce/z/J_rKqx)
- Folds abd x, undef -> 0 (https://alive2.llvm.org/ce/z/NV6Nsv and
https://alive2.llvm.org/ce/z/vs92hu).
Differential Revision: https://reviews.llvm.org/D143193
Jonas Hahnfeld [Tue, 24 Jan 2023 09:54:55 +0000 (10:54 +0100)]
[ORC] Drop Comdat when discarding IR symbol
According to the IR verifier, "Declaration[s] may not be in a Comdat!"
This is a re-commit of
76b3f0b4d5a0b8c54147c4c73a30892bbca76467 and
87d7838202267a011639fcbf97263556ccf091dc with updates to the test:
* Force emission of the extra-module, to trigger the bug after D138264,
by providing a second symbol @g, and making the comdat nodeduplicate.
(Technically only one is needed, but two should be safer.)
* Name the comdat $f to avoid failure on Windows:
LLVM ERROR: Associative COMDAT symbol 'c' does not exist.
* Mark the test as UNSUPPORTED on macOS, MachO doesn't support COMDATs.
Differential Revision: https://reviews.llvm.org/D142443
Simon Pilgrim [Sun, 5 Feb 2023 09:38:15 +0000 (09:38 +0000)]
[AArch64] AArch64ExpandImm.cpp - fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFC.
Matt Arsenault [Thu, 26 Jan 2023 00:46:44 +0000 (20:46 -0400)]
AMDGPU: Ensure flat loads are broken into dword in functions
We were assuming we could rely on the flat scratch init detection
to imply if there are possible flat addressed stack objects, which
doesn't work outside of a kernel. We should have a way to prove
if a given flat access can't access the stack.
We could use a not-stack parameter attribute to avoid
these splits.
Make the minimally correct change for GlobalISel; I'll address
this better in my larger patch to rewrite load and store legalization.
Fixes: SWDEV-218237
Lang Hames [Sun, 5 Feb 2023 03:36:40 +0000 (03:36 +0000)]
[ORC] Use JITLink as the default linker for LLJIT on Linux/arm64.
Also updates the OrcCAPIsTest unit test to enable the C API tests on Linux.
Owen Anderson [Wed, 4 Jan 2023 06:23:31 +0000 (23:23 -0700)]
Teach the AArch64 backend to materialize immediates using a pair of ORR-immediate
instructions.
Credit to czwarich for figuring out the algorithm to test for this.
Re-applied with fix for ubsan error on out-of-range shift.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D140952
Owen Anderson [Sun, 5 Feb 2023 04:13:31 +0000 (22:13 -0600)]
Revert "Teach the AArch64 backend to materialize immediates using a pair of ORR-immediate"
This reverts commit
8d433a0ae55ac25ba0a77d733e1ee5e23d1eb9f7 due to test failures on
CodeGen/AArch64/GlobalISel/store-merging.ll
Petr Hosek [Sun, 5 Feb 2023 02:43:54 +0000 (02:43 +0000)]
[CMake] Process components and install targets separately
This addresses issue introduced accidentally in D117263.
Owen Anderson [Wed, 4 Jan 2023 06:23:31 +0000 (23:23 -0700)]
Teach the AArch64 backend to materialize immediates using a pair of ORR-immediate
instructions.
Credit to czwarich for figuring out the algorithm to test for this.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D140952
Craig Topper [Sun, 5 Feb 2023 01:31:37 +0000 (17:31 -0800)]
[RISCV] Move all isel cases for ISD::ConstantFP into RISCVDAGToDAGISel::Select.
After D142953, non-zero cases were handled in RISCVDAGToDAGISel::Select
and zeros were handled with isel patterns. The zeros cases are
sufficiently similar to zero that we might as well handle them all
together. We already needed to detect the cases to skip out to
tablegen.
Craig Topper [Sat, 4 Feb 2023 21:35:58 +0000 (13:35 -0800)]
[RISCV] Fix crash splatting f64 -0.0 into a vector on RV32 after D142953.
For RV32, we now use scalar fcvt of x0, scalar fneg, splat scalar fp to vector.
For RV64, we use li of 1, slli by 63, splat GPR to vector.
Craig Topper [Sat, 4 Feb 2023 21:14:51 +0000 (13:14 -0800)]
[RISCV] Make selectImm return SDValue instead of SDNode*.
This avoids multiple places needing to convert it to SDValue. It's
simpler to convert it to SDNode * in the places that need it.
Craig Topper [Sat, 4 Feb 2023 21:01:21 +0000 (13:01 -0800)]
[RISCV] Replace condition that should alwasy be true with an assert. NFC
Craig Topper [Sat, 4 Feb 2023 20:50:02 +0000 (12:50 -0800)]
[RISCV] Use MVT enum directly instead of converting to bit width. NFC
Craig Topper [Sat, 4 Feb 2023 20:38:19 +0000 (12:38 -0800)]
[RISCV] Remove fimmneg0 patterns that were replaced by D142953.
Nikolas Klauser [Thu, 2 Feb 2023 11:12:28 +0000 (12:12 +0100)]
[libc++][NFC] Rename _LIBCPP_EXPLICIT_AFTER_CXX11 to _LIBCPP_EXPLICIT_SINCE_CXX14
We renamed the `_LIBCPP_CONSTEXPR_` a while ago. This matches the change for `_LIBCPP_EXPLICIT_`.
Reviewed By: Mordante, #libc
Spies: libcxx-commits
Differential Revision: https://reviews.llvm.org/D143165
Nikolas Klauser [Thu, 2 Feb 2023 11:06:35 +0000 (12:06 +0100)]
[libc++][NFC] Rename _LIBCPP_NO_RTTI to _LIBCPP_HAS_NO_RTTI
Other macros that disable parts of the library are named `_LIBCPP_HAS_NO_WHATEVER`.
Reviewed By: ldionne, Mordante, #libc
Spies: libcxx-commits
Differential Revision: https://reviews.llvm.org/D143164
Petr Hosek [Wed, 30 Jun 2021 06:34:18 +0000 (23:34 -0700)]
[CMake] Support runtimes targets without specifying triple
Currently, for BUILTIN_TARGETS and RUNTIME_TARGETS you can either use
the special "default" value, or a target triple.
For the "default" value, we don't set any target triple and passthrough
a subset of CMake variables into the subbuild. This is typically used
on Darwin where we build universal binaries and a single target triple
therefore isn't sufficient.
For the target triple value, you can set arbitrary CMake variables
through RUNTIMES_<target>_<variable>, but we always set target triple
to <target>. This gives more flexibility, because we can precisely
control what variables are set in the subbuild, but is unsuitable for
platforms like Darwin.
To address this, we would like to introduce a third option which is
similar to the second option, except we won't set target triple in
the subbuild (you can always do so yourself by setting the appropriate
CMake variable, e.g. RUNTIMES_<name>_CMAKE_C_COMPILER_TARGET=<triple>).
This change is a first step in that direction, by eliminating the support
of target triples from builtin_register_target and runtime_register_target
helper functions.
Differential Revision: https://reviews.llvm.org/D117263
Khem Raj [Sat, 4 Feb 2023 21:54:41 +0000 (13:54 -0800)]
cmake: Enable 64bit off_t on 32bit glibc systems
Pass -D_FILE_OFFSET_BITS=64 to compiler flags on 32bit glibc based
systems. This will make sure that 64bit versions of LFS functions are
used e.g. seek will behave same as lseek64. Also revert [1] partially
because this added a cmake test to detect lseek64 but then forgot to
pass the needed macro to actual compile, this test was incomplete too
since libc implementations like musl has 64bit off_t by default on 32bit
systems and does not bundle[2] -D_LARGEFILE64_SOURCE under -D_GNU_SOURCE
like glibc, which means the compile now fails on musl because the cmake
check passes but we do not have _LARGEFILE64_SOURCE defined. Using the
*64 function was transitional anyways so use -D_FILE_OFFSET_BITS=64
instead
[1] https://github.com/llvm/llvm-project/commit/
8db7e5e4eed4c4e697dc3164f2c9351d8c3e942b
[2] https://git.musl-libc.org/cgit/musl/commit/?id=
25e6fee27f4a293728dd15b659170e7b9c7db9bc
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D139752
Fangrui Song [Sat, 4 Feb 2023 20:54:26 +0000 (12:54 -0800)]
[clang-linker-wrapper] Fix build after MapVector change
Simon Pilgrim [Sat, 4 Feb 2023 20:53:42 +0000 (20:53 +0000)]
[DAG] visitFREEZE - handle case where the folded node merges with another existing node
Fixes #60413
Florian Hahn [Sat, 4 Feb 2023 20:42:50 +0000 (20:42 +0000)]
[LV] Add users for loads to make tests more robust.
Update a few tests to add users to loads to avoid them being optimized
out by future changes. In cases the unused loads didn't matter for the
test, remove them.
Fangrui Song [Sat, 4 Feb 2023 20:34:55 +0000 (12:34 -0800)]
OffloadBinary: Switch to MapVector<StringRef, StringRef> to stabilize iteration order
D122069 incorrectly uses StringMap iteration order
(https://llvm.org/docs/ProgrammersManual.html#llvm-adt-stringmap-h).
Switch to MapVector.
Jonas Hahnfeld [Sat, 4 Feb 2023 20:24:44 +0000 (21:24 +0100)]
Revert "[ORC] Drop Comdat when discarding IR symbol"
A number of AArch64 bots report errors in clang-repl, for example
https://lab.llvm.org/buildbot/#/builders/197/builds/3920
This reverts commit
87d7838202267a011639fcbf97263556ccf091dc.
Nico Weber [Sat, 4 Feb 2023 20:23:24 +0000 (15:23 -0500)]
[lld] fix comment typos to cycle bots
Mircea Trofin [Sat, 4 Feb 2023 20:15:48 +0000 (12:15 -0800)]
[mlgo] Bump the unsupported versions for interactive tests to 3.8
e006c7dfa79a already covered the regalloc one.
Fangrui Song [Sat, 4 Feb 2023 19:30:14 +0000 (11:30 -0800)]
[sanitizer] Simplify with GET_CALLER_PC_BP. NFC
David Green [Sat, 4 Feb 2023 19:18:50 +0000 (19:18 +0000)]
[AArch64] Add ABD combine tests. NFC
Simon Pilgrim [Sat, 4 Feb 2023 18:31:20 +0000 (18:31 +0000)]
[X86] combinePredicateReduction - pull out repeated DAG.getContext() calls. NFC.
Douglas Yung [Sat, 4 Feb 2023 18:18:58 +0000 (10:18 -0800)]
Revert "[Sanitizers] Fix read buffer overrun in scanning loader commands"
This reverts commit
abbd4da2043856f443e3d1c8d2c7627cac93a6ac.
This change is breaking many bots including:
- http://45.33.8.238/linux/98629/step_10.txt
- https://buildkite.com/llvm-project/llvm-main/builds/6461#
01861c4f-9d9c-4781-88f7-
d6ccddcb4b06/919-8848
- https://lab.llvm.org/buildbot/#/builders/94/builds/13196
- https://lab.llvm.org/buildbot/#/builders/45/builds/10633
- https://lab.llvm.org/buildbot/#/builders/247/builds/1238
- https://lab.llvm.org/buildbot/#/builders/70/builds/33424
- https://lab.llvm.org/buildbot/#/builders/168/builds/11693
- https://lab.llvm.org/buildbot/#/builders/74/builds/17006
- https://lab.llvm.org/buildbot/#/builders/85/builds/14120
Florian Hahn [Sat, 4 Feb 2023 18:18:17 +0000 (18:18 +0000)]
[LV] Add initial tests for sinking loads past other instructions.
Extend test coverage for sinking loads that use fixed order recurrences.
Sam James [Sat, 4 Feb 2023 18:04:54 +0000 (18:04 +0000)]
[compiler-rt] Fix FORTIFY_SOURCE -> _FORTIFY_SOURCE reference (NFC)
As pointed out by maskray.
Fixes:
8ab762557fb057af1a3015211ee116a975027e78
Sam James [Sat, 4 Feb 2023 18:04:05 +0000 (18:04 +0000)]
[compiler-rt] Disable default config files for tests
Without this, if hardening measures like FORTIFY_SOURCE are are in
/etc/clang/*.cfg, many sanitizer tests will die before the sanitizer
can trap the problem being tested, because e.g. the _chk variants
of common functions will abort first.
This gets the number of failing tests down from 42->3 for me (and the
remaining 3 are unrelated).
See:
52ce6776cf98e993c6ec04ae54b52e1354fff917
See:
136f77805fd89cd30e69b3d1204fbf7efedd9a12
Closes: https://github.com/llvm/llvm-project/issues/60394
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D143322
Simon Pilgrim [Sat, 4 Feb 2023 17:31:52 +0000 (17:31 +0000)]
[TableGen] Error.h - remove quotes to silence clang-tidy llvm-namespace-comment warning
Simon Pilgrim [Sat, 4 Feb 2023 17:30:14 +0000 (17:30 +0000)]
[ADT] STLFunctionalExtras.h - fix llvm-include-order clang-tidy warning
David Green [Sat, 4 Feb 2023 16:11:29 +0000 (16:11 +0000)]
[AArch64][GlobalISel] Selection for i8 buildvectors
Legalization for i8 buildvectors is available (as in
615695de27e417d6b444cd983e6f636373afc8c9), but selection
would fail due to i8 types not being handled. This adds
basic support like other type sizes.
Differential Revision: https://reviews.llvm.org/D143002
Simon Pilgrim [Sat, 4 Feb 2023 15:06:12 +0000 (15:06 +0000)]
[X86] combinePredicateReduction - fold any_of(setcc(x,y,ne)) -> pmovmskb(not(pcmpeqb()))
Improves codegen for v2i64 cases, similar to what we already do for all_of(setcc(x,y,eq))
Simon Pilgrim [Sat, 4 Feb 2023 14:56:14 +0000 (14:56 +0000)]
[X86] pr53419.ll - add missing v2i8/v4i8/v8i8 coverage to reduction tests
Matthias Springer [Sat, 4 Feb 2023 14:44:20 +0000 (15:44 +0100)]
[mlir][SCF] Disallow multiple blocks in scf.if "else" region
The "then" region allows only a single block. The same should be the case for the "else" region.
Differential Revision: https://reviews.llvm.org/D143253
Remi Segard [Sat, 4 Feb 2023 12:23:46 +0000 (08:23 -0400)]
[GlobalISel] Enable patterns with multiple output operands for the GlobalISelEmitter
This enables writing patterns with mutliple output operands in the input pattern for GlobalISel
Simon Pilgrim [Sat, 4 Feb 2023 13:59:57 +0000 (13:59 +0000)]
[X86] Swap bool reduction predicates in v2i64/v4i32 tests
The v2i64 case has more scope for optimization with ne than ugt cases, and we already have very similar icmp sgt coverage via the v4i64 tests
Samuel Thibault [Sat, 4 Feb 2023 13:46:25 +0000 (07:46 -0600)]
[Libomptarget] Add the same to the other AMD plugin
Summary:
The previous patch also needed to apply this to the other AMDGPU plugin,
this will be removed soon but it should be correct while it's here at
least.
Samuel Thibault [Sat, 4 Feb 2023 13:44:25 +0000 (07:44 -0600)]
[Libomptarget] Fix disabling amdgpu on non-Linux.
Previously, on non-Linux, amdgpu would get enabled whatever the CPU architecture.
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D143017
David Green [Sat, 4 Feb 2023 13:10:45 +0000 (13:10 +0000)]
[AArch64] Add tests for inefficient generation of ST2s. NFC
Matt Arsenault [Sat, 4 Feb 2023 12:09:16 +0000 (08:09 -0400)]
AMDGPU: Add some regression tests that infinite looped combiner
Prevent a future patch from introducing an infinite combine loop.
Paul Walker [Mon, 16 Jan 2023 01:37:50 +0000 (01:37 +0000)]
[SVE][CodeGen] Relax all true isel requirement for predicated operations that have no side effects.
We have isel patterns to allow predicated operations to emit
unpredicated instructions when the predicate is all true. However,
the predicated operations named #_PRED have no requirement for the
result of the inactive lanes and so when those operations have no
side effects, floating point exceptions for example, we can also
safely emit unpredicated instructions. Doing this allows better
register allocation, instruction scheduling and also enables more
usage of instructions that take immediate operands.
NOTE: This patch does not convert all possible instances but
instead focuses on the cases that are testable once D141937 lands.
Depends on D141937
Differential Revision: https://reviews.llvm.org/D141938
NAKAMURA Takumi [Sat, 4 Feb 2023 11:49:39 +0000 (20:49 +0900)]
Revert "[AArch64] Unconditionally use DW_EH_PE_indirect|DW_EH_PE_pcrel personality/lsda/ttype encodings"
It causes failurs in clang-interpreter.
This reverts commit
565a1fb1334b8cf510af1338cae3f50815a99f90, aka llvmorg-17-init-1048-g565a1fb1334b
Simon Pilgrim [Sat, 4 Feb 2023 11:25:46 +0000 (11:25 +0000)]
[X86] Add basic vector handling for ISD::ABDS/ABDU (absolute difference) nodes
I'm intending to add generic legalization in the future, but for now I've added basic support to targets that have the necessary MIN/MAX support to expand to SUB(MAX(X,Y),MIN(X,Y)).
This exposed a couple of issues with the DAG combines - in particular we need to catch trunc(abs(sub(ext(x),ext(y)))) patterns earlier before the SSE/AVX vector trunc expansion folds trigger.
Differential Revision: https://reviews.llvm.org/D142288
NAKAMURA Takumi [Sat, 4 Feb 2023 11:18:57 +0000 (20:18 +0900)]
llvm/test/CodeGen/MLRegalloc: Exclude python<=3.8 (D143218)
Type hint `list[foo]` isn't accepted by python-3.8
(Seems requires `typing.List`)
Simon Pilgrim [Sat, 4 Feb 2023 11:17:36 +0000 (11:17 +0000)]
[PowerPC] aix32-cc-abi-vaarg.ll - improve DAG checks
More closely match the actual output and should make the merge with D127115 easier.
Phoebe Wang [Sat, 4 Feb 2023 10:23:39 +0000 (18:23 +0800)]
[X86][FP16] Lower half->i16 into vcvttph2[u]w directly
Reviewed By: LuoYuanke, RKSimon
Differential Revision: https://reviews.llvm.org/D143170
Jessica Paquette [Sat, 4 Feb 2023 07:21:34 +0000 (23:21 -0800)]
Update test to be the correct version
machine-outliner-mapping-stats.mir
Han-Kuan Chen [Tue, 31 Jan 2023 06:40:08 +0000 (22:40 -0800)]
[RISCV] Don't use constantpool for floating-point value if the value can be easily constructed by integer sequence and a floating-point move.
In addition, this commit does the following combine
vfmv.v.f + fmv.[dhw].x -> vmv.v.x
vfmv.s.f + fmv.[dhw].x -> vmv.s.x
vfmerge.vfm + fmv.[dhw].x -> vmerge.vxm
Differential Revision: https://reviews.llvm.org/D142953
Jessica Paquette [Sat, 4 Feb 2023 06:26:07 +0000 (22:26 -0800)]
[MachineOutliner] Improve mapper statistics
Add a test for statistics as well.
The mapper size stats were nested in a loop unnecessarily. Move them out.
Give existing stats better names, and add one which also tracks the number of
sentinels added.
Fangrui Song [Sat, 4 Feb 2023 06:06:34 +0000 (22:06 -0800)]
[Driver] Remove deprecated -fsanitize-system-blacklist=
Unused in the wild.
Jessica Paquette [Sat, 4 Feb 2023 05:59:16 +0000 (21:59 -0800)]
[MachineOutliner] NFC: Add debug output to populateMapper
Adding debug output to improve outliner debuggability + testability.
Move `nooutline` attribute test into the new debug output test.
Diego Caballero [Sat, 4 Feb 2023 05:18:48 +0000 (05:18 +0000)]
Revert "[mlir][linalg] Make Linalg vectorizer lower affine.apply"
This reverts commit
c7b1176e9afbfcc3da9482abbf7c1eb8793ff254.
Diego Caballero [Sat, 4 Feb 2023 05:16:46 +0000 (05:16 +0000)]
Revert "[mlir][linalg] Fix crash in vectorizer when expanding affine apply"
This reverts commit
62570b722fa36fddde0d24bf06a245efadda66f5.
Mircea Trofin [Sat, 4 Feb 2023 03:55:12 +0000 (19:55 -0800)]
[mlgo] only enable interactive mode tests on linux
`os.mkfifo` may not be supported everywhere (e.g. windows).
Mircea Trofin [Sat, 4 Feb 2023 03:41:07 +0000 (19:41 -0800)]
[mlgo] Disable mlgo tests when python version is 6
Supporting 3.6 requires a bit too much of a change in the mlgo test python scripts.
Sebastian Pop [Wed, 25 Jan 2023 18:40:48 +0000 (18:40 +0000)]
[AArch64] fix bug #55005 handle DW_CFA_GNU_NegateRAState
GCC on AArch64 uses DW_CFA_GNU_NegateRAState for return address signing.
Differential Revision: https://reviews.llvm.org/D142572
Shengchen Kan [Sat, 4 Feb 2023 01:35:32 +0000 (09:35 +0800)]
[UpdateTestChecks][NFC] Share the code to get CHECK prefix between all scripts
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D143307
Mariusz Borsa [Sat, 4 Feb 2023 01:54:10 +0000 (17:54 -0800)]
[Sanitizers] Fix read buffer overrun in scanning loader commands
The fix only affects Darwin, but to write the test I had to modify
the MemoryMappingLayout class which is used by all OSes,
to allow for mocking of image header (this change should be NFC). Hence no [Darwin] in the subject
so I can get more eyes on it.
While looking for a memory gap to put the shadow area into, the sanitizer code
scans through the loaded images, and for each image it scans through its
loader command to determine the occupied memory ranges.
While doing so, if the 'segment load' (kLCSegment) loader comand is encountered, the command scanning function
returns success (true), but does not decrement the command list iterator counter.
The result is that the function is called again and again, with the iterator counter
now being too high. The command scanner keeps updating the loader command pointer,
by using the command size field.
If the loop counter is too high, the command pointer
lands into unintended area ( beyond <header addr>+sizeof(mac_header64)+header->sizeofcmds ),
and result depends on the random content found there.
The random content interpreted as loader command might contain a large integer value in the
cmdsize field - this value is added to the current loader command pointer,
which might now point to an inaccessible memory address. It can occasionally result
in a crash if it happens to run beyond the mapped memory segment.
Note that when the area after the loader command list
contains zeros or small integers only, the loop will end normally and the problem
will go unnoticed. So it happened until now since having a some big value
after the header area, falling into command size field is a pretty rare situation.
The fix makes sure that the iterator counter gets updated when the segment load (kLCSegment)
loader command is found too, and in the same code location so the updates will always go together.
Undo the changes in the sanitizer_procmaps_mac.cpp to see the test failing.
rdar://
101161047
rdar://
102819707
Differential Revision: https://reviews.llvm.org/D142164