util/bitset: Avoid out-of-bounds reads

I missed a corner case here: when the next range ends right at the end
of the bitset, we need to return immediately to avoid trying to search
after the bitset. And when finding the next end, we similarly need to
bail if the range is size 1 at the very end of the range. In practice
this probably would'nt have been noticed, because it would break out of
the loop anyway, but I happened to be running something using this under
Valgrind and it complained.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10076>

intel: avoid dumping null cs sampler/binding states

this crashes the driver

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10077>

nir_to_tgsi: run constant folding after nir_opt_algebraic

Otherwise, an infinite loop can occur.

The first nir_opt_algebraic in the loop can optimize:
op(bcsel(a, #b, c), #d) to bcsel(a, op(b, d), op(c, d))
which (because op(b, d) is not constant folded), will be reverted by the
second nir_opt_algebraic in the loop.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10071>

intel: Drop gen_device_info::has_resource_streamer

We've never done anything with that HW and it was removed in ICL.
There's no point in carrying around the useless field.

Acked-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10069>

wsi/x11: Wait for fences with IMMEDIATE on Xwayland

The commit below was already meant to do this, but accidentally missed
this part.

Fixes stutter when the frame-rate drops below the refresh rate.

Fixes: e8f50bd60087 "wsi/x11: Treat IMMEDIATE present mode the same as
                     MAILBOX for Xwayland"

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10026>

turnip: implement variableMultisampleRate

If subpass doesn't have depth/color attachments - samples count is
devised from VkPipelineMultisampleStateCreateInfo::rasterizationSamples.
Without variableMultisampleRate enabled all pipelines in such subpass
should have the same samples count; variableMultisampleRate allows
to have pipelines with different number of samples in one subpass,
given that it doesn't have depth/color attachments.

Blob doesn't have it enabled but there is no known reason for this.

Passes:
 dEQP-VK.pipeline.multisample.variable_rate.*

Fixes test:
 dEQP-VK.pipeline.framebuffer_attachment.no_attachments_ms

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9556>

ci: Don't retry failed test runs

After a recent LAVA update, failures in running a test would cause the
whole test to be retried. We only want for the boot to be retried (in
case of infrastructuer errors), so set the nr of retries for tests to 1.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9950>

ci: Set more reasonable timeouts for LAVA jobs

The test timeout shouldn't be bigger than the whole job's timeout.

Also, reduce the timeouts to a more sane level and remove timeouts that
don't bring value.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9950>

ci: Use a single template for LAVA jobs

It's a pain to keep both templates in sync and there aren't really that
many differences.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9950>

aux/trace: add a set_inlinable_constants hook

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10057>

v3d: use uint type in _gen_unpack_uint

Use a unsigned int type in the loop to avoid unintended sign extensions.

Fixes CID#1414500 (Unintended sign extension [SIGN_EXTENSION]).

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10060>

panfrost: Hook up indirect draw support

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8700>

panfrost: Prepare things for indirect draws

Several things need to be tweaked to re-use existing helpers for
indirect draws:

* Indirect draws should always be considered as instanced draws since
  we don't know in advance how many instances will be requested. For
  each vertex attribute buffer entry we store the element divisor which
  will be extracted by the compute shader and transformed into a HW
  divisor

* PRIMITIVE.index_count should be initialized to its default value
  (one, or zero after the minus(1) modification) waiting for the
  compute shader to patch it

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8700>

panfrost: Add helpers to support indirect draws

Indirect draws are implemented with compute jobs patching the
vertex/tiler jobs. Provide helpers to do that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8700>

panfrost: Stop including pan_device.h from pan_bo.h

We want to define structures containing pan_pool objects in pan_device.h
but it is prevented by the

      pan_device.h -> pan_pool.h -> pan_bo.h
          ^____________________________|

loop.

Break this loop by not including pan_device.h from pan_bo.h.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8700>

gallium/u_threaded: split draws that don't fit in a batch

Multidraws with large draw count will try to call tc_add_slot_based_call
with a payload larger than TC_CALLS_PER_BATCH.

This commit split these draws in multiple commands to avoid this issue.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4534
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9920>

panfrost: Skip disabled RTs when selecting a RT for transaction elimination

If the render target is disabled, the CRC won't be updated, and the
slice state should stay unchanged.

Fixes dEQP-GLES2.functional.fbo.render.shared_colorbuffer.tex2d_rgba_stencil_index8
and dEQP-GLES2.functional.fbo.render.shared_colorbuffer.rbo_rgba4_depth_component16.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9907>

panfrost: Don't reserve space in the color buffer for disabled RTs

Render targets that have no clear or draws are disabled and thus don't
use the color buffer. Don't reserve space for those.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9907>

winsys/amdgpu: remove another 8 bytes from amdgpu_winsys_bo by packing better

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>

gallium/pb: remove 8 bytes from pb_buffer by packing variables

Only svga used usages beyond 16 bits. All other drivers are OK with 16 bits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>

gallium/pb: change pb_buffer::alignment to alignment_log2

Alignments are always 2^n, so store n = log2(alignment). The next commit
will take advantage of the saved space.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>

winsys/amdgpu: add amdgpu_cs::ws to reduce dereferences

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>

winsys/amdgpu: remove amdgpu_winsys_bo::ws

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>

radeon_winsys.h: add a winsys parameter to most winsys buffer functions

This will allow removing the winsys pointer from buffers.

The amdgpu winsys adds dummy_ws to get radeon_winsys because there can be
no radeon_winsys around (e.g. while amdgpu_winsys is being destroyed), but
we still need some way to call buffer functions.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>

radeon_winsys.h: add a new function radeon_bo_reference that takes a winsys

This will allow removing the winsys pointer from buffers.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>

winsys/radeon: rename radeon_bo_reference -> radeon_ws_bo_reference

radeon_bo_reference will be a new function in radeon_winsys.h.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>

gallium/pb: pass an optional winsys pointer to the buffer destroy function

This will allow removing the winsys pointer from buffers.

Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9809>

intel/compiler: lower bit sizes in NIR postprocessing

It appears that between preprocess & postprocess some descriptor
lowering introduces 8bit types in the shader, so run the lower bit
size again to make sure we don't have any unsupported types in our
shader.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e06144a818950e ("anv: Use 64bit_global_32bit_offset for SSBOs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4478
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9705>

pan/bi: Remove conversion lowering

Inherited from Midgard, it's easier to just do at NIR->BIR time now that
we have a builder that doesn't suck. Impeded certain optimizations.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10065>

pan/bi: Generalize f2i16, f2u16

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10065>

pan/bi: Fill in some more conversions

The trick is that downcasts are just swizzling out what you don't want,
so things like U32_TO_F16 can be synthesized as V2U16_TO_V2F16 with
src.h00

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10065>

pan/bi: Lower swizzles

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10065>

pan/bi: Optimize MKVEC.v2i16 generation

Prefer SWZ.v2i16 in cases where that's possible, it will be easier to
optimize later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10065>

pan/bi: Add bi_swz_16 helper

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10065>

radeonsi: fix si_compute_copy_image if DCC decompression happens before a copy

The buffer clear after DCC decompression overwrote user SGPRs that we set
here, leading to invalid image coordinates. Set them after we bind images.

This will actually be fixed by "radeonsi: don't decompress DCC for float
formats in si_compute_copy_image" as well.

Fixes: ad71ef9326f "radeonsi: don't use a constant buffer for the copy_image compute shader"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4583

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10061>

zink: drop VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT from compute path

this was dropped a while ago from gfx but I failed to pick it up for compute

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10062>

mesa: Remove unused gl_config::mutableRenderBuffer

This bit is only meaningful for EGL, where we in fact derive it from
whether EGL_KHR_mutable_render_buffer is enabled and don't actually look
at the DRI attribute.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10045>

mesa: Make _mesa_initialize_visual return void

The assertions here clearly never get hit, and if they did it'd mean we
were _trying_ to enable 64-bit Z or something. And checking only that
the accumulation has non-negative size is... curious. Just delete it and
clean up the callers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10045>

mesa: Remove unused _mesa_create_framebuffer

One fewer gl_config in the API.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10045>

radeon: Exchange one curious idiom for another in radeonMakeCurrent

radeonMakeCurrent is the only consumer of _mesa_create_framebuffer(),
and all we're doing here is making a dummy for the context to hang on to
when there is no current drawable. intelMakeCurrent uses
_mesa_get_incomplete_framebuffer() for this instead, which is
equivalent, and which matches the usage elsewhere in the tree.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10045>

gallium: Remove curious st_visual::no_config

The gallium context creation API embeds storage for a whole st_visual
even if the context is to have no config. no_config was being used to
signal this, but we can just as easily check that the color format is
non-NONE.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10045>

zink: flag DYNAMIC resources as coherent

the contents of these may change frequently, so we should skip all the
flush/invalidate

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9983>

zink: don't use cached mem for staging resources

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9983>

radv: fix format feature reporting for modifiers

The format_feature_flags bitfield is derived from the modifier if
the tiling is set to VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT.
However radv will reset the tiling to either LINEAR or OPTIMAL if
the caller supplied a VkPhysicalDeviceImageDrmFormatModifierInfoEXT
in the chain.

Stop resetting the tiling, so that we can compute the correct feature
flags.

Signed-off-by: Simon Ser <contact@emersion.fr>
Fixes: 6c83e3ea98b7 ("radv: Add format modifier format queries.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9978>

nir/lower_tex: handle deref casts

A RDR2 shader has a undef->texture cast which is eventually optimized out.
Without handling NULL from nir_deref_instr_get_variable(), compiling this
shader will result in a crash.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Fixes: bc438c91d9b ("nir/lower_tex: ignore texture_index if tex_instr has deref src")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10038>

zink: reset queries when suspending if >50% of total pool is used

this is a great time for resets since there's never a renderpass active,
so an early reset here may mean avoiding a renderpass split later

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10049>

zink: defer timestamp query pool resets to end_query

we don't do a tc context unwrap in create_query(), so this isn't a good place
to be doing anything that needs the ctx

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10049>

zink: check last_finished first in fence_finish early out case

a fence's completed flag is irrelevant if we already know it has completed

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10048>

zink: relax maybe_flush batch count threshold

10 batch states isn't actually that many if an app happens to be flushing
a lot, so let's multiply that to catch outlier cases

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10006>

zink: relax maybe_flush mem threshold

10% of video mem ends up being way too aggressive and causes constant
stalls

really this is supposed to be a failsafe against ooming in a single batch, so
using 50% here ends up serving that purpose much more effectively

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10006>

zink: split total_mem off to total_video_mem, use total_mem for tc

tc needs the total host memory available, not the total video memory

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10006>

zink: move cmdpool reset to batch state reset

this is a more logical place for it

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9964>

zink: only use host mem for staging resources with linear tiling

VK_EXT_4444_formats strikes again

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9985>

zink: use 2 variant to check image format props during create

just to be pedantic

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9984>

zink: use vkGetPhysicalDeviceFormatProperties2 when available

technically shouldn't matter but whatever

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9984>

zink: use better usage flags for staging resources

enforce linear bind more logically and mark with more accurate usage

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9982>

zink: hook up cs push constant for nir_intrinsic_load_work_dim

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9966>

util/threaded_context: support pipe_context::set_sample_locations

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10031>

vulkan: track number of bindings instead of max binding for CreateDescriptorSetLayout

As that handles better, and more clear, the case of bindingCount being
zero. For the case of Anvil and Turnip, this avoids allocating a
non-needed binding when bindingCount is zero.

Inspired on radv, that was what it was doing so far.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4526

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9905>

zink/ci: handle getting correct drisw driver.

With zink not being autopicked, fixup the CI to pick the
correct drivers for zink testing, noting that xvfb really
doesn't want zink to be chosen.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9816>

drisw: move zink down the list below the sw drivers.

We don't ever want drisw path picking zink as the driver,
we can revisit this when the penny wrapper work gets further
along.

This selection causes systems with nvidia/intel dual-gpus
to try and pick the intel gpu for rendering in the nvidia
context if there is no nvidia GL driver or accel doesn't work.

This is a partial revert of the original commit.

Fixes: 4a3b42a717ce ("drisw: Prefer hardware-layered sw-winsys drivers over pure sw")
Acked-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9816>

radv: Flush caches for shader read operations.

As part of the fmask expand we very much read from the images as
well ...

Fixes: 8f8d72af555 ("radv: Use access helpers for flushing with meta operations.")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10042>

turnip: fix alignment of non-32b types in workgroup memory

Fixes tests:
 dEQP-VK.spirv_assembly.instruction.compute.workgroup_memory.float16

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10039>

radv: init CMASK/FMASK/DCC in parallel

To remove bubbles during layout transitions from UNDEFINED, especially
with MSAA because we might have all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10004>

microsoft/compiler: Fix barrier flag for shared memory

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10010>

ci/broadcom: update expected list

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10041>

radv: handle implicit subpass dependencies per attachment

From the Vulkan spec 1.2.172:

"If there is no subpass dependency from VK_SUBPASS_EXTERNAL to the
 first subpass that uses an attachment, then an implicit subpass
 dependency exists from VK_SUBPASS_EXTERNAL to the first subpass
 it is used in."

"Similarly, if there is no subpass dependency from the last subpass
 that uses an attachment to VK_SUBPASS_EXTERNAL, then an implicit
 subpass dependency exists from the last subpass it is used in to
 VK_SUBPASS_EXTERNAL."

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9714>

docs: mark float_controls,float16_int8,16bit_storage as done on Turnip

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9993>

radv: allow DCC for storage images on GFX10.3 with RADV_PERFTEST=dccstores

It's not enabled by default because it requires performance testing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9919>

aco: implement a workaround for the image load DCC hw bug on GFX10.3

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9919>

aco: fix get_sampler_desc() for image loads

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9919>

ac: add ac_gpu_info::has_image_load_dcc_bug

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9919>

mesa/st: ignore texture_index if tex_instr has deref src

texture_index is meaningless when a tex_instr has deref src.
Use var->data.binding instead.

CC: mesa-stable
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9931>

mesa/st: fix st_nir_lower_tex_src_plane arguments

st_nir_lower_tex_src_plane expects a mask, no a boolean.

CC: mesa-stable
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9931>

nir/lower_tex: ignore texture_index if tex_instr has deref src

texture_index is meaningless when a tex_instr has deref src.
Use var->data.binding instead.

This fixes the incorrect lowering on radeonsi where the same
lowering steps was applied to all tex_instr based on the needs
of the first one (since texture_index is always 0).

CC: mesa-stable
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9931>

radv: clean up fence syncobj code

Since RADV requires DRM 3.35+, this code can be simplified.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9953>

radv: try to keep HTILE compressed with DEPTH_STENCIL_READ_ONLY_OPTIMAL

From the Vulkan spec:
    "VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL specifies a
     layout for both the depth and stencil aspects of a depth/stencil
     format image allowing read only access as a depth/stencil
     attachment or in shaders as a sampled image, combined
     image/sampler, or input attachment. It is equivalent to
     VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL and
     VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL."

So, it should be safe to keep HTILE compressed if the depth/stencil
image isn't going to be sampled. We could probably extend this
to separate depth/stencil layout but that seems a bit more
complicated.

This gives a huge boost to the deferredmultisampling Vulkan demo.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10008>

radv: change RADV_FORCE_FAMILY to use family name instead of LLVM processor name

gfx1030 doesn't allow us to specify e.g. dimgrey.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9974>

ac: add ac_get_family_name() helper

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9974>

broadcom/compiler: optimize branch emission for uniform break/continue

A break/continue in a loop is typically emitted like this:

if (cond) {
    break/continue;
} else {
}

If cond is uniform, we'll emit code for a uniform if statement and
that will emit a branch right before the if to jump directly to the
else (or the block after the else in this case, since the else is
empty) in case cond evaluates to false. This means we end up emitting
two consecutive branch instructions, one before the if and one for the
THEN block right after:

branch(!cond) -> jump to else (or after else) if cond is false
nop
nop
nop
branch -> unconditional jump to break/continue
nop
nop
nop

Instead, if we are in this scenario, we can do better by emitting the
conditional jump directly and avoiding the "jump to else" case:

branch(cond) -> jump to break/continue if cond is true
nop
nop
nop

We need to be careful when emitting the break/continue for the case
where all lanes are disabled to avoid infinite loops: if we have a
break we always want to take the jump, but we don't want to take it
if it is a continue.

total instructions in shared programs: 13563672 -> 13557348 (-0.05%)
instructions in affected programs: 348034 -> 341710 (-1.82%)
helped: 1158
HURT: 10
Instructions are helped.

total uniforms in shared programs: 3779137 -> 3777535 (-0.04%)
uniforms in affected programs: 90583 -> 88981 (-1.77%)
helped: 1169
HURT: 0
Uniforms are helped.

total max-temps in shared programs: 2317670 -> 2317575 (<.01%)
max-temps in affected programs: 1943 -> 1848 (-4.89%)
helped: 85
HURT: 4
Max-temps are helped.

total sfu-stalls in shared programs: 32247 -> 32247 (0.00%)
sfu-stalls in affected programs: 69 -> 69 (0.00%)
helped: 7
HURT: 9
Inconclusive result (value mean confidence interval includes 0).

total inst-and-stalls in shared programs: 13595919 -> 13589595 (-0.05%)
inst-and-stalls in affected programs: 350674 -> 344350 (-1.80%)
helped: 1154
HURT: 11
Inst-and-stalls are helped.

total nops in shared programs: 358202 -> 354325 (-1.08%)
nops in affected programs: 17367 -> 13490 (-22.32%)
helped: 1168
HURT: 1
Nops are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9948>

broadcom/compiler: implement restriction for branch after setmsf

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9948>

zink: avoid cached memory allocations when not requested

don't rely on driver orderings to not pick this

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9981>

lavapipe: add support for KHR_imageless_framebuffer

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10032>

features: mark off ARB_shader_viewport_layer_array for zink

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10025>

zink: enable PIPE_CAP_TGSI_TES_LAYER_VIEWPORT

should've done this when PIPE_CAP_TGSI_VS_LAYER_VIEWPORT was enabled

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10025>

zink: only emit SpvCapabilitySampleMaskPostDepthCoverage if the mode is set

this isn't always applicable

Fixes: 3c72c867422 ("zink: Wire up ARB_post_depth_coverage")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10018>

zink: store shader_info to ntv_context struct

tired of adding more and more bool flags here

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10018>

lavapipe: enable KHR_image_format_list

Needed for DXVK.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10027>

lavapipe: implement CmdBindVertexBuffers with CmdBindVertexBuffers2EXT

Easier than fixing the broken size logic here.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10028>

lavapipe: handle NULL pStrides in CmdBindVertexBuffers2EXT

Fixes: 20bd9fc54700950cab88bc13f0446b2c14f86033

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10028>

anv: Fix coverage masks for VK_EXT_conservative_rasterization

Earlier, I just tried to copy what iris was doing and, as it turns out,
copied it wrong.  Also, Vulkan doesn't have a concept of getting the
conservative coverage in the shader.  The spec for SampleMask says:

    "Decorating a variable with the SampleMask built-in decoration will
    make any variable contain the coverage mask for the current fragment
    shader invocation."

And the spec for conservative rasterization says

    "When overestimate conservative rasterization is enabled, rather
    than evaluating coverage at individual sample locations, a
    determination is made of whether any portion of the pixel (including
    its edges and corners) is covered by the primitive. If any portion
    of the pixel is covered, then all bits of the coverage mask for the
    fragment corresponding to that pixel are enabled."

Putting these two together and you get what the Intel HW docs say for
ICMS_NORMAL:

    "Input Coverage masks based on inner conservatism and factors in
    SAMPLE_MASKs. If Pixel is conservatively fully covered all samples
    are enabled."

So I'm pretty sure based on this that the right thing to do here is to
ignore conservative rasterization and leave it set to ICMS_NORMAL
whenever we're not in the post-depth-coverage special case.

While we're here, fix the silly indentation.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4565
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d5b56debde30 "anv: Implement VK_EXT_conservative_rasterization"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10017>

vulkan/util: Fix implicit declaration of ffs for Android build

Similar to 641320ce02ff and 68bb26af63ac to avoid Android build errors

Fixes the following building error:

In file included from external/mesa/src/vulkan/util/vk_util.c:28:
external/mesa/src/vulkan/util/vk_util.h:248:30: error: implicit declaration of function 'ffs' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   return (gl_shader_stage) (ffs((uint32_t) vk_stage) - 1);
                             ^
1 error generated.

Fixes: 06ebbde63048 ("vulkan: Deduplicate mesa stage conversion")
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10023>

pan/bi: Lower large arrays to scratch

No shader-db changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10020>

pan/bi: Split writemasks for memory stores

Will avoid a regression in the following commit, and probably fixes some
GLES3.1 stuff.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10020>

pan/bi: Enable all nir_opt_move/sink optimizations

total instructions in shared programs: 116716 -> 116716 (0.00%)

total nops in shared programs: 86280 -> 84996 (-1.49%)
nops in affected programs: 50485 -> 49201 (-2.54%)
Nops are helped.

total clauses in shared programs: 20993 -> 20732 (-1.24%)
clauses in affected programs: 7737 -> 7476 (-3.37%)
Clauses are helped.

total quadwords in shared programs: 91697 -> 91155 (-0.59%)
quadwords in affected programs: 52123 -> 51581 (-1.04%)
Quadwords are helped.

total spills in shared programs: 0 -> 0
total fills in shared programs: 0 -> 0

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10020>

ci/bare-metal: no need to use tee

fastboot_run.py will watch results/serial-output.txt.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9976>

vulkan: Deduplicate mesa stage conversion

Across every driver...

v2: Add casts to appease -fpermissive used on CI.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9477>

panfrost: Only check blend work count on midgard

Bifrost will handle this "automatically" by virtue of the blend ABI.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9421>

panfrost: Deduplicate Bifrost fau_count

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9421>

panfrost: Deduplicate UBO count assignment

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9421>