platform/kernel/u-boot.git
5 years agomtd: spi: spi-nor-core: Add back U-Boot specific features
Vignesh R [Tue, 5 Feb 2019 05:59:21 +0000 (11:29 +0530)]
mtd: spi: spi-nor-core: Add back U-Boot specific features

For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
5 years agomtd: spi: spi-nor-core: Add SFDP support
Vignesh R [Tue, 5 Feb 2019 05:59:20 +0000 (11:29 +0530)]
mtd: spi: spi-nor-core: Add SFDP support

Sync Serial Flash Discoverable Parameters (SFDP) parsing support from
Linux. This allows auto detection and configuration of Flash parameters.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
5 years agomtd: spi: spi-nor-core: Add 4 Byte addressing support
Vignesh R [Tue, 5 Feb 2019 05:59:19 +0000 (11:29 +0530)]
mtd: spi: spi-nor-core: Add 4 Byte addressing support

Sync changes from Linux SPI NOR framework to add 4 byte addressing
support. This is required in order to support flashes like MT35x
that no longer support legacy Bank Address Register(BAR) way of accessing
>16MB region.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
5 years agomtd: spi: spi-nor-core: Add SPI MEM support
Vignesh R [Tue, 5 Feb 2019 05:59:18 +0000 (11:29 +0530)]
mtd: spi: spi-nor-core: Add SPI MEM support

Many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
controllers.
Therefore, add spi-mem support to spi-nor-core as a way to support SPI
controllers with MMIO interface. SPI MEM layer takes care of translating
spi_mem_ops to spi_xfer()s in case of legacy SPI controllers.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
5 years agomtd: spi: Port SPI NOR framework from Linux
Vignesh R [Tue, 5 Feb 2019 05:59:17 +0000 (11:29 +0530)]
mtd: spi: Port SPI NOR framework from Linux

Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB of flash address space.
So, sync SPI NOR framework from Linux v4.19 that supports all the
above features. Start with basic sync up that brings in basic framework
subsequent commits will bring in more features.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
5 years agosh: bitops: add hweight*() macros
Vignesh R [Tue, 5 Feb 2019 05:59:16 +0000 (11:29 +0530)]
sh: bitops: add hweight*() macros

Add hweight*() macros required for moving to new SF layer

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
5 years agospi: Add non DM version of SPI_MEM
Vignesh R [Tue, 5 Feb 2019 05:59:15 +0000 (11:29 +0530)]
spi: Add non DM version of SPI_MEM

Add non DM version of SPI_MEM to support easy migration to new SPI NOR
framework. This can be removed once DM_SPI conversion is complete.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
5 years agospi: spi-mem: Claim SPI bus before spi mem access
Vignesh R [Tue, 5 Feb 2019 05:59:14 +0000 (11:29 +0530)]
spi: spi-mem: Claim SPI bus before spi mem access

It is necessary to call spi_claim_bus() before starting any SPI
transactions and this restriction would also apply when calling spi-mem
operations. Therefore claim and release bus before requesting transfer
via exec_op.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
5 years agospi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size
Vignesh R [Tue, 5 Feb 2019 05:59:13 +0000 (11:29 +0530)]
spi: spi-mem: Extend spi_mem_adjust_op_size() to honor max xfer size

Extend spi_mem_adjust_op_size() to take spi->max_write_size and
spi->max_read_size into account.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
5 years agospi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes
Vignesh R [Tue, 5 Feb 2019 05:59:12 +0000 (11:29 +0530)]
spi: spi-mem: Allow use of spi_mem_exec_op for all SPI modes

SPI controllers support all types of SPI modes including dual/quad bus
widths. Therefore remove constraint wrt SPI mode from spi-mem layer.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
5 years agobitops: Fix GENMASK definition for Sandbox
Vignesh R [Tue, 5 Feb 2019 05:59:11 +0000 (11:29 +0530)]
bitops: Fix GENMASK definition for Sandbox

In arch/sandbox/include/asm/types.h we have
Therefore for 32 bit Sandbox build BITS_PER_LONG turns out to be 32 as
CONFIG_PHYS64 is not set

This messes up the current logic of GENMASK macro due to mismatch b/w
size of unsigned long (64 bit) and that of BITS_PER_LONG.
Fix this by using CONFIG_SANDBOX_BITS_PER_LONG which is set to 64/32
based on the host machine on which its being compiled.

Without this patch:
GENMASK(14,0) => 0x7fffffffffff
After this patch:
GENMASK(14,0) => 0x7fff

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoconfigs: Move CONFIG_SPI_FLASH into defconfigs
Vignesh R [Tue, 5 Feb 2019 05:59:10 +0000 (11:29 +0530)]
configs: Move CONFIG_SPI_FLASH into defconfigs

Completely move CONFIG_SPI_FLASH from remaining board header files to
defconfigs

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
5 years agoMerge tag 'for-master-20190201' of git://git.denx.de/u-boot-rockchip
Tom Rini [Sat, 2 Feb 2019 15:11:20 +0000 (10:11 -0500)]
Merge tag 'for-master-20190201' of git://git.denx.de/u-boot-rockchip

u-boot-rockchip changes for 2019.04-rc1:
  * support for Chromebook Bob
  * full pinctrl driver using DTS properties
  * documentation improvements
  * I2S support for some Rockchip SoCs

5 years agoMerge tag 'mips-pull-2019-02-01' of git://git.denx.de/u-boot-mips
Tom Rini [Sat, 2 Feb 2019 15:11:12 +0000 (10:11 -0500)]
Merge tag 'mips-pull-2019-02-01' of git://git.denx.de/u-boot-mips

- MIPS: mscc: jr2: small fixes
- MIPS: mscc: luton: add ethernet and switch driver
- MIPS: mt76xx: fix timer frequency

5 years agoMerge branch '2019-02-01-master-imports'
Tom Rini [Sat, 2 Feb 2019 15:08:50 +0000 (10:08 -0500)]
Merge branch '2019-02-01-master-imports'

- Various TI platforms have been updated and DTS files re-synced and
  options disabled if not used or migrated to the DM versions
- Improvements to the dumpimage tool
- Rename SPL FAT/EXT filesystem support symbols for consistency and then
  allow them to be used to save more space in SPL.
- More lmb fixes
- Partial migration of CONFIG_BUILD_TARGET

5 years agoKconfig: set default BUILD_TARGET for kirkwood
Chris Packham [Fri, 18 Jan 2019 07:46:43 +0000 (20:46 +1300)]
Kconfig: set default BUILD_TARGET for kirkwood

Now that BUILD_TARGET is in Kconfig we can define a default for boards
using the Kirkwood SoC.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
5 years agoKconfig: Migrate CONFIG_BUILD_TARGET
Jagan Teki [Fri, 18 Jan 2019 07:22:49 +0000 (12:52 +0530)]
Kconfig: Migrate CONFIG_BUILD_TARGET

Migrate CONFIG_BUILD_TARGET into Kconfig.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agotest: lib: lmb: add lmb test for multiple RAM banks
Simon Goldschmidt [Fri, 1 Feb 2019 20:23:59 +0000 (21:23 +0100)]
test: lib: lmb: add lmb test for multiple RAM banks

This adds one test case that checks that allocation with multiple
DRAM banks works correctly.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agolmb: handle more than one DRAM BANK
Simon Goldschmidt [Sat, 26 Jan 2019 21:13:04 +0000 (22:13 +0100)]
lmb: handle more than one DRAM BANK

This fixes the automatic lmb initialization and reservation for boards
with more than one DRAM bank.

This fixes the CVE-2018-18439 and -18440 fixes that only allowed to load
files into the firs DRAM bank from fs and via tftp.

Found-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agotools: dumpimage: Clarify help
Martyn Welch [Sat, 26 Jan 2019 02:31:54 +0000 (02:31 +0000)]
tools: dumpimage: Clarify help

Help message isn't clear over the use of the "-T" option (it's to declare
the type of image that the tool is operating on), which also is optional
as it defaults to the default image type. It's also missing a description
of the "-o" option, so add it.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
5 years agotools: dumpimage: Add help option and make error paths consistent
Martyn Welch [Sat, 26 Jan 2019 02:31:53 +0000 (02:31 +0000)]
tools: dumpimage: Add help option and make error paths consistent

The utility dumpimage has error paths that display the usage and others
that exit without displaying usage. Add an explicit help option to
dumpimage to display the usage and remove it's use in error paths to make
the error messages more obvious and errors paths more consistent.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
5 years agotools: dumpimage: Simplify internal logic
Martyn Welch [Sat, 26 Jan 2019 02:31:52 +0000 (02:31 +0000)]
tools: dumpimage: Simplify internal logic

There are 3 supported modes of operation:

1) Show version
2) List image contents
3) Extract image component

Option (1) terminates early, so only options (2) and (3) remain. Remove
redundant check for these modes.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
5 years agotools: dumpimage: Simplify arguments
Martyn Welch [Sat, 26 Jan 2019 02:31:51 +0000 (02:31 +0000)]
tools: dumpimage: Simplify arguments

The dump image utility has very confusing syntax. If called to list image
contents ("-l") it takes the image name as a positional argument. If the
utility is called to extract something from the image, the image must be
provided via the optional argument "-i" as well as the positional argument
but the value passed in the positional argument will be completely
ignored.

Simplify dumpimage by always providing the image as the first positional
argument. Assume we want to dump something from the image if we do not
provide the "-l" option for now.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
5 years agotools: dumpimage: Provide more feedback on error
Martyn Welch [Sat, 26 Jan 2019 02:31:50 +0000 (02:31 +0000)]
tools: dumpimage: Provide more feedback on error

The dumpimage utility errors out in a number of places without providing
sufficient feedback to allow the user to easily determine what they have
done wrong. Add addtional error messages to make the cause of the failure
more obvious.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
5 years agoregulator: pbias: Handle extended drain IO when changing omap36 PBIAS
Adam Ford [Thu, 24 Jan 2019 20:33:36 +0000 (14:33 -0600)]
regulator: pbias: Handle extended drain IO when changing omap36 PBIAS

The OMAP36 and DM37 TRM state to disable extneded drain IO before
changing the PBIAS.  This patch does this before pmic writes if
the CONFIG_MMC_OMAP36XX_PINS flag is set and the cpu family is
omap36xx

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agorockchip: rk3399: spl: ensure that debug_uart_init is called
Philipp Tomsich [Fri, 1 Feb 2019 15:48:31 +0000 (16:48 +0100)]
rockchip: rk3399: spl: ensure that debug_uart_init is called

With the latest changes to add support for the Chromebook Bob,
initialisation through debug_uart_init() did no longer get called for
other targets.

Fix this, by moving debug_uart_init() out of the Bob-specific

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3399-puma: enable SPL_ATF_NO_PLATFORM_PARAM
Philipp Tomsich [Fri, 1 Feb 2019 14:24:26 +0000 (15:24 +0100)]
rockchip: rk3399-puma: enable SPL_ATF_NO_PLATFORM_PARAM

As we're working on the next update of our ATF (and U-Boot and the ATF
are out-of-sync), let's temporarily enable SPL_ATF_NO_PLATFORM_PARAM to
reduce compatibility issues.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agopinctrl: Kconfig: fix missing include of rockchip/Kconfig
Philipp Tomsich [Fri, 1 Feb 2019 14:15:38 +0000 (15:15 +0100)]
pinctrl: Kconfig: fix missing include of rockchip/Kconfig

After the merge of the new, generic pinctrl-code, the include for
rockchip/Kconfig was missing.  Add it here, so we can select the
pinctrl-driver for SPL.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agopinctrl: Kconfig: sort includes alphabetically
Philipp Tomsich [Fri, 1 Feb 2019 14:11:48 +0000 (15:11 +0100)]
pinctrl: Kconfig: sort includes alphabetically

To make adding new subdirectories easier, let's enforce alphabetical
ordering of the includes of Kconfig files in the respective
subdirectories.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Add MAINTAINER entry for chromebook_speedy
Philipp Tomsich [Fri, 1 Feb 2019 08:34:06 +0000 (09:34 +0100)]
rockchip: Add MAINTAINER entry for chromebook_speedy

This adds a MAINTAINER entry for chromebook_speedy.

Without this, we get the following warnings from the maintainers
check:
    WARNING: no status info for 'chromebook_minnie'
    WARNING: no maintainers for 'chromebook_minnie'

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Add support for chromebook_bob
Simon Glass [Mon, 21 Jan 2019 21:53:36 +0000 (14:53 -0700)]
rockchip: Add support for chromebook_bob

Bob is a 10-inch chromebook produced by Asus. It has two USB 3.0 type-C
ports, 4GB of SDRAM, WiFi and a 1280x800 display. It uses its USB ports
for both power and external display. It includes a Chrome OS EC
(Cortex-M3) to provide access to the keyboard and battery functions.

Support so far includes only:
- UART
- SDRAM
- MMC, SD card
- Cros EC (but not keyboard)

Not included:
- Keyboard
- Display
- Sound
- USB
- TPM

Bob is quite similar to Kevin, the Samsung Chromebook Plus, but support
for this is not provided in this series.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: gru: Add extra device-tree settings
Simon Glass [Mon, 21 Jan 2019 21:53:35 +0000 (14:53 -0700)]
rockchip: gru: Add extra device-tree settings

Add some U-Boot-specific settings. These should really go in the
*u-boot.dtsi file, but it seems that rk3399 does not use that yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Implement spl_gpio in the GPIO driver
Simon Glass [Mon, 21 Jan 2019 21:53:34 +0000 (14:53 -0700)]
rockchip: Implement spl_gpio in the GPIO driver

Allow rockchip boards to use GPIOs before driver model is ready. This is
really only useful for setting GPIOs to enable the early debug console, if
needed on some platforms.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Move pull-up/down enum into a common file
Simon Glass [Mon, 21 Jan 2019 21:53:33 +0000 (14:53 -0700)]
rockchip: Move pull-up/down enum into a common file

At present this enum is only available to rk3288. Move it so that other
rockchip SoCs can access it. It is needed for the SPL GPIO driver for
rk3999 in a later patch.

Also adjust the enum name to lower case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3399: Add ROCKCHIP_DEVICE_SETTINGS to set env
Simon Glass [Mon, 21 Jan 2019 21:53:32 +0000 (14:53 -0700)]
rockchip: rk3399: Add ROCKCHIP_DEVICE_SETTINGS to set env

Some boards use different stdio environment variables from the default.
Provide a #define for this which can be set before including the header
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Tidy up board include-file ordering
Simon Glass [Mon, 21 Jan 2019 21:53:31 +0000 (14:53 -0700)]
rockchip: Tidy up board include-file ordering

These board files have inconsistent #include ordering. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: clk: Add mention of four new clocks
Simon Glass [Mon, 21 Jan 2019 21:53:30 +0000 (14:53 -0700)]
rockchip: clk: Add mention of four new clocks

These clocks are needed to get MMC running. We don't actually support
setting them yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Add settings for Samsung LPDDR3 4GB SDRAM 1866MHz
Simon Glass [Mon, 21 Jan 2019 21:53:29 +0000 (14:53 -0700)]
rockchip: Add settings for Samsung LPDDR3 4GB SDRAM 1866MHz

This memory is used on Bob. Add settings for this, taken from coreboot.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Allow booting from SPI
Simon Glass [Mon, 21 Jan 2019 21:53:28 +0000 (14:53 -0700)]
rockchip: Allow booting from SPI

The u-boot,spl-boot-device property only allows MMC at present. Add SPI as
well for boards that boot from SPI flash.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Clarify docs on SPI writing
Simon Glass [Mon, 21 Jan 2019 21:53:27 +0000 (14:53 -0700)]
rockchip: Clarify docs on SPI writing

We use every second block when creating a SPI image, so update the text to
say this explicitly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: evb_rk3399: Tidy up the README
Simon Glass [Mon, 21 Jan 2019 21:53:26 +0000 (14:53 -0700)]
rockchip: evb_rk3399: Tidy up the README

Add mention of a prerequisite needed to build the image. Also adjust the
English wording in a few places.

Ideally this should move to using binman to produce images, and avoid the
manual steps.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Adjust rk3399 device tree to be closer to linux
Simon Glass [Mon, 21 Jan 2019 21:53:25 +0000 (14:53 -0700)]
rockchip: Adjust rk3399 device tree to be closer to linux

This file has changed upstream, with some additions and changes. Move the
U-Boot version towards this.

Some USB changes seem to be incompatible with how the bindings work on
rockchip in U-Boot. Testing is needed to make sure that USB still works
correct, and adjust the code (not device tree) if not.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Bring in device tree files for rk3399-gru
Simon Glass [Mon, 21 Jan 2019 21:53:24 +0000 (14:53 -0700)]
rockchip: Bring in device tree files for rk3399-gru

Bring in these files from Linux v4.20.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Drop note about supporting other SoCs
Simon Glass [Mon, 21 Jan 2019 21:53:23 +0000 (14:53 -0700)]
rockchip: Drop note about supporting other SoCs

Quite a wide range of Rockchip SoCs are supported in mainline U-Boot now,
so drop the comment about needing to add more.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Add mention of other boards
Simon Glass [Mon, 21 Jan 2019 21:53:22 +0000 (14:53 -0700)]
rockchip: Add mention of other boards

At present some Rockchip SoCs and boards are not mentioned in the README.
So that people can see which SoCs are supported, expand the list to
include everything.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agogpio: Add a simple GPIO API for SPL
Simon Glass [Mon, 21 Jan 2019 21:53:21 +0000 (14:53 -0700)]
gpio: Add a simple GPIO API for SPL

In space-constrained environments or before driver model is available, it
is sometimes necessary to set GPIO values. Add an SPL API for this, to
allow early board code to change GPIOs. The caller must provide the
register address, so that the drivers can be fairly generic.

This API can be implemented by GPIO drivers, behind a suitable guard,
like #ifdef CONFIG_SPL_BUILD.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agogpio: Use more command-specific enums values
Simon Glass [Mon, 21 Jan 2019 21:53:20 +0000 (14:53 -0700)]
gpio: Use more command-specific enums values

At present this file uses GPIO_OUTPUT and GPIO_INPUT as its sub-command
values. These are pretty generic names. Add a 'C' suffix to avoid possible
conflicts.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agoclk: Improve debug message in clk_set_default_rates()
Simon Glass [Mon, 21 Jan 2019 21:53:19 +0000 (14:53 -0700)]
clk: Improve debug message in clk_set_default_rates()

It is helpful to print the clock number as well as the index, so that this
can be looked up in the binding file. Update the debug() statement to do
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agolib: Allow using display_buffer() in SPL
Simon Glass [Mon, 21 Jan 2019 21:53:18 +0000 (14:53 -0700)]
lib: Allow using display_buffer() in SPL

At present this function uses printf() format strings that are not
supported in SPL, so the output just consists of %llx strings on 64-bit.
machines. Fix this by adding a special case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agoARM: dts: rk322x: Correct the uart2 default pin configuration
David Wu [Wed, 2 Jan 2019 13:02:35 +0000 (21:02 +0800)]
ARM: dts: rk322x: Correct the uart2 default pin configuration

To match the iomux setting of uart2 at SPL, correct the uart2
default pin configuration, if not changed, the evb-rk3229 can't
output the log message.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agopinctrl: rockchip: Clean the unused rockchip pinctrl drivers
David Wu [Wed, 2 Jan 2019 13:02:23 +0000 (21:02 +0800)]
pinctrl: rockchip: Clean the unused rockchip pinctrl drivers

If we used the pinctrl-rockchip driver, these code is not needed,
so remove them.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: defconfig: Clean the unused pinctrl config
David Wu [Wed, 2 Jan 2019 13:01:55 +0000 (21:01 +0800)]
rockchip: defconfig: Clean the unused pinctrl config

If we used the pinctrl-rockchip driver, these config is not needed,
so remove them.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agopinctrl: rockchip: Add common rockchip pinctrl driver
David Wu [Wed, 2 Jan 2019 13:00:55 +0000 (21:00 +0800)]
pinctrl: rockchip: Add common rockchip pinctrl driver

Use this driver to fit all Rockchip SOCs and to support
the desired pinctrl configuration via DTS.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agork3288: chrome: defconfig: Enable FDT for new pinctrl driver
David Wu [Wed, 2 Jan 2019 13:00:40 +0000 (21:00 +0800)]
rk3288: chrome: defconfig: Enable FDT for new pinctrl driver

The FDT is requested for new pinctrl driver, disable SPL_OF_PLATDATA
and enable SPL_OF_LIBFDT to make FDT be built in.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agoARM: rockchip: Remove the pinctrl request at rk3288-board-spl
David Wu [Wed, 2 Jan 2019 12:51:00 +0000 (20:51 +0800)]
ARM: rockchip: Remove the pinctrl request at rk3288-board-spl

If we use the new pinctrl driver, the pinctrl setup will be done
by device probe. Remove the pinctrl setup at rk3288-board-spl.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agoARM: rockchip: Kconfig: Remove the SPL_PINCTRL for rk3188
David Wu [Wed, 2 Jan 2019 12:50:59 +0000 (20:50 +0800)]
ARM: rockchip: Kconfig: Remove the SPL_PINCTRL for rk3188

It seems that pinctrl is not requested for rk3188 SPL, remove it so
that can save more space for SPL image size.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agoARM: rockchip: rk3188: Remove the pinctrl setup and enable uart at SPL
David Wu [Wed, 2 Jan 2019 12:50:58 +0000 (20:50 +0800)]
ARM: rockchip: rk3188: Remove the pinctrl setup and enable uart at SPL

When the boot ROM sets up MMC we don't need to do it again. Remove the
MMC setup code entirely, but we also need to enable uart for debug message.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3399-evb: defconfig: Enable FDT for new pinctrl driver
David Wu [Wed, 2 Jan 2019 12:50:57 +0000 (20:50 +0800)]
rockchip: rk3399-evb: defconfig: Enable FDT for new pinctrl driver

The FDT is requested for new pinctrl driver, disable SPL_OF_PLATDATA
to make FDT be built in.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: add support for veyron-speedy (ASUS Chromebook C201)
Marty E. Plummer [Sun, 6 Jan 2019 02:12:08 +0000 (20:12 -0600)]
rockchip: add support for veyron-speedy (ASUS Chromebook C201)

This adds support for the ASUS C201, a RK3288-based clamshell
device. The device tree comes from linus's linux tree at
3f16503b7d2274ac8cbab11163047ac0b4c66cfe. The SDRAM parameters
are for 4GB Samsung LPDDR3, decoded from coreboot's
src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-samsung-4GB.inc

Signed-off-by: Marty E. Plummer <hanetzer@startmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: dts: rk3399-firely: add 'same-as-spl'
Mark Kettenis [Fri, 4 Jan 2019 19:49:32 +0000 (20:49 +0100)]
rockchip: dts: rk3399-firely: add 'same-as-spl'

Like on rk3399-puma we want to continue booting the fill U-Boot from
the same device as the SPL stage.

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Drop call to rockchip_dnl_mode_check() for now
Simon Glass [Sat, 29 Dec 2018 13:16:41 +0000 (06:16 -0700)]
rockchip: Drop call to rockchip_dnl_mode_check() for now

This function causes a 5-second delay and stops the display working on
minnie. This code should be in a driver and should only be enabled by
a device-tree property, so that it does not affect devices which do not
have this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agosound: rockchip: Add sound support for jerry
Simon Glass [Fri, 28 Dec 2018 03:15:23 +0000 (20:15 -0700)]
sound: rockchip: Add sound support for jerry

Jerry uses a max98090 audio codec and the internal SoC I2S peripheral.
Enable sound support and add the required device-tree pieces.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Add a sound driver
Simon Glass [Fri, 28 Dec 2018 03:15:22 +0000 (20:15 -0700)]
rockchip: Add a sound driver

Add a sound driver for rk3288 supporting chromebook_jerry. This uses the
I2S driver, and existing audio codec and the clock/pinmux support.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: Add an I2S driver
Simon Glass [Fri, 28 Dec 2018 03:15:21 +0000 (20:15 -0700)]
rockchip: Add an I2S driver

Add a driver for I2S which allows audio data to be sent from the SoC to
the audio codec. The sample rate and other settings are hard-coded for now
as there is no suitable device-tree binding available.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3288: Add i2s pinctrl and clock support
Simon Glass [Fri, 28 Dec 2018 03:15:20 +0000 (20:15 -0700)]
rockchip: rk3288: Add i2s pinctrl and clock support

Add support for setting pinctrl and clock for I2S on rk3288. This allows
the sound driver to operate. These settings were created by rkmux.py

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agoARM: DTS: am43xx: Enable the DTS entries for USB port #2 in SPL
Jean-Jacques Hiblot [Thu, 24 Jan 2019 14:42:52 +0000 (15:42 +0100)]
ARM: DTS: am43xx: Enable the DTS entries for USB port #2 in SPL

This is required to enable the USB port #2 in SPL when DM_USB is used.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agoARM: DTS: am43xx: Add aliases for the USB ports
Jean-Jacques Hiblot [Thu, 24 Jan 2019 14:42:51 +0000 (15:42 +0100)]
ARM: DTS: am43xx: Add aliases for the USB ports

Although not required, it doesn't hurt to explicitly map the USB ports to
a USB controller. Without this, the port number will be derived from the
binding order of the peripheral devices.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
5 years agoARM: DTS: Resync am3517-evm.dts with Linux 5.0-rc3
Adam Ford [Wed, 23 Jan 2019 18:46:42 +0000 (12:46 -0600)]
ARM: DTS: Resync am3517-evm.dts with Linux 5.0-rc3

The chosen node was added in the kernel.  This may come in handy
in the future, so resync with 5.0-rc3

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: dts: da850-evm: Re-sync with Kernel 5.0
Adam Ford [Wed, 23 Jan 2019 18:37:57 +0000 (12:37 -0600)]
ARM: dts: da850-evm: Re-sync with Kernel 5.0

Resync with Kernel 5.0-rc3

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: am3517_evm: Enable DM_SPI and DM_USB
Adam Ford [Wed, 23 Jan 2019 14:32:19 +0000 (08:32 -0600)]
ARM: am3517_evm: Enable DM_SPI and DM_USB

To comply with pending requirements, this sets the flags to
enable DM_SPI and DM_USB.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agospl: fat/fs: Add control to build FS EXT4 in SPL
Tien Fong Chee [Wed, 23 Jan 2019 06:20:06 +0000 (14:20 +0800)]
spl: fat/fs: Add control to build FS EXT4 in SPL

CONFIG_SPL_FS_EXT4 can be used to include/exclude the FS EXT4 from
SPL build. Excluding the FS EXT4 from SPL build can help to save 20KiB
memory.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agospl: Kconfig: Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPL_FS_EXT4
Tien Fong Chee [Wed, 23 Jan 2019 06:20:05 +0000 (14:20 +0800)]
spl: Kconfig: Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPL_FS_EXT4

Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPLY_FS_EXT4 so both
obj-$(CONFIG_$(SPL_)FS_EXT4) and CONFIG_IS_ENABLED(FS_EXT4) can be
used to control the build in both SPL and U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agospl: fat/fs: Add option to include/exclude FAT write build in SPL
Tien Fong Chee [Wed, 23 Jan 2019 06:20:04 +0000 (14:20 +0800)]
spl: fat/fs: Add option to include/exclude FAT write build in SPL

Most of the time SPL only needs very simple FAT reading, so having
CONFIG_IS_ENABLED(FAT_WRITE) to exclude it from SPL build would help
to save 64KiB default max clustersize from memory.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agospl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT
Tien Fong Chee [Wed, 23 Jan 2019 06:20:03 +0000 (14:20 +0800)]
spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT

Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FAT so
obj-$(CONFIG_$(SPL_)FS_FAT) can be used to control the build in both
SPL and U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoconfigs: removing am335x_evm_usbspl_defconfig
Jean-Jacques Hiblot [Tue, 22 Jan 2019 15:48:19 +0000 (16:48 +0100)]
configs: removing am335x_evm_usbspl_defconfig

This feature is now supported by the main config for am335x_evm:
am335x_evm_defconfig

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoconfigs: am335x_evm: enable DM_USB_GADGET and USB_ETHER in u-boot and SPL
Jean-Jacques Hiblot [Tue, 22 Jan 2019 15:48:18 +0000 (16:48 +0100)]
configs: am335x_evm: enable DM_USB_GADGET and USB_ETHER in u-boot and SPL

The AM335x ROM boot is able to download the SPL from a RNDIS connection
on USB0. To enable a full RNDIS boot flow (romboot -> SPL -> u-boot -> ..),
we can use USB_ETHER in SPL and u-boot.
However this increase the size of the SPL past its limit. So removing the
unused SPL_EXT_SUPPORT.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoARM: DTS: am335x-evm: Use USB0 in peripheral mode
Jean-Jacques Hiblot [Tue, 22 Jan 2019 15:48:17 +0000 (16:48 +0100)]
ARM: DTS: am335x-evm: Use USB0 in peripheral mode

This USB port is mainly used for RNDIS and DFU. To be able to use it with
DM_USB and DM_USB_GADGET, we need to provide a dr_mode value in the DTS.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agousb: ether: call _usb_eth_halt() if initialization fails
Jean-Jacques Hiblot [Tue, 22 Jan 2019 15:48:16 +0000 (16:48 +0100)]
usb: ether: call _usb_eth_halt() if initialization fails

If the host does not respond in time, the initialization fails. However
the usb ether driver will still be registered. This will make
usb_gadget_probe_driver() fail the next time the initialization is
attempted because it cannot find an available UDC.

Fixing this by calling _usb_eth_halt() when the init fails.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
5 years agoam335x, shc: adapt shc board to DM
Heiko Schocher [Mon, 21 Jan 2019 05:16:28 +0000 (06:16 +0100)]
am335x, shc: adapt shc board to DM

port the am335x based shc board to DM, to get rid
of DW warnings when compiling U-Boot.

- remove uneccessary board code
- adapt defconfigs
- remove unneeded defconfigs
  configs/am335x_shc_prompt_defconfig
  configs/am335x_shc_sdboot_prompt_defconfig

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoARM: dts: am335x-shc: add u-boot specific dtsi
Heiko Schocher [Mon, 21 Jan 2019 05:16:27 +0000 (06:16 +0100)]
ARM: dts: am335x-shc: add u-boot specific dtsi

add u-boot specific am335x-shc-u-boot.dtsi file,
in which we add u-boot specific adaptions.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoarm: dts: add am335x-shc.dts for shc board
Heiko Schocher [Mon, 21 Jan 2019 05:16:26 +0000 (06:16 +0100)]
arm: dts: add am335x-shc.dts for shc board

add DTS from linux tree commit
"47bfa6d9dc8c060bf56554a465c9031e286d2f80"

change for U-Boot:
switch to SPDX-license identifier.

Signed-off-by: Heiko Schocher <hs@denx.de>
5 years agoconfigs: mscc_luton: Add network support.
Horatiu Vultur [Thu, 31 Jan 2019 14:30:40 +0000 (15:30 +0100)]
configs: mscc_luton: Add network support.

Update default config to use network driver for Luton SoCs.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
5 years agonet: Add MSCC Luton networkd driver.
Horatiu Vultur [Thu, 31 Jan 2019 14:30:39 +0000 (15:30 +0100)]
net: Add MSCC Luton networkd driver.

Add network driver for Microsemi Ethernet switch, it is
present on Luton SoCs.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
5 years agomips: mscc: luton: Add ethernet nodes for Luton.
Horatiu Vultur [Thu, 31 Jan 2019 14:30:38 +0000 (15:30 +0100)]
mips: mscc: luton: Add ethernet nodes for Luton.

Add nodes for pcb090 and pcb091. There is currently no support
in Linux for this SoC.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
5 years agonet: mscc: Remove unused variables
Horatiu Vultur [Thu, 31 Jan 2019 14:30:37 +0000 (15:30 +0100)]
net: mscc: Remove unused variables

Remove unused variables in the struct ocelot_private and make
miim variable static.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
5 years agonet: mscc: Move mac_table_add function into different file.
Horatiu Vultur [Thu, 31 Jan 2019 14:30:36 +0000 (15:30 +0100)]
net: mscc: Move mac_table_add function into different file.

Move the function mac_table_add into a different file,
so it can be reused.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
5 years agonet: mscc: Move ocelot_send and ocelot_recv in a different file.
Horatiu Vultur [Thu, 31 Jan 2019 14:30:35 +0000 (15:30 +0100)]
net: mscc: Move ocelot_send and ocelot_recv in a different file.

This functions can be reused by other MSCC SoCs therefore,
make them more generic and move them in separate files.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
5 years agonet: mscc: Move miim commands into separate file.
Horatiu Vultur [Thu, 31 Jan 2019 14:30:34 +0000 (15:30 +0100)]
net: mscc: Move miim commands into separate file.

Move miim functions that can be shared in a different file inside
mscc_eswitch.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
5 years agonet: mscc: Move ocelot_switch to mscc_eswitch folder
Horatiu Vultur [Thu, 31 Jan 2019 14:30:33 +0000 (15:30 +0100)]
net: mscc: Move ocelot_switch to mscc_eswitch folder

Move file ocelot_switch to mscc_eswitch to prepare to add
new net drivers for other MSCC SoCs.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
5 years agomips: mt76xx: Use correct timer frequency
Stefan Roese [Thu, 31 Jan 2019 06:24:43 +0000 (07:24 +0100)]
mips: mt76xx: Use correct timer frequency

Testing has shown that the timer on the MT7688 platforms does not run
correctly (too fast timeout). This patch changes
CONFIG_SYS_MIPS_TIMER_FREQ from 200MHz to 290MHz which is the correct
value, as its also used in Linux.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
5 years agoMSCC: Fix Jaguar2 board detection.
Horatiu Vultur [Tue, 29 Jan 2019 09:58:34 +0000 (10:58 +0100)]
MSCC: Fix Jaguar2 board detection.

When power cycle the Jaguar2 boards, it couldn't read the
phys, therefore it always deduce that the board type is
pcb111.

Add a small delay after setting the gpio pins, fix the
issue.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
5 years agoMSCC: Jaguar2 enable debug uart
Horatiu Vultur [Tue, 29 Jan 2019 09:50:16 +0000 (10:50 +0100)]
MSCC: Jaguar2 enable debug uart

Enable debug uart for Jaguar2 SoC family.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
5 years agoMerge tag 'video-updates-for-2019.04-rc1' of git://git.denx.de/u-boot-video
Tom Rini [Thu, 31 Jan 2019 21:07:37 +0000 (16:07 -0500)]
Merge tag 'video-updates-for-2019.04-rc1' of git://git.denx.de/u-boot-video

- ihs and imx driver fixes
- relax EDID validation checks for 0 hsync/vsync
  pulse width (support some quirky displays)

5 years agoMerge tag 'u-boot-amlogic-20190131' of git://git.denx.de/u-boot-amlogic
Tom Rini [Thu, 31 Jan 2019 12:19:52 +0000 (07:19 -0500)]
Merge tag 'u-boot-amlogic-20190131' of git://git.denx.de/u-boot-amlogic

- Add features and fixups to support video on Amlogic GX SoCs
- Add video support for Amlogic GX SoC
- Add DT fixups
- Enable Video and USB Console for libretech-cc board

5 years agoarm: libretech-cc: enable video by default
Maxime Jourdan [Thu, 20 Dec 2018 14:13:07 +0000 (15:13 +0100)]
arm: libretech-cc: enable video by default

libretech-cc being the main device tested with CONFIG_VIDEO_MESON, let's
enable it by default.

Also enable:
 - CONFIG_SYS_WHITE_ON_BLACK for prettiness
 - CONFIG_VIDEO_DT_SIMPLEFB for framebuffer sharing with kernel

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agoarm: meson64: enable console mux and console env by default
Maxime Jourdan [Thu, 20 Dec 2018 14:09:12 +0000 (15:09 +0100)]
arm: meson64: enable console mux and console env by default

With the recent addition of the meson VPU driver, enable the following
config entries by default for meson-64 targets: CONFIG_CONSOLE_MUX,
CONFIG_SYS_CONSOLE_IS_IN_ENV.

This allows outputting the console via video if CONFIG_VIDEO_MESON is
selected.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agoconfigs: meson64: use vidconsole and usbkbd if enabled
Neil Armstrong [Thu, 26 Jul 2018 09:45:46 +0000 (11:45 +0200)]
configs: meson64: use vidconsole and usbkbd if enabled

Allows displaying the console via video and using a USB keyboard.

Also enables CONFIG_SPLASH_SCREEN if using video.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agoarm: meson: board-gx: Setup VPU in fdt
Maxime Jourdan [Tue, 11 Dec 2018 11:52:04 +0000 (12:52 +0100)]
arm: meson: board-gx: Setup VPU in fdt

If VIDEO_MESON is enabled, we need to setup the fdt for the framebuffer.

Call meson_vpu_rsv_fb() which reserves the framebuffer memory region for
EFI, and sets up simple-framebuffer nodes if simplefb support is
enabled.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agoarm64: dts: meson-gx: add hhi reg entry to hdmi_tx
Maxime Jourdan [Tue, 11 Dec 2018 10:35:16 +0000 (11:35 +0100)]
arm64: dts: meson-gx: add hhi reg entry to hdmi_tx

There's no reliable way to reuse the hhi entry from the vpu as is done
in the linux kernel, so we duplicate it here.

We will be able to sync against kernel DTS in the future when the VPU
gets based on the clock framework rather than the HHI reg.

Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoarm64: dts: meson-gx: Add hdmi_5v regulator as hdmi tx supply
Neil Armstrong [Tue, 6 Nov 2018 08:30:14 +0000 (09:30 +0100)]
arm64: dts: meson-gx: Add hdmi_5v regulator as hdmi tx supply

The hdmi_5v regulator must be enabled to provide power to the physical HDMI
PHY and enables the HDMI 5V presence loopback for the monitor.

Fixes: b409f625a6d5 ("ARM64: dts: meson-gx: Add HDMI_5V regulator on selected boards")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
[backport of linux commit e1f2163deac059ad39f07aba9e314ebe605d5a7a]