anv/image: Minor refactor of VkImageFormatProperties::sampleCounts

The code in anv_get_image_format_properties() that set sampleCounts
appears correct, but weirdly inconsistent. Clean the code to
consistently set sampleCounts in the same location as
maxExtent/maxMipLevels/maxArraySize.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/image: Rename get_wsi_format_modifier_properties_list()

Rename it to get_drm_format_modifier_properties_list() because it is now
independent of WSI.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/image: Fix VkExternalMemoryProperties for images (v5)

In vkGetPhysicalDeviceImageFormatProperties2, we advertised support for
VK_IMAGE_TILING_LINEAR and VK_IMAGE_TILING_OPTIMAL for all memory
handles.

However, when importing or exporting an image, there must exist a method
that enables the app and driver to agree on the image's memory layout.
If no method exists, then we should reject image creation.

v2:
  - Reduce copy-paste for Lionel.
v3:
  - Treat tiling LINEAR and DRM_FORMAT_MODIFIER as identical when
    determing compatible memory handles.
  - Improve comments.
v4:
  - Remove DMA_BUF from opaque_fd_only_props.
v5:
  - Minor changes to code style for `if`. (for jekstrand)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v4)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v4)

anv/image: Delete the list of modifier-compatible formats

The code asserted that we supported no more than 4 formats with
modifiers: /VK_FORMAT_B8G8R8(A8)?_(SRGB|UNORM)/.
Strangely, 2 of the 4 were non-power-of-two formats, which were rejected
elsewhere.

The assertion's comment suggested that we use a hard-coded list of
formats because the driver was not yet able to determine if a given
format was compatible with a given modifier.  Therefore, the list only
contained formats that were compatible with *all* modifiers. That code
deficiency no longer exists: anv_get_image_format_features() can check
format/modifier compatibility.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/image: Refactor iteration over modifiers

Refactor in get_wsi_format_modifier_properties_list().

Instead of iterating over a function-local hard-coded list, iterate over
all modifiers in isl_drm.c.

This will improve agreement in behavior between
VkDrmFormatModifierPropertiesListEXT
VkPhysicalDeviceImageDrmFormatModifierInfoEXT.

The future disagreement this patch attempts to prevent is the
combination of:
    a. VkDrmFormatModifierPropertiesListEXT neglects to return a valid
       modifier because its hard-coded list of modifiers drifts
       out-of-sync with hard-coded lists elsewhere in the code. (Already
       today, the list in get_wsi_format_modifier_properties_list() does
       not match the list in isl_drm.c; though, this has produced no bug
       yet).
    b. vkGetPhysicalDeviceImageFormatProperties2 accepts, via
       VkPhysicalDeviceImageDrmFormatModifierInfoEXT, the modifier
       overlooked in (a), because it does not use the same hard-coded
       list in get_wsi_format_modifier_properties_list(). (Recall that
       the spec requires vkGetPhysicalDeviceImageFormatProperties2 to
       correctly accept/reject any int that the app provides, even when
       the int is an invalid modifier).
    c. The Bug. The driver told the app in (b) that it can legally
       create an image with format+modifier, but the app cannot query
       the VkFormatFeatureFlags of the format+modifier due to (a).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

isl: Make public the list of modifiers

This allows Vulkan and GL to iterate over the full list of modifiers
instead of hard-coding in various places the "same" list as isl.

(Anvil's list has already diverged from isl's list. It omits Gen12
modifiers).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/image: Fill drmFormatModifierTilingFeatures (v2)

Fill VkDrmFormatModifierPropertiesEXT::drmFormatModifierTilingFeatures
with anv_get_image_format_features().

anv_formats.c:get_wsi_format_modifier_properties_list() incorrectly left
it uninitialized.

v2: Increment drmFormatModifierPlaneCount if modifier support aux.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v2)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v2)

anv/image: Teach anv_get_image_format_features() about modifiers (v3)

Because anv_get_image_format_features() now understands modifiers, also
relocate most of the modifier compatibility checks from
anv_get_format_plane() into anv_get_image_format_features() in order to
avoid duplication.

The new signature forces some code movement in
anv_get_image_format_properties().

v2:
  - Reject VK_FORMAT_B4G4R4A4_UNORM_PACK16 with modifiers on HSW.
v3:
  - Revert the v2 change.
  - Query isl_format_layout instead of pipe_format. (for jekstrand)
  - Drop misguided comments. (for jekstrand)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v2)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v3)

isl: Add isl_format_layout::uniform_channel_type

If each format channel has the same base type (such unorm), then that
is the format's "uniform channel type".

Calculating the field at buildtime is probably better than looping over
all channels at runtime each time we wish to query it.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/image: Use isl_drm_modifier_get_score()

It replaces anv_drm_format_mod_score().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

isl: Define isl_drm_modifier_get_score() [v3]

Return the modifier's score, which indicates the driver's preference for the
modifier relative to others. A higher score is better. Zero means
unsupported.

Intended to assist selection of a modifier from an externally provided list,
such as VkImageDrmFormatModifierListCreateInfoEXT.

v2:
  - Rename anv_drm_format_mod_score to isl_drm_modifier_get_score.
  - Squash all incremental changes to anv_drm_format_mod_score.
v3:
  - Drop redundant 'unlikely'. (for nchery)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v2)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v3)

anv/image: Fix isl_surf_usage_flags for stencil images

Respect VkImageStencilUsageCreateInfoEXT.

CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/image: Check DISJOINT in vkGetPhysicalDeviceImageFormatProperties2 (v2)

The code did not return error when VK_IMAGE_CREATE_DISJOINT_BIT was
incompatible with the other input params.

If the Vulkan spec forbids a set of input params for vkCreateImage,
but permits them for vkGetPhysicalDeviceImageFormatProperties2,
then vkGetPhysicalDeviceImageFormatProperties2 must reject those input
params with failure.

- v2: Clearer commit message.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v2)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

zink: more accurately track supported blits

We don't care if blits need to respect render-conditions if there's no
active one. So let's hit the potentially faster native blit-paths
instead.

Fixes: 5743fa6e709 ("zink: enable conditional rendering if available")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3792
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7606>

zink: always insert barriers for general-layout

We need to always have barriers between individual uses of resources
in the general-layout, because otherwise a write-cache might not be
flushed before the resource is used.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7652>

zink: mark general layout as transfer-read/write

The general layout can be used for transfers, so we need to make sure
the vulkan driver knows. This will help the driver know when it needs to
flush caches.

While we're at it, also add shader-read, which is another access we use.
We should stop using that one ASAP, but for now this seems like the
right thing to do.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7652>

v3dv: rename playout and dslayout fields to use underscores.

Following a suggestion from Alejandro, since playout is a word on its own
and can be confusing. It also makes it more consistent with other
variable names that use an underscore.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7651>

v3dv: blit shader clean-ups

This avoids redundant per-layer operations that are the same across
layers or that only need to do once. Namely:

- The sampler for the blit source is the same for all layers.
- The decision about whether we need to load TLB contents or not only
  needs to be done once.
- Some command buffer state such as the pipeline, the viewport and the
  scissor is the same for all layers and should only be bound once.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7651>

v3dv: initialize pipeline layouts for meta operations at driver initialization

This removes the need to lock just to check if we have created them
due to the lazy allocation strategy we had in place.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7651>

v3dv: add a buffer to image copy path using a texel buffer

This is much faster than the blit fallback (which requires to upload
the linear buffer to a tiled image) and the CPU path.

A simple stress test involving 100 buffer to image copies of a
single layer image with 10 mipmap levels provides the following
results:

Path           | Recording Time | Execution Time |
-------------------------------------------------|
Texel Buffer   |     2.954s      |     0.137s    |
-------------------------------------------------|
Blit           |    10.732s      |     0.148s    |
-------------------------------------------------|
CPU            |     0.002s      |     1.453s    |
-------------------------------------------------|

So generally speaking, this texel buffer copy path is the fastest
of the paths that can do partial copies, however, the CPU path might
provide better results in cases where command buffer recording is
important to overall performance. This is probably the reason why
the CPU path seems to provide slightly better results for vkQuake2.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7651>

v3dv: fix width for buffer view texture state

This is in units of texels, not bytes.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7651>

radv: don't subtract max_verts_per_prim from hw_max_esverts on gfx10.3

Ported from RadeonSI.

GFX10.3 does it properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7566>

radv: don't count unusable vertices to the NGG LDS size

Ported from RadeonSI.

To get optimal LDS usage since the previous change.

Cc: 20.2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7566>

radv: fix applying the NGG minimum vertex count requirement

Ported from RadeonSI.

The restriction was applied too late.

Cc: 20.2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7566>

radv: do VGT_FLUSH when switching NGG -> legacy on Sienna Cichlid

Ported from RadeonSI.

Cc: 20.2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7566>

mesa/gallium: add MESA_MAP_ONCE / PIPE_MAP_ONCE

If set, this bit tells the driver that the buffer will only be
mapped once.

radeonsi uses it to disable its "never unmap buffers" optimisations.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3660
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7428>

radv: Fix radv_queue_init failure handling

Do not destroy pending_mutex or thread_mutex if uninitialized.

Do not use or destroy thread_cond if uninitialized.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7599>

panfrost: Don't expose fp16 support on Bifrost unless explicitly requested

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Stop extracting the immediate attribute index from src0

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Add a varying_index field to bi_texture

So we can get rid of the offset adjusment done in pack_variant()

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Fix LD_VAR with non-constant index

src0 and src1 were mixed leading to invalid varying indices. In order to
fix that properly, we first extend load_vary to pass the immediate index
through a dedicated field and add a special boolean. This way, we don't
have to make sure src0 always contains the index, and can instead match
the src numbering defined in ISA.xml.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Stop passing special varying names through src0

It's just clearer to have dedicated fields encoding the fact that the
LD_VAR should be SPECIAL, and another field storing the special var id.

With this change, the source index know matches the ISA.xml definition.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Pass LD_VAR update mode explicitly

Let the compiler pass the update mode instead of inferring from the
constant value.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Move LD_VAR packing out of bi_pack_add()

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Set roundmode to RTZ for f2u operations

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Let the GPU pick the right format based on the varying descriptor

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Support automatic register format

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Support txs operations

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/bi: Don't use TEXS for tex operations with a src that's not lod or coord

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7636>

pan/mdg: Try demoting uniforms instead of spilling to TLS

mir_estimate_pressure often underestimates the register pressure,
letting too many registers be used for uniforms, causing RA to fail.

Mitigate this by demoting some uniforms back to explicit loads to free
up work registers if register allocation fails.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7616>

turnip: Close sync_fd only if it is a valid file descriptor.

Fix defects reported by Coverity Scan.

Argument cannot be negative (NEGATIVE_RETURNS)
negative_returns: sync_fd is passed to a parameter that cannot be negative.

Fixes: cec0bc73e55 ("turnip: rework fences to use syncobjs")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7647>

clover/spirv: Add missing break for SpvOpExecutionMode case.

Fix defect reported by Coverity Scan.

Missing break in switch (MISSING_BREAK)
unterminated_case: The case for value SpvOpExecutionMode is not
terminated by a 'break' statement.

Fixes: ee5b46fcfdb ("clover/spirv: support CL_KERNEL_COMPILE_WORK_GROUP_SIZE")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7519>

frontends/va: Fix *num_entrypoints check.

Fix defect reported by Coverity Scan.

Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking num_entrypoints suggests that it
may be null, but it has already been dereferenced on all paths
leading to the check.

Fixes: 5bcaa1b9e970 ("st/va: add encode entrypoint v2")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7360>

freedreno: Disable PIPE_CAP_PREFER_IMM_ARRAYS_AS_CONSTBUF.

We now have NIR opt_large_constants support in place, so we can flip the
switch and get better optimization before lowering to a constant buffer,
but also avoid having constant data mixed in with the shader's uniforms,
which should lower CPU overhead on affected shaders.

Only a few shaders are affected (<.01% impact across shader-db), but for
those the impact is pretty big:

instructions in affected programs: 748 -> 639 (-14.57%)
nops in affected programs: 364 -> 284 (-21.98%)
non-nops in affected programs: 384 -> 355 (-7.55%)
mov in affected programs: 47 -> 27 (-42.55%)
cov in affected programs: 9 -> 6 (-33.33%)
dwords in affected programs: 932 -> 836 (-10.30%)
full in affected programs: 13 -> 14 (7.69%)
constlen in affected programs: 140 -> 64 (-54.29%)
(ss) in affected programs: 14 -> 15 (7.14%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5810>

freedreno+turnip: Upload large shader constants as a UBO.

Right now if the shader indirects on some large constant array, we see NIR
load_consts (usually from the const file) of its contents into general
registers, then indirection on the GPRs.  This often results in register
allocation failures, as it's easy to go beyond the ~256 dwords of
registers per invocation.

By moving the large constants to a UBO, we can load an arbitrary number of
them.  They also can be theoretically moved to the constant reg file (~2k
dwords), though you're unlikely to hit this path without an indirect load
on your large constant, and we don't yet let UBO indirect loads get moved
to constant regs.

This possibly won't work out right if we have 16-bit load_constants, but
without other MRs in flight we won't see 16-bit temps to be lowered to
this.

This allows 2 kerbal-space-program shaders to compile that previously
would fail, and fixes the new dEQP-VK and -GLES2 tests I wrote that
dynamically index a 40-element temporary array of float/vec2/vec3/vec4
with constant element initializers.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2789
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5810>

freedreno/ir3: Fix incorrect optimization of usage of 16-bit constbuf vals.

If you're loading a 32b word from the const file and doing a cov.u32u16
split to two 16bit values, we can't turn that into a reference of a 16-bit
float value directly from the constbuf, because the
CONSTANT_DEMOTION_ENABLE results in a f2f16 operation on the 32-bit value
that we didn't want.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5810>

freedreno/ir3: Switch emit_const_ptrs() to take BOs instead of prscs.

Just indirect in the caller, which means that I'll be able to pass a
non-resource BO in the large-constants case.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5810>

freedreno/ir3: Include at least 4 NOPs so that cffdump doesn't disasm junk.

cffdump looks at the following 4 instructions to decide if the shader has
*really* ended, so if we pack data after that (such as turnip's next
stage's shader), it might decode instructions that aren't really part of
the shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5810>

nir: Add a size_align helper function for aligning elements to 16 bytes.

This is useful for freedreno's intrinsic opt_large_constant lowering,
where we want arrays and struct elements aligned to 16 to avoid generating
lots of extra instructions to extract from the right component.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5810>

freedreno: Fix leak of shader binary on disk cache hits.

It's supposed to be ralloced -- there's not even a shader variant destroy
function for freeing, just ralloc_free() on the ir3_shader_variant or the
parent ir3_shader when you're done!

Fixes: f97acb4bb4b1 ("freedreno/ir3: disk-cache support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5810>

intel/fs: Add assert on the brw_STAGE_prog_data downcasts

Motivation is to detect earlier certain bugs that can occur when
missing a check for the stage before using the downcast.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7540>

spirv/cl: add enqueued workgroup size.

Unless the non uniform work group extension is supported, this
just aliases workgroupsize, so just do that for now.

Fixes:
CL CTS basic enqueued_local_size

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7642>

clover/image: handle MEM_KERNEL_READ_AND_WRITE flag.

fixes CTS 3.0 test_computeinfo

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7642>

clover: add CL 3.0 event/queue queries

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7642>

clover: add 3.0 program properties

the real IL code will rewrite this

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7642>

clover: add device/platform info for CL 3.0

This just adds all the dummy 2.x/3.0 device and platform
info queries that return fixed not supported values.

As these are supported they will have to be migrated into the core.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7642>

clover: add cl 3.0 SVM invalid support

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7642>

clover: add all CL 3.0 API with invalid functions

These CL 2.x APIs are all part of CL3.0 but have to return
specific values to show they aren't supported.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7642>

clover: add support command queue properties

Fixes api queue_properties_queries

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7642>

clover: handle memory object properties properly.

This adds proper support for the buffer/image property APIs.

Fixes:
CL CTS api buffer_properties_queries

v1.1: use a helper for properties parsing.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7642>

etnaviv: drop nir_print_shader(..) call

It makes no sense to print the shader in the middle of some NIR passes.
Instead someone could use NIR_PRINT=1 and call it a day. Also there
is a nir_print_shader(..) before calling emit_shader(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7625>

etnaviv: fix disabling of INT filter for real

Missing a copy of the pipe_sampler_state into the etna_sampler_state object
lead to the texture_use_int_filter() to always see a max_anisotropy of 0, so
the INT filter wasn't disabled when necessary. Also state emission should
never change the state objects, as this might also lead to stale information
being kept around the in the state object.

Fixes: 89a41dae7702 (etnaviv: do not use int filter when
                     anisotropic filtering is used)

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7638>

docs/features: document d3d12 features

Now that the d3d12 driver has landed, we should document it's features,
like we do with other drivers.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7583>

aco: don't use SMEM for SSBO stores

fossil-db (Navi):
Totals from 70 (0.05% of 138791) affected shaders:
SGPRs: 2324 -> 2097 (-9.77%)
VGPRs: 1344 -> 1480 (+10.12%)
CodeSize: 157872 -> 154836 (-1.92%); split: -1.93%, +0.01%
MaxWaves: 1288 -> 1260 (-2.17%)
Instrs: 29730 -> 29108 (-2.09%); split: -2.13%, +0.04%
Cycles: 394944 -> 391280 (-0.93%); split: -0.94%, +0.01%
VMEM: 5288 -> 5695 (+7.70%); split: +11.97%, -4.27%
SMEM: 2680 -> 2444 (-8.81%); split: +1.34%, -10.15%
VClause: 291 -> 502 (+72.51%)
SClause: 1176 -> 918 (-21.94%)
Copies: 3549 -> 3517 (-0.90%); split: -1.80%, +0.90%
Branches: 1230 -> 1228 (-0.16%)
PreSGPRs: 1675 -> 1491 (-10.99%)
PreVGPRs: 1101 -> 1223 (+11.08%)

Totals from 70 (0.05% of 139517) affected shaders (RAVEN):
SGPRs: 2368 -> 2121 (-10.43%)
VGPRs: 1344 -> 1480 (+10.12%)
CodeSize: 156664 -> 153252 (-2.18%)
MaxWaves: 636 -> 622 (-2.20%)
Instrs: 29968 -> 29226 (-2.48%)
Cycles: 398284 -> 393492 (-1.20%)
VMEM: 5544 -> 5930 (+6.96%); split: +11.72%, -4.76%
SMEM: 2752 -> 2502 (-9.08%); split: +1.20%, -10.28%
VClause: 292 -> 504 (+72.60%)
SClause: 1236 -> 940 (-23.95%)
Copies: 3907 -> 3852 (-1.41%); split: -2.20%, +0.79%
Branches: 1230 -> 1228 (-0.16%)
PreSGPRs: 1671 -> 1487 (-11.01%)
PreVGPRs: 1102 -> 1225 (+11.16%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6143>

mesa/main: add missing include in glformats.h

This header uses uint32_t without including stdint.h. This worked fine
by accident until a new c-source started including it.

Fixes: 1bf539b3a21 ("mesa: Clamp some depth values in glClearBufferfv")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7637>

aco/tests: add output modifier tests

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7605>

aco: fix fp16 *0.5 omod

We were testing for -0.5 instead.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 1210e0bd620 ("aco: create 16-bit input and output modifiers")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7605>

aco: disable omod if the sign of zeros should be preserved

The RDNA ISA doc says that omod doesn't preserve -0.0 in 6.2.2. LLVM
appears to always disable omod in this situation, but clamp is unaffected.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: df645fa369d ("aco: implement VK_KHR_shader_float_controls")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7605>

Revert "ci: Temporarily disable jobs on the Collabora lab"

Lab is back online now.

This reverts commit 902ac3d7c5ab75f2ff31bf23d1d5add7b5c377ed.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7630>

nir: don't consider txf_ms_mcs a query instruction

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6172>

util: fix unknown pragma warning on msvc

MSVC has no idea about these pragmas, and spews warnings about them,
making it hard to spot real problems. So let's only use these macros on
GCC.

Fixes: 2ec290cd92a ("util: Fix/silence variable shadowing warnings")
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7633>

aco: remove v_{add,sub,subrev}_u32 on GFX8

These opcodes are never used and they always write the carry-out
according to the GCN3 ISA documentation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7569>

microsoft/compiler: Fix reference to renamed intrinsic getter

Fixes: b9c61379 ("microsoft/compiler: translate nir to dxil")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7609>

util: Fix/silence variable shadowing warnings

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7552>

glsl: Fix -Wshadow warning

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7552>

ci: Temporarily disable jobs on the Collabora lab

There's a maintenance window of 4 hours to improve the lab
infrastructure.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7629>

iris: initialize shared screen->vtbl only once

Screen is shared among contexts, other context might be already using
vtbl while another initializes it again.

 ==45872== Possible data race during write of size 8 at 0x5DDAE78 by thread #549
 ==45872== Locks held: 1, at address 0x5D1B6F8
 ==45872==    at 0x6D66D91: gen9_init_state (iris_state.c:7816)
 ==45872==    by 0x6BA0A31: iris_create_context (iris_context.c:342)
 ==45872==    by 0x621F390: st_api_create_context (st_manager.c:917)
 ==45872==    by 0x620E6F9: dri_create_context (dri_context.c:163)
 ==45872==    by 0x6A40DB1: driCreateContextAttribs (dri_util.c:480)
 ==45872==    by 0x540B963: dri2_create_context (egl_dri2.c:1583)
 ==45872==    by 0x53FB84E: eglCreateContext (eglapi.c:821)
 ==45872==
 ==45872== This conflicts with a previous read of size 8 by thread #544
 ==45872== Locks held: 1, at address 0x5F6E0E0
 ==45872==    at 0x6CB779E: blorp_alloc_binding_table (iris_blorp.c:167)
 ==45872==    by 0x6CAEF70: blorp_emit_surface_states (blorp_genX_exec.h:1540)
 ==45872==    by 0x6CB67F9: blorp_exec (blorp_genX_exec.h:2016)
 ==45872==    by 0x6CB7AFE: iris_blorp_exec (iris_blorp.c:307)
 ==45872==    by 0x70F5916: try_blorp_blit (blorp_blit.c:2145)
 ==45872==    by 0x70F5FCA: do_blorp_blit (blorp_blit.c:2273)
 ==45872==    by 0x70F778F: blorp_copy (blorp_blit.c:2803)
 ==45872==    by 0x6BB9EB6: iris_copy_region (iris_blit.c:725)

v2: move as genX(init_screen_state) (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7544>

egl/dri2: fix race between image create and egl_image_target_texture

All other functions calling _eglLookupImage hold the display lock.

 ==16659== Possible data race during write of size 8 at 0x5D1BCF0 by thread #2668
 ==16659== Locks held: 1, at address 0x5D1B6F8
 ==16659==    at 0x5405DDF: _eglLinkResource (egldisplay.c:454)
 ==16659==    by 0x53F9189: _eglLinkImage (eglimage.h:138)
 ==16659==    by 0x53FE2CA: _eglCreateImageCommon (eglapi.c:1740)
 ==16659==    by 0x53FE39A: eglCreateImageKHR (eglapi.c:1751)
 ==16659==
 ==16659== This conflicts with a previous read of size 8 by thread #2664
 ==16659== Locks held: 1, at address 0x5308D00
 ==16659==    at 0x5405C06: _eglCheckResource (egldisplay.c:387)
 ==16659==    by 0x5408C92: _eglLookupImage (eglimage.h:162)
 ==16659==    by 0x5409E96: dri2_lookup_egl_image (egl_dri2.c:688)
 ==16659==    by 0x6210AAF: dri2_lookup_egl_image (dri_helpers.c:250)
 ==16659==    by 0x6212843: dri_get_egl_image (dri_screen.c:470)
 ==16659==    by 0x625F7CC: st_get_egl_image (st_cb_eglimage.c:152)
 ==16659==    by 0x625FE7D: st_egl_image_target_texture_2d (st_cb_eglimage.c:354)
 ==16659==    by 0x6501C05: egl_image_target_texture (teximage.c:3446)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7544>

lima: define set_clip_state implementation

In applications using clip planes, set_clip_state is expected to be
implemented in the backend. If it is not defined, it may cause the
application to segfault.

glClipPlane it is not part of GLES 2, so it is not trivial to reverse
engineer if something needs to be done in lima.
Other drivers just define a placeholder implementation for
set_clip_state, so for now let's just define one for lima too.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7088>

gallivm: fix float atomic exchange.

for atomic exchange floats are valid.

Fixes CL CTS test_atomic fails

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7595>

gallivm: lower vector compares

This lowers the any/all stuff.

Fixes unknown opcode in
./relationals/test_relationals

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7595>

gallivm/nir: lower dot products.

The nir lowering should suffice

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7595>

gallivm/nir: add fsum support

This is needed for lowered dot products, this opcode just
sums all the vector elements.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7595>

gallivm: add float to 8/16 int

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7595>

draw: fix tess eval pipeline statistics.

The number of invocations wasn't getting incremented correctly.

Fixes: 202bc38ce9e3 ("draw: collect tessellation invocations statistics")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7597>

ci: update the list of expected failures for RADV

Against vulkan-cts-1.2.4.1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7626>

ci: update the list of skipped tests for RAVEN

The list of default skipped tests should also be included.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7626>

radv: Use internal drm_fourcc.h

Fixes: 0833dd7d124 "amd/common: Add support for modifiers."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3794
̀Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7619>

etnaviv: nir: do not run opt loop after nir_lower_bool_xxx(..)

Running the optimizations after bool to float/int lowering is not going
to work. Large portions of NIR are likely to blow up if they see
floats/ints in weird places. Most of the bool->float/int conversions
are direct instruction substitutions and it's not going to leave a lot
of garbage around to optimize.

Fixes nir.h:261: nir_const_value_as_bool: Assertion `i == 0 || i == -1' failed
dEQP-GLES2.functional.shaders.loops.while_constant_iterations.no_iterations_vertex

Here are shader-db results for GC2000:

instructions HURT:   shaders/tesseract/488.shader_test FRAG:           516 -> 524 (1.55%)
instructions HURT:   shaders/tesseract/491.shader_test FRAG:           248 -> 260 (4.84%)
instructions HURT:   shaders/tesseract/494.shader_test FRAG:           244 -> 256 (4.92%)
instructions HURT:   shaders/tesseract/238.shader_test FRAG:           232 -> 244 (5.17%)
instructions HURT:   shaders/tesseract/241.shader_test FRAG:           232 -> 244 (5.17%)
instructions HURT:   shaders/tesseract/127.shader_test FRAG:           76 -> 80 (5.26%)
instructions HURT:   shaders/tesseract/130.shader_test FRAG:           148 -> 156 (5.41%)
instructions HURT:   shaders/tesseract/226.shader_test FRAG:           192 -> 204 (6.25%)
instructions HURT:   shaders/tesseract/229.shader_test FRAG:           192 -> 204 (6.25%)
instructions HURT:   shaders/tesseract/217.shader_test FRAG:           152 -> 164 (7.89%)
instructions HURT:   shaders/tesseract/214.shader_test FRAG:           152 -> 164 (7.89%)
instructions HURT:   shaders/tesseract/205.shader_test FRAG:           112 -> 124 (10.71%)
instructions HURT:   shaders/tesseract/202.shader_test FRAG:           112 -> 124 (10.71%)
instructions HURT:   shaders/tesseract/169.shader_test FRAG:           32 -> 36 (12.50%)
instructions HURT:   shaders/tesseract/166.shader_test FRAG:           32 -> 36 (12.50%)
instructions HURT:   shaders/deqp_gles3/61312.shader_test FRAG:        448 -> 508 (13.39%)
instructions HURT:   shaders/deqp_gles3/61309.shader_test FRAG:        448 -> 508 (13.39%)
instructions HURT:   shaders/deqp_gles3/61324.shader_test FRAG:        448 -> 508 (13.39%)
instructions HURT:   shaders/tesseract/118.shader_test FRAG:           28 -> 32 (14.29%)
instructions HURT:   shaders/tesseract/181.shader_test FRAG:           52 -> 60 (15.38%)
instructions HURT:   shaders/tesseract/178.shader_test FRAG:           52 -> 60 (15.38%)
instructions HURT:   shaders/tesseract/121.shader_test FRAG:           52 -> 60 (15.38%)
instructions HURT:   shaders/tesseract/193.shader_test FRAG:           72 -> 84 (16.67%)
instructions HURT:   shaders/tesseract/190.shader_test FRAG:           72 -> 84 (16.67%)

total instructions in shared programs: 64220 -> 64572 (0.55%)
instructions in affected programs: 4924 -> 5276 (7.15%)
helped: 5
HURT: 24
helped stats (abs) min: 4 max: 8 x̄: 5.60 x̃: 4
helped stats (rel) min: 4.35% max: 5.41% x̄: 4.72% x̃: 4.35%
HURT stats (abs)   min: 4 max: 60 x̄: 15.83 x̃: 12
HURT stats (rel)   min: 1.55% max: 16.67% x̄: 10.04% x̃: 10.71%
95% mean confidence interval for instructions value: 5.39 18.89
95% mean confidence interval for instructions %-change: 4.81% 10.18%
Instructions are HURT.

total temps in shared programs: 2514 -> 2512 (-0.08%)
temps in affected programs: 9 -> 7 (-22.22%)
helped: 2
HURT: 0

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7624>

v3dv/pipeline: take into account precision for the output_type

By default we are using 32bit output type for texture operations,
16bit for shadow.

With this commit we also use the precision info from the sampler (that
is assigned if SPIR-V uses RelaxedPrecision decorator), in order to
use 16bit.

This is a first step as only take into account the precision of the
deref_vars used on the texture operation.

But the decoration can be also applied to other cases, like the result
of the operation. That means that there are ways to infer that the
texture operation can operate at relaxed precision. Those cases would
be handled on following patches.

v2:
    * Add directly the return_size on the descriptor_map, instead of
      shadow/relaxed_precision.
    * Check relaxed precision for images too (Iago)
    * Handle the return size for the default sampler

v3:
    * Handle different output size for the case of not having a sampler.
    * Comment fixes (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7545>

v3dv: remove combined_idx support

Now that the v3d compiler has support for separated texture and
sampler indices, we can stop to combine them. Again, that's what
Vulkan allows after all.

As we are doing this we can't use anymore the texture format (coming
from the texture) to chose the return size (that is a sampling
parameter). We default for 32, and just go to 16 for shadow. We plan
to use SPIR-V RelaxedPrecision to use in more cases 16 bit. We would
do that on following patches.

v2 (from Iago feedback):
   * Fix typos/bad grammar on comments.
   * Move tex/sampler number assert to before the loop that fills
     tex/sampler info.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7545>

broadcom/compiler: separate texture/sampler info from v3d_key

So far the v3d compiler has them combined, as for OpenGL both are the
same. This change is intended to fit the v3d compiler better with
Vulkan, where they are separate concepts.

Note that NIR has them separate for a long time, both on nir_variable
and on some NIR lowerings.

v2: (from Iago feedback)
    * Use key->num_tex/sampler_used to iterate through the array
    * Fill up num_samplers_used on v3d, assert that is the same that
      num_tex_used if possible.

v3: (Iago)
    * Assert num_tex/samplers_used is smaller that tex/sampler array size.

v4: Update assert mentioned on v3 to use <= instead of < (detected by CI)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
squash! broadcom/compiler: separate texture/sampler info from v3d_key

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7545>

v3dv: cleanup/remove support for pre-generated variants

In preparation to the changes that would allow to not need them.

It is worth to note that it is likely (we have some ideas in mind)
that we would need to bring back pre-generate variants on the
future. The approach is slightly different on v3dv_pipeline vs
v3dv_cmd_buffer:

  * v3dv_pipeline: even after the clean-up, we had code for all the
    functions they have, even if they were doing less things
    (specifically, a second shader variant), so they still make sense
    on their own, and serve as template for adding support of multiple
    pre-generated shader variants in the future.

  * v3dv_cmd_buffer: as we really don't need to fill up the key with
    some after-pipeline data, we would end with some functions empty
    (specifically cmd_buffer_populate_v3d_key). Even as a placeholder,
    that would be odd. Additionally the current code has a lot of
    boilerplate code (functions to fill up vs, cs and fs keys are
    basically the same), and we already have in mind refactor them. So
    it would be better to remove all of them, instead of keeping
    around some code we would not be happy with. If in the future we
    pregenerate more that one variant, hopefully the new code to chose
    between them would be better.

v2: clarify the commit message, and fix typos on the comments (Iago)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7545>

nir/lower_tex: clarify nir_lower_tex_options indexing

This doesn't matter too much on OpenGL as texture id and sampler id
are the same, but become relevant if using the lowering for Vulkan.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7545>

drm/uapi: Fix modifier field mask for AMD modifiers.

The DCC_MAX_COMPRESSED_BLOCK has to contain one of
AMD_FMT_MOD_DCC_BLOCK_* and with 3 values this doesn't
fit in 1 bit.

Fix this cleanly while it is only in drm-next.

Fixes: 2cc2b456889 "drm-uapi: Add AMD modifiers."
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7607>

v3dv: Remove unsigned comparison to zero.

index is of type uint32_t.

Fix defects reported by Coverity Scan.

Macro compares unsigned to 0 (NO_EFFECT)
unsigned_compare: This greater-than-or-equal-to-zero comparison of
an unsigned value is always true. index >= 0U.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7518>

vdpau: Add missing printf format specifier.

Fix defect reported by Coverity Scan.

Extra argument to printf format specifier (PRINTF_ARGS)
extra_argument: This argument was not used by the format string: vmixer->max_layers.

Fixes: 89b986325227 ("vdpau: Add support for parameters")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7200>

nvir/gm107: Initialize SchedDataCalculatorGM107 member score.

Fix defect reported by Coverity Scan.

Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member score is not initialized in
this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7324>

freedreno/ir3: Fix crash in shader compile fail path

Fixes: 74140c2e859 ("freedreno/ir3: convert over to ralloc")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7612>

freedreno/ir3: Add pass to deal with load_uniform base offsets

With indirect load_uniform, we can only encode 10b of constant base
offset.  This pass detects problematic cases and peels out the high
bits of the base offset.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7612>